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Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000a98 * .text
4 00000000 .align 1
5 00000000 .globl _cmpd
6 00000000 _cmpd:
7 0001B358 0000 .word L215
8 0001B35A # #include "fpp_defs.h"
9 0001B35A #
10 0001B35A #
11 0001B35A #
12 0001B35A # /***************************************************************************
13 0001B35A # *
14 0001B35A # * CMPD -COMPARE SGL ACCUMULATOR TO SGL OPERAND
15 0001B35A # *
16 0001B35A # *****************************************************************************/
17 0001B35A # cmpd()
18 0001B35A # {
19 0001B35A 11 41 jbr L217
20 0001B35C L218:
21 0001B35C # asm(".globl _cmpd_t");
22 0001B35C .globl _cmpd_t
23 0001B35C # asm("_cmpd_t:"); /* entry address */
24 0001B35C _cmpd_t:
25 0001B35C # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
26 0001B35C 1d effffffff6 01 cmpl _cycle,$1
27 0001B363 21 15 jneq L219
28 0001B365 5d efffffffed tstl _prt_hdrs
29 0001B36B 31 0d jeql L219
30 0001B36D # {
31 0001B36D # writes(" CMPD");
32 0001B36D .data 1
33 00000a98 * L221:
34 00000a98 * 20434D504400 .ascii " CMPD\0"
35 00000a9e * .text
36 0001B36D dd 8f00000a98 pushl $L221
37 0001B373 fe 08 efffffffde callf $8,_writes
38 0001B37A # }
39 0001B37A # cmpd_1(); /* test via registers */
40 0001B37A L219:
41 0001B37A fe 04 ef0000001f callf $4,_cmpd_1
42 0001B381 # cmpd_2(); /* test via cache */
43 0001B381 fe 04 ef00000274 callf $4,_cmpd_2
44 0001B388 # cmpd_3(); /* register corruption test */
45 0001B388 fe 04 ef00000489 callf $4,_cmpd_3
46 0001B38F # cmpd_4(); /* acc. corruption test */
47 0001B38F fe 04 ef0000068a callf $4,_cmpd_4
48 0001B396 # asm("jmp *return"); /* return to the test monitor */
49 0001B396 71 ffffffffbc jmp *return
50 0001B39C # }
51 0001B39C 40 ret#2
52 0001B39D .set L215,0x0
53 0001B39D L217:
54 0001B39D 11 bd jbr L218
55 0001B39F .data
56 00000a98 * .text
57 0001B39F 00 .align 1
58 0001B3A0 .globl _cmpd_1
59 0001B3A0 _cmpd_1:
60 0001B3A0 0000 .word L226
61 0001B3A2 #
62 0001B3A2 #
63 0001B3A2 #
64 0001B3A2 # /****************************************************************************
65 0001B3A2 # *
66 0001B3A2 # * SUBTEST 1 - CMPD status test -register data
67 0001B3A2 # *
68 0001B3A2 # ****************************************************************************/
69 0001B3A2 # cmpd_1()
70 0001B3A2 # {
71 0001B3A2 13 0253 jbr L228
72 0001B3A5 L229:
73 0001B3A5 # force_loop = FALSE;
74 0001B3A5 4d efffffffad clrl _force_loop
75 0001B3AB # subtest = 1;
76 0001B3AB 0d 01 efffffffa6 movl $1,_subtest
77 0001B3B2 # index = 0;
78 0001B3B2 4d efffffffa0 clrl _index
79 0001B3B8 # do
80 0001B3B8 L232:
81 0001B3B8 # {
82 0001B3B8 # dbl_value_1 = cmpd_1_data[index].one; /* get the data operands */
83 0001B3B8 5c 14 efffffff99 50 mull3 $20,_index,r0
84 0001B3C0 0c 8f00000000 50 addl2 $_cmpd_1_data,r0
85 0001B3C7 0d a004 efffffff8d movl 4(r0),_dbl_value_1+4
86 0001B3CF 0d 60 efffffff82 movl (r0),_dbl_value_1
87 0001B3D6 # dbl_value_2 = cmpd_1_data[index].two;
88 0001B3D6 5c 14 efffffff7b 50 mull3 $20,_index,r0
89 0001B3DE 0c 8f00000008 50 addl2 $_cmpd_1_data+8,r0
90 0001B3E5 0d a004 efffffff6f movl 4(r0),_dbl_value_2+4
91 0001B3ED 0d 60 efffffff64 movl (r0),_dbl_value_2
92 0001B3F4 # sgl_expected = cmpd_1_data[index].flag; /* get expected results */
93 0001B3F4 5c 14 efffffff5d 50 mull3 $20,_index,r0
94 0001B3FC 0d e000000010 efffffff51 movl _cmpd_1_data+16(r0),_sgl_expected
95 0001B407 # sgl_value_1 = dbl_value_1.m;
96 0001B407 0d efffffff4b efffffff46 movl _dbl_value_1,_sgl_value_1
97 0001B412 # sgl_value_2 = dbl_value_1.l;
98 0001B412 0d efffffff44 efffffff3b movl _dbl_value_1+4,_sgl_value_2
99 0001B41D # sgl_value_3 = dbl_value_2.m;
100 0001B41D 0d efffffff35 efffffff30 movl _dbl_value_2,_sgl_value_3
101 0001B428 # sgl_value_4 = dbl_value_2.l;
102 0001B428 0d efffffff2e efffffff25 movl _dbl_value_2+4,_sgl_value_4
103 0001B433 # status_index = 0; /* clear the status index */
104 0001B433 4d efffffff1f clrl _status_index
105 0001B439 # do
106 0001B439 L235:
107 0001B439 # {
108 0001B439 # sgl_dummy1 = status_array[status_index]; /* array = +, -, 0 */
109 0001B439 0d efffffff19 50 movl _status_index,r0
110 0001B440 0d 40efffffff11 movl _status_array[r0],_sgl_dummy1
efffffff0c
111 0001B44C # /*
112 0001B44C # * If LOOP ON ERROR is set, this is the loop for this subtest.
113 0001B44C # * The force loop flag is set after the first error.
114 0001B44C # */
115 0001B44C # asm("_cmpd_1_lp1:");
116 0001B44C _cmpd_1_lp1:
117 0001B44C # asm("movl _sgl_value_1,r4"); /* move operand #1 to r4 */
118 0001B44C 0d efffffff06 54 movl _sgl_value_1,r4
119 0001B453 # asm("movl _sgl_value_2,r5"); /* move operand #1 to r5 */
120 0001B453 0d effffffeff 55 movl _sgl_value_2,r5
121 0001B45A # asm("movl _sgl_value_3,r6"); /* move operand #2 to r6 */
122 0001B45A 0d effffffef8 56 movl _sgl_value_3,r6
123 0001B461 # asm("movl _sgl_value_4,r7"); /* move operand #2 to r7 */
124 0001B461 0d effffffef1 57 movl _sgl_value_4,r7
125 0001B468 # asm("ldd r4"); /* load the operand */
126 0001B468 07 54 ldd r4
127 0001B46A # asm("tstl _sgl_dummy1"); /* generate initial status */
128 0001B46A 5d effffffee8 tstl _sgl_dummy1
129 0001B470 # asm("movpsl _init_psl"); /* save the initial status */
130 0001B470 cd effffffee2 movpsl _init_psl
131 0001B476 # asm("cmpd r6"); /* compare the operands */
132 0001B476 37 56 cmpd r6
133 0001B478 # asm("movpsl _psl_val"); /* save the final status */
134 0001B478 cd effffffeda movpsl _psl_val
135 0001B47E # if( force_loop ) /* loop? */
136 0001B47E 5d effffffed4 tstl _force_loop
137 0001B484 31 02 jeql L236
138 0001B486 # asm("brb _cmpd_1_lp1");; /* run the loop again */
139 0001B486 11 c4 brb _cmpd_1_lp1
140 0001B488 L236:
141 0001B488 # exp_psl = init_psl; /* get the initial PSL */
142 0001B488 0d effffffeca effffffec5 movl _init_psl,_exp_psl
143 0001B493 # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
144 0001B493 ac 88f3 effffffebd andl2 $-13,_exp_psl
145 0001B49B # if( sgl_expected == ZERO )
146 0001B49B 1d effffffeb7 04 cmpl _sgl_expected,$4
147 0001B4A2 21 07 jneq L237
148 0001B4A4 # exp_psl |= PSL_Z; /* expect the ZERO bit set */
149 0001B4A4 8c 04 effffffead orl2 $4,_exp_psl
150 0001B4AB # if( sgl_expected == NEGATIVE )
151 0001B4AB L237:
152 0001B4AB 1d effffffea7 08 cmpl _sgl_expected,$8
153 0001B4B2 21 07 jneq L238
154 0001B4B4 # exp_psl |= PSL_N; /* expect the NEG bit set */
155 0001B4B4 8c 08 effffffe9d orl2 $8,_exp_psl
156 0001B4BB # if( psl_val != exp_psl ) { /* COMPARE the values */
157 0001B4BB L238:
158 0001B4BB 1d effffffe97 effffffe92 cmpl _psl_val,_exp_psl
159 0001B4C6 21 03 13 00fe jeql L239
160 0001B4CB # errcnt++; /* bump the error count */
161 0001B4CB 6d effffffe87 incl _errcnt
162 0001B4D1 # if ( prt_error ) {
163 0001B4D1 5d effffffe81 tstl _prt_error
164 0001B4D7 21 03 13 00ca jeql L240
165 0001B4DC # writes(" \n"); /* start a new print line */
166 0001B4DC .data 1
167 00000a9e * L241:
168 00000a9e * 200A00 .ascii " \12\0"
169 00000aa1 * .text
170 0001B4DC dd 8f00000a9e pushl $L241
171 0001B4E2 fe 08 effffffe6f callf $8,_writes
172 0001B4E9 # writes("cycle: ");
173 0001B4E9 .data 1
174 00000aa1 * L242:
175 00000aa1 * 6379636C653A2000 .ascii "cycle: \0"
176 00000aa9 * .text
177 0001B4E9 dd 8f00000aa1 pushl $L242
178 0001B4EF fe 08 effffffe62 callf $8,_writes
179 0001B4F6 # writed( cycle );
180 0001B4F6 dd effffffe5c pushl _cycle
181 0001B4FC fe 08 effffffe55 callf $8,_writed
182 0001B503 # writes(" CMPD test ");
183 0001B503 .data 1
184 00000aa9 * L244:
185 00000aa9 * 2020434D50442074657374200 .ascii " CMPD test \0"
0
186 00000ab6 * .text
187 0001B503 dd 8f00000aa9 pushl $L244
188 0001B509 fe 08 effffffe48 callf $8,_writes
189 0001B510 # writed( test_no );
190 0001B510 dd effffffe42 pushl _test_no
191 0001B516 fe 08 effffffe3b callf $8,_writed
192 0001B51D # writes(", subtest 1 (Reg. Data) - BAD FINAL PSL\n");
193 0001B51D .data 1
194 00000ab6 * L245:
195 00000ab6 * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL PSL\12\0"
85265672E204461746129202D
204241442046494E414C20505
34C0A00
196 00000adf * .text
197 0001B51D dd 8f00000ab6 pushl $L245
198 0001B523 fe 08 effffffe2e callf $8,_writes
199 0001B52A # print_cmpd_data();
200 0001B52A fe 04 ef00000731 callf $4,_print_cmpd_data
201 0001B531 # writes(", index = ");
202 0001B531 .data 1
203 00000adf * L247:
204 00000adf * 2C2020696E646578203D2000 .ascii ", index = \0"
205 00000aeb * .text
206 0001B531 dd 8f00000adf pushl $L247
207 0001B537 fe 08 effffffe1a callf $8,_writes
208 0001B53E # writed( index );
209 0001B53E dd effffffe14 pushl _index
210 0001B544 fe 08 effffffe0d callf $8,_writed
211 0001B54B # writes("\ninitial PSL = ");
212 0001B54B .data 1
213 00000aeb * L248:
214 00000aeb * 0A696E697469616C2050534C2 .ascii "\12initial PSL = \0"
03D2000
215 00000afb * .text
216 0001B54B dd 8f00000aeb pushl $L248
217 0001B551 fe 08 effffffe00 callf $8,_writes
218 0001B558 # write32h( init_psl );
219 0001B558 dd effffffdfa pushl _init_psl
220 0001B55E fe 08 effffffdf3 callf $8,_write32h
221 0001B565 # writes(", final PSL = ");
222 0001B565 .data 1
223 00000afb * L250:
224 00000afb * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
225 00000b0b * .text
226 0001B565 dd 8f00000afb pushl $L250
227 0001B56B fe 08 effffffde6 callf $8,_writes
228 0001B572 # write32h( psl_val );
229 0001B572 dd effffffde0 pushl _psl_val
230 0001B578 fe 08 effffffdd9 callf $8,_write32h
231 0001B57F # writes(", expected PSL = ");
232 0001B57F .data 1
233 00000b0b * L251:
234 00000b0b * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
235 00000b1e * .text
236 0001B57F dd 8f00000b0b pushl $L251
237 0001B585 fe 08 effffffdcc callf $8,_writes
238 0001B58C # write32h( exp_psl );
239 0001B58C dd effffffdc6 pushl _exp_psl
240 0001B592 fe 08 effffffdbf callf $8,_write32h
241 0001B599 # writes("\n");
242 0001B599 .data 1
243 00000b1e * L252:
244 00000b1e * 0A00 .ascii "\12\0"
245 00000b20 * .text
246 0001B599 dd 8f00000b1e pushl $L252
247 0001B59F fe 08 effffffdb2 callf $8,_writes
248 0001B5A6 # }
249 0001B5A6 # if ( halt_flg )
250 0001B5A6 L240:
251 0001B5A6 5d effffffdac tstl _halt_flg
252 0001B5AC 31 09 jeql L253
253 0001B5AE # cmpd_er_halt( BAD_PSL_HLT );/* halt on the error */
254 0001B5AE dd 03 pushl $3
255 0001B5B0 fe 08 ef00000713 callf $8,_cmpd_er_halt
256 0001B5B7 # if ( loop_on_err ) {
257 0001B5B7 L253:
258 0001B5B7 5d effffffd9b tstl _loop_on_err
259 0001B5BD 31 0a jeql L255
260 0001B5BF # force_loop = TRUE; /* set the force loop flag */
261 0001B5BF 0d 01 effffffd92 movl $1,_force_loop
262 0001B5C6 # asm("brw _cmpd_1_lp1"); /* and loop on the error */
263 0001B5C6 13 fe83 brw _cmpd_1_lp1
264 0001B5C9 # } /* end of loop on error */
265 0001B5C9 # } /* end of compare error */
266 0001B5C9 L255:
267 0001B5C9 # } while( ++status_index < 3 ); /* end of WHILE loop */
268 0001B5C9 L239:
269 0001B5C9 L234:
270 0001B5C9 6d effffffd89 incl _status_index
271 0001B5CF 0d effffffd83 50 movl _status_index,r0
272 0001B5D6 1d 50 03 cmpl r0,$3
273 0001B5D9 81 03 13 fe5b jlss L235
274 0001B5DE L233:
275 0001B5DE # } while ( index++ < max_cmpd_1_index ); /* end of WHILE loop */
276 0001B5DE L231:
277 0001B5DE 0d effffffd74 50 movl _index,r0
278 0001B5E5 6d effffffd6d incl _index
279 0001B5EB 1d 50 effffffd66 cmpl r0,_max_cmpd_1_index
280 0001B5F2 81 03 13 fdc1 jlss L232
281 0001B5F7 L230:
282 0001B5F7 # } /* end of subtest 1 */
283 0001B5F7 40 ret#2
284 0001B5F8 .set L226,0x0
285 0001B5F8 L228:
286 0001B5F8 13 fdaa jbr L229
287 0001B5FB .data
288 00000a98 * .text
289 0001B5FB 00 .align 1
290 0001B5FC .globl _cmpd_2
291 0001B5FC _cmpd_2:
292 0001B5FC 0000 .word L256
293 0001B5FE #
294 0001B5FE #
295 0001B5FE #
296 0001B5FE # /****************************************************************************
297 0001B5FE # *
298 0001B5FE # * SUBTEST 2 - CMPD status test -cache data
299 0001B5FE # *
300 0001B5FE # ****************************************************************************/
301 0001B5FE # cmpd_2()
302 0001B5FE # {
303 0001B5FE 13 0213 jbr L258
304 0001B601 L259:
305 0001B601 # force_loop = FALSE;
306 0001B601 4d effffffd51 clrl _force_loop
307 0001B607 # subtest = 2;
308 0001B607 0d 02 effffffd4a movl $2,_subtest
309 0001B60E # index = 0;
310 0001B60E 4d effffffd44 clrl _index
311 0001B614 # do
312 0001B614 L262:
313 0001B614 # {
314 0001B614 # dbl_value_1 = cmpd_1_data[index].one; /* get the data operands */
315 0001B614 5c 14 effffffd3d 50 mull3 $20,_index,r0
316 0001B61C 0c 8f00000000 50 addl2 $_cmpd_1_data,r0
317 0001B623 0d a004 effffffd31 movl 4(r0),_dbl_value_1+4
318 0001B62B 0d 60 effffffd26 movl (r0),_dbl_value_1
319 0001B632 # dbl_value_2 = cmpd_1_data[index].two;
320 0001B632 5c 14 effffffd1f 50 mull3 $20,_index,r0
321 0001B63A 0c 8f00000008 50 addl2 $_cmpd_1_data+8,r0
322 0001B641 0d a004 effffffd13 movl 4(r0),_dbl_value_2+4
323 0001B649 0d 60 effffffd08 movl (r0),_dbl_value_2
324 0001B650 # sgl_expected = cmpd_1_data[index].flag;/* get expected results */
325 0001B650 5c 14 effffffd01 50 mull3 $20,_index,r0
326 0001B658 0d e000000010 effffffcf5 movl _cmpd_1_data+16(r0),_sgl_expected
327 0001B663 # status_index = 0; /* clear the status index */
328 0001B663 4d effffffcef clrl _status_index
329 0001B669 # do
330 0001B669 L265:
331 0001B669 # {
332 0001B669 # sgl_dummy1 = status_array[status_index]; /* array = +, -, 0 */
333 0001B669 0d effffffce9 50 movl _status_index,r0
334 0001B670 0d 40effffffce1 movl _status_array[r0],_sgl_dummy1
effffffcdc
335 0001B67C # /*
336 0001B67C # * If LOOP ON ERROR is set, this is the loop for this subtest.
337 0001B67C # * The force loop flag is set after the first error.
338 0001B67C # */
339 0001B67C # asm("_cmpd_2_lp1:");
340 0001B67C _cmpd_2_lp1:
341 0001B67C # asm("ldd _dbl_value_1"); /* load the 1st operand */
342 0001B67C 07 effffffcd6 ldd _dbl_value_1
343 0001B682 # asm("tstl _sgl_dummy1"); /* generate initial status */
344 0001B682 5d effffffcd0 tstl _sgl_dummy1
345 0001B688 # asm("movpsl _init_psl"); /* save the initial status */
346 0001B688 cd effffffcca movpsl _init_psl
347 0001B68E # asm("cmpd _dbl_value_2"); /* compare the operands */
348 0001B68E 37 effffffcc4 cmpd _dbl_value_2
349 0001B694 # asm("movpsl _psl_val"); /* save the final status */
350 0001B694 cd effffffcbe movpsl _psl_val
351 0001B69A # if( force_loop ) /* loop? */
352 0001B69A 5d effffffcb8 tstl _force_loop
353 0001B6A0 31 02 jeql L266
354 0001B6A2 # asm("brb _cmpd_2_lp1");; /* run the loop again */
355 0001B6A2 11 d8 brb _cmpd_2_lp1
356 0001B6A4 L266:
357 0001B6A4 # exp_psl = init_psl; /* get the initial PSL */
358 0001B6A4 0d effffffcae effffffca9 movl _init_psl,_exp_psl
359 0001B6AF # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
360 0001B6AF ac 88f3 effffffca1 andl2 $-13,_exp_psl
361 0001B6B7 # if( sgl_expected == ZERO )
362 0001B6B7 1d effffffc9b 04 cmpl _sgl_expected,$4
363 0001B6BE 21 07 jneq L267
364 0001B6C0 # exp_psl |= PSL_Z; /* expect the ZERO bit set */
365 0001B6C0 8c 04 effffffc91 orl2 $4,_exp_psl
366 0001B6C7 # if( sgl_expected == NEGATIVE )
367 0001B6C7 L267:
368 0001B6C7 1d effffffc8b 08 cmpl _sgl_expected,$8
369 0001B6CE 21 07 jneq L268
370 0001B6D0 # exp_psl |= PSL_N; /* expect the NEG bit set */
371 0001B6D0 8c 08 effffffc81 orl2 $8,_exp_psl
372 0001B6D7 # if( psl_val != exp_psl ) { /* COMPARE the values */
373 0001B6D7 L268:
374 0001B6D7 1d effffffc7b effffffc76 cmpl _psl_val,_exp_psl
375 0001B6E2 21 03 13 00fe jeql L269
376 0001B6E7 # errcnt++; /* bump the error count */
377 0001B6E7 6d effffffc6b incl _errcnt
378 0001B6ED # if ( prt_error ) {
379 0001B6ED 5d effffffc65 tstl _prt_error
380 0001B6F3 21 03 13 00ca jeql L270
381 0001B6F8 # writes(" \n"); /* start a new print line */
382 0001B6F8 .data 1
383 00000b20 * L271:
384 00000b20 * 200A00 .ascii " \12\0"
385 00000b23 * .text
386 0001B6F8 dd 8f00000b20 pushl $L271
387 0001B6FE fe 08 effffffc53 callf $8,_writes
388 0001B705 # writes("cycle: ");
389 0001B705 .data 1
390 00000b23 * L272:
391 00000b23 * 6379636C653A2000 .ascii "cycle: \0"
392 00000b2b * .text
393 0001B705 dd 8f00000b23 pushl $L272
394 0001B70B fe 08 effffffc46 callf $8,_writes
395 0001B712 # writed( cycle );
396 0001B712 dd effffffc40 pushl _cycle
397 0001B718 fe 08 effffffc39 callf $8,_writed
398 0001B71F # writes(" CMPD test ");
399 0001B71F .data 1
400 00000b2b * L273:
401 00000b2b * 2020434D50442074657374200 .ascii " CMPD test \0"
0
402 00000b38 * .text
403 0001B71F dd 8f00000b2b pushl $L273
404 0001B725 fe 08 effffffc2c callf $8,_writes
405 0001B72C # writed( test_no );
406 0001B72C dd effffffc26 pushl _test_no
407 0001B732 fe 08 effffffc1f callf $8,_writed
408 0001B739 # writes(", subtest 2 (Cache Data) - BAD FINAL PSL\n");
409 0001B739 .data 1
410 00000b38 * L274:
411 00000b38 * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL PSL\12\0"
8436163686520446174612920
2D204241442046494E414C205
0534C0A00
412 00000b62 * .text
413 0001B739 dd 8f00000b38 pushl $L274
414 0001B73F fe 08 effffffc12 callf $8,_writes
415 0001B746 # print_cmpd_data();
416 0001B746 fe 04 ef00000515 callf $4,_print_cmpd_data
417 0001B74D # writes(", index = ");
418 0001B74D .data 1
419 00000b62 * L275:
420 00000b62 * 2C2020696E646578203D2000 .ascii ", index = \0"
421 00000b6e * .text
422 0001B74D dd 8f00000b62 pushl $L275
423 0001B753 fe 08 effffffbfe callf $8,_writes
424 0001B75A # writed( index );
425 0001B75A dd effffffbf8 pushl _index
426 0001B760 fe 08 effffffbf1 callf $8,_writed
427 0001B767 # writes("\ninitial PSL = ");
428 0001B767 .data 1
429 00000b6e * L276:
430 00000b6e * 0A696E697469616C2050534C2 .ascii "\12initial PSL = \0"
03D2000
431 00000b7e * .text
432 0001B767 dd 8f00000b6e pushl $L276
433 0001B76D fe 08 effffffbe4 callf $8,_writes
434 0001B774 # write32h( init_psl );
435 0001B774 dd effffffbde pushl _init_psl
436 0001B77A fe 08 effffffbd7 callf $8,_write32h
437 0001B781 # writes(", final PSL = ");
438 0001B781 .data 1
439 00000b7e * L277:
440 00000b7e * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
441 00000b8e * .text
442 0001B781 dd 8f00000b7e pushl $L277
443 0001B787 fe 08 effffffbca callf $8,_writes
444 0001B78E # write32h( psl_val );
445 0001B78E dd effffffbc4 pushl _psl_val
446 0001B794 fe 08 effffffbbd callf $8,_write32h
447 0001B79B # writes(", expected PSL = ");
448 0001B79B .data 1
449 00000b8e * L278:
450 00000b8e * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
451 00000ba1 * .text
452 0001B79B dd 8f00000b8e pushl $L278
453 0001B7A1 fe 08 effffffbb0 callf $8,_writes
454 0001B7A8 # write32h( exp_psl );
455 0001B7A8 dd effffffbaa pushl _exp_psl
456 0001B7AE fe 08 effffffba3 callf $8,_write32h
457 0001B7B5 # writes("\n");
458 0001B7B5 .data 1
459 00000ba1 * L279:
460 00000ba1 * 0A00 .ascii "\12\0"
461 00000ba3 * .text
462 0001B7B5 dd 8f00000ba1 pushl $L279
463 0001B7BB fe 08 effffffb96 callf $8,_writes
464 0001B7C2 # }
465 0001B7C2 # if ( halt_flg )
466 0001B7C2 L270:
467 0001B7C2 5d effffffb90 tstl _halt_flg
468 0001B7C8 31 09 jeql L280
469 0001B7CA # cmpd_er_halt( BAD_PSL_HLT ); /* halt on the error */
470 0001B7CA dd 03 pushl $3
471 0001B7CC fe 08 ef000004f7 callf $8,_cmpd_er_halt
472 0001B7D3 # if ( loop_on_err ) {
473 0001B7D3 L280:
474 0001B7D3 5d effffffb7f tstl _loop_on_err
475 0001B7D9 31 0a jeql L281
476 0001B7DB # force_loop = TRUE; /* set the force loop flag */
477 0001B7DB 0d 01 effffffb76 movl $1,_force_loop
478 0001B7E2 # asm("brw _cmpd_2_lp1"); /* and loop on the error */
479 0001B7E2 13 fe97 brw _cmpd_2_lp1
480 0001B7E5 # } /* end of loop on error */
481 0001B7E5 # } /* end of compare error */
482 0001B7E5 L281:
483 0001B7E5 # } while( ++status_index < 3 ); /* end of WHILE loop */
484 0001B7E5 L269:
485 0001B7E5 L264:
486 0001B7E5 6d effffffb6d incl _status_index
487 0001B7EB 0d effffffb67 50 movl _status_index,r0
488 0001B7F2 1d 50 03 cmpl r0,$3
489 0001B7F5 81 03 13 fe6f jlss L265
490 0001B7FA L263:
491 0001B7FA # } while ( index++ < max_cmpd_1_index ); /* end of WHILE loop */
492 0001B7FA L261:
493 0001B7FA 0d effffffb58 50 movl _index,r0
494 0001B801 6d effffffb51 incl _index
495 0001B807 1d 50 effffffb4a cmpl r0,_max_cmpd_1_index
496 0001B80E 81 03 13 fe01 jlss L262
497 0001B813 L260:
498 0001B813 # } /* end of subtest 2 */
499 0001B813 40 ret#2
500 0001B814 .set L256,0x0
501 0001B814 L258:
502 0001B814 13 fdea jbr L259
503 0001B817 .data
504 00000a98 * .text
505 0001B817 00 .align 1
506 0001B818 .globl _cmpd_3
507 0001B818 _cmpd_3:
508 0001B818 0000 .word L282
509 0001B81A #
510 0001B81A #
511 0001B81A #
512 0001B81A # /************************************************************************
513 0001B81A # *
514 0001B81A # * SUBTEST 3 - Check for register corruption
515 0001B81A # *
516 0001B81A # ************************************************************************/
517 0001B81A # cmpd_3()
518 0001B81A # {
519 0001B81A 13 0200 jbr L284
520 0001B81D L285:
521 0001B81D # force_loop = FALSE; /* clear force_loop flg */
522 0001B81D 4d effffffb35 clrl _force_loop
523 0001B823 # subtest = 3;
524 0001B823 0d 03 effffffb2e movl $3,_subtest
525 0001B82A # fill_reg_buf( load_regs ); /* get pattern for regs */
526 0001B82A dd 8f00000000 pushl $_load_regs
527 0001B830 fe 08 effffffb21 callf $8,_fill_reg_buf
528 0001B837 # index = 0;
529 0001B837 4d effffffb1b clrl _index
530 0001B83D # do
531 0001B83D L289:
532 0001B83D # {
533 0001B83D # dbl_value_1 = cmpd_1_data[index].one; /* data to load */
534 0001B83D 5c 14 effffffb14 50 mull3 $20,_index,r0
535 0001B845 0c 8f00000000 50 addl2 $_cmpd_1_data,r0
536 0001B84C 0d a004 effffffb08 movl 4(r0),_dbl_value_1+4
537 0001B854 0d 60 effffffafd movl (r0),_dbl_value_1
538 0001B85B # dbl_value_2 = cmpd_1_data[index].two; /* data to compare */
539 0001B85B 5c 14 effffffaf6 50 mull3 $20,_index,r0
540 0001B863 0c 8f00000008 50 addl2 $_cmpd_1_data+8,r0
541 0001B86A 0d a004 effffffaea movl 4(r0),_dbl_value_2+4
542 0001B872 0d 60 effffffadf movl (r0),_dbl_value_2
543 0001B879 # dbl_expected = cmpd_1_data[index].one; /* expected result */
544 0001B879 5c 14 effffffad8 50 mull3 $20,_index,r0
545 0001B881 0c 8f00000000 50 addl2 $_cmpd_1_data,r0
546 0001B888 0d a004 effffffacc movl 4(r0),_dbl_expected+4
547 0001B890 0d 60 effffffac1 movl (r0),_dbl_expected
548 0001B897 # /*
549 0001B897 # * If LOOP ON ERROR is set, this is the loop for this subtest.
550 0001B897 # * The force loop flag is set after the first error.
551 0001B897 # */
552 0001B897 # asm("_cmpd_3_lp1:");
553 0001B897 _cmpd_3_lp1:
554 0001B897 # asm("ldd _dbl_value_1"); /* LOAD the accumulator */
555 0001B897 07 effffffabb ldd _dbl_value_1
556 0001B89D # asm("nop");
557 0001B89D 10 nop
558 0001B89E # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
559 0001B89E ab 891fff effffffab1 loadr $0x1fff,_load_regs
560 0001B8A7 # asm("nop");
561 0001B8A7 10 nop
562 0001B8A8 # asm("cmpd _dbl_value_2"); /* test the values */
563 0001B8A8 37 effffffaaa cmpd _dbl_value_2
564 0001B8AE # asm("nop");
565 0001B8AE 10 nop
566 0001B8AF # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
567 0001B8AF bb 891fff effffffaa0 storer $0x1fff,_store_regs
568 0001B8B8 # if( force_loop ) /* loop? */
569 0001B8B8 5d effffffa9a tstl _force_loop
570 0001B8BE 31 02 jeql L290
571 0001B8C0 # asm("brb _cmpd_3_lp1");; /* run the loop again */
572 0001B8C0 11 d5 brb _cmpd_3_lp1
573 0001B8C2 L290:
574 0001B8C2 # /*
575 0001B8C2 # * Now compare the stored register values to those that were loaded
576 0001B8C2 # */
577 0001B8C2 # index2 = 0;
578 0001B8C2 4d effffffa90 clrl _index2
579 0001B8C8 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
580 0001B8C8 L291:
581 0001B8C8 0d effffffa8a 50 movl _index2,r0
582 0001B8CF 0d effffffa83 51 movl _index2,r1
583 0001B8D6 1d 40effffffa7b cmpl _load_regs[r0],_store_regs[r1]
41effffffa75
584 0001B8E3 21 11 jneq L292
585 0001B8E5 1d effffffa6d 0d cmpl _index2,$13
586 0001B8EC 81 08 jgeq L292
587 0001B8EE # index2++; /* check reg values */
588 0001B8EE 6d effffffa64 incl _index2
589 0001B8F4 11 d2 jbr L291
590 0001B8F6 L292:
591 0001B8F6 # if( index2 < 13 ) { /* error if index2 < 13 */
592 0001B8F6 1d effffffa5c 0d cmpl _index2,$13
593 0001B8FD 91 03 13 0101 jgeq L293
594 0001B902 # errcnt++; /* bump the error count */
595 0001B902 6d effffffa50 incl _errcnt
596 0001B908 # if ( prt_error ) {
597 0001B908 5d effffffa4a tstl _prt_error
598 0001B90E 21 03 13 00cd jeql L294
599 0001B913 # writes(" \n"); /* start a new print line */
600 0001B913 .data 1
601 00000ba3 * L295:
602 00000ba3 * 200A00 .ascii " \12\0"
603 00000ba6 * .text
604 0001B913 dd 8f00000ba3 pushl $L295
605 0001B919 fe 08 effffffa38 callf $8,_writes
606 0001B920 # writes("cycle: ");
607 0001B920 .data 1
608 00000ba6 * L296:
609 00000ba6 * 6379636C653A2000 .ascii "cycle: \0"
610 00000bae * .text
611 0001B920 dd 8f00000ba6 pushl $L296
612 0001B926 fe 08 effffffa2b callf $8,_writes
613 0001B92D # writed( cycle );
614 0001B92D dd effffffa25 pushl _cycle
615 0001B933 fe 08 effffffa1e callf $8,_writed
616 0001B93A # writes(", CMPD test ");
617 0001B93A .data 1
618 00000bae * L297:
619 00000bae * 2C20434D50442074657374200 .ascii ", CMPD test \0"
0
620 00000bbb * .text
621 0001B93A dd 8f00000bae pushl $L297
622 0001B940 fe 08 effffffa11 callf $8,_writes
623 0001B947 # writed( test_no );
624 0001B947 dd effffffa0b pushl _test_no
625 0001B94D fe 08 effffffa04 callf $8,_writed
626 0001B954 # writes(", subtest 3 - A REGISTER WAS MODIFIED\n");
627 0001B954 .data 1
628 00000bbb * L298:
629 00000bbb * 2C20737562746573742033202 .ascii ", subtest 3 - A REGISTER WAS MODIFIED\12\0"
D204120524547495354455220
574153204D4F4449464945440
A00
630 00000be2 * .text
631 0001B954 dd 8f00000bbb pushl $L298
632 0001B95A fe 08 effffff9f7 callf $8,_writes
633 0001B961 # print_cmpd_data(); /* print the operands */
634 0001B961 fe 04 ef000002fa callf $4,_print_cmpd_data
635 0001B968 # writes("\n");
636 0001B968 .data 1
637 00000be2 * L299:
638 00000be2 * 0A00 .ascii "\12\0"
639 00000be4 * .text
640 0001B968 dd 8f00000be2 pushl $L299
641 0001B96E fe 08 effffff9e3 callf $8,_writes
642 0001B975 # writes("register "); /* print the information */
643 0001B975 .data 1
644 00000be4 * L300:
645 00000be4 * 72656769737465722000 .ascii "register \0"
646 00000bee * .text
647 0001B975 dd 8f00000be4 pushl $L300
648 0001B97B fe 08 effffff9d6 callf $8,_writes
649 0001B982 # writed( index2 ); /* about the corrupted */
650 0001B982 dd effffff9d0 pushl _index2
651 0001B988 fe 08 effffff9c9 callf $8,_writed
652 0001B98F # writes(" = "); /* register */
653 0001B98F .data 1
654 00000bee * L301:
655 00000bee * 203D2000 .ascii " = \0"
656 00000bf2 * .text
657 0001B98F dd 8f00000bee pushl $L301
658 0001B995 fe 08 effffff9bc callf $8,_writes
659 0001B99C # write32h( store_regs[index2] );
660 0001B99C 0d effffff9b6 50 movl _index2,r0
661 0001B9A3 dd 40effffff9ae pushl _store_regs[r0]
662 0001B9AA fe 08 effffff9a7 callf $8,_write32h
663 0001B9B1 # writes(", should be = ");
664 0001B9B1 .data 1
665 00000bf2 * L302:
666 00000bf2 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
667 00000c02 * .text
668 0001B9B1 dd 8f00000bf2 pushl $L302
669 0001B9B7 fe 08 effffff99a callf $8,_writes
670 0001B9BE # write32h( load_regs[index2] );
671 0001B9BE 0d effffff994 50 movl _index2,r0
672 0001B9C5 dd 40effffff98c pushl _load_regs[r0]
673 0001B9CC fe 08 effffff985 callf $8,_write32h
674 0001B9D3 # writes("\n");
675 0001B9D3 .data 1
676 00000c02 * L303:
677 00000c02 * 0A00 .ascii "\12\0"
678 00000c04 * .text
679 0001B9D3 dd 8f00000c02 pushl $L303
680 0001B9D9 fe 08 effffff978 callf $8,_writes
681 0001B9E0 # }
682 0001B9E0 # if ( halt_flg ) /* halt on error? */
683 0001B9E0 L294:
684 0001B9E0 5d effffff972 tstl _halt_flg
685 0001B9E6 31 09 jeql L304
686 0001B9E8 # cmpd_er_halt( BAD_REG_HLT ); /* PC after halt */
687 0001B9E8 dd 02 pushl $2
688 0001B9EA fe 08 ef000002d9 callf $8,_cmpd_er_halt
689 0001B9F1 # if ( loop_on_err ) {
690 0001B9F1 L304:
691 0001B9F1 5d effffff961 tstl _loop_on_err
692 0001B9F7 31 0a jeql L305
693 0001B9F9 # force_loop = TRUE; /* set force loop flag */
694 0001B9F9 0d 01 effffff958 movl $1,_force_loop
695 0001BA00 # asm("brw _cmpd_3_lp1"); /* and loop on error */
696 0001BA00 13 fe94 brw _cmpd_3_lp1
697 0001BA03 # } /* end of loop on error */
698 0001BA03 # } /* end of register corruption error */
699 0001BA03 L305:
700 0001BA03 # } while ( index++ < max_cmpd_1_index ); /* end of WHILE loop */
701 0001BA03 L293:
702 0001BA03 L288:
703 0001BA03 0d effffff94f 50 movl _index,r0
704 0001BA0A 6d effffff948 incl _index
705 0001BA10 1d 50 effffff941 cmpl r0,_max_cmpd_1_index
706 0001BA17 81 03 13 fe21 jlss L289
707 0001BA1C L287:
708 0001BA1C # } /* end of subtest 3 */
709 0001BA1C 40 ret#2
710 0001BA1D .set L282,0x0
711 0001BA1D L284:
712 0001BA1D 13 fdfd jbr L285
713 0001BA20 .data
714 00000a98 * .text
715 0001BA20 .align 1
716 0001BA20 .globl _cmpd_4
717 0001BA20 _cmpd_4:
718 0001BA20 0000 .word L306
719 0001BA22 #
720 0001BA22 #
721 0001BA22 #
722 0001BA22 # /************************************************************************
723 0001BA22 # *
724 0001BA22 # * SUBTEST 4 - Check for accumulator corruption
725 0001BA22 # *
726 0001BA22 # ************************************************************************/
727 0001BA22 # cmpd_4()
728 0001BA22 # {
729 0001BA22 13 023a jbr L308
730 0001BA25 L309:
731 0001BA25 # force_loop = FALSE; /* clear force_loop flg */
732 0001BA25 4d effffff92d clrl _force_loop
733 0001BA2B # index = 0;
734 0001BA2B 4d effffff927 clrl _index
735 0001BA31 # do
736 0001BA31 L312:
737 0001BA31 # {
738 0001BA31 # dbl_value_1 = cmpd_1_data[index].one; /* data to load */
739 0001BA31 5c 14 effffff920 50 mull3 $20,_index,r0
740 0001BA39 0c 8f00000000 50 addl2 $_cmpd_1_data,r0
741 0001BA40 0d a004 effffff914 movl 4(r0),_dbl_value_1+4
742 0001BA48 0d 60 effffff909 movl (r0),_dbl_value_1
743 0001BA4F # dbl_value_2 = cmpd_1_data[index].two;
744 0001BA4F 5c 14 effffff902 50 mull3 $20,_index,r0
745 0001BA57 0c 8f00000008 50 addl2 $_cmpd_1_data+8,r0
746 0001BA5E 0d a004 effffff8f6 movl 4(r0),_dbl_value_2+4
747 0001BA66 0d 60 effffff8eb movl (r0),_dbl_value_2
748 0001BA6D # dbl_expected = cmpd_1_data[index].one; /* expected result */
749 0001BA6D 5c 14 effffff8e4 50 mull3 $20,_index,r0
750 0001BA75 0c 8f00000000 50 addl2 $_cmpd_1_data,r0
751 0001BA7C 0d a004 effffff8d8 movl 4(r0),_dbl_expected+4
752 0001BA84 0d 60 effffff8cd movl (r0),_dbl_expected
753 0001BA8B # if( !(dbl_value_1.m & 0x7f800000) ) { /* */
754 0001BA8B 3d 8f7f800000 effffff8c2 bitl $2139095040,_dbl_value_1
755 0001BA96 21 0c jneq L313
756 0001BA98 # dbl_expected.m = 0; /* */
757 0001BA98 4d effffff8ba clrl _dbl_expected
758 0001BA9E # dbl_expected.l = 0; /* ignore bad 0's */
759 0001BA9E 4d effffff8b8 clrl _dbl_expected+4
760 0001BAA4 # } /* */
761 0001BAA4 # sgl_value_1 = dbl_value_1.m;
762 0001BAA4 L313:
763 0001BAA4 0d effffff8ae effffff8a9 movl _dbl_value_1,_sgl_value_1
764 0001BAAF # sgl_value_2 = dbl_value_1.l;
765 0001BAAF 0d effffff8a7 effffff89e movl _dbl_value_1+4,_sgl_value_2
766 0001BABA # sgl_value_3 = dbl_value_2.m;
767 0001BABA 0d effffff898 effffff893 movl _dbl_value_2,_sgl_value_3
768 0001BAC5 # sgl_value_4 = dbl_value_2.l;
769 0001BAC5 0d effffff891 effffff888 movl _dbl_value_2+4,_sgl_value_4
770 0001BAD0 # /*
771 0001BAD0 # * If LOOP ON ERROR is set, this is the loop for this subtest.
772 0001BAD0 # * The force loop flag is set after the first error.
773 0001BAD0 # */
774 0001BAD0 # asm("_cmpd_4_lp1:");
775 0001BAD0 _cmpd_4_lp1:
776 0001BAD0 # asm("movl _sgl_value_1,r4"); /* r4 = operand #1's MSW */
777 0001BAD0 0d effffff882 54 movl _sgl_value_1,r4
778 0001BAD7 # asm("movl _sgl_value_2,r5"); /* r5 = operand #1's LSW */
779 0001BAD7 0d effffff87b 55 movl _sgl_value_2,r5
780 0001BADE # asm("movl _sgl_value_3,r6"); /* r6 = operand #2's MSW */
781 0001BADE 0d effffff874 56 movl _sgl_value_3,r6
782 0001BAE5 # asm("movl _sgl_value_4,r7"); /* r7 = operand #2's LSW */
783 0001BAE5 0d effffff86d 57 movl _sgl_value_4,r7
784 0001BAEC # asm("ldd r4"); /* store the accumulator */
785 0001BAEC 07 54 ldd r4
786 0001BAEE # asm("cmpd r6"); /* test the values */
787 0001BAEE 37 56 cmpd r6
788 0001BAF0 # asm("std r8"); /* store the accumulator */
789 0001BAF0 27 58 std r8
790 0001BAF2 # if( force_loop ) /* loop? */
791 0001BAF2 5d effffff860 tstl _force_loop
792 0001BAF8 31 02 jeql L314
793 0001BAFA # asm("brb _cmpd_4_lp1");; /* run the loop again */
794 0001BAFA 11 d4 brb _cmpd_4_lp1
795 0001BAFC L314:
796 0001BAFC # asm("movl r8,_sgl_value_5"); /* move results to cache */
797 0001BAFC 0d 58 effffff855 movl r8,_sgl_value_5
798 0001BB03 # asm("movl r9,_sgl_value_6");
799 0001BB03 0d 59 effffff84e movl r9,_sgl_value_6
800 0001BB0A # if ( (sgl_value_5 != dbl_expected.m) || /* COMPARE the values */
801 0001BB0A # (sgl_value_6 != dbl_expected.l) ){
802 0001BB0A 1d effffff848 effffff843 cmpl _sgl_value_5,_dbl_expected
803 0001BB15 21 10 jneq L9999
804 0001BB17 1d effffff83b effffff83a cmpl _sgl_value_6,_dbl_expected+4
805 0001BB22 21 03 13 011e jeql L315
806 0001BB27 L9999:
807 0001BB27 # errcnt++; /* bump the error count */
808 0001BB27 6d effffff82b incl _errcnt
809 0001BB2D # if ( prt_error ) {
810 0001BB2D 5d effffff825 tstl _prt_error
811 0001BB33 21 03 13 00ea jeql L316
812 0001BB38 # writes(" \n"); /* start a new print line */
813 0001BB38 .data 1
814 00000c04 * L317:
815 00000c04 * 200A00 .ascii " \12\0"
816 00000c07 * .text
817 0001BB38 dd 8f00000c04 pushl $L317
818 0001BB3E fe 08 effffff813 callf $8,_writes
819 0001BB45 # writes("cycle: ");
820 0001BB45 .data 1
821 00000c07 * L318:
822 00000c07 * 6379636C653A2000 .ascii "cycle: \0"
823 00000c0f * .text
824 0001BB45 dd 8f00000c07 pushl $L318
825 0001BB4B fe 08 effffff806 callf $8,_writes
826 0001BB52 # writed( cycle );
827 0001BB52 dd effffff800 pushl _cycle
828 0001BB58 fe 08 effffff7f9 callf $8,_writed
829 0001BB5F # writes(", CMPD test ");
830 0001BB5F .data 1
831 00000c0f * L319:
832 00000c0f * 2C20434D50442074657374200 .ascii ", CMPD test \0"
0
833 00000c1c * .text
834 0001BB5F dd 8f00000c0f pushl $L319
835 0001BB65 fe 08 effffff7ec callf $8,_writes
836 0001BB6C # writed( test_no );
837 0001BB6C dd effffff7e6 pushl _test_no
838 0001BB72 fe 08 effffff7df callf $8,_writed
839 0001BB79 # writes(", subtest 4 - THE ACC WAS MODIFIED\n");
840 0001BB79 .data 1
841 00000c1c * L320:
842 00000c1c * 2C20737562746573742034202 .ascii ", subtest 4 - THE ACC WAS MODIFIED\12\0"
D205448452041434320574153
204D4F4449464945440A00
843 00000c40 * .text
844 0001BB79 dd 8f00000c1c pushl $L320
845 0001BB7F fe 08 effffff7d2 callf $8,_writes
846 0001BB86 # print_cmpd_data();
847 0001BB86 fe 04 ef000000d5 callf $4,_print_cmpd_data
848 0001BB8D # writes(", index = ");
849 0001BB8D .data 1
850 00000c40 * L321:
851 00000c40 * 2C2020696E646578203D2000 .ascii ", index = \0"
852 00000c4c * .text
853 0001BB8D dd 8f00000c40 pushl $L321
854 0001BB93 fe 08 effffff7be callf $8,_writes
855 0001BB9A # writed( index );
856 0001BB9A dd effffff7b8 pushl _index
857 0001BBA0 fe 08 effffff7b1 callf $8,_writed
858 0001BBA7 # writec('\n');
859 0001BBA7 dd 0a pushl $10
860 0001BBA9 fe 08 effffff7a8 callf $8,_writec
861 0001BBB0 # writes(" final Acc = ");
862 0001BBB0 .data 1
863 00000c4c * L323:
864 00000c4c * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
865 00000c5b * .text
866 0001BBB0 dd 8f00000c4c pushl $L323
867 0001BBB6 fe 08 effffff79b callf $8,_writes
868 0001BBBD # write32h( sgl_value_5 );
869 0001BBBD dd effffff795 pushl _sgl_value_5
870 0001BBC3 fe 08 effffff78e callf $8,_write32h
871 0001BBCA # writec(' ');
872 0001BBCA dd 20 pushl $32
873 0001BBCC fe 08 effffff785 callf $8,_writec
874 0001BBD3 # write32h( sgl_value_6 );
875 0001BBD3 dd effffff77f pushl _sgl_value_6
876 0001BBD9 fe 08 effffff778 callf $8,_write32h
877 0001BBE0 # writec('\n');
878 0001BBE0 dd 0a pushl $10
879 0001BBE2 fe 08 effffff76f callf $8,_writec
880 0001BBE9 # writes(" expected = ");
881 0001BBE9 .data 1
882 00000c5b * L324:
883 00000c5b * 2020206578706563746564203 .ascii " expected = \0"
D2000
884 00000c6a * .text
885 0001BBE9 dd 8f00000c5b pushl $L324
886 0001BBEF fe 08 effffff762 callf $8,_writes
887 0001BBF6 # write32h( dbl_expected.m );
888 0001BBF6 dd effffff75c pushl _dbl_expected
889 0001BBFC fe 08 effffff755 callf $8,_write32h
890 0001BC03 # writec(' ');
891 0001BC03 dd 20 pushl $32
892 0001BC05 fe 08 effffff74c callf $8,_writec
893 0001BC0C # write32h( dbl_expected.l );
894 0001BC0C dd effffff74a pushl _dbl_expected+4
895 0001BC12 fe 08 effffff73f callf $8,_write32h
896 0001BC19 # writec('\n');
897 0001BC19 dd 0a pushl $10
898 0001BC1B fe 08 effffff736 callf $8,_writec
899 0001BC22 # }
900 0001BC22 # if ( halt_flg ) /* halt on error? */
901 0001BC22 L316:
902 0001BC22 5d effffff730 tstl _halt_flg
903 0001BC28 31 09 jeql L325
904 0001BC2A # cmpd_er_halt( BAD_ACC_HLT ); /* halt on the error */
905 0001BC2A dd 01 pushl $1
906 0001BC2C fe 08 ef00000097 callf $8,_cmpd_er_halt
907 0001BC33 # if ( loop_on_err ) {
908 0001BC33 L325:
909 0001BC33 5d effffff71f tstl _loop_on_err
910 0001BC39 31 0a jeql L326
911 0001BC3B # force_loop = TRUE; /* set the force loop flag */
912 0001BC3B 0d 01 effffff716 movl $1,_force_loop
913 0001BC42 # asm("brw _cmpd_4_lp1"); /* and loop on the error */
914 0001BC42 13 fe8b brw _cmpd_4_lp1
915 0001BC45 # } /* end of loop on error */
916 0001BC45 # } /* end of compare error */
917 0001BC45 L326:
918 0001BC45 # } while ( index++ < max_cmpd_1_index ); /* end of WHILE loop */
919 0001BC45 L315:
920 0001BC45 L311:
921 0001BC45 0d effffff70d 50 movl _index,r0
922 0001BC4C 6d effffff706 incl _index
923 0001BC52 1d 50 effffff6ff cmpl r0,_max_cmpd_1_index
924 0001BC59 81 03 13 fdd3 jlss L312
925 0001BC5E L310:
926 0001BC5E # } /* end of subtest 4 */
927 0001BC5E 40 ret#2
928 0001BC5F .set L306,0x0
929 0001BC5F L308:
930 0001BC5F 13 fdc3 jbr L309
931 0001BC62 .data
932 00000a98 * .text
933 0001BC62 .align 1
934 0001BC62 .globl _print_cmpd_data
935 0001BC62 _print_cmpd_data:
936 0001BC62 0000 .word L327
937 0001BC64 #
938 0001BC64 #
939 0001BC64 #
940 0001BC64 # /**************************************************************************
941 0001BC64 # *
942 0001BC64 # * PRINT THE DATA AND STORE RESULTS
943 0001BC64 # *
944 0001BC64 # * initial Acc = xxxxxxxx xxxxxxxx, operand = xxxxxxxx xxxxxxxx
945 0001BC64 # **************************************************************************/
946 0001BC64 # print_cmpd_data()
947 0001BC64 # {
948 0001BC64 11 61 jbr L329
949 0001BC66 L330:
950 0001BC66 # writes("initial Acc = ");
951 0001BC66 .data 1
952 00000c6a * L331:
953 00000c6a * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
954 00000c79 * .text
955 0001BC66 dd 8f00000c6a pushl $L331
956 0001BC6C fe 08 effffff6e5 callf $8,_writes
957 0001BC73 # write32h( dbl_value_1.m );
958 0001BC73 dd effffff6df pushl _dbl_value_1
959 0001BC79 fe 08 effffff6d8 callf $8,_write32h
960 0001BC80 # writec(' ');
961 0001BC80 dd 20 pushl $32
962 0001BC82 fe 08 effffff6cf callf $8,_writec
963 0001BC89 # write32h( dbl_value_1.l );
964 0001BC89 dd effffff6cd pushl _dbl_value_1+4
965 0001BC8F fe 08 effffff6c2 callf $8,_write32h
966 0001BC96 # writes(" operand = ");
967 0001BC96 .data 1
968 00000c79 * L332:
969 00000c79 * 20206F706572616E64203D200 .ascii " operand = \0"
0
970 00000c86 * .text
971 0001BC96 dd 8f00000c79 pushl $L332
972 0001BC9C fe 08 effffff6b5 callf $8,_writes
973 0001BCA3 # write32h( dbl_value_2.m );
974 0001BCA3 dd effffff6af pushl _dbl_value_2
975 0001BCA9 fe 08 effffff6a8 callf $8,_write32h
976 0001BCB0 # writec(' ');
977 0001BCB0 dd 20 pushl $32
978 0001BCB2 fe 08 effffff69f callf $8,_writec
979 0001BCB9 # write32h( dbl_value_2.l );
980 0001BCB9 dd effffff69d pushl _dbl_value_2+4
981 0001BCBF fe 08 effffff692 callf $8,_write32h
982 0001BCC6 # }
983 0001BCC6 40 ret#2
984 0001BCC7 .set L327,0x0
985 0001BCC7 L329:
986 0001BCC7 11 9d jbr L330
987 0001BCC9 .data
988 00000a98 * .text
989 0001BCC9 00 .align 1
990 0001BCCA .globl _cmpd_er_halt
991 0001BCCA _cmpd_er_halt:
992 0001BCCA 0000 .word L333
993 0001BCCC #
994 0001BCCC #
995 0001BCCC #
996 0001BCCC # /**************************************************************************
997 0001BCCC # *
998 0001BCCC # * HALT ON ERROR ROUTINE
999 0001BCCC # *
1000 0001BCCC # **************************************************************************/
1001 0001BCCC # cmpd_er_halt( halt_code )
1002 0001BCCC # int halt_code;
1003 0001BCCC # {
1004 0001BCCC 13 011c jbr L335
1005 0001BCCF L336:
1006 0001BCCF # sgl_value_1 = dbl_value_1.m;
1007 0001BCCF 0d effffff683 effffff67e movl _dbl_value_1,_sgl_value_1
1008 0001BCDA # sgl_value_2 = dbl_value_1.l;
1009 0001BCDA 0d effffff67c effffff673 movl _dbl_value_1+4,_sgl_value_2
1010 0001BCE5 # sgl_value_3 = dbl_value_2.m;
1011 0001BCE5 0d effffff66d effffff668 movl _dbl_value_2,_sgl_value_3
1012 0001BCF0 # sgl_value_4 = dbl_value_2.l;
1013 0001BCF0 0d effffff666 effffff65d movl _dbl_value_2+4,_sgl_value_4
1014 0001BCFB # sgl_value_5 = dbl_st_acc.m;
1015 0001BCFB 0d effffff657 effffff652 movl _dbl_st_acc,_sgl_value_5
1016 0001BD06 # sgl_value_6 = dbl_st_acc.l;
1017 0001BD06 0d effffff650 effffff647 movl _dbl_st_acc+4,_sgl_value_6
1018 0001BD11 # sgl_dummy1 = halt_code; /* get the error type */
1019 0001BD11 0d ad04 effffff63f movl 4(fp),_sgl_dummy1
1020 0001BD19 # asm("movl _test_no,r0"); /* r0 = test number */
1021 0001BD19 0d effffff639 50 movl _test_no,r0
1022 0001BD20 # asm("movl _subtest,r1"); /* r1 = subtest number */
1023 0001BD20 0d effffff632 51 movl _subtest,r1
1024 0001BD27 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1025 0001BD27 0d effffff62b 52 movl _sgl_dummy1,r2
1026 0001BD2E # asm("movl _cycle,r3"); /* r3 = cycle count */
1027 0001BD2E 0d effffff624 53 movl _cycle,r3
1028 0001BD35 # asm("movl _sgl_value_1,r4"); /* r4 = MS operand 1 */
1029 0001BD35 0d effffff61d 54 movl _sgl_value_1,r4
1030 0001BD3C # asm("movl _sgl_value_2,r5"); /* r5 = LS operand 1 */
1031 0001BD3C 0d effffff616 55 movl _sgl_value_2,r5
1032 0001BD43 # asm("movl _sgl_value_3,r6"); /* r6 = MS operand 2 */
1033 0001BD43 0d effffff60f 56 movl _sgl_value_3,r6
1034 0001BD4A # asm("movl _sgl_value_4,r7"); /* r7 = MS operand 2 */
1035 0001BD4A 0d effffff608 57 movl _sgl_value_4,r7
1036 0001BD51 # asm("movl _psl_val,r8"); /* r8 = actual PSL */
1037 0001BD51 0d effffff601 58 movl _psl_val,r8
1038 0001BD58 # if( halt_code == BAD_ACC_HLT ) {
1039 0001BD58 1d ad04 01 cmpl 4(fp),$1
1040 0001BD5C 21 34 jneq L337
1041 0001BD5E # sgl_value_1 = dbl_expected.m;
1042 0001BD5E 0d effffff5f4 effffff5ef movl _dbl_expected,_sgl_value_1
1043 0001BD69 # sgl_value_2 = dbl_expected.l;
1044 0001BD69 0d effffff5ed effffff5e4 movl _dbl_expected+4,_sgl_value_2
1045 0001BD74 # asm("movl _sgl_value_5,r9"); /* r9 = MS stored */
1046 0001BD74 0d effffff5de 59 movl _sgl_value_5,r9
1047 0001BD7B # asm("movl _sgl_value_6,r10"); /* r10 = LS stored */
1048 0001BD7B 0d effffff5d7 5a movl _sgl_value_6,r10
1049 0001BD82 # asm("movl _sgl_value_1,r11"); /* r11 = MS expected */
1050 0001BD82 0d effffff5d0 5b movl _sgl_value_1,r11
1051 0001BD89 # asm("movl _sgl_value_2,r12"); /* r12 = LS expected */
1052 0001BD89 0d effffff5c9 5c movl _sgl_value_2,r12
1053 0001BD90 # } else
1054 0001BD90 11 57 jbr L338
1055 0001BD92 L337:
1056 0001BD92 # if( halt_code == BAD_REG_HLT ) {
1057 0001BD92 1d ad04 02 cmpl 4(fp),$2
1058 0001BD96 21 3d jneq L339
1059 0001BD98 # sgl_dummy1 = load_regs[index2];
1060 0001BD98 0d effffff5ba 50 movl _index2,r0
1061 0001BD9F 0d 40effffff5b2 movl _load_regs[r0],_sgl_dummy1
effffff5ad
1062 0001BDAB # sgl_dummy2 = store_regs[index2];
1063 0001BDAB 0d effffff5a7 50 movl _index2,r0
1064 0001BDB2 0d 40effffff59f movl _store_regs[r0],_sgl_dummy2
effffff59a
1065 0001BDBE # asm("movl _index2,r9"); /* r9 = bad register # */
1066 0001BDBE 0d effffff594 59 movl _index2,r9
1067 0001BDC5 # asm("movl _sgl_dummy2,r10"); /* r10 = actual value */
1068 0001BDC5 0d effffff58d 5a movl _sgl_dummy2,r10
1069 0001BDCC # asm("movl _sgl_dummy1,r11"); /* r11 = expected value */
1070 0001BDCC 0d effffff586 5b movl _sgl_dummy1,r11
1071 0001BDD3 # } else
1072 0001BDD3 11 14 jbr L340
1073 0001BDD5 L339:
1074 0001BDD5 # if( halt_code == BAD_PSL_HLT ) {
1075 0001BDD5 1d ad04 03 cmpl 4(fp),$3
1076 0001BDD9 21 0e jneq L341
1077 0001BDDB # asm("movl _exp_psl,r9"); /* r9 = expected PSL */
1078 0001BDDB 0d effffff577 59 movl _exp_psl,r9
1079 0001BDE2 # asm("movl _index,r10"); /* r10 = data index */
1080 0001BDE2 0d effffff570 5a movl _index,r10
1081 0001BDE9 # };
1082 0001BDE9 L341:
1083 0001BDE9 L340:
1084 0001BDE9 L338:
1085 0001BDE9 # asm("halt"); /* HALT ... */
1086 0001BDE9 00 halt
1087 0001BDEA # }
1088 0001BDEA 40 ret#2
1089 0001BDEB .set L333,0x0
1090 0001BDEB L335:
1091 0001BDEB 13 fee1 jbr L336
1092 0001BDEE .data
1092 00037146 .data
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