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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
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Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000ca0 * .text
4 00000000 .align 1
5 00000000 .globl _cvfl
6 00000000 _cvfl:
7 00014FA0 0000 .word L215
8 00014FA2 #
9 00014FA2 # #include "fpp_defs.h"
10 00014FA2 #
11 00014FA2 #
12 00014FA2 # /*****************************************************************************
13 00014FA2 # *
14 00014FA2 # * CVFL - CONVERT SINGLE PRECISION TO LONGWORD INTEGER
15 00014FA2 # *
16 00014FA2 # *****************************************************************************/
17 00014FA2 # cvfl()
18 00014FA2 # {
19 00014FA2 11 57 jbr L217
20 00014FA4 L218:
21 00014FA4 # asm(".globl _cvfl_t");
22 00014FA4 .globl _cvfl_t
23 00014FA4 # asm("_cvfl_t:"); /* entry address */
24 00014FA4 _cvfl_t:
25 00014FA4 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st cycle */
26 00014FA4 1d effffffff6 01 cmpl _cycle,$1
27 00014FAB 21 15 jneq L219
28 00014FAD 5d efffffffed tstl _prt_hdrs
29 00014FB3 31 0d jeql L219
30 00014FB5 # writes(" CVFL");
31 00014FB5 .data 1
32 00000ca0 * L221:
33 00000ca0 * 204356464C00 .ascii " CVFL\0"
34 00000ca6 * .text
35 00014FB5 dd 8f00000ca0 pushl $L221
36 00014FBB fe 08 efffffffde callf $8,_writes
37 00014FC2 # cvfl_1(); /* load through a register */
38 00014FC2 L219:
39 00014FC2 fe 04 ef00000035 callf $4,_cvfl_1
40 00014FC9 # cvfl_2(); /* load through the cache */
41 00014FC9 fe 04 ef000001aa callf $4,_cvfl_2
42 00014FD0 # cvfl_3(); /* register stability */
43 00014FD0 fe 04 ef00000319 callf $4,_cvfl_3
44 00014FD7 # cvfl_4(); /* PSL stability test */
45 00014FD7 fe 04 ef000004ea callf $4,_cvfl_4
46 00014FDE # cvfl_5(); /* pipelined entry test */
47 00014FDE fe 04 ef00000703 callf $4,_cvfl_5
48 00014FE5 # if( !no_fpp_wcs )
49 00014FE5 5d efffffffb5 tstl _no_fpp_wcs
50 00014FEB 21 07 jneq L227
51 00014FED # cvfl_6();; /* pipelined exit test */
52 00014FED fe 04 ef0000085a callf $4,_cvfl_6
53 00014FF4 L227:
54 00014FF4 # asm("jmp *return"); /* return to the test monitor */
55 00014FF4 71 ffffffffa6 jmp *return
56 00014FFA # }
57 00014FFA 40 ret#2
58 00014FFB .set L215,0x0
59 00014FFB L217:
60 00014FFB 11 a7 jbr L218
61 00014FFD .data
62 00000ca0 * .text
63 00014FFD 00 .align 1
64 00014FFE .globl _cvfl_1
65 00014FFE _cvfl_1:
66 00014FFE 0000 .word L229
67 00015000 #
68 00015000 #
69 00015000 #
70 00015000 # /************************************************************************
71 00015000 # *
72 00015000 # * SUBTEST 1 - convert through a register
73 00015000 # *
74 00015000 # ************************************************************************/
75 00015000 # cvfl_1()
76 00015000 # {
77 00015000 13 0174 jbr L231
78 00015003 L232:
79 00015003 # force_loop = FALSE;
80 00015003 4d efffffff97 clrl _force_loop
81 00015009 # subtest = 1;
82 00015009 0d 01 efffffff90 movl $1,_subtest
83 00015010 # for( index = 0; index < max_cvfl_1_index; index++ ) {
84 00015010 4d efffffff8a clrl _index
85 00015016 L235:
86 00015016 1d efffffff84 efffffff7f cmpl _index,_max_cvfl_1_index
87 00015021 91 03 13 0150 jgeq L234
88 00015026 # sgl_ld_acc = cvfl_1_data[index].ld; /* get value to negate */
89 00015026 0d efffffff74 50 movl _index,r0
90 0001502D 48 03 50 50 shll $3,r0,r0
91 00015031 0d e000000000 efffffff64 movl _cvfl_1_data(r0),_sgl_ld_acc
92 0001503C # sgl_expected = cvfl_1_data[index].exp; /* get expected result */
93 0001503C 0d efffffff5e 50 movl _index,r0
94 00015043 48 03 50 50 shll $3,r0,r0
95 00015047 0d e000000004 efffffff4e movl _cvfl_1_data+4(r0),_sgl_expected
96 00015052 # /*
97 00015052 # * If LOOP ON ERROR is set, this is the loop for this subtest.
98 00015052 # * The force loop flag is set after the first error.
99 00015052 # */
100 00015052 # asm("_cvfl_1_lp1:");
101 00015052 _cvfl_1_lp1:
102 00015052 # asm("movl _sgl_ld_acc,r4"); /* get the value to convert */
103 00015052 0d efffffff48 54 movl _sgl_ld_acc,r4
104 00015059 # asm("ldf r4"); /* load the value */
105 00015059 06 54 ldf r4
106 0001505B # asm("cvfl r5"); /* store the result in R5 */
107 0001505B 86 55 cvfl r5
108 0001505D # asm("stf _sgl_st_acc"); /* save the acc */
109 0001505D 26 efffffff3d stf _sgl_st_acc
110 00015063 # if( force_loop )
111 00015063 5d efffffff37 tstl _force_loop
112 00015069 31 02 jeql L236
113 0001506B # asm("brb _cvfl_1_lp1");; /* loop on the error */
114 0001506B 11 e5 brb _cvfl_1_lp1
115 0001506D L236:
116 0001506D # /*
117 0001506D # * end error loop - test the results
118 0001506D # */
119 0001506D # asm("movl r5,_sgl_value_1"); /* move R5 data to cache */
120 0001506D 0d 55 efffffff2c movl r5,_sgl_value_1
121 00015074 # if( sgl_value_1 != sgl_expected ) {/* COMPARE the values */
122 00015074 1d efffffff26 efffffff21 cmpl _sgl_value_1,_sgl_expected
123 0001507F 21 03 13 00e9 jeql L237
124 00015084 # errcnt++; /* bump the error count */
125 00015084 6d efffffff16 incl _errcnt
126 0001508A # if( prt_error ) {
127 0001508A 5d efffffff10 tstl _prt_error
128 00015090 21 03 13 00b5 jeql L238
129 00015095 # writes(" \n"); /* start a new print line */
130 00015095 .data 1
131 00000ca6 * L239:
132 00000ca6 * 200A00 .ascii " \12\0"
133 00000ca9 * .text
134 00015095 dd 8f00000ca6 pushl $L239
135 0001509B fe 08 effffffefe callf $8,_writes
136 000150A2 # writes("cycle: ");
137 000150A2 .data 1
138 00000ca9 * L240:
139 00000ca9 * 6379636C653A2000 .ascii "cycle: \0"
140 00000cb1 * .text
141 000150A2 dd 8f00000ca9 pushl $L240
142 000150A8 fe 08 effffffef1 callf $8,_writes
143 000150AF # writed( cycle );
144 000150AF dd effffffeeb pushl _cycle
145 000150B5 fe 08 effffffee4 callf $8,_writed
146 000150BC # writes(" CVFL test ");
147 000150BC .data 1
148 00000cb1 * L242:
149 00000cb1 * 20204356464C2074657374200 .ascii " CVFL test \0"
0
150 00000cbe * .text
151 000150BC dd 8f00000cb1 pushl $L242
152 000150C2 fe 08 effffffed7 callf $8,_writes
153 000150C9 # writed( test_no );
154 000150C9 dd effffffed1 pushl _test_no
155 000150CF fe 08 effffffeca callf $8,_writed
156 000150D6 # writes(", subtest 1 (Reg. Data) - WRONG DATA STORED\n");
157 000150D6 .data 1
158 00000cbe * L243:
159 00000cbe * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - WRONG DATA STORED\12\0"
85265672E204461746129202D
2057524F4E472044415441205
3544F5245440A00
160 00000ceb * .text
161 000150D6 dd 8f00000cbe pushl $L243
162 000150DC fe 08 effffffebd callf $8,_writes
163 000150E3 # print_cvfl_data();
164 000150E3 fe 04 ef00000a4a callf $4,_print_cvfl_data
165 000150EA # writes(", data index = ");
166 000150EA .data 1
167 00000ceb * L245:
168 00000ceb * 2C2020206461746120696E646 .ascii ", data index = \0"
578203D2000
169 00000cfd * .text
170 000150EA dd 8f00000ceb pushl $L245
171 000150F0 fe 08 effffffea9 callf $8,_writes
172 000150F7 # writed( index );
173 000150F7 dd effffffea3 pushl _index
174 000150FD fe 08 effffffe9c callf $8,_writed
175 00015104 # writec('\n');
176 00015104 dd 0a pushl $10
177 00015106 fe 08 effffffe93 callf $8,_writec
178 0001510D # writes(" final Acc = ");
179 0001510D .data 1
180 00000cfd * L247:
181 00000cfd * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
182 00000d0c * .text
183 0001510D dd 8f00000cfd pushl $L247
184 00015113 fe 08 effffffe86 callf $8,_writes
185 0001511A # write32h( sgl_st_acc );
186 0001511A dd effffffe80 pushl _sgl_st_acc
187 00015120 fe 08 effffffe79 callf $8,_write32h
188 00015127 # writes(", int. expected = ");
189 00015127 .data 1
190 00000d0c * L249:
191 00000d0c * 2C20696E742E2065787065637 .ascii ", int. expected = \0"
46564203D2000
192 00000d1f * .text
193 00015127 dd 8f00000d0c pushl $L249
194 0001512D fe 08 effffffe6c callf $8,_writes
195 00015134 # write32h( sgl_expected );
196 00015134 dd effffffe66 pushl _sgl_expected
197 0001513A fe 08 effffffe5f callf $8,_write32h
198 00015141 # writec('\n');
199 00015141 dd 0a pushl $10
200 00015143 fe 08 effffffe56 callf $8,_writec
201 0001514A # }
202 0001514A # if( halt_flg )
203 0001514A L238:
204 0001514A 5d effffffe50 tstl _halt_flg
205 00015150 31 09 jeql L250
206 00015152 # cvfl_er_halt( BAD_STORE_HLT ); /* halt on the error */
207 00015152 dd 09 pushl $9
208 00015154 fe 08 ef00000a15 callf $8,_cvfl_er_halt
209 0001515B # if( loop_on_err ) {
210 0001515B L250:
211 0001515B 5d effffffe3f tstl _loop_on_err
212 00015161 31 0a jeql L252
213 00015163 # force_loop = TRUE; /* set the force loop flag */
214 00015163 0d 01 effffffe36 movl $1,_force_loop
215 0001516A # asm("brw _cvfl_1_lp1");; /* and loop on the error */
216 0001516A 13 fee5 brw _cvfl_1_lp1
217 0001516D # } /* end of loop on error */
218 0001516D # } /* end of wrong data compare error */
219 0001516D L252:
220 0001516D # } /* end of WHILE loop */
221 0001516D L237:
222 0001516D L233:
223 0001516D 6d effffffe2d incl _index
224 00015173 13 fea0 jbr L235
225 00015176 L234:
226 00015176 # } /* end of subtest 1 */
227 00015176 40 ret#2
228 00015177 .set L229,0x0
229 00015177 L231:
230 00015177 13 fe89 jbr L232
231 0001517A .data
232 00000ca0 * .text
233 0001517A .align 1
234 0001517A .globl _cvfl_2
235 0001517A _cvfl_2:
236 0001517A 0000 .word L253
237 0001517C #
238 0001517C #
239 0001517C #
240 0001517C # /************************************************************************
241 0001517C # *
242 0001517C # * SUBTEST 2 - convert through memory
243 0001517C # *
244 0001517C # ************************************************************************/
245 0001517C # cvfl_2()
246 0001517C # {
247 0001517C 13 016e jbr L255
248 0001517F L256:
249 0001517F # force_loop = FALSE;
250 0001517F 4d effffffe1b clrl _force_loop
251 00015185 # subtest = 2;
252 00015185 0d 02 effffffe14 movl $2,_subtest
253 0001518C # for( index = 0; index < max_cvfl_1_index; index++ ) {
254 0001518C 4d effffffe0e clrl _index
255 00015192 L259:
256 00015192 1d effffffe08 effffffe03 cmpl _index,_max_cvfl_1_index
257 0001519D 91 03 13 014a jgeq L258
258 000151A2 # sgl_ld_acc = cvfl_1_data[index].ld; /* get value to convert */
259 000151A2 0d effffffdf8 50 movl _index,r0
260 000151A9 48 03 50 50 shll $3,r0,r0
261 000151AD 0d e000000000 effffffde8 movl _cvfl_1_data(r0),_sgl_ld_acc
262 000151B8 # sgl_expected = cvfl_1_data[index].exp; /* get expected result */
263 000151B8 0d effffffde2 50 movl _index,r0
264 000151BF 48 03 50 50 shll $3,r0,r0
265 000151C3 0d e000000004 effffffdd2 movl _cvfl_1_data+4(r0),_sgl_expected
266 000151CE # /*
267 000151CE # * If LOOP ON ERROR is set, this is the loop for this subtest.
268 000151CE # * The force loop flag is set after the first error.
269 000151CE # */
270 000151CE # asm("_cvfl_2_lp1:");
271 000151CE _cvfl_2_lp1:
272 000151CE # asm("ldf _sgl_ld_acc"); /* load the base value */
273 000151CE 06 effffffdcc ldf _sgl_ld_acc
274 000151D4 # asm("cvfl _sgl_value_1"); /* store the result */
275 000151D4 86 effffffdc6 cvfl _sgl_value_1
276 000151DA # asm("stf _sgl_st_acc"); /* save the acc */
277 000151DA 26 effffffdc0 stf _sgl_st_acc
278 000151E0 # if( force_loop )
279 000151E0 5d effffffdba tstl _force_loop
280 000151E6 31 02 jeql L260
281 000151E8 # asm("brb _cvfl_2_lp1");; /* loop on the error */
282 000151E8 11 e4 brb _cvfl_2_lp1
283 000151EA L260:
284 000151EA # /*
285 000151EA # * end error loop - test the results
286 000151EA # */
287 000151EA # if( sgl_value_1 != sgl_expected ) {/* COMPARE the values */
288 000151EA 1d effffffdb0 effffffdab cmpl _sgl_value_1,_sgl_expected
289 000151F5 21 03 13 00e9 jeql L261
290 000151FA # errcnt++; /* bump the error count */
291 000151FA 6d effffffda0 incl _errcnt
292 00015200 # if( prt_error ) {
293 00015200 5d effffffd9a tstl _prt_error
294 00015206 21 03 13 00b5 jeql L262
295 0001520B # writes(" \n"); /* start a new print line */
296 0001520B .data 1
297 00000d1f * L263:
298 00000d1f * 200A00 .ascii " \12\0"
299 00000d22 * .text
300 0001520B dd 8f00000d1f pushl $L263
301 00015211 fe 08 effffffd88 callf $8,_writes
302 00015218 # writes("cycle: ");
303 00015218 .data 1
304 00000d22 * L264:
305 00000d22 * 6379636C653A2000 .ascii "cycle: \0"
306 00000d2a * .text
307 00015218 dd 8f00000d22 pushl $L264
308 0001521E fe 08 effffffd7b callf $8,_writes
309 00015225 # writed( cycle );
310 00015225 dd effffffd75 pushl _cycle
311 0001522B fe 08 effffffd6e callf $8,_writed
312 00015232 # writes(" CVFL test ");
313 00015232 .data 1
314 00000d2a * L265:
315 00000d2a * 20204356464C2074657374200 .ascii " CVFL test \0"
0
316 00000d37 * .text
317 00015232 dd 8f00000d2a pushl $L265
318 00015238 fe 08 effffffd61 callf $8,_writes
319 0001523F # writed( test_no );
320 0001523F dd effffffd5b pushl _test_no
321 00015245 fe 08 effffffd54 callf $8,_writed
322 0001524C # writes(
323 0001524C # ", subtest 2 (Cache Data) - WRONG DATA STORED\n");
324 0001524C .data 1
325 00000d37 * L266:
326 00000d37 * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - WRONG DATA STORED\12\0"
8436163686520446174612920
2D2057524F4E4720444154412
053544F5245440A00
327 00000d65 * .text
328 0001524C dd 8f00000d37 pushl $L266
329 00015252 fe 08 effffffd47 callf $8,_writes
330 00015259 # print_cvfl_data();
331 00015259 fe 04 ef000008d4 callf $4,_print_cvfl_data
332 00015260 # writes(", data index = ");
333 00015260 .data 1
334 00000d65 * L267:
335 00000d65 * 2C2020206461746120696E646 .ascii ", data index = \0"
578203D2000
336 00000d77 * .text
337 00015260 dd 8f00000d65 pushl $L267
338 00015266 fe 08 effffffd33 callf $8,_writes
339 0001526D # writed( index );
340 0001526D dd effffffd2d pushl _index
341 00015273 fe 08 effffffd26 callf $8,_writed
342 0001527A # writec('\n');
343 0001527A dd 0a pushl $10
344 0001527C fe 08 effffffd1d callf $8,_writec
345 00015283 # writes(" final Acc = ");
346 00015283 .data 1
347 00000d77 * L268:
348 00000d77 * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
349 00000d86 * .text
350 00015283 dd 8f00000d77 pushl $L268
351 00015289 fe 08 effffffd10 callf $8,_writes
352 00015290 # write32h( sgl_value_1 );
353 00015290 dd effffffd0a pushl _sgl_value_1
354 00015296 fe 08 effffffd03 callf $8,_write32h
355 0001529D # writes(", int. expected = ");
356 0001529D .data 1
357 00000d86 * L269:
358 00000d86 * 2C20696E742E2065787065637 .ascii ", int. expected = \0"
46564203D2000
359 00000d99 * .text
360 0001529D dd 8f00000d86 pushl $L269
361 000152A3 fe 08 effffffcf6 callf $8,_writes
362 000152AA # write32h( sgl_expected );
363 000152AA dd effffffcf0 pushl _sgl_expected
364 000152B0 fe 08 effffffce9 callf $8,_write32h
365 000152B7 # writec('\n');
366 000152B7 dd 0a pushl $10
367 000152B9 fe 08 effffffce0 callf $8,_writec
368 000152C0 # }
369 000152C0 # if( halt_flg )
370 000152C0 L262:
371 000152C0 5d effffffcda tstl _halt_flg
372 000152C6 31 09 jeql L270
373 000152C8 # cvfl_er_halt( BAD_STORE_HLT ); /* halt on the error */
374 000152C8 dd 09 pushl $9
375 000152CA fe 08 ef0000089f callf $8,_cvfl_er_halt
376 000152D1 # if( loop_on_err ) {
377 000152D1 L270:
378 000152D1 5d effffffcc9 tstl _loop_on_err
379 000152D7 31 0a jeql L271
380 000152D9 # force_loop = TRUE; /* set the force loop flag */
381 000152D9 0d 01 effffffcc0 movl $1,_force_loop
382 000152E0 # asm("brw _cvfl_1_lp1");; /* and loop on the error */
383 000152E0 13 fd6f brw _cvfl_1_lp1
384 000152E3 # } /* end of loop on error */
385 000152E3 # } /* end of compare error */
386 000152E3 L271:
387 000152E3 # } /* end of WHILE loop */
388 000152E3 L261:
389 000152E3 L257:
390 000152E3 6d effffffcb7 incl _index
391 000152E9 13 fea6 jbr L259
392 000152EC L258:
393 000152EC # } /* end of subtest 2 */
394 000152EC 40 ret#2
395 000152ED .set L253,0x0
396 000152ED L255:
397 000152ED 13 fe8f jbr L256
398 000152F0 .data
399 00000ca0 * .text
400 000152F0 .align 1
401 000152F0 .globl _cvfl_3
402 000152F0 _cvfl_3:
403 000152F0 0000 .word L272
404 000152F2 #
405 000152F2 #
406 000152F2 #
407 000152F2 # /************************************************************************
408 000152F2 # *
409 000152F2 # * SUBTEST 3 - Check for register corruption
410 000152F2 # *
411 000152F2 # ************************************************************************/
412 000152F2 # cvfl_3()
413 000152F2 # {
414 000152F2 13 01d0 jbr L274
415 000152F5 L275:
416 000152F5 # force_loop = FALSE; /* clear force_loop flg */
417 000152F5 4d effffffca5 clrl _force_loop
418 000152FB # subtest = 3;
419 000152FB 0d 03 effffffc9e movl $3,_subtest
420 00015302 # fill_reg_buf( load_regs ); /* get patterns for regs */
421 00015302 dd 8f00000000 pushl $_load_regs
422 00015308 fe 08 effffffc91 callf $8,_fill_reg_buf
423 0001530F # index = 0;
424 0001530F 4d effffffc8b clrl _index
425 00015315 # sgl_ld_acc = cvfl_1_data[0].ld; /* get value to convert */
426 00015315 0d effffffc85 effffffc80 movl _cvfl_1_data,_sgl_ld_acc
427 00015320 # sgl_expected = cvfl_1_data[0].exp; /* get expected result */
428 00015320 0d effffffc7e effffffc75 movl _cvfl_1_data+4,_sgl_expected
429 0001532B # /*
430 0001532B # * If LOOP ON ERROR is set, this is the loop for this subtest.
431 0001532B # * The force loop flag is set after the first error.
432 0001532B # */
433 0001532B # asm("_cvfl_3_lp1:");
434 0001532B _cvfl_3_lp1:
435 0001532B # asm("ldf _sgl_ld_acc"); /* load base value */
436 0001532B 06 effffffc6f ldf _sgl_ld_acc
437 00015331 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
438 00015331 ab 891fff effffffc66 loadr $0x1fff,_load_regs
439 0001533A # asm("nop");
440 0001533A 10 nop
441 0001533B # asm("cvfl _sgl_value_1"); /* convert the value */
442 0001533B 86 effffffc5f cvfl _sgl_value_1
443 00015341 # asm("nop");
444 00015341 10 nop
445 00015342 # asm("stf _sgl_st_acc"); /* store the result */
446 00015342 26 effffffc58 stf _sgl_st_acc
447 00015348 # asm("nop");
448 00015348 10 nop
449 00015349 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
450 00015349 bb 891fff effffffc4e storer $0x1fff,_store_regs
451 00015352 # if( force_loop )
452 00015352 5d effffffc48 tstl _force_loop
453 00015358 31 02 jeql L277
454 0001535A # asm("brb _cvfl_3_lp1");; /* loop on the error */
455 0001535A 11 cf brb _cvfl_3_lp1
456 0001535C L277:
457 0001535C # /*
458 0001535C # * Now compare the stored register values to those that were loaded
459 0001535C # */
460 0001535C # index2 = 0;
461 0001535C 4d effffffc3e clrl _index2
462 00015362 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
463 00015362 L278:
464 00015362 0d effffffc38 50 movl _index2,r0
465 00015369 0d effffffc31 51 movl _index2,r1
466 00015370 1d 40effffffc29 cmpl _load_regs[r0],_store_regs[r1]
41effffffc23
467 0001537D 21 11 jneq L279
468 0001537F 1d effffffc1b 0d cmpl _index2,$13
469 00015386 81 08 jgeq L279
470 00015388 # index2++; /* check reg values */
471 00015388 6d effffffc12 incl _index2
472 0001538E 11 d2 jbr L278
473 00015390 L279:
474 00015390 # if( index2 < 13 ) { /* error if index2 < 13 */
475 00015390 1d effffffc0a 0d cmpl _index2,$13
476 00015397 91 03 13 0128 jgeq L280
477 0001539C # errcnt++; /* bump the error count */
478 0001539C 6d effffffbfe incl _errcnt
479 000153A2 # if( prt_error ) {
480 000153A2 5d effffffbf8 tstl _prt_error
481 000153A8 21 03 13 00f4 jeql L281
482 000153AD # writes(" \n"); /* start a new print line */
483 000153AD .data 1
484 00000d99 * L282:
485 00000d99 * 200A00 .ascii " \12\0"
486 00000d9c * .text
487 000153AD dd 8f00000d99 pushl $L282
488 000153B3 fe 08 effffffbe6 callf $8,_writes
489 000153BA # writes("cycle: ");
490 000153BA .data 1
491 00000d9c * L283:
492 00000d9c * 6379636C653A2000 .ascii "cycle: \0"
493 00000da4 * .text
494 000153BA dd 8f00000d9c pushl $L283
495 000153C0 fe 08 effffffbd9 callf $8,_writes
496 000153C7 # writed( cycle );
497 000153C7 dd effffffbd3 pushl _cycle
498 000153CD fe 08 effffffbcc callf $8,_writed
499 000153D4 # writes(" CVFL test ");
500 000153D4 .data 1
501 00000da4 * L284:
502 00000da4 * 20204356464C2074657374200 .ascii " CVFL test \0"
0
503 00000db1 * .text
504 000153D4 dd 8f00000da4 pushl $L284
505 000153DA fe 08 effffffbbf callf $8,_writes
506 000153E1 # writed( test_no );
507 000153E1 dd effffffbb9 pushl _test_no
508 000153E7 fe 08 effffffbb2 callf $8,_writed
509 000153EE # writes(", subtest 3 - A REGISTER WAS MODIFIED\n");
510 000153EE .data 1
511 00000db1 * L285:
512 00000db1 * 2C20737562746573742033202 .ascii ", subtest 3 - A REGISTER WAS MODIFIED\12\0"
D204120524547495354455220
574153204D4F4449464945440
A00
513 00000dd8 * .text
514 000153EE dd 8f00000db1 pushl $L285
515 000153F4 fe 08 effffffba5 callf $8,_writes
516 000153FB # print_cvfl_data(); /* print the operands */
517 000153FB fe 04 ef00000732 callf $4,_print_cvfl_data
518 00015402 # writes("\n");
519 00015402 .data 1
520 00000dd8 * L286:
521 00000dd8 * 0A00 .ascii "\12\0"
522 00000dda * .text
523 00015402 dd 8f00000dd8 pushl $L286
524 00015408 fe 08 effffffb91 callf $8,_writes
525 0001540F # writes(" final Acc = "); /* print the information */
526 0001540F .data 1
527 00000dda * L287:
528 00000dda * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
529 00000de9 * .text
530 0001540F dd 8f00000dda pushl $L287
531 00015415 fe 08 effffffb84 callf $8,_writes
532 0001541C # write32h( sgl_value_1 );
533 0001541C dd effffffb7e pushl _sgl_value_1
534 00015422 fe 08 effffffb77 callf $8,_write32h
535 00015429 # writes("\n");
536 00015429 .data 1
537 00000de9 * L288:
538 00000de9 * 0A00 .ascii "\12\0"
539 00000deb * .text
540 00015429 dd 8f00000de9 pushl $L288
541 0001542F fe 08 effffffb6a callf $8,_writes
542 00015436 # writes("register ");
543 00015436 .data 1
544 00000deb * L289:
545 00000deb * 72656769737465722000 .ascii "register \0"
546 00000df5 * .text
547 00015436 dd 8f00000deb pushl $L289
548 0001543C fe 08 effffffb5d callf $8,_writes
549 00015443 # writed( index2 ); /* about the corrupted */
550 00015443 dd effffffb57 pushl _index2
551 00015449 fe 08 effffffb50 callf $8,_writed
552 00015450 # writes(" = "); /* register */
553 00015450 .data 1
554 00000df5 * L290:
555 00000df5 * 203D2000 .ascii " = \0"
556 00000df9 * .text
557 00015450 dd 8f00000df5 pushl $L290
558 00015456 fe 08 effffffb43 callf $8,_writes
559 0001545D # write32h( store_regs[index2] );
560 0001545D 0d effffffb3d 50 movl _index2,r0
561 00015464 dd 40effffffb35 pushl _store_regs[r0]
562 0001546B fe 08 effffffb2e callf $8,_write32h
563 00015472 # writes(", should be = ");
564 00015472 .data 1
565 00000df9 * L291:
566 00000df9 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
567 00000e09 * .text
568 00015472 dd 8f00000df9 pushl $L291
569 00015478 fe 08 effffffb21 callf $8,_writes
570 0001547F # write32h( load_regs[index2] );
571 0001547F 0d effffffb1b 50 movl _index2,r0
572 00015486 dd 40effffffb13 pushl _load_regs[r0]
573 0001548D fe 08 effffffb0c callf $8,_write32h
574 00015494 # writes("\n");
575 00015494 .data 1
576 00000e09 * L292:
577 00000e09 * 0A00 .ascii "\12\0"
578 00000e0b * .text
579 00015494 dd 8f00000e09 pushl $L292
580 0001549A fe 08 effffffaff callf $8,_writes
581 000154A1 # }
582 000154A1 # if( halt_flg )
583 000154A1 L281:
584 000154A1 5d effffffaf9 tstl _halt_flg
585 000154A7 31 09 jeql L293
586 000154A9 # cvfl_er_halt( BAD_REG_HLT ); /* halt on the error */
587 000154A9 dd 02 pushl $2
588 000154AB fe 08 ef000006be callf $8,_cvfl_er_halt
589 000154B2 # if( loop_on_err ) {
590 000154B2 L293:
591 000154B2 5d effffffae8 tstl _loop_on_err
592 000154B8 31 0a jeql L294
593 000154BA # force_loop = TRUE; /* set the force loop flag */
594 000154BA 0d 01 effffffadf movl $1,_force_loop
595 000154C1 # asm("brw _cvfl_3_lp1");; /* and loop on the error */
596 000154C1 13 fe67 brw _cvfl_3_lp1
597 000154C4 # } /* end of loop on error */
598 000154C4 # } /* end of register corruption error */
599 000154C4 L294:
600 000154C4 # } /* end of subtest 3 */
601 000154C4 L280:
602 000154C4 40 ret#2
603 000154C5 .set L272,0x0
604 000154C5 L274:
605 000154C5 13 fe2d jbr L275
606 000154C8 .data
607 00000ca0 * .text
608 000154C8 .align 1
609 000154C8 .globl _cvfl_4
610 000154C8 _cvfl_4:
611 000154C8 0000 .word L295
612 000154CA #
613 000154CA #
614 000154CA #
615 000154CA # /************************************************************************
616 000154CA # *
617 000154CA # * SUBTEST 4 - Check for PSL corruption
618 000154CA # *
619 000154CA # ************************************************************************/
620 000154CA # cvfl_4()
621 000154CA # {
622 000154CA 13 0217 jbr L297
623 000154CD L298:
624 000154CD # force_loop = FALSE; /* clear force_loop flg */
625 000154CD 4d effffffacd clrl _force_loop
626 000154D3 # subtest = 4;
627 000154D3 0d 04 effffffac6 movl $4,_subtest
628 000154DA # for( index = 0; index < max_cvfl_1_index; index++ ) {
629 000154DA 4d effffffac0 clrl _index
630 000154E0 L301:
631 000154E0 1d effffffaba effffffab5 cmpl _index,_max_cvfl_1_index
632 000154EB 91 03 13 01f3 jgeq L300
633 000154F0 # sgl_ld_acc = cvfl_1_data[index].ld; /* get value to convert */
634 000154F0 0d effffffaaa 50 movl _index,r0
635 000154F7 48 03 50 50 shll $3,r0,r0
636 000154FB 0d e000000000 effffffa9a movl _cvfl_1_data(r0),_sgl_ld_acc
637 00015506 # sgl_expected = cvfl_1_data[index].exp; /* get expected */
638 00015506 0d effffffa94 50 movl _index,r0
639 0001550D 48 03 50 50 shll $3,r0,r0
640 00015511 0d e000000004 effffffa84 movl _cvfl_1_data+4(r0),_sgl_expected
641 0001551C # for( status_index = 0; status_index < 3; status_index++ ) {
642 0001551C 4d effffffa7e clrl _status_index
643 00015522 L304:
644 00015522 1d effffffa78 03 cmpl _status_index,$3
645 00015529 91 03 13 01ac jgeq L303
646 0001552E # sgl_dummy1 = status_array[status_index];/* status = +, -, 0 */
647 0001552E 0d effffffa6c 50 movl _status_index,r0
648 00015535 0d 40effffffa64 movl _status_array[r0],_sgl_dummy1
effffffa5f
649 00015541 # /*
650 00015541 # * If LOOP ON ERROR is set, this is the loop for this subtest.
651 00015541 # * The force loop flag is set after the first error.
652 00015541 # */
653 00015541 # asm("_cvfl_4_lp1:");
654 00015541 _cvfl_4_lp1:
655 00015541 # asm("movl _sgl_ld_acc,r4"); /* move operand to r4 */
656 00015541 0d effffffa59 54 movl _sgl_ld_acc,r4
657 00015548 # asm("ldf r4"); /* load the operand */
658 00015548 06 54 ldf r4
659 0001554A # asm("tstl _sgl_dummy1"); /* set the PSL status */
660 0001554A 5d effffffa50 tstl _sgl_dummy1
661 00015550 # asm("movpsl _init_psl"); /* save the initial PSL */
662 00015550 cd effffffa4a movpsl _init_psl
663 00015556 # asm("nop");
664 00015556 10 nop
665 00015557 # asm("cvfl r8"); /* convert the value */
666 00015557 86 58 cvfl r8
667 00015559 # asm("nop");
668 00015559 10 nop
669 0001555A # asm("movpsl _psl_val"); /* save the final PSL */
670 0001555A cd effffffa40 movpsl _psl_val
671 00015560 # asm("nop");
672 00015560 10 nop
673 00015561 # asm("stf _sgl_st_acc"); /* store the result */
674 00015561 26 effffffa39 stf _sgl_st_acc
675 00015567 # if( force_loop )
676 00015567 5d effffffa33 tstl _force_loop
677 0001556D 31 02 jeql L305
678 0001556F # asm("brb _cvfl_4_lp1");; /* loop on the error */
679 0001556F 11 d0 brb _cvfl_4_lp1
680 00015571 L305:
681 00015571 # /*
682 00015571 # * Now compare the final PSL to the initial PSL -they should be the same
683 00015571 # */
684 00015571 # asm("movl r8,_sgl_value_1"); /* save the converted int*/
685 00015571 0d 58 effffffa28 movl r8,_sgl_value_1
686 00015578 # exp_psl = init_psl;
687 00015578 0d effffffa22 effffffa1d movl _init_psl,_exp_psl
688 00015583 # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
689 00015583 ac 88f3 effffffa15 andl2 $-13,_exp_psl
690 0001558B # if( !sgl_expected )
691 0001558B 5d effffffa0f tstl _sgl_expected
692 00015591 21 07 jneq L306
693 00015593 # exp_psl |= PSL_Z; /* expect the ZERO bit set */
694 00015593 8c 04 effffffa06 orl2 $4,_exp_psl
695 0001559A # if( sgl_expected < 0 )
696 0001559A L306:
697 0001559A 5d effffffa00 tstl _sgl_expected
698 000155A0 81 07 jgeq L307
699 000155A2 # exp_psl |= PSL_N; /* expect the NEG bit set */
700 000155A2 8c 08 effffff9f7 orl2 $8,_exp_psl
701 000155A9 # if( psl_val != exp_psl ) {
702 000155A9 L307:
703 000155A9 1d effffff9f1 effffff9ec cmpl _psl_val,_exp_psl
704 000155B4 21 03 13 0118 jeql L308
705 000155B9 # errcnt++; /* bump the error count */
706 000155B9 6d effffff9e1 incl _errcnt
707 000155BF # if( prt_error ) {
708 000155BF 5d effffff9db tstl _prt_error
709 000155C5 21 03 13 00e4 jeql L309
710 000155CA # writes(" \n"); /* start a new print line */
711 000155CA .data 1
712 00000e0b * L310:
713 00000e0b * 200A00 .ascii " \12\0"
714 00000e0e * .text
715 000155CA dd 8f00000e0b pushl $L310
716 000155D0 fe 08 effffff9c9 callf $8,_writes
717 000155D7 # writes("cycle: ");
718 000155D7 .data 1
719 00000e0e * L311:
720 00000e0e * 6379636C653A2000 .ascii "cycle: \0"
721 00000e16 * .text
722 000155D7 dd 8f00000e0e pushl $L311
723 000155DD fe 08 effffff9bc callf $8,_writes
724 000155E4 # writed( cycle );
725 000155E4 dd effffff9b6 pushl _cycle
726 000155EA fe 08 effffff9af callf $8,_writed
727 000155F1 # writes(" CVFL test ");
728 000155F1 .data 1
729 00000e16 * L312:
730 00000e16 * 20204356464C2074657374200 .ascii " CVFL test \0"
0
731 00000e23 * .text
732 000155F1 dd 8f00000e16 pushl $L312
733 000155F7 fe 08 effffff9a2 callf $8,_writes
734 000155FE # writed( test_no );
735 000155FE dd effffff99c pushl _test_no
736 00015604 fe 08 effffff995 callf $8,_writed
737 0001560B # writes(", subtest 4 - INCORRECT FINAL PSL\n");
738 0001560B .data 1
739 00000e23 * L313:
740 00000e23 * 2C20737562746573742034202 .ascii ", subtest 4 - INCORRECT FINAL PSL\12\0"
D20494E434F52524543542046
494E414C2050534C0A00
741 00000e46 * .text
742 0001560B dd 8f00000e23 pushl $L313
743 00015611 fe 08 effffff988 callf $8,_writes
744 00015618 # print_cvfl_data(); /* print operands */
745 00015618 fe 04 ef00000515 callf $4,_print_cvfl_data
746 0001561F # writes("\n");
747 0001561F .data 1
748 00000e46 * L314:
749 00000e46 * 0A00 .ascii "\12\0"
750 00000e48 * .text
751 0001561F dd 8f00000e46 pushl $L314
752 00015625 fe 08 effffff974 callf $8,_writes
753 0001562C # writes(" final Acc = ");
754 0001562C .data 1
755 00000e48 * L315:
756 00000e48 * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
757 00000e57 * .text
758 0001562C dd 8f00000e48 pushl $L315
759 00015632 fe 08 effffff967 callf $8,_writes
760 00015639 # write32h( sgl_st_acc );
761 00015639 dd effffff961 pushl _sgl_st_acc
762 0001563F fe 08 effffff95a callf $8,_write32h
763 00015646 # writes("\n");
764 00015646 .data 1
765 00000e57 * L316:
766 00000e57 * 0A00 .ascii "\12\0"
767 00000e59 * .text
768 00015646 dd 8f00000e57 pushl $L316
769 0001564C fe 08 effffff94d callf $8,_writes
770 00015653 # writes("initial PSL = ");
771 00015653 .data 1
772 00000e59 * L317:
773 00000e59 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
774 00000e68 * .text
775 00015653 dd 8f00000e59 pushl $L317
776 00015659 fe 08 effffff940 callf $8,_writes
777 00015660 # write32h( init_psl );
778 00015660 dd effffff93a pushl _init_psl
779 00015666 fe 08 effffff933 callf $8,_write32h
780 0001566D # writes(", final PSL = ");
781 0001566D .data 1
782 00000e68 * L318:
783 00000e68 * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
784 00000e78 * .text
785 0001566D dd 8f00000e68 pushl $L318
786 00015673 fe 08 effffff926 callf $8,_writes
787 0001567A # write32h( psl_val );
788 0001567A dd effffff920 pushl _psl_val
789 00015680 fe 08 effffff919 callf $8,_write32h
790 00015687 # writes(", expected PSL = ");
791 00015687 .data 1
792 00000e78 * L319:
793 00000e78 * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
794 00000e8b * .text
795 00015687 dd 8f00000e78 pushl $L319
796 0001568D fe 08 effffff90c callf $8,_writes
797 00015694 # write32h( exp_psl );
798 00015694 dd effffff906 pushl _exp_psl
799 0001569A fe 08 effffff8ff callf $8,_write32h
800 000156A1 # writes("\n");
801 000156A1 .data 1
802 00000e8b * L320:
803 00000e8b * 0A00 .ascii "\12\0"
804 00000e8d * .text
805 000156A1 dd 8f00000e8b pushl $L320
806 000156A7 fe 08 effffff8f2 callf $8,_writes
807 000156AE # }
808 000156AE # if( halt_flg )
809 000156AE L309:
810 000156AE 5d effffff8ec tstl _halt_flg
811 000156B4 31 09 jeql L321
812 000156B6 # cvfl_er_halt( BAD_PSL_HLT ); /* halt on error */
813 000156B6 dd 03 pushl $3
814 000156B8 fe 08 ef000004b1 callf $8,_cvfl_er_halt
815 000156BF # if( loop_on_err ) {
816 000156BF L321:
817 000156BF 5d effffff8db tstl _loop_on_err
818 000156C5 31 0a jeql L322
819 000156C7 # force_loop = TRUE; /* set force loop flag */
820 000156C7 0d 01 effffff8d2 movl $1,_force_loop
821 000156CE # asm("brw _cvfl_4_lp1");;/* and loop on error */
822 000156CE 13 fe70 brw _cvfl_4_lp1
823 000156D1 # } /* end of loop on error */
824 000156D1 # } /* end of PSL corruption error */
825 000156D1 L322:
826 000156D1 # } /* end of status WHILE loop */
827 000156D1 L308:
828 000156D1 L302:
829 000156D1 6d effffff8c9 incl _status_index
830 000156D7 13 fe48 jbr L304
831 000156DA L303:
832 000156DA # } /* end of data WHILE loop */
833 000156DA L299:
834 000156DA 6d effffff8c0 incl _index
835 000156E0 13 fdfd jbr L301
836 000156E3 L300:
837 000156E3 # } /* end of subtest 4 */
838 000156E3 40 ret#2
839 000156E4 .set L295,0x0
840 000156E4 L297:
841 000156E4 13 fde6 jbr L298
842 000156E7 .data
843 00000ca0 * .text
844 000156E7 00 .align 1
845 000156E8 .globl _cvfl_5
846 000156E8 _cvfl_5:
847 000156E8 0000 .word L323
848 000156EA #
849 000156EA #
850 000156EA #
851 000156EA # /************************************************************************
852 000156EA # *
853 000156EA # * SUBTEST 5 - accumulator corruption
854 000156EA # *
855 000156EA # ************************************************************************/
856 000156EA # cvfl_5()
857 000156EA # {
858 000156EA 13 015e jbr L325
859 000156ED L326:
860 000156ED # force_loop = FALSE;
861 000156ED 4d effffff8ad clrl _force_loop
862 000156F3 # subtest = 5;
863 000156F3 0d 05 effffff8a6 movl $5,_subtest
864 000156FA # for( index = 0; index < max_cvfl_1_index; index++ ) {
865 000156FA 4d effffff8a0 clrl _index
866 00015700 L329:
867 00015700 1d effffff89a effffff895 cmpl _index,_max_cvfl_1_index
868 0001570B 91 03 13 013a jgeq L328
869 00015710 # sgl_ld_acc = cvfl_1_data[index].ld; /* get value to convert */
870 00015710 0d effffff88a 50 movl _index,r0
871 00015717 48 03 50 50 shll $3,r0,r0
872 0001571B 0d e000000000 effffff87a movl _cvfl_1_data(r0),_sgl_ld_acc
873 00015726 # if( sgl_ld_acc & 0x7f800000 )
874 00015726 3d 8f7f800000 effffff86f bitl $2139095040,_sgl_ld_acc
875 00015731 31 0d jeql L330
876 00015733 # sgl_expected = sgl_ld_acc;
877 00015733 0d effffff867 effffff862 movl _sgl_ld_acc,_sgl_expected
878 0001573E # else
879 0001573E 11 06 jbr L331
880 00015740 L330:
881 00015740 # sgl_expected = 0;
882 00015740 4d effffff85a clrl _sgl_expected
883 00015746 L331:
884 00015746 # /*
885 00015746 # * If LOOP ON ERROR is set, this is the loop for this subtest.
886 00015746 # * The force loop flag is set after the first error.
887 00015746 # */
888 00015746 # asm("_cvfl_5_lp1:");
889 00015746 _cvfl_5_lp1:
890 00015746 # asm("ldf _sgl_ld_acc"); /* load the base value */
891 00015746 06 effffff854 ldf _sgl_ld_acc
892 0001574C # asm("cvfl _sgl_value_1"); /* store the result */
893 0001574C 86 effffff84e cvfl _sgl_value_1
894 00015752 # asm("stf _sgl_st_acc"); /* store the result */
895 00015752 26 effffff848 stf _sgl_st_acc
896 00015758 # if( force_loop )
897 00015758 5d effffff842 tstl _force_loop
898 0001575E 31 02 jeql L332
899 00015760 # asm("brb _cvfl_5_lp1");; /* loop on the error */
900 00015760 11 e4 brb _cvfl_5_lp1
901 00015762 L332:
902 00015762 # /*
903 00015762 # * end error loop - test the results
904 00015762 # */
905 00015762 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
906 00015762 1d effffff838 effffff833 cmpl _sgl_st_acc,_sgl_expected
907 0001576D 21 03 13 00cf jeql L333
908 00015772 # errcnt++; /* bump the error count */
909 00015772 6d effffff828 incl _errcnt
910 00015778 # if( prt_error ) {
911 00015778 5d effffff822 tstl _prt_error
912 0001577E 21 03 13 009b jeql L334
913 00015783 # writes(" \n"); /* start a new print line */
914 00015783 .data 1
915 00000e8d * L335:
916 00000e8d * 200A00 .ascii " \12\0"
917 00000e90 * .text
918 00015783 dd 8f00000e8d pushl $L335
919 00015789 fe 08 effffff810 callf $8,_writes
920 00015790 # writes("cycle: ");
921 00015790 .data 1
922 00000e90 * L336:
923 00000e90 * 6379636C653A2000 .ascii "cycle: \0"
924 00000e98 * .text
925 00015790 dd 8f00000e90 pushl $L336
926 00015796 fe 08 effffff803 callf $8,_writes
927 0001579D # writed( cycle );
928 0001579D dd effffff7fd pushl _cycle
929 000157A3 fe 08 effffff7f6 callf $8,_writed
930 000157AA # writes(" CVFL test ");
931 000157AA .data 1
932 00000e98 * L337:
933 00000e98 * 20204356464C2074657374200 .ascii " CVFL test \0"
0
934 00000ea5 * .text
935 000157AA dd 8f00000e98 pushl $L337
936 000157B0 fe 08 effffff7e9 callf $8,_writes
937 000157B7 # writed( test_no );
938 000157B7 dd effffff7e3 pushl _test_no
939 000157BD fe 08 effffff7dc callf $8,_writed
940 000157C4 # writes(", subtest 5 (Cache Data) - BAD_FINAL_ACC\n");
941 000157C4 .data 1
942 00000ea5 * L338:
943 00000ea5 * 2C20737562746573742035202 .ascii ", subtest 5 (Cache Data) - BAD_FINAL_ACC\12\0"
8436163686520446174612920
2D204241445F46494E414C5F4
143430A00
944 00000ecf * .text
945 000157C4 dd 8f00000ea5 pushl $L338
946 000157CA fe 08 effffff7cf callf $8,_writes
947 000157D1 # print_cvfl_data();
948 000157D1 fe 04 ef0000035c callf $4,_print_cvfl_data
949 000157D8 # writec('\n');
950 000157D8 dd 0a pushl $10
951 000157DA fe 08 effffff7bf callf $8,_writec
952 000157E1 # writes(" final Acc = ");
953 000157E1 .data 1
954 00000ecf * L339:
955 00000ecf * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
956 00000ede * .text
957 000157E1 dd 8f00000ecf pushl $L339
958 000157E7 fe 08 effffff7b2 callf $8,_writes
959 000157EE # write32h( sgl_value_1 );
960 000157EE dd effffff7ac pushl _sgl_value_1
961 000157F4 fe 08 effffff7a5 callf $8,_write32h
962 000157FB # writes(", expected Acc = ");
963 000157FB .data 1
964 00000ede * L340:
965 00000ede * 2C20202020657870656374656 .ascii ", expected Acc = \0"
420416363203D2000
966 00000ef3 * .text
967 000157FB dd 8f00000ede pushl $L340
968 00015801 fe 08 effffff798 callf $8,_writes
969 00015808 # write32h( sgl_ld_acc );
970 00015808 dd effffff792 pushl _sgl_ld_acc
971 0001580E fe 08 effffff78b callf $8,_write32h
972 00015815 # writec('\n');
973 00015815 dd 0a pushl $10
974 00015817 fe 08 effffff782 callf $8,_writec
975 0001581E # }
976 0001581E # if( halt_flg )
977 0001581E L334:
978 0001581E 5d effffff77c tstl _halt_flg
979 00015824 31 09 jeql L341
980 00015826 # cvfl_er_halt( BAD_ACC_HLT ); /* halt on the error */
981 00015826 dd 01 pushl $1
982 00015828 fe 08 ef00000341 callf $8,_cvfl_er_halt
983 0001582F # if( loop_on_err ) {
984 0001582F L341:
985 0001582F 5d effffff76b tstl _loop_on_err
986 00015835 31 0a jeql L342
987 00015837 # force_loop = TRUE; /* set the force loop flag */
988 00015837 0d 01 effffff762 movl $1,_force_loop
989 0001583E # asm("brw _cvfl_1_lp1");; /* and loop on the error */
990 0001583E 13 f811 brw _cvfl_1_lp1
991 00015841 # } /* end of loop on error */
992 00015841 # } /* end of compare error */
993 00015841 L342:
994 00015841 # } /* end of WHILE loop */
995 00015841 L333:
996 00015841 L327:
997 00015841 6d effffff759 incl _index
998 00015847 13 feb6 jbr L329
999 0001584A L328:
1000 0001584A # } /* end of subtest 5 */
1001 0001584A 40 ret#2
1002 0001584B .set L323,0x0
1003 0001584B L325:
1004 0001584B 13 fe9f jbr L326
1005 0001584E .data
1006 00000ca0 * .text
1007 0001584E .align 1
1008 0001584E .globl _cvfl_6
1009 0001584E _cvfl_6:
1010 0001584E 0000 .word L343
1011 00015850 #
1012 00015850 #
1013 00015850 #
1014 00015850 # /************************************************************************
1015 00015850 # *
1016 00015850 # * SUBTEST 6 - pipelined entry test
1017 00015850 # *
1018 00015850 # ************************************************************************/
1019 00015850 # cvfl_6()
1020 00015850 # {
1021 00015850 13 0163 jbr L345
1022 00015853 L346:
1023 00015853 # force_loop = FALSE;
1024 00015853 4d effffff747 clrl _force_loop
1025 00015859 # subtest = 6;
1026 00015859 0d 06 effffff740 movl $6,_subtest
1027 00015860 # for( index = 0; index < max_cvfl_1_index; index++ ) {
1028 00015860 4d effffff73a clrl _index
1029 00015866 L349:
1030 00015866 1d effffff734 effffff72f cmpl _index,_max_cvfl_1_index
1031 00015871 91 03 13 013f jgeq L348
1032 00015876 # sgl_ld_acc = cvfl_1_data[index].ld; /* get value to convert */
1033 00015876 0d effffff724 50 movl _index,r0
1034 0001587D 48 03 50 50 shll $3,r0,r0
1035 00015881 0d e000000000 effffff714 movl _cvfl_1_data(r0),_sgl_ld_acc
1036 0001588C # if( sgl_ld_acc & 0x7f800000 )
1037 0001588C 3d 8f7f800000 effffff709 bitl $2139095040,_sgl_ld_acc
1038 00015897 31 0d jeql L350
1039 00015899 # sgl_expected = sgl_ld_acc; /* expected = loaded */
1040 00015899 0d effffff701 effffff6fc movl _sgl_ld_acc,_sgl_expected
1041 000158A4 # else
1042 000158A4 11 06 jbr L351
1043 000158A6 L350:
1044 000158A6 # sgl_expected = 0; /* expect a '0' */
1045 000158A6 4d effffff6f4 clrl _sgl_expected
1046 000158AC L351:
1047 000158AC # /*
1048 000158AC # * If LOOP ON ERROR is set, this is the loop for this subtest.
1049 000158AC # * The force loop flag is set after the first error.
1050 000158AC # */
1051 000158AC # asm("_cvfl_6_lp1:");
1052 000158AC _cvfl_6_lp1:
1053 000158AC # asm("movl $0,r0"); /* clear r0 */
1054 000158AC 0d 00 50 movl $0,r0
1055 000158AF # asm("ldf r0"); /* load the Acc. with 0.0 */
1056 000158AF 06 50 ldf r0
1057 000158B1 # asm("addf _sgl_ld_acc"); /* add the base value */
1058 000158B1 c6 effffff6e9 addf _sgl_ld_acc
1059 000158B7 # asm("cvfl _sgl_value_1"); /* convert the value */
1060 000158B7 86 effffff6e3 cvfl _sgl_value_1
1061 000158BD # asm("stf _sgl_st_acc"); /* store the result */
1062 000158BD 26 effffff6dd stf _sgl_st_acc
1063 000158C3 # if( force_loop )
1064 000158C3 5d effffff6d7 tstl _force_loop
1065 000158C9 31 02 jeql L352
1066 000158CB # asm("brb _cvfl_6_lp1");; /* loop on the error */
1067 000158CB 11 df brb _cvfl_6_lp1
1068 000158CD L352:
1069 000158CD # /*
1070 000158CD # * end error loop - test the results
1071 000158CD # */
1072 000158CD # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1073 000158CD 1d effffff6cd effffff6c8 cmpl _sgl_st_acc,_sgl_expected
1074 000158D8 21 03 13 00cf jeql L353
1075 000158DD # errcnt++; /* bump the error count */
1076 000158DD 6d effffff6bd incl _errcnt
1077 000158E3 # if( prt_error ) {
1078 000158E3 5d effffff6b7 tstl _prt_error
1079 000158E9 21 03 13 009b jeql L354
1080 000158EE # writes(" \n"); /* start a new print line */
1081 000158EE .data 1
1082 00000ef3 * L355:
1083 00000ef3 * 200A00 .ascii " \12\0"
1084 00000ef6 * .text
1085 000158EE dd 8f00000ef3 pushl $L355
1086 000158F4 fe 08 effffff6a5 callf $8,_writes
1087 000158FB # writes("cycle: ");
1088 000158FB .data 1
1089 00000ef6 * L356:
1090 00000ef6 * 6379636C653A2000 .ascii "cycle: \0"
1091 00000efe * .text
1092 000158FB dd 8f00000ef6 pushl $L356
1093 00015901 fe 08 effffff698 callf $8,_writes
1094 00015908 # writed( cycle );
1095 00015908 dd effffff692 pushl _cycle
1096 0001590E fe 08 effffff68b callf $8,_writed
1097 00015915 # writes(" CVFL test ");
1098 00015915 .data 1
1099 00000efe * L357:
1100 00000efe * 20204356464C2074657374200 .ascii " CVFL test \0"
0
1101 00000f0b * .text
1102 00015915 dd 8f00000efe pushl $L357
1103 0001591B fe 08 effffff67e callf $8,_writes
1104 00015922 # writed( test_no );
1105 00015922 dd effffff678 pushl _test_no
1106 00015928 fe 08 effffff671 callf $8,_writed
1107 0001592F # writes(", subtest 6 (Piped Entry) - BAD_FINAL_ACC\n");
1108 0001592F .data 1
1109 00000f0b * L358:
1110 00000f0b * 2C20737562746573742036202 .ascii ", subtest 6 (Piped Entry) - BAD_FINAL_ACC\12\0"
8506970656420456E74727929
202D204241445F46494E414C5
F4143430A00
1111 00000f36 * .text
1112 0001592F dd 8f00000f0b pushl $L358
1113 00015935 fe 08 effffff664 callf $8,_writes
1114 0001593C # print_cvfl_data();
1115 0001593C fe 04 ef000001f1 callf $4,_print_cvfl_data
1116 00015943 # writec('\n');
1117 00015943 dd 0a pushl $10
1118 00015945 fe 08 effffff654 callf $8,_writec
1119 0001594C # writes(" final Acc = ");
1120 0001594C .data 1
1121 00000f36 * L359:
1122 00000f36 * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
1123 00000f45 * .text
1124 0001594C dd 8f00000f36 pushl $L359
1125 00015952 fe 08 effffff647 callf $8,_writes
1126 00015959 # write32h( sgl_value_1 );
1127 00015959 dd effffff641 pushl _sgl_value_1
1128 0001595F fe 08 effffff63a callf $8,_write32h
1129 00015966 # writes(", expected Acc = ");
1130 00015966 .data 1
1131 00000f45 * L360:
1132 00000f45 * 2C20657870656374656420416 .ascii ", expected Acc = \0"
363203D2000
1133 00000f57 * .text
1134 00015966 dd 8f00000f45 pushl $L360
1135 0001596C fe 08 effffff62d callf $8,_writes
1136 00015973 # write32h( sgl_ld_acc );
1137 00015973 dd effffff627 pushl _sgl_ld_acc
1138 00015979 fe 08 effffff620 callf $8,_write32h
1139 00015980 # writec('\n');
1140 00015980 dd 0a pushl $10
1141 00015982 fe 08 effffff617 callf $8,_writec
1142 00015989 # }
1143 00015989 # if( halt_flg )
1144 00015989 L354:
1145 00015989 5d effffff611 tstl _halt_flg
1146 0001598F 31 09 jeql L361
1147 00015991 # cvfl_er_halt( BAD_ACC_HLT ); /* halt on the error */
1148 00015991 dd 01 pushl $1
1149 00015993 fe 08 ef000001d6 callf $8,_cvfl_er_halt
1150 0001599A # if( loop_on_err ) {
1151 0001599A L361:
1152 0001599A 5d effffff600 tstl _loop_on_err
1153 000159A0 31 0a jeql L362
1154 000159A2 # force_loop = TRUE; /* set the force loop flag */
1155 000159A2 0d 01 effffff5f7 movl $1,_force_loop
1156 000159A9 # asm("brw _cvfl_6_lp1");; /* and loop on the error */
1157 000159A9 13 ff00 brw _cvfl_6_lp1
1158 000159AC # } /* end of loop on error */
1159 000159AC # } /* end of compare error */
1160 000159AC L362:
1161 000159AC # } /* end of WHILE loop */
1162 000159AC L353:
1163 000159AC L347:
1164 000159AC 6d effffff5ee incl _index
1165 000159B2 13 feb1 jbr L349
1166 000159B5 L348:
1167 000159B5 # } /* end of subtest 6 */
1168 000159B5 40 ret#2
1169 000159B6 .set L343,0x0
1170 000159B6 L345:
1171 000159B6 13 fe9a jbr L346
1172 000159B9 .data
1173 00000ca0 * .text
1174 000159B9 00 .align 1
1175 000159BA .globl _cvfl_7
1176 000159BA _cvfl_7:
1177 000159BA 0000 .word L364
1178 000159BC #
1179 000159BC #
1180 000159BC #
1181 000159BC # /************************************************************************
1182 000159BC # *
1183 000159BC # * SUBTEST 7 - pipelined exit test
1184 000159BC # *
1185 000159BC # ************************************************************************/
1186 000159BC # cvfl_7()
1187 000159BC # {
1188 000159BC 13 0172 jbr L366
1189 000159BF L367:
1190 000159BF # force_loop = FALSE;
1191 000159BF 4d effffff5db clrl _force_loop
1192 000159C5 # subtest = 7;
1193 000159C5 0d 07 effffff5d4 movl $7,_subtest
1194 000159CC # for( index = 0; index < max_cvfl_1_index; index++ ) {
1195 000159CC 4d effffff5ce clrl _index
1196 000159D2 L370:
1197 000159D2 1d effffff5c8 effffff5c3 cmpl _index,_max_cvfl_1_index
1198 000159DD 91 03 13 014e jgeq L369
1199 000159E2 # sgl_ld_acc = cvfl_1_data[index].ld; /* get value to negate */
1200 000159E2 0d effffff5b8 50 movl _index,r0
1201 000159E9 48 03 50 50 shll $3,r0,r0
1202 000159ED 0d e000000000 effffff5a8 movl _cvfl_1_data(r0),_sgl_ld_acc
1203 000159F8 # if( sgl_ld_acc & 0x7f800000 )
1204 000159F8 3d 8f7f800000 effffff59d bitl $2139095040,_sgl_ld_acc
1205 00015A03 31 0d jeql L371
1206 00015A05 # sgl_expected = sgl_ld_acc; /* expected = loaded */
1207 00015A05 0d effffff595 effffff590 movl _sgl_ld_acc,_sgl_expected
1208 00015A10 # else
1209 00015A10 11 06 jbr L372
1210 00015A12 L371:
1211 00015A12 # sgl_expected = 0; /* expect a '0' */
1212 00015A12 4d effffff588 clrl _sgl_expected
1213 00015A18 L372:
1214 00015A18 # /*
1215 00015A18 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1216 00015A18 # * The force loop flag is set after the first error.
1217 00015A18 # */
1218 00015A18 # asm("_cvfl_7_lp1:");
1219 00015A18 _cvfl_7_lp1:
1220 00015A18 # asm("movl $0,r0"); /* clear r0 */
1221 00015A18 0d 00 50 movl $0,r0
1222 00015A1B # asm("ldf _sgl_ld_acc"); /* load the value */
1223 00015A1B 06 effffff57f ldf _sgl_ld_acc
1224 00015A21 # asm("cvfl _sgl_value_1"); /* convert the value */
1225 00015A21 86 effffff579 cvfl _sgl_value_1
1226 00015A27 # asm("addf r0"); /* add a zero to the acc */
1227 00015A27 c6 50 addf r0
1228 00015A29 # asm("stf _sgl_st_acc"); /* store the result */
1229 00015A29 26 effffff571 stf _sgl_st_acc
1230 00015A2F # if( force_loop )
1231 00015A2F 5d effffff56b tstl _force_loop
1232 00015A35 31 02 jeql L373
1233 00015A37 # asm("brb _cvfl_7_lp1");; /* loop on the error */
1234 00015A37 11 df brb _cvfl_7_lp1
1235 00015A39 L373:
1236 00015A39 # /*
1237 00015A39 # * end error loop - test the results
1238 00015A39 # */
1239 00015A39 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1240 00015A39 1d effffff561 effffff55c cmpl _sgl_st_acc,_sgl_expected
1241 00015A44 21 03 13 00de jeql L374
1242 00015A49 # errcnt++; /* bump the error count */
1243 00015A49 6d effffff551 incl _errcnt
1244 00015A4F # if( prt_error ) {
1245 00015A4F 5d effffff54b tstl _prt_error
1246 00015A55 21 03 13 00aa jeql L375
1247 00015A5A # writes(" \n"); /* start a new print line */
1248 00015A5A .data 1
1249 00000f57 * L376:
1250 00000f57 * 200A00 .ascii " \12\0"
1251 00000f5a * .text
1252 00015A5A dd 8f00000f57 pushl $L376
1253 00015A60 fe 08 effffff539 callf $8,_writes
1254 00015A67 # writes("cycle: ");
1255 00015A67 .data 1
1256 00000f5a * L377:
1257 00000f5a * 6379636C653A2000 .ascii "cycle: \0"
1258 00000f62 * .text
1259 00015A67 dd 8f00000f5a pushl $L377
1260 00015A6D fe 08 effffff52c callf $8,_writes
1261 00015A74 # writed( cycle );
1262 00015A74 dd effffff526 pushl _cycle
1263 00015A7A fe 08 effffff51f callf $8,_writed
1264 00015A81 # writes(" CVFL test ");
1265 00015A81 .data 1
1266 00000f62 * L378:
1267 00000f62 * 20204356464C2074657374200 .ascii " CVFL test \0"
0
1268 00000f6f * .text
1269 00015A81 dd 8f00000f62 pushl $L378
1270 00015A87 fe 08 effffff512 callf $8,_writes
1271 00015A8E # writed( test_no );
1272 00015A8E dd effffff50c pushl _test_no
1273 00015A94 fe 08 effffff505 callf $8,_writed
1274 00015A9B # writes(", subtest 7 (piped exit) - BAD_FINAL_ACC\n");
1275 00015A9B .data 1
1276 00000f6f * L379:
1277 00000f6f * 2C20737562746573742037202 .ascii ", subtest 7 (piped exit) - BAD_FINAL_ACC\12\0"
8706970656420657869742920
2D204241445F46494E414C5F4
143430A00
1278 00000f99 * .text
1279 00015A9B dd 8f00000f6f pushl $L379
1280 00015AA1 fe 08 effffff4f8 callf $8,_writes
1281 00015AA8 # print_cvfl_data();
1282 00015AA8 fe 04 ef00000085 callf $4,_print_cvfl_data
1283 00015AAF # writes(" final Acc = ");
1284 00015AAF .data 1
1285 00000f99 * L380:
1286 00000f99 * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
1287 00000fa8 * .text
1288 00015AAF dd 8f00000f99 pushl $L380
1289 00015AB5 fe 08 effffff4e4 callf $8,_writes
1290 00015ABC # write32h( sgl_st_acc );
1291 00015ABC dd effffff4de pushl _sgl_st_acc
1292 00015AC2 fe 08 effffff4d7 callf $8,_write32h
1293 00015AC9 # writes(", expected Acc = ");
1294 00015AC9 .data 1
1295 00000fa8 * L381:
1296 00000fa8 * 2C20202020657870656374656 .ascii ", expected Acc = \0"
420416363203D2000
1297 00000fbd * .text
1298 00015AC9 dd 8f00000fa8 pushl $L381
1299 00015ACF fe 08 effffff4ca callf $8,_writes
1300 00015AD6 # if( sgl_ld_acc & 0x7f800000 )
1301 00015AD6 3d 8f7f800000 effffff4bf bitl $2139095040,_sgl_ld_acc
1302 00015AE1 31 0f jeql L382
1303 00015AE3 # write32h( sgl_ld_acc );
1304 00015AE3 dd effffff4b7 pushl _sgl_ld_acc
1305 00015AE9 fe 08 effffff4b0 callf $8,_write32h
1306 00015AF0 # else
1307 00015AF0 11 09 jbr L383
1308 00015AF2 L382:
1309 00015AF2 # write32h( 0 );
1310 00015AF2 dd 00 pushl $0
1311 00015AF4 fe 08 effffff4a5 callf $8,_write32h
1312 00015AFB L383:
1313 00015AFB # writec('\n');
1314 00015AFB dd 0a pushl $10
1315 00015AFD fe 08 effffff49c callf $8,_writec
1316 00015B04 # }
1317 00015B04 # if( halt_flg )
1318 00015B04 L375:
1319 00015B04 5d effffff496 tstl _halt_flg
1320 00015B0A 31 09 jeql L384
1321 00015B0C # cvfl_er_halt( BAD_ACC_HLT ); /* halt on the error */
1322 00015B0C dd 01 pushl $1
1323 00015B0E fe 08 ef0000005b callf $8,_cvfl_er_halt
1324 00015B15 # if( loop_on_err ) {
1325 00015B15 L384:
1326 00015B15 5d effffff485 tstl _loop_on_err
1327 00015B1B 31 0a jeql L385
1328 00015B1D # force_loop = TRUE; /* set the force loop flag */
1329 00015B1D 0d 01 effffff47c movl $1,_force_loop
1330 00015B24 # asm("brw _cvfl_7_lp1");; /* and loop on the error */
1331 00015B24 13 fef1 brw _cvfl_7_lp1
1332 00015B27 # } /* end of loop on error */
1333 00015B27 # } /* end of compare error */
1334 00015B27 L385:
1335 00015B27 # } /* end of WHILE loop */
1336 00015B27 L374:
1337 00015B27 L368:
1338 00015B27 6d effffff473 incl _index
1339 00015B2D 13 fea2 jbr L370
1340 00015B30 L369:
1341 00015B30 # } /* end of subtest 7 */
1342 00015B30 40 ret#2
1343 00015B31 .set L364,0x0
1344 00015B31 L366:
1345 00015B31 13 fe8b jbr L367
1346 00015B34 .data
1347 00000ca0 * .text
1348 00015B34 .align 1
1349 00015B34 .globl _print_cvfl_data
1350 00015B34 _print_cvfl_data:
1351 00015B34 0000 .word L386
1352 00015B36 #
1353 00015B36 #
1354 00015B36 #
1355 00015B36 # /**************************************************************************
1356 00015B36 # *
1357 00015B36 # * PRINT THE DATA AND STORE RESULTS
1358 00015B36 # *
1359 00015B36 # * initial Acc = xxxxxxxx, int. stored = xxxxxxxx, data index = xx
1360 00015B36 # **************************************************************************/
1361 00015B36 # print_cvfl_data()
1362 00015B36 # {
1363 00015B36 11 35 jbr L388
1364 00015B38 L389:
1365 00015B38 # writes("initial Acc = ");
1366 00015B38 .data 1
1367 00000fbd * L390:
1368 00000fbd * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
1369 00000fcc * .text
1370 00015B38 dd 8f00000fbd pushl $L390
1371 00015B3E fe 08 effffff45b callf $8,_writes
1372 00015B45 # write32h( sgl_ld_acc );
1373 00015B45 dd effffff455 pushl _sgl_ld_acc
1374 00015B4B fe 08 effffff44e callf $8,_write32h
1375 00015B52 # writes(", int. stored = ");
1376 00015B52 .data 1
1377 00000fcc * L391:
1378 00000fcc * 2C202020696E742E2073746F7 .ascii ", int. stored = \0"
26564203D2000
1379 00000fdf * .text
1380 00015B52 dd 8f00000fcc pushl $L391
1381 00015B58 fe 08 effffff441 callf $8,_writes
1382 00015B5F # write32h( sgl_value_1 );
1383 00015B5F dd effffff43b pushl _sgl_value_1
1384 00015B65 fe 08 effffff434 callf $8,_write32h
1385 00015B6C # }
1386 00015B6C 40 ret#2
1387 00015B6D .set L386,0x0
1388 00015B6D L388:
1389 00015B6D 11 c9 jbr L389
1390 00015B6F .data
1391 00000ca0 * .text
1392 00015B6F 00 .align 1
1393 00015B70 .globl _cvfl_er_halt
1394 00015B70 _cvfl_er_halt:
1395 00015B70 0000 .word L392
1396 00015B72 #
1397 00015B72 #
1398 00015B72 #
1399 00015B72 # /**************************************************************************
1400 00015B72 # *
1401 00015B72 # * HALT ON ERROR ROUTINE
1402 00015B72 # *
1403 00015B72 # **************************************************************************/
1404 00015B72 # cvfl_er_halt( halt_code )
1405 00015B72 # int halt_code;
1406 00015B72 # {
1407 00015B72 13 00c5 jbr L394
1408 00015B75 L395:
1409 00015B75 # sgl_dummy1 = halt_code; /* get the error type */
1410 00015B75 0d ad04 effffff423 movl 4(fp),_sgl_dummy1
1411 00015B7D # asm("movl _test_no,r0"); /* r0 = test number */
1412 00015B7D 0d effffff41d 50 movl _test_no,r0
1413 00015B84 # asm("movl _subtest,r1"); /* r1 = subtest number */
1414 00015B84 0d effffff416 51 movl _subtest,r1
1415 00015B8B # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1416 00015B8B 0d effffff40f 52 movl _sgl_dummy1,r2
1417 00015B92 # asm("movl _cycle,r3"); /* r3 = cycle count */
1418 00015B92 0d effffff408 53 movl _cycle,r3
1419 00015B99 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1420 00015B99 0d effffff401 54 movl _sgl_ld_acc,r4
1421 00015BA0 # asm("movl _sgl_value_1,r5"); /* r5 = final acc */
1422 00015BA0 0d effffff3fa 55 movl _sgl_value_1,r5
1423 00015BA7 # asm("movl _sgl_st_acc,r6"); /* r6 = integer stored */
1424 00015BA7 0d effffff3f3 56 movl _sgl_st_acc,r6
1425 00015BAE # if( halt_code == BAD_ACC_HLT ) {
1426 00015BAE 1d ad04 01 cmpl 4(fp),$1
1427 00015BB2 21 10 jneq L396
1428 00015BB4 # asm("movl _sgl_ld_acc,r7"); /* r7 = expected acc */
1429 00015BB4 0d effffff3e6 57 movl _sgl_ld_acc,r7
1430 00015BBB # asm("movl _index,r8"); /* r8 = data index */
1431 00015BBB 0d effffff3df 58 movl _index,r8
1432 00015BC2 # } else
1433 00015BC2 11 74 jbr L397
1434 00015BC4 L396:
1435 00015BC4 # if( halt_code == BAD_REG_HLT ) {
1436 00015BC4 1d ad04 02 cmpl 4(fp),$2
1437 00015BC8 21 3d jneq L398
1438 00015BCA # sgl_dummy1 = load_regs[index2];
1439 00015BCA 0d effffff3d0 50 movl _index2,r0
1440 00015BD1 0d 40effffff3c8 movl _load_regs[r0],_sgl_dummy1
effffff3c3
1441 00015BDD # sgl_dummy2 = store_regs[index2];
1442 00015BDD 0d effffff3bd 50 movl _index2,r0
1443 00015BE4 0d 40effffff3b5 movl _store_regs[r0],_sgl_dummy2
effffff3b0
1444 00015BF0 # asm("movl _index2,r7"); /* r7 = bad register # */
1445 00015BF0 0d effffff3aa 57 movl _index2,r7
1446 00015BF7 # asm("movl _sgl_dummy2,r8"); /* r8 = final reg value */
1447 00015BF7 0d effffff3a3 58 movl _sgl_dummy2,r8
1448 00015BFE # asm("movl _sgl_dummy1,r9"); /* r9 = init reg value */
1449 00015BFE 0d effffff39c 59 movl _sgl_dummy1,r9
1450 00015C05 # } else
1451 00015C05 11 31 jbr L399
1452 00015C07 L398:
1453 00015C07 # if( halt_code == BAD_PSL_HLT ) {
1454 00015C07 1d ad04 03 cmpl 4(fp),$3
1455 00015C0B 21 17 jneq L400
1456 00015C0D # asm("movl _init_psl,r7"); /* r7 = initial PSL */
1457 00015C0D 0d effffff38d 57 movl _init_psl,r7
1458 00015C14 # asm("movl _psl_val,r8"); /* r8 = final PSL */
1459 00015C14 0d effffff386 58 movl _psl_val,r8
1460 00015C1B # asm("movl _exp_psl,r9"); /* r9 = expected PSL */
1461 00015C1B 0d effffff37f 59 movl _exp_psl,r9
1462 00015C22 # } else
1463 00015C22 11 14 jbr L401
1464 00015C24 L400:
1465 00015C24 # if( halt_code == BAD_STORE_HLT ) {
1466 00015C24 1d ad04 09 cmpl 4(fp),$9
1467 00015C28 21 0e jneq L402
1468 00015C2A # asm("movl _sgl_expected,r7"); /* r7 = data expectd */
1469 00015C2A 0d effffff370 57 movl _sgl_expected,r7
1470 00015C31 # asm("movl _index,r8"); /* r8 = data index */
1471 00015C31 0d effffff369 58 movl _index,r8
1472 00015C38 # };
1473 00015C38 L402:
1474 00015C38 L401:
1475 00015C38 L399:
1476 00015C38 L397:
1477 00015C38 # asm("halt"); /* HALT ... */
1478 00015C38 00 halt
1479 00015C39 # }
1480 00015C39 40 ret#2
1481 00015C3A .set L392,0x0
1482 00015C3A L394:
1483 00015C3A 13 ff38 jbr L395
1484 00015C3D .data
1484 0002ABDD .data
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