![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to cvlf.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to cvlf.c CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
1.1 ! root 1: ! 2: #include "fpp_defs.h" ! 3: ! 4: ! 5: /***************************************************************************** ! 6: * ! 7: * CVLF - SINGLE PRECISION FLOATING POINT CONVERT LONG TO FLOAT TEST ! 8: * ! 9: *****************************************************************************/ ! 10: cvlf() ! 11: { ! 12: asm(".globl _cvlf_t"); ! 13: asm("_cvlf_t:"); /* entry address */ ! 14: if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */ ! 15: writes(" CVLF"); ! 16: cvlf_1(); /* load through a register */ ! 17: cvlf_2(); /* load through the cache */ ! 18: cvlf_3(); /* register stability */ ! 19: cvlf_4(); /* PSL stability test */ ! 20: cvlf_5(); /* pipelined entry test */ ! 21: cvlf_6(); /* pipelined exit test */ ! 22: asm("jmp *return"); /* return to the test monitor */ ! 23: } ! 24: ! 25: ! 26: ! 27: /************************************************************************ ! 28: * ! 29: * SUBTEST 1 - convert through a register ! 30: * ! 31: ************************************************************************/ ! 32: cvlf_1() ! 33: { ! 34: force_loop = FALSE; ! 35: subtest = 1; ! 36: for( index = 0; index < max_cvlf_1_index; index++ ) { ! 37: sgl_ld_acc = 0x12345678; /* get base value */ ! 38: sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */ ! 39: sgl_expected = cvlf_1_data[index].exp; /* get expected result */ ! 40: /* ! 41: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 42: * The force loop flag is set after the first error. ! 43: */ ! 44: asm("_cvlf_1_lp1:"); ! 45: asm("ldf _sgl_ld_acc"); ! 46: asm("movl _sgl_value_1,r4"); /* get the value to convert */ ! 47: asm("cvlf r4"); /* convert the value */ ! 48: asm("stf r5"); /* store the result in R5 */ ! 49: if( force_loop ) ! 50: asm("brb _cvlf_1_lp1");; /* loop on the error */ ! 51: /* ! 52: * end error loop - test the results ! 53: */ ! 54: asm("movl r5,_sgl_st_acc"); /* move R5 data to cache */ ! 55: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 56: errcnt++; /* bump the error count */ ! 57: if( prt_error ) { ! 58: writes(" \n"); /* start a new print line */ ! 59: writes("cycle: "); ! 60: writed( cycle ); ! 61: writes(" CVLF test "); ! 62: writed( test_no ); ! 63: writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n"); ! 64: print_cvlf_data(); ! 65: writes(", data index = "); ! 66: writed( index ); ! 67: writec('\n'); ! 68: writes(" operand = "); ! 69: write32h( sgl_value_1 ); ! 70: writes(", expected Acc = "); ! 71: write32h( sgl_expected ); ! 72: writec('\n'); ! 73: } ! 74: if( halt_flg ) ! 75: cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 76: if( loop_on_err ) { ! 77: force_loop = TRUE; /* set the force loop flag */ ! 78: asm("brw _cvlf_1_lp1");; /* and loop on the error */ ! 79: } /* end of loop on error */ ! 80: } /* end of compare error */ ! 81: } /* end of WHILE loop */ ! 82: } /* end of subtest 1 */ ! 83: ! 84: ! 85: ! 86: /************************************************************************ ! 87: * ! 88: * SUBTEST 2 - convert through memory ! 89: * ! 90: ************************************************************************/ ! 91: cvlf_2() ! 92: { ! 93: force_loop = FALSE; ! 94: subtest = 2; ! 95: for( index = 0; index < max_cvlf_1_index; index++ ) { ! 96: sgl_ld_acc = 0x7fffffff; /* get value to negate */ ! 97: sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */ ! 98: sgl_expected = cvlf_1_data[index].exp; /* get expected result */ ! 99: /* ! 100: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 101: * The force loop flag is set after the first error. ! 102: */ ! 103: asm("_cvlf_2_lp1:"); ! 104: asm("ldf _sgl_ld_acc"); /* load the base value */ ! 105: asm("cvlf _sgl_value_1"); /* convert the value */ ! 106: asm("stf _sgl_st_acc"); /* store the result */ ! 107: if( force_loop ) ! 108: asm("brb _cvlf_2_lp1");; /* loop on the error */ ! 109: /* ! 110: * end error loop - test the results ! 111: */ ! 112: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 113: errcnt++; /* bump the error count */ ! 114: if( prt_error ) { ! 115: writes(" \n"); /* start a new print line */ ! 116: writes("cycle: "); ! 117: writed( cycle ); ! 118: writes(" CVLF test "); ! 119: writed( test_no ); ! 120: writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n"); ! 121: print_cvlf_data(); ! 122: writes(", data index = "); ! 123: writed( index ); ! 124: writec('\n'); ! 125: writes(" operand = "); ! 126: write32h( sgl_value_1 ); ! 127: writes(", expected Acc = "); ! 128: write32h( sgl_expected ); ! 129: writec('\n'); ! 130: } ! 131: if( halt_flg ) ! 132: cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 133: if( loop_on_err ) { ! 134: force_loop = TRUE; /* set the force loop flag */ ! 135: asm("brw _cvlf_2_lp1");; /* and loop on the error */ ! 136: } /* end of loop on error */ ! 137: } /* end of compare error */ ! 138: } /* end of WHILE loop */ ! 139: } /* end of subtest 2 */ ! 140: ! 141: ! 142: ! 143: /************************************************************************ ! 144: * ! 145: * SUBTEST 3 - Check for register corruption ! 146: * ! 147: ************************************************************************/ ! 148: cvlf_3() ! 149: { ! 150: force_loop = FALSE; /* clear force_loop flg */ ! 151: subtest = 3; ! 152: fill_reg_buf( load_regs ); /* get patterns for regs */ ! 153: index = 0; ! 154: sgl_ld_acc = 0x7fffffff; /* get value to negate */ ! 155: sgl_value_1 = cvlf_1_data[0].ld; /* get value to negate */ ! 156: sgl_expected = cvlf_1_data[0].exp; /* get expected result */ ! 157: /* ! 158: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 159: * The force loop flag is set after the first error. ! 160: */ ! 161: asm("_cvlf_3_lp1:"); ! 162: asm("ldf _sgl_ld_acc"); /* load base value */ ! 163: asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */ ! 164: asm("nop"); ! 165: asm("cvlf _sgl_value_1"); /* convert the value */ ! 166: asm("nop"); ! 167: asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */ ! 168: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 169: if( force_loop ) ! 170: asm("brb _cvlf_3_lp1");; /* loop on the error */ ! 171: /* ! 172: * Now compare the stored register values to those that were loaded ! 173: */ ! 174: index2 = 0; ! 175: while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) ) ! 176: index2++; /* check reg values */ ! 177: if( index2 < 13 ) { /* error if index2 < 13 */ ! 178: errcnt++; /* bump the error count */ ! 179: if( prt_error ) { ! 180: writes(" \n"); /* start a new print line */ ! 181: writes("cycle: "); ! 182: writed( cycle ); ! 183: writes(" CVLF test "); ! 184: writed( test_no ); ! 185: writes(", subtest 3 (Reg. Corr.) - A REGISTER WAS MODIFIED\n"); ! 186: print_cvlf_data(); ! 187: writec('\n'); ! 188: writes(" operand = "); ! 189: write32h( sgl_value_1 ); ! 190: writec('\n'); ! 191: writes("register "); /* print the information */ ! 192: writed( index2 ); /* about the corrupted */ ! 193: writes(" = "); /* register */ ! 194: write32h( store_regs[index2] ); ! 195: writes(", should be = "); ! 196: write32h( load_regs[index2] ); ! 197: writes("\n"); ! 198: } ! 199: if( halt_flg ) ! 200: cvlf_er_halt( BAD_REG_HLT ); /* halt on the error */ ! 201: if( loop_on_err ) { ! 202: force_loop = TRUE; /* set the force loop flag */ ! 203: asm("brw _cvlf_3_lp1");; /* and loop on the error */ ! 204: } /* end of loop on error */ ! 205: } /* end of register corruption error */ ! 206: } /* end of subtest 3 */ ! 207: ! 208: ! 209: ! 210: /************************************************************************ ! 211: * ! 212: * SUBTEST 4 - Check for PSL corruption ! 213: * ! 214: ************************************************************************/ ! 215: cvlf_4() ! 216: { ! 217: force_loop = FALSE; /* clear force_loop flg */ ! 218: subtest = 4; ! 219: for( index = 0; index < 3; index++ ) { ! 220: sgl_ld_acc = 0x7fffffff; /* get value to negate */ ! 221: sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */ ! 222: sgl_expected = cvlf_1_data[index].exp; /* get expected */ ! 223: sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */ ! 224: /* ! 225: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 226: * The force loop flag is set after the first error. ! 227: */ ! 228: asm("_cvlf_4_lp1:"); ! 229: asm("ldf _sgl_ld_acc"); /* load the base value */ ! 230: asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 231: asm("movpsl _init_psl"); /* save the initial PSL */ ! 232: asm("nop"); ! 233: asm("cvlf _sgl_value_1"); /* convert the value */ ! 234: asm("nop"); ! 235: asm("movpsl _psl_val"); /* save the final PSL */ ! 236: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 237: if( force_loop ) ! 238: asm("brb _cvlf_4_lp1");; /* loop on the error */ ! 239: /* ! 240: * Now compare the final PSL to the initial PSL -they should be the same ! 241: */ ! 242: exp_psl = init_psl; ! 243: if( psl_val != exp_psl ) { ! 244: errcnt++; /* bump the error count */ ! 245: if( prt_error ) { ! 246: writes(" \n"); /* start a new print line */ ! 247: writes("cycle: "); ! 248: writed( cycle ); ! 249: writes(" CVLF test "); ! 250: writed( test_no ); ! 251: writes(", subtest 4 - INCORRECT FINAL PSL\n"); ! 252: print_cvlf_data(); ! 253: writec('\n'); ! 254: writes(" operand = "); ! 255: write32h( sgl_value_1 ); ! 256: writec('\n'); ! 257: writes("initial PSL = "); ! 258: write32h( init_psl ); ! 259: writes(", final PSL = "); ! 260: write32h( psl_val ); ! 261: writes(", expected PSL = "); ! 262: write32h( exp_psl ); ! 263: writes("\n"); ! 264: } ! 265: if( halt_flg ) ! 266: cvlf_er_halt( BAD_PSL_HLT ); /* halt on the error */ ! 267: if( loop_on_err ) { ! 268: force_loop = TRUE; /* set the force loop flag */ ! 269: asm("brw _cvlf_4_lp1");; /* and loop on the error */ ! 270: } /* end of loop on error */ ! 271: } /* end of PSL corruption error */ ! 272: } /* end of WHILE loop */ ! 273: } /* end of subtest 4 */ ! 274: ! 275: ! 276: ! 277: /************************************************************************ ! 278: * ! 279: * SUBTEST 5 - pipelined entry test ! 280: * ! 281: ************************************************************************/ ! 282: cvlf_5() ! 283: { ! 284: force_loop = FALSE; ! 285: subtest = 5; ! 286: for( index = 0; index < max_cvlf_1_index; index++ ) { ! 287: sgl_ld_acc = 0x7fffffff; /* get the base value */ ! 288: sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */ ! 289: sgl_expected = cvlf_1_data[index].exp; /* get expected result */ ! 290: /* ! 291: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 292: * The force loop flag is set after the first error. ! 293: */ ! 294: asm("_cvlf_5_lp1:"); ! 295: asm("movl $0,r0"); /* clear r0 */ ! 296: asm("ldf r0"); /* load the Acc. with 0.0 */ ! 297: asm("addf _sgl_ld_acc"); /* add the value */ ! 298: asm("stf _sgl_st_acc"); /* store the result */ ! 299: asm("cvlf _sgl_value_1"); /* convert the value */ ! 300: asm("stf _sgl_st_acc"); /* store the result */ ! 301: if( force_loop ) ! 302: asm("brb _cvlf_5_lp1");; /* loop on the error */ ! 303: /* ! 304: * end error loop - test the results ! 305: */ ! 306: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 307: errcnt++; /* bump the error count */ ! 308: if( prt_error ) { ! 309: writes(" \n"); /* start a new print line */ ! 310: writes("cycle: "); ! 311: writed( cycle ); ! 312: writes(" CVLF test "); ! 313: writed( test_no ); ! 314: writes(", subtest 5 (Piped Entry) - BAD FINAL ACC\n"); ! 315: print_cvlf_data(); ! 316: writes(", data index = "); ! 317: writed( index ); ! 318: writec('\n'); ! 319: writes(" operand = "); ! 320: write32h( sgl_value_1 ); ! 321: writes(", expected Acc = "); ! 322: write32h( sgl_expected ); ! 323: writec('\n'); ! 324: } ! 325: if( halt_flg ) ! 326: cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 327: if( loop_on_err ) { ! 328: force_loop = TRUE; /* set the force loop flag */ ! 329: asm("brw _cvlf_5_lp1");; /* and loop on the error */ ! 330: } /* end of loop on error */ ! 331: } /* end of compare error */ ! 332: } /* end of WHILE loop */ ! 333: } /* end of subtest 5 */ ! 334: ! 335: ! 336: ! 337: /************************************************************************ ! 338: * ! 339: * SUBTEST 6 - pipelined exit test ! 340: * ! 341: ************************************************************************/ ! 342: cvlf_6() ! 343: { ! 344: force_loop = FALSE; ! 345: subtest = 6; ! 346: for( index = 0; index < max_cvlf_1_index; index++ ) { ! 347: sgl_ld_acc = cvlf_1_data[index].ld; /* get initial acc val */ ! 348: sgl_expected = cvlf_1_data[index].exp; /* get expected result */ ! 349: /* ! 350: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 351: * The force loop flag is set after the first error. ! 352: */ ! 353: asm("_cvlf_6_lp1:"); ! 354: asm("movl $0,r0"); /* clear r0 */ ! 355: asm("ldf _sgl_ld_acc"); /* load the value */ ! 356: asm("cvlf _sgl_ld_acc"); /* convert the value */ ! 357: asm("addf r0"); /* add a zero to the acc */ ! 358: asm("stf _sgl_st_acc"); /* store the result */ ! 359: if( force_loop ) ! 360: asm("brb _cvlf_6_lp1");; /* loop on the error */ ! 361: /* ! 362: * end error loop - test the results ! 363: */ ! 364: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 365: errcnt++; /* bump the error count */ ! 366: if( prt_error ) { ! 367: writes(" \n"); /* start a new print line */ ! 368: writes("cycle: "); ! 369: writed( cycle ); ! 370: writes(" CVLF test "); ! 371: writed( test_no ); ! 372: writes(", subtest 6 (Piped Exit) - BAD FINAL ACC\n"); ! 373: print_cvlf_data(); ! 374: writes(", data index = "); ! 375: writed( index ); ! 376: writec('\n'); ! 377: writes(" operand = "); ! 378: write32h( sgl_value_1 ); ! 379: writes(", expected Acc = "); ! 380: write32h( sgl_expected ); ! 381: writec('\n'); ! 382: } ! 383: if( halt_flg ) ! 384: cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 385: if( loop_on_err ) { ! 386: force_loop = TRUE; /* set the force loop flag */ ! 387: asm("brw _cvlf_6_lp1");; /* and loop on the error */ ! 388: } /* end of loop on error */ ! 389: } /* end of compare error */ ! 390: } /* end of WHILE loop */ ! 391: } /* end of subtest 6 */ ! 392: ! 393: ! 394: ! 395: /************************************************************************** ! 396: * ! 397: * PRINT THE DATA AND STORE RESULTS ! 398: * ! 399: * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx ! 400: * operand = xxxxxxxx, expected = xxxxxxxx ! 401: **************************************************************************/ ! 402: print_cvlf_data() ! 403: { ! 404: writes("initial Acc = "); ! 405: write32h( sgl_ld_acc ); ! 406: writes(", final Acc = "); ! 407: write32h( sgl_st_acc ); ! 408: } ! 409: ! 410: ! 411: ! 412: /************************************************************************** ! 413: * ! 414: * HALT ON ERROR ROUTINE ! 415: * ! 416: **************************************************************************/ ! 417: cvlf_er_halt( halt_code ) ! 418: int halt_code; ! 419: { ! 420: sgl_dummy1 = halt_code; /* get the error type */ ! 421: asm("movl _test_no,r0"); /* r0 = test number */ ! 422: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 423: asm("movl _sgl_dummy1,r2"); /* r2 = error code */ ! 424: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 425: asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */ ! 426: /* asm("movl _sgl_value_1,r5"); /* r5 = data loaded */ ! 427: asm("movl _sgl_st_acc,r6"); /* r6 = data stored */ ! 428: if( halt_code == BAD_ACC_HLT ) { ! 429: asm("movl _sgl_expected,r7"); /* r7 = data expected */ ! 430: asm("movl _index,r8"); /* r8 = data expected */ ! 431: } else ! 432: if( halt_code == BAD_REG_HLT ) { ! 433: sgl_dummy1 = load_regs[index2]; ! 434: sgl_dummy2 = store_regs[index2]; ! 435: asm("movl _index2,r7"); /* r7 = bad register # */ ! 436: asm("movl _sgl_dummy2,r8"); /* r8 = final reg value */ ! 437: asm("movl _sgl_dummy1,r9"); /* r9 = init reg value */ ! 438: } else ! 439: if( halt_code == BAD_PSL_HLT ) { ! 440: asm("movl _init_psl,r7"); /* r7 = initial PSL */ ! 441: asm("movl _psl_val,r8"); /* r8 = final PSL */ ! 442: asm("movl _exp_psl,r9"); /* r9 = expected PSL */ ! 443: }; ! 444: asm("halt"); /* HALT ... */ ! 445: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.