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1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 00000b04 * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _cvlf
6: 6 00000000 _cvlf:
7: 7 0001449C 0000 .word L215
8: 8 0001449E #
9: 9 0001449E # #include "fpp_defs.h"
10: 10 0001449E #
11: 11 0001449E #
12: 12 0001449E # /*****************************************************************************
13: 13 0001449E # *
14: 14 0001449E # * CVLF - SINGLE PRECISION FLOATING POINT CONVERT LONG TO FLOAT TEST
15: 15 0001449E # *
16: 16 0001449E # *****************************************************************************/
17: 17 0001449E # cvlf()
18: 18 0001449E # {
19: 19 0001449E 11 4f jbr L217
20: 20 000144A0 L218:
21: 21 000144A0 # asm(".globl _cvlf_t");
22: 22 000144A0 .globl _cvlf_t
23: 23 000144A0 # asm("_cvlf_t:"); /* entry address */
24: 24 000144A0 _cvlf_t:
25: 25 000144A0 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
26: 26 000144A0 1d effffffff6 01 cmpl _cycle,$1
27: 27 000144A7 21 15 jneq L219
28: 28 000144A9 5d efffffffed tstl _prt_hdrs
29: 29 000144AF 31 0d jeql L219
30: 30 000144B1 # writes(" CVLF");
31: 31 000144B1 .data 1
32: 32 00000b04 * L221:
33: 33 00000b04 * 2043564C4600 .ascii " CVLF\0"
34: 34 00000b0a * .text
35: 35 000144B1 dd 8f00000b04 pushl $L221
36: 36 000144B7 fe 08 efffffffde callf $8,_writes
37: 37 000144BE # cvlf_1(); /* load through a register */
38: 38 000144BE L219:
39: 39 000144BE fe 04 ef0000002d callf $4,_cvlf_1
40: 40 000144C5 # cvlf_2(); /* load through the cache */
41: 41 000144C5 fe 04 ef000001ae callf $4,_cvlf_2
42: 42 000144CC # cvlf_3(); /* register stability */
43: 43 000144CC fe 04 ef00000329 callf $4,_cvlf_3
44: 44 000144D3 # cvlf_4(); /* PSL stability test */
45: 45 000144D3 fe 04 ef000004fc callf $4,_cvlf_4
46: 46 000144DA # cvlf_5(); /* pipelined entry test */
47: 47 000144DA fe 04 ef000006cb callf $4,_cvlf_5
48: 48 000144E1 # cvlf_6(); /* pipelined exit test */
49: 49 000144E1 fe 04 ef00000850 callf $4,_cvlf_6
50: 50 000144E8 # asm("jmp *return"); /* return to the test monitor */
51: 51 000144E8 71 ffffffffae jmp *return
52: 52 000144EE # }
53: 53 000144EE 40 ret#2
54: 54 000144EF .set L215,0x0
55: 55 000144EF L217:
56: 56 000144EF 11 af jbr L218
57: 57 000144F1 .data
58: 58 00000b04 * .text
59: 59 000144F1 00 .align 1
60: 60 000144F2 .globl _cvlf_1
61: 61 000144F2 _cvlf_1:
62: 62 000144F2 0000 .word L228
63: 63 000144F4 #
64: 64 000144F4 #
65: 65 000144F4 #
66: 66 000144F4 # /************************************************************************
67: 67 000144F4 # *
68: 68 000144F4 # * SUBTEST 1 - convert through a register
69: 69 000144F4 # *
70: 70 000144F4 # ************************************************************************/
71: 71 000144F4 # cvlf_1()
72: 72 000144F4 # {
73: 73 000144F4 13 017f jbr L230
74: 74 000144F7 L231:
75: 75 000144F7 # force_loop = FALSE;
76: 76 000144F7 4d efffffff9f clrl _force_loop
77: 77 000144FD # subtest = 1;
78: 78 000144FD 0d 01 efffffff98 movl $1,_subtest
79: 79 00014504 # for( index = 0; index < max_cvlf_1_index; index++ ) {
80: 80 00014504 4d efffffff92 clrl _index
81: 81 0001450A L234:
82: 82 0001450A 1d efffffff8c efffffff87 cmpl _index,_max_cvlf_1_index
83: 83 00014515 91 03 13 015b jgeq L233
84: 84 0001451A # sgl_ld_acc = 0x12345678; /* get base value */
85: 85 0001451A 0d 8f12345678 efffffff77 movl $305419896,_sgl_ld_acc
86: 86 00014525 # sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */
87: 87 00014525 0d efffffff71 50 movl _index,r0
88: 88 0001452C 48 03 50 50 shll $3,r0,r0
89: 89 00014530 0d e000000000 efffffff61 movl _cvlf_1_data(r0),_sgl_value_1
90: 90 0001453B # sgl_expected = cvlf_1_data[index].exp; /* get expected result */
91: 91 0001453B 0d efffffff5b 50 movl _index,r0
92: 92 00014542 48 03 50 50 shll $3,r0,r0
93: 93 00014546 0d e000000004 efffffff4b movl _cvlf_1_data+4(r0),_sgl_expected
94: 94 00014551 # /*
95: 95 00014551 # * If LOOP ON ERROR is set, this is the loop for this subtest.
96: 96 00014551 # * The force loop flag is set after the first error.
97: 97 00014551 # */
98: 98 00014551 # asm("_cvlf_1_lp1:");
99: 99 00014551 _cvlf_1_lp1:
100: 100 00014551 # asm("ldf _sgl_ld_acc");
101: 101 00014551 06 efffffff45 ldf _sgl_ld_acc
102: 102 00014557 # asm("movl _sgl_value_1,r4"); /* get the value to convert */
103: 103 00014557 0d efffffff3f 54 movl _sgl_value_1,r4
104: 104 0001455E # asm("cvlf r4"); /* convert the value */
105: 105 0001455E 76 54 cvlf r4
106: 106 00014560 # asm("stf r5"); /* store the result in R5 */
107: 107 00014560 26 55 stf r5
108: 108 00014562 # if( force_loop )
109: 109 00014562 5d efffffff34 tstl _force_loop
110: 110 00014568 31 02 jeql L235
111: 111 0001456A # asm("brb _cvlf_1_lp1");; /* loop on the error */
112: 112 0001456A 11 e5 brb _cvlf_1_lp1
113: 113 0001456C L235:
114: 114 0001456C # /*
115: 115 0001456C # * end error loop - test the results
116: 116 0001456C # */
117: 117 0001456C # asm("movl r5,_sgl_st_acc"); /* move R5 data to cache */
118: 118 0001456C 0d 55 efffffff29 movl r5,_sgl_st_acc
119: 119 00014573 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
120: 120 00014573 1d efffffff23 efffffff1e cmpl _sgl_st_acc,_sgl_expected
121: 121 0001457E 21 03 13 00e9 jeql L236
122: 122 00014583 # errcnt++; /* bump the error count */
123: 123 00014583 6d efffffff13 incl _errcnt
124: 124 00014589 # if( prt_error ) {
125: 125 00014589 5d efffffff0d tstl _prt_error
126: 126 0001458F 21 03 13 00b5 jeql L237
127: 127 00014594 # writes(" \n"); /* start a new print line */
128: 128 00014594 .data 1
129: 129 00000b0a * L238:
130: 130 00000b0a * 200A00 .ascii " \12\0"
131: 131 00000b0d * .text
132: 132 00014594 dd 8f00000b0a pushl $L238
133: 133 0001459A fe 08 effffffefb callf $8,_writes
134: 134 000145A1 # writes("cycle: ");
135: 135 000145A1 .data 1
136: 136 00000b0d * L239:
137: 137 00000b0d * 6379636C653A2000 .ascii "cycle: \0"
138: 138 00000b15 * .text
139: 139 000145A1 dd 8f00000b0d pushl $L239
140: 140 000145A7 fe 08 effffffeee callf $8,_writes
141: 141 000145AE # writed( cycle );
142: 142 000145AE dd effffffee8 pushl _cycle
143: 143 000145B4 fe 08 effffffee1 callf $8,_writed
144: 144 000145BB # writes(" CVLF test ");
145: 145 000145BB .data 1
146: 146 00000b15 * L241:
147: 147 00000b15 * 202043564C462074657374200 .ascii " CVLF test \0"
148: 0
149: 148 00000b22 * .text
150: 149 000145BB dd 8f00000b15 pushl $L241
151: 150 000145C1 fe 08 effffffed4 callf $8,_writes
152: 151 000145C8 # writed( test_no );
153: 152 000145C8 dd effffffece pushl _test_no
154: 153 000145CE fe 08 effffffec7 callf $8,_writed
155: 154 000145D5 # writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n");
156: 155 000145D5 .data 1
157: 156 00000b22 * L242:
158: 157 00000b22 * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0"
159: 85265672E204461746129202D
160: 204241442046494E414C20414
161: 3430A00
162: 158 00000b4b * .text
163: 159 000145D5 dd 8f00000b22 pushl $L242
164: 160 000145DB fe 08 effffffeba callf $8,_writes
165: 161 000145E2 # print_cvlf_data();
166: 162 000145E2 fe 04 ef000008cb callf $4,_print_cvlf_data
167: 163 000145E9 # writes(", data index = ");
168: 164 000145E9 .data 1
169: 165 00000b4b * L244:
170: 166 00000b4b * 2C2020206461746120696E646 .ascii ", data index = \0"
171: 578203D2000
172: 167 00000b5d * .text
173: 168 000145E9 dd 8f00000b4b pushl $L244
174: 169 000145EF fe 08 effffffea6 callf $8,_writes
175: 170 000145F6 # writed( index );
176: 171 000145F6 dd effffffea0 pushl _index
177: 172 000145FC fe 08 effffffe99 callf $8,_writed
178: 173 00014603 # writec('\n');
179: 174 00014603 dd 0a pushl $10
180: 175 00014605 fe 08 effffffe90 callf $8,_writec
181: 176 0001460C # writes(" operand = ");
182: 177 0001460C .data 1
183: 178 00000b5d * L246:
184: 179 00000b5d * 202020206F706572616E64203 .ascii " operand = \0"
185: D2000
186: 180 00000b6c * .text
187: 181 0001460C dd 8f00000b5d pushl $L246
188: 182 00014612 fe 08 effffffe83 callf $8,_writes
189: 183 00014619 # write32h( sgl_value_1 );
190: 184 00014619 dd effffffe7d pushl _sgl_value_1
191: 185 0001461F fe 08 effffffe76 callf $8,_write32h
192: 186 00014626 # writes(", expected Acc = ");
193: 187 00014626 .data 1
194: 188 00000b6c * L248:
195: 189 00000b6c * 2C20206578706563746564204 .ascii ", expected Acc = \0"
196: 16363203D2000
197: 190 00000b7f * .text
198: 191 00014626 dd 8f00000b6c pushl $L248
199: 192 0001462C fe 08 effffffe69 callf $8,_writes
200: 193 00014633 # write32h( sgl_expected );
201: 194 00014633 dd effffffe63 pushl _sgl_expected
202: 195 00014639 fe 08 effffffe5c callf $8,_write32h
203: 196 00014640 # writec('\n');
204: 197 00014640 dd 0a pushl $10
205: 198 00014642 fe 08 effffffe53 callf $8,_writec
206: 199 00014649 # }
207: 200 00014649 # if( halt_flg )
208: 201 00014649 L237:
209: 202 00014649 5d effffffe4d tstl _halt_flg
210: 203 0001464F 31 09 jeql L249
211: 204 00014651 # cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */
212: 205 00014651 dd 01 pushl $1
213: 206 00014653 fe 08 ef00000896 callf $8,_cvlf_er_halt
214: 207 0001465A # if( loop_on_err ) {
215: 208 0001465A L249:
216: 209 0001465A 5d effffffe3c tstl _loop_on_err
217: 210 00014660 31 0a jeql L251
218: 211 00014662 # force_loop = TRUE; /* set the force loop flag */
219: 212 00014662 0d 01 effffffe33 movl $1,_force_loop
220: 213 00014669 # asm("brw _cvlf_1_lp1");; /* and loop on the error */
221: 214 00014669 13 fee5 brw _cvlf_1_lp1
222: 215 0001466C # } /* end of loop on error */
223: 216 0001466C # } /* end of compare error */
224: 217 0001466C L251:
225: 218 0001466C # } /* end of WHILE loop */
226: 219 0001466C L236:
227: 220 0001466C L232:
228: 221 0001466C 6d effffffe2a incl _index
229: 222 00014672 13 fe95 jbr L234
230: 223 00014675 L233:
231: 224 00014675 # } /* end of subtest 1 */
232: 225 00014675 40 ret#2
233: 226 00014676 .set L228,0x0
234: 227 00014676 L230:
235: 228 00014676 13 fe7e jbr L231
236: 229 00014679 .data
237: 230 00000b04 * .text
238: 231 00014679 00 .align 1
239: 232 0001467A .globl _cvlf_2
240: 233 0001467A _cvlf_2:
241: 234 0001467A 0000 .word L252
242: 235 0001467C #
243: 236 0001467C #
244: 237 0001467C #
245: 238 0001467C # /************************************************************************
246: 239 0001467C # *
247: 240 0001467C # * SUBTEST 2 - convert through memory
248: 241 0001467C # *
249: 242 0001467C # ************************************************************************/
250: 243 0001467C # cvlf_2()
251: 244 0001467C # {
252: 245 0001467C 13 0179 jbr L254
253: 246 0001467F L255:
254: 247 0001467F # force_loop = FALSE;
255: 248 0001467F 4d effffffe17 clrl _force_loop
256: 249 00014685 # subtest = 2;
257: 250 00014685 0d 02 effffffe10 movl $2,_subtest
258: 251 0001468C # for( index = 0; index < max_cvlf_1_index; index++ ) {
259: 252 0001468C 4d effffffe0a clrl _index
260: 253 00014692 L258:
261: 254 00014692 1d effffffe04 effffffdff cmpl _index,_max_cvlf_1_index
262: 255 0001469D 91 03 13 0155 jgeq L257
263: 256 000146A2 # sgl_ld_acc = 0x7fffffff; /* get value to negate */
264: 257 000146A2 0d 8f7fffffff effffffdef movl $2147483647,_sgl_ld_acc
265: 258 000146AD # sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */
266: 259 000146AD 0d effffffde9 50 movl _index,r0
267: 260 000146B4 48 03 50 50 shll $3,r0,r0
268: 261 000146B8 0d e000000000 effffffdd9 movl _cvlf_1_data(r0),_sgl_value_1
269: 262 000146C3 # sgl_expected = cvlf_1_data[index].exp; /* get expected result */
270: 263 000146C3 0d effffffdd3 50 movl _index,r0
271: 264 000146CA 48 03 50 50 shll $3,r0,r0
272: 265 000146CE 0d e000000004 effffffdc3 movl _cvlf_1_data+4(r0),_sgl_expected
273: 266 000146D9 # /*
274: 267 000146D9 # * If LOOP ON ERROR is set, this is the loop for this subtest.
275: 268 000146D9 # * The force loop flag is set after the first error.
276: 269 000146D9 # */
277: 270 000146D9 # asm("_cvlf_2_lp1:");
278: 271 000146D9 _cvlf_2_lp1:
279: 272 000146D9 # asm("ldf _sgl_ld_acc"); /* load the base value */
280: 273 000146D9 06 effffffdbd ldf _sgl_ld_acc
281: 274 000146DF # asm("cvlf _sgl_value_1"); /* convert the value */
282: 275 000146DF 76 effffffdb7 cvlf _sgl_value_1
283: 276 000146E5 # asm("stf _sgl_st_acc"); /* store the result */
284: 277 000146E5 26 effffffdb1 stf _sgl_st_acc
285: 278 000146EB # if( force_loop )
286: 279 000146EB 5d effffffdab tstl _force_loop
287: 280 000146F1 31 02 jeql L259
288: 281 000146F3 # asm("brb _cvlf_2_lp1");; /* loop on the error */
289: 282 000146F3 11 e4 brb _cvlf_2_lp1
290: 283 000146F5 L259:
291: 284 000146F5 # /*
292: 285 000146F5 # * end error loop - test the results
293: 286 000146F5 # */
294: 287 000146F5 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
295: 288 000146F5 1d effffffda1 effffffd9c cmpl _sgl_st_acc,_sgl_expected
296: 289 00014700 21 03 13 00e9 jeql L260
297: 290 00014705 # errcnt++; /* bump the error count */
298: 291 00014705 6d effffffd91 incl _errcnt
299: 292 0001470B # if( prt_error ) {
300: 293 0001470B 5d effffffd8b tstl _prt_error
301: 294 00014711 21 03 13 00b5 jeql L261
302: 295 00014716 # writes(" \n"); /* start a new print line */
303: 296 00014716 .data 1
304: 297 00000b7f * L262:
305: 298 00000b7f * 200A00 .ascii " \12\0"
306: 299 00000b82 * .text
307: 300 00014716 dd 8f00000b7f pushl $L262
308: 301 0001471C fe 08 effffffd79 callf $8,_writes
309: 302 00014723 # writes("cycle: ");
310: 303 00014723 .data 1
311: 304 00000b82 * L263:
312: 305 00000b82 * 6379636C653A2000 .ascii "cycle: \0"
313: 306 00000b8a * .text
314: 307 00014723 dd 8f00000b82 pushl $L263
315: 308 00014729 fe 08 effffffd6c callf $8,_writes
316: 309 00014730 # writed( cycle );
317: 310 00014730 dd effffffd66 pushl _cycle
318: 311 00014736 fe 08 effffffd5f callf $8,_writed
319: 312 0001473D # writes(" CVLF test ");
320: 313 0001473D .data 1
321: 314 00000b8a * L264:
322: 315 00000b8a * 202043564C462074657374200 .ascii " CVLF test \0"
323: 0
324: 316 00000b97 * .text
325: 317 0001473D dd 8f00000b8a pushl $L264
326: 318 00014743 fe 08 effffffd52 callf $8,_writes
327: 319 0001474A # writed( test_no );
328: 320 0001474A dd effffffd4c pushl _test_no
329: 321 00014750 fe 08 effffffd45 callf $8,_writed
330: 322 00014757 # writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n");
331: 323 00014757 .data 1
332: 324 00000b97 * L265:
333: 325 00000b97 * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL ACC\12\0"
334: 8436163686520446174612920
335: 2D204241442046494E414C204
336: 143430A00
337: 326 00000bc1 * .text
338: 327 00014757 dd 8f00000b97 pushl $L265
339: 328 0001475D fe 08 effffffd38 callf $8,_writes
340: 329 00014764 # print_cvlf_data();
341: 330 00014764 fe 04 ef00000749 callf $4,_print_cvlf_data
342: 331 0001476B # writes(", data index = ");
343: 332 0001476B .data 1
344: 333 00000bc1 * L266:
345: 334 00000bc1 * 2C2020206461746120696E646 .ascii ", data index = \0"
346: 578203D2000
347: 335 00000bd3 * .text
348: 336 0001476B dd 8f00000bc1 pushl $L266
349: 337 00014771 fe 08 effffffd24 callf $8,_writes
350: 338 00014778 # writed( index );
351: 339 00014778 dd effffffd1e pushl _index
352: 340 0001477E fe 08 effffffd17 callf $8,_writed
353: 341 00014785 # writec('\n');
354: 342 00014785 dd 0a pushl $10
355: 343 00014787 fe 08 effffffd0e callf $8,_writec
356: 344 0001478E # writes(" operand = ");
357: 345 0001478E .data 1
358: 346 00000bd3 * L267:
359: 347 00000bd3 * 202020206F706572616E64203 .ascii " operand = \0"
360: D2000
361: 348 00000be2 * .text
362: 349 0001478E dd 8f00000bd3 pushl $L267
363: 350 00014794 fe 08 effffffd01 callf $8,_writes
364: 351 0001479B # write32h( sgl_value_1 );
365: 352 0001479B dd effffffcfb pushl _sgl_value_1
366: 353 000147A1 fe 08 effffffcf4 callf $8,_write32h
367: 354 000147A8 # writes(", expected Acc = ");
368: 355 000147A8 .data 1
369: 356 00000be2 * L268:
370: 357 00000be2 * 2C20206578706563746564204 .ascii ", expected Acc = \0"
371: 16363203D2000
372: 358 00000bf5 * .text
373: 359 000147A8 dd 8f00000be2 pushl $L268
374: 360 000147AE fe 08 effffffce7 callf $8,_writes
375: 361 000147B5 # write32h( sgl_expected );
376: 362 000147B5 dd effffffce1 pushl _sgl_expected
377: 363 000147BB fe 08 effffffcda callf $8,_write32h
378: 364 000147C2 # writec('\n');
379: 365 000147C2 dd 0a pushl $10
380: 366 000147C4 fe 08 effffffcd1 callf $8,_writec
381: 367 000147CB # }
382: 368 000147CB # if( halt_flg )
383: 369 000147CB L261:
384: 370 000147CB 5d effffffccb tstl _halt_flg
385: 371 000147D1 31 09 jeql L269
386: 372 000147D3 # cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */
387: 373 000147D3 dd 01 pushl $1
388: 374 000147D5 fe 08 ef00000714 callf $8,_cvlf_er_halt
389: 375 000147DC # if( loop_on_err ) {
390: 376 000147DC L269:
391: 377 000147DC 5d effffffcba tstl _loop_on_err
392: 378 000147E2 31 0a jeql L270
393: 379 000147E4 # force_loop = TRUE; /* set the force loop flag */
394: 380 000147E4 0d 01 effffffcb1 movl $1,_force_loop
395: 381 000147EB # asm("brw _cvlf_2_lp1");; /* and loop on the error */
396: 382 000147EB 13 feeb brw _cvlf_2_lp1
397: 383 000147EE # } /* end of loop on error */
398: 384 000147EE # } /* end of compare error */
399: 385 000147EE L270:
400: 386 000147EE # } /* end of WHILE loop */
401: 387 000147EE L260:
402: 388 000147EE L256:
403: 389 000147EE 6d effffffca8 incl _index
404: 390 000147F4 13 fe9b jbr L258
405: 391 000147F7 L257:
406: 392 000147F7 # } /* end of subtest 2 */
407: 393 000147F7 40 ret#2
408: 394 000147F8 .set L252,0x0
409: 395 000147F8 L254:
410: 396 000147F8 13 fe84 jbr L255
411: 397 000147FB .data
412: 398 00000b04 * .text
413: 399 000147FB 00 .align 1
414: 400 000147FC .globl _cvlf_3
415: 401 000147FC _cvlf_3:
416: 402 000147FC 0000 .word L271
417: 403 000147FE #
418: 404 000147FE #
419: 405 000147FE #
420: 406 000147FE # /************************************************************************
421: 407 000147FE # *
422: 408 000147FE # * SUBTEST 3 - Check for register corruption
423: 409 000147FE # *
424: 410 000147FE # ************************************************************************/
425: 411 000147FE # cvlf_3()
426: 412 000147FE # {
427: 413 000147FE 13 01d2 jbr L273
428: 414 00014801 L274:
429: 415 00014801 # force_loop = FALSE; /* clear force_loop flg */
430: 416 00014801 4d effffffc95 clrl _force_loop
431: 417 00014807 # subtest = 3;
432: 418 00014807 0d 03 effffffc8e movl $3,_subtest
433: 419 0001480E # fill_reg_buf( load_regs ); /* get patterns for regs */
434: 420 0001480E dd 8f00000000 pushl $_load_regs
435: 421 00014814 fe 08 effffffc81 callf $8,_fill_reg_buf
436: 422 0001481B # index = 0;
437: 423 0001481B 4d effffffc7b clrl _index
438: 424 00014821 # sgl_ld_acc = 0x7fffffff; /* get value to negate */
439: 425 00014821 0d 8f7fffffff effffffc70 movl $2147483647,_sgl_ld_acc
440: 426 0001482C # sgl_value_1 = cvlf_1_data[0].ld; /* get value to negate */
441: 427 0001482C 0d effffffc6a effffffc65 movl _cvlf_1_data,_sgl_value_1
442: 428 00014837 # sgl_expected = cvlf_1_data[0].exp; /* get expected result */
443: 429 00014837 0d effffffc63 effffffc5a movl _cvlf_1_data+4,_sgl_expected
444: 430 00014842 # /*
445: 431 00014842 # * If LOOP ON ERROR is set, this is the loop for this subtest.
446: 432 00014842 # * The force loop flag is set after the first error.
447: 433 00014842 # */
448: 434 00014842 # asm("_cvlf_3_lp1:");
449: 435 00014842 _cvlf_3_lp1:
450: 436 00014842 # asm("ldf _sgl_ld_acc"); /* load base value */
451: 437 00014842 06 effffffc54 ldf _sgl_ld_acc
452: 438 00014848 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
453: 439 00014848 ab 891fff effffffc4b loadr $0x1fff,_load_regs
454: 440 00014851 # asm("nop");
455: 441 00014851 10 nop
456: 442 00014852 # asm("cvlf _sgl_value_1"); /* convert the value */
457: 443 00014852 76 effffffc44 cvlf _sgl_value_1
458: 444 00014858 # asm("nop");
459: 445 00014858 10 nop
460: 446 00014859 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
461: 447 00014859 bb 891fff effffffc3a storer $0x1fff,_store_regs
462: 448 00014862 # asm("stf _sgl_st_acc"); /* save the accumulator */
463: 449 00014862 26 effffffc34 stf _sgl_st_acc
464: 450 00014868 # if( force_loop )
465: 451 00014868 5d effffffc2e tstl _force_loop
466: 452 0001486E 31 02 jeql L276
467: 453 00014870 # asm("brb _cvlf_3_lp1");; /* loop on the error */
468: 454 00014870 11 d0 brb _cvlf_3_lp1
469: 455 00014872 L276:
470: 456 00014872 # /*
471: 457 00014872 # * Now compare the stored register values to those that were loaded
472: 458 00014872 # */
473: 459 00014872 # index2 = 0;
474: 460 00014872 4d effffffc24 clrl _index2
475: 461 00014878 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
476: 462 00014878 L277:
477: 463 00014878 0d effffffc1e 50 movl _index2,r0
478: 464 0001487F 0d effffffc17 51 movl _index2,r1
479: 465 00014886 1d 40effffffc0f cmpl _load_regs[r0],_store_regs[r1]
480: 41effffffc09
481: 466 00014893 21 11 jneq L278
482: 467 00014895 1d effffffc01 0d cmpl _index2,$13
483: 468 0001489C 81 08 jgeq L278
484: 469 0001489E # index2++; /* check reg values */
485: 470 0001489E 6d effffffbf8 incl _index2
486: 471 000148A4 11 d2 jbr L277
487: 472 000148A6 L278:
488: 473 000148A6 # if( index2 < 13 ) { /* error if index2 < 13 */
489: 474 000148A6 1d effffffbf0 0d cmpl _index2,$13
490: 475 000148AD 91 03 13 0120 jgeq L279
491: 476 000148B2 # errcnt++; /* bump the error count */
492: 477 000148B2 6d effffffbe4 incl _errcnt
493: 478 000148B8 # if( prt_error ) {
494: 479 000148B8 5d effffffbde tstl _prt_error
495: 480 000148BE 21 03 13 00ec jeql L280
496: 481 000148C3 # writes(" \n"); /* start a new print line */
497: 482 000148C3 .data 1
498: 483 00000bf5 * L281:
499: 484 00000bf5 * 200A00 .ascii " \12\0"
500: 485 00000bf8 * .text
501: 486 000148C3 dd 8f00000bf5 pushl $L281
502: 487 000148C9 fe 08 effffffbcc callf $8,_writes
503: 488 000148D0 # writes("cycle: ");
504: 489 000148D0 .data 1
505: 490 00000bf8 * L282:
506: 491 00000bf8 * 6379636C653A2000 .ascii "cycle: \0"
507: 492 00000c00 * .text
508: 493 000148D0 dd 8f00000bf8 pushl $L282
509: 494 000148D6 fe 08 effffffbbf callf $8,_writes
510: 495 000148DD # writed( cycle );
511: 496 000148DD dd effffffbb9 pushl _cycle
512: 497 000148E3 fe 08 effffffbb2 callf $8,_writed
513: 498 000148EA # writes(" CVLF test ");
514: 499 000148EA .data 1
515: 500 00000c00 * L283:
516: 501 00000c00 * 202043564C462074657374200 .ascii " CVLF test \0"
517: 0
518: 502 00000c0d * .text
519: 503 000148EA dd 8f00000c00 pushl $L283
520: 504 000148F0 fe 08 effffffba5 callf $8,_writes
521: 505 000148F7 # writed( test_no );
522: 506 000148F7 dd effffffb9f pushl _test_no
523: 507 000148FD fe 08 effffffb98 callf $8,_writed
524: 508 00014904 # writes(", subtest 3 (Reg. Corr.) - A REGISTER WAS MODIFIED\n");
525: 509 00014904 .data 1
526: 510 00000c0d * L284:
527: 511 00000c0d * 2C20737562746573742033202 .ascii ", subtest 3 (Reg. Corr.) - A REGISTER WAS MODIFIED\12\0"
528: 85265672E20436F72722E2920
529: 2D20412052454749535445522
530: 0574153204D4F444946494544
531: 0A00
532: 512 00000c41 * .text
533: 513 00014904 dd 8f00000c0d pushl $L284
534: 514 0001490A fe 08 effffffb8b callf $8,_writes
535: 515 00014911 # print_cvlf_data();
536: 516 00014911 fe 04 ef0000059c callf $4,_print_cvlf_data
537: 517 00014918 # writec('\n');
538: 518 00014918 dd 0a pushl $10
539: 519 0001491A fe 08 effffffb7b callf $8,_writec
540: 520 00014921 # writes(" operand = ");
541: 521 00014921 .data 1
542: 522 00000c41 * L285:
543: 523 00000c41 * 202020206F706572616E64203 .ascii " operand = \0"
544: D2000
545: 524 00000c50 * .text
546: 525 00014921 dd 8f00000c41 pushl $L285
547: 526 00014927 fe 08 effffffb6e callf $8,_writes
548: 527 0001492E # write32h( sgl_value_1 );
549: 528 0001492E dd effffffb68 pushl _sgl_value_1
550: 529 00014934 fe 08 effffffb61 callf $8,_write32h
551: 530 0001493B # writec('\n');
552: 531 0001493B dd 0a pushl $10
553: 532 0001493D fe 08 effffffb58 callf $8,_writec
554: 533 00014944 # writes("register "); /* print the information */
555: 534 00014944 .data 1
556: 535 00000c50 * L286:
557: 536 00000c50 * 72656769737465722000 .ascii "register \0"
558: 537 00000c5a * .text
559: 538 00014944 dd 8f00000c50 pushl $L286
560: 539 0001494A fe 08 effffffb4b callf $8,_writes
561: 540 00014951 # writed( index2 ); /* about the corrupted */
562: 541 00014951 dd effffffb45 pushl _index2
563: 542 00014957 fe 08 effffffb3e callf $8,_writed
564: 543 0001495E # writes(" = "); /* register */
565: 544 0001495E .data 1
566: 545 00000c5a * L287:
567: 546 00000c5a * 203D2000 .ascii " = \0"
568: 547 00000c5e * .text
569: 548 0001495E dd 8f00000c5a pushl $L287
570: 549 00014964 fe 08 effffffb31 callf $8,_writes
571: 550 0001496B # write32h( store_regs[index2] );
572: 551 0001496B 0d effffffb2b 50 movl _index2,r0
573: 552 00014972 dd 40effffffb23 pushl _store_regs[r0]
574: 553 00014979 fe 08 effffffb1c callf $8,_write32h
575: 554 00014980 # writes(", should be = ");
576: 555 00014980 .data 1
577: 556 00000c5e * L288:
578: 557 00000c5e * 2C202073686F756C642062652 .ascii ", should be = \0"
579: 03D2000
580: 558 00000c6e * .text
581: 559 00014980 dd 8f00000c5e pushl $L288
582: 560 00014986 fe 08 effffffb0f callf $8,_writes
583: 561 0001498D # write32h( load_regs[index2] );
584: 562 0001498D 0d effffffb09 50 movl _index2,r0
585: 563 00014994 dd 40effffffb01 pushl _load_regs[r0]
586: 564 0001499B fe 08 effffffafa callf $8,_write32h
587: 565 000149A2 # writes("\n");
588: 566 000149A2 .data 1
589: 567 00000c6e * L289:
590: 568 00000c6e * 0A00 .ascii "\12\0"
591: 569 00000c70 * .text
592: 570 000149A2 dd 8f00000c6e pushl $L289
593: 571 000149A8 fe 08 effffffaed callf $8,_writes
594: 572 000149AF # }
595: 573 000149AF # if( halt_flg )
596: 574 000149AF L280:
597: 575 000149AF 5d effffffae7 tstl _halt_flg
598: 576 000149B5 31 09 jeql L290
599: 577 000149B7 # cvlf_er_halt( BAD_REG_HLT ); /* halt on the error */
600: 578 000149B7 dd 02 pushl $2
601: 579 000149B9 fe 08 ef00000530 callf $8,_cvlf_er_halt
602: 580 000149C0 # if( loop_on_err ) {
603: 581 000149C0 L290:
604: 582 000149C0 5d effffffad6 tstl _loop_on_err
605: 583 000149C6 31 0a jeql L291
606: 584 000149C8 # force_loop = TRUE; /* set the force loop flag */
607: 585 000149C8 0d 01 effffffacd movl $1,_force_loop
608: 586 000149CF # asm("brw _cvlf_3_lp1");; /* and loop on the error */
609: 587 000149CF 13 fe70 brw _cvlf_3_lp1
610: 588 000149D2 # } /* end of loop on error */
611: 589 000149D2 # } /* end of register corruption error */
612: 590 000149D2 L291:
613: 591 000149D2 # } /* end of subtest 3 */
614: 592 000149D2 L279:
615: 593 000149D2 40 ret#2
616: 594 000149D3 .set L271,0x0
617: 595 000149D3 L273:
618: 596 000149D3 13 fe2b jbr L274
619: 597 000149D6 .data
620: 598 00000b04 * .text
621: 599 000149D6 .align 1
622: 600 000149D6 .globl _cvlf_4
623: 601 000149D6 _cvlf_4:
624: 602 000149D6 0000 .word L292
625: 603 000149D8 #
626: 604 000149D8 #
627: 605 000149D8 #
628: 606 000149D8 # /************************************************************************
629: 607 000149D8 # *
630: 608 000149D8 # * SUBTEST 4 - Check for PSL corruption
631: 609 000149D8 # *
632: 610 000149D8 # ************************************************************************/
633: 611 000149D8 # cvlf_4()
634: 612 000149D8 # {
635: 613 000149D8 13 01ce jbr L294
636: 614 000149DB L295:
637: 615 000149DB # force_loop = FALSE; /* clear force_loop flg */
638: 616 000149DB 4d effffffabb clrl _force_loop
639: 617 000149E1 # subtest = 4;
640: 618 000149E1 0d 04 effffffab4 movl $4,_subtest
641: 619 000149E8 # for( index = 0; index < 3; index++ ) {
642: 620 000149E8 4d effffffaae clrl _index
643: 621 000149EE L298:
644: 622 000149EE 1d effffffaa8 03 cmpl _index,$3
645: 623 000149F5 91 03 13 01ae jgeq L297
646: 624 000149FA # sgl_ld_acc = 0x7fffffff; /* get value to negate */
647: 625 000149FA 0d 8f7fffffff effffffa97 movl $2147483647,_sgl_ld_acc
648: 626 00014A05 # sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */
649: 627 00014A05 0d effffffa91 50 movl _index,r0
650: 628 00014A0C 48 03 50 50 shll $3,r0,r0
651: 629 00014A10 0d e000000000 effffffa81 movl _cvlf_1_data(r0),_sgl_value_1
652: 630 00014A1B # sgl_expected = cvlf_1_data[index].exp; /* get expected */
653: 631 00014A1B 0d effffffa7b 50 movl _index,r0
654: 632 00014A22 48 03 50 50 shll $3,r0,r0
655: 633 00014A26 0d e000000004 effffffa6b movl _cvlf_1_data+4(r0),_sgl_expected
656: 634 00014A31 # sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */
657: 635 00014A31 0d effffffa65 50 movl _status_index,r0
658: 636 00014A38 0d 40effffffa5d movl _status_array[r0],_sgl_dummy1
659: effffffa58
660: 637 00014A44 # /*
661: 638 00014A44 # * If LOOP ON ERROR is set, this is the loop for this subtest.
662: 639 00014A44 # * The force loop flag is set after the first error.
663: 640 00014A44 # */
664: 641 00014A44 # asm("_cvlf_4_lp1:");
665: 642 00014A44 _cvlf_4_lp1:
666: 643 00014A44 # asm("ldf _sgl_ld_acc"); /* load the base value */
667: 644 00014A44 06 effffffa52 ldf _sgl_ld_acc
668: 645 00014A4A # asm("tstl _sgl_dummy1"); /* set the PSL status */
669: 646 00014A4A 5d effffffa4c tstl _sgl_dummy1
670: 647 00014A50 # asm("movpsl _init_psl"); /* save the initial PSL */
671: 648 00014A50 cd effffffa46 movpsl _init_psl
672: 649 00014A56 # asm("nop");
673: 650 00014A56 10 nop
674: 651 00014A57 # asm("cvlf _sgl_value_1"); /* convert the value */
675: 652 00014A57 76 effffffa3f cvlf _sgl_value_1
676: 653 00014A5D # asm("nop");
677: 654 00014A5D 10 nop
678: 655 00014A5E # asm("movpsl _psl_val"); /* save the final PSL */
679: 656 00014A5E cd effffffa38 movpsl _psl_val
680: 657 00014A64 # asm("stf _sgl_st_acc"); /* save the accumulator */
681: 658 00014A64 26 effffffa32 stf _sgl_st_acc
682: 659 00014A6A # if( force_loop )
683: 660 00014A6A 5d effffffa2c tstl _force_loop
684: 661 00014A70 31 02 jeql L299
685: 662 00014A72 # asm("brb _cvlf_4_lp1");; /* loop on the error */
686: 663 00014A72 11 d0 brb _cvlf_4_lp1
687: 664 00014A74 L299:
688: 665 00014A74 # /*
689: 666 00014A74 # * Now compare the final PSL to the initial PSL -they should be the same
690: 667 00014A74 # */
691: 668 00014A74 # exp_psl = init_psl;
692: 669 00014A74 0d effffffa22 effffffa1d movl _init_psl,_exp_psl
693: 670 00014A7F # if( psl_val != exp_psl ) {
694: 671 00014A7F 1d effffffa17 effffffa12 cmpl _psl_val,_exp_psl
695: 672 00014A8A 21 03 13 0110 jeql L300
696: 673 00014A8F # errcnt++; /* bump the error count */
697: 674 00014A8F 6d effffffa07 incl _errcnt
698: 675 00014A95 # if( prt_error ) {
699: 676 00014A95 5d effffffa01 tstl _prt_error
700: 677 00014A9B 21 03 13 00dc jeql L301
701: 678 00014AA0 # writes(" \n"); /* start a new print line */
702: 679 00014AA0 .data 1
703: 680 00000c70 * L302:
704: 681 00000c70 * 200A00 .ascii " \12\0"
705: 682 00000c73 * .text
706: 683 00014AA0 dd 8f00000c70 pushl $L302
707: 684 00014AA6 fe 08 effffff9ef callf $8,_writes
708: 685 00014AAD # writes("cycle: ");
709: 686 00014AAD .data 1
710: 687 00000c73 * L303:
711: 688 00000c73 * 6379636C653A2000 .ascii "cycle: \0"
712: 689 00000c7b * .text
713: 690 00014AAD dd 8f00000c73 pushl $L303
714: 691 00014AB3 fe 08 effffff9e2 callf $8,_writes
715: 692 00014ABA # writed( cycle );
716: 693 00014ABA dd effffff9dc pushl _cycle
717: 694 00014AC0 fe 08 effffff9d5 callf $8,_writed
718: 695 00014AC7 # writes(" CVLF test ");
719: 696 00014AC7 .data 1
720: 697 00000c7b * L304:
721: 698 00000c7b * 202043564C462074657374200 .ascii " CVLF test \0"
722: 0
723: 699 00000c88 * .text
724: 700 00014AC7 dd 8f00000c7b pushl $L304
725: 701 00014ACD fe 08 effffff9c8 callf $8,_writes
726: 702 00014AD4 # writed( test_no );
727: 703 00014AD4 dd effffff9c2 pushl _test_no
728: 704 00014ADA fe 08 effffff9bb callf $8,_writed
729: 705 00014AE1 # writes(", subtest 4 - INCORRECT FINAL PSL\n");
730: 706 00014AE1 .data 1
731: 707 00000c88 * L305:
732: 708 00000c88 * 2C20737562746573742034202 .ascii ", subtest 4 - INCORRECT FINAL PSL\12\0"
733: D20494E434F52524543542046
734: 494E414C2050534C0A00
735: 709 00000cab * .text
736: 710 00014AE1 dd 8f00000c88 pushl $L305
737: 711 00014AE7 fe 08 effffff9ae callf $8,_writes
738: 712 00014AEE # print_cvlf_data();
739: 713 00014AEE fe 04 ef000003bf callf $4,_print_cvlf_data
740: 714 00014AF5 # writec('\n');
741: 715 00014AF5 dd 0a pushl $10
742: 716 00014AF7 fe 08 effffff99e callf $8,_writec
743: 717 00014AFE # writes(" operand = ");
744: 718 00014AFE .data 1
745: 719 00000cab * L306:
746: 720 00000cab * 202020206F706572616E64203 .ascii " operand = \0"
747: D2000
748: 721 00000cba * .text
749: 722 00014AFE dd 8f00000cab pushl $L306
750: 723 00014B04 fe 08 effffff991 callf $8,_writes
751: 724 00014B0B # write32h( sgl_value_1 );
752: 725 00014B0B dd effffff98b pushl _sgl_value_1
753: 726 00014B11 fe 08 effffff984 callf $8,_write32h
754: 727 00014B18 # writec('\n');
755: 728 00014B18 dd 0a pushl $10
756: 729 00014B1A fe 08 effffff97b callf $8,_writec
757: 730 00014B21 # writes("initial PSL = ");
758: 731 00014B21 .data 1
759: 732 00000cba * L307:
760: 733 00000cba * 696E697469616C2050534C203 .ascii "initial PSL = \0"
761: D2000
762: 734 00000cc9 * .text
763: 735 00014B21 dd 8f00000cba pushl $L307
764: 736 00014B27 fe 08 effffff96e callf $8,_writes
765: 737 00014B2E # write32h( init_psl );
766: 738 00014B2E dd effffff968 pushl _init_psl
767: 739 00014B34 fe 08 effffff961 callf $8,_write32h
768: 740 00014B3B # writes(", final PSL = ");
769: 741 00014B3B .data 1
770: 742 00000cc9 * L308:
771: 743 00000cc9 * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
772: 03D2000
773: 744 00000cd9 * .text
774: 745 00014B3B dd 8f00000cc9 pushl $L308
775: 746 00014B41 fe 08 effffff954 callf $8,_writes
776: 747 00014B48 # write32h( psl_val );
777: 748 00014B48 dd effffff94e pushl _psl_val
778: 749 00014B4E fe 08 effffff947 callf $8,_write32h
779: 750 00014B55 # writes(", expected PSL = ");
780: 751 00014B55 .data 1
781: 752 00000cd9 * L309:
782: 753 00000cd9 * 2C20206578706563746564205 .ascii ", expected PSL = \0"
783: 0534C203D2000
784: 754 00000cec * .text
785: 755 00014B55 dd 8f00000cd9 pushl $L309
786: 756 00014B5B fe 08 effffff93a callf $8,_writes
787: 757 00014B62 # write32h( exp_psl );
788: 758 00014B62 dd effffff934 pushl _exp_psl
789: 759 00014B68 fe 08 effffff92d callf $8,_write32h
790: 760 00014B6F # writes("\n");
791: 761 00014B6F .data 1
792: 762 00000cec * L310:
793: 763 00000cec * 0A00 .ascii "\12\0"
794: 764 00000cee * .text
795: 765 00014B6F dd 8f00000cec pushl $L310
796: 766 00014B75 fe 08 effffff920 callf $8,_writes
797: 767 00014B7C # }
798: 768 00014B7C # if( halt_flg )
799: 769 00014B7C L301:
800: 770 00014B7C 5d effffff91a tstl _halt_flg
801: 771 00014B82 31 09 jeql L311
802: 772 00014B84 # cvlf_er_halt( BAD_PSL_HLT ); /* halt on the error */
803: 773 00014B84 dd 03 pushl $3
804: 774 00014B86 fe 08 ef00000363 callf $8,_cvlf_er_halt
805: 775 00014B8D # if( loop_on_err ) {
806: 776 00014B8D L311:
807: 777 00014B8D 5d effffff909 tstl _loop_on_err
808: 778 00014B93 31 0a jeql L312
809: 779 00014B95 # force_loop = TRUE; /* set the force loop flag */
810: 780 00014B95 0d 01 effffff900 movl $1,_force_loop
811: 781 00014B9C # asm("brw _cvlf_4_lp1");; /* and loop on the error */
812: 782 00014B9C 13 fea5 brw _cvlf_4_lp1
813: 783 00014B9F # } /* end of loop on error */
814: 784 00014B9F # } /* end of PSL corruption error */
815: 785 00014B9F L312:
816: 786 00014B9F # } /* end of WHILE loop */
817: 787 00014B9F L300:
818: 788 00014B9F L296:
819: 789 00014B9F 6d effffff8f7 incl _index
820: 790 00014BA5 13 fe46 jbr L298
821: 791 00014BA8 L297:
822: 792 00014BA8 # } /* end of subtest 4 */
823: 793 00014BA8 40 ret#2
824: 794 00014BA9 .set L292,0x0
825: 795 00014BA9 L294:
826: 796 00014BA9 13 fe2f jbr L295
827: 797 00014BAC .data
828: 798 00000b04 * .text
829: 799 00014BAC .align 1
830: 800 00014BAC .globl _cvlf_5
831: 801 00014BAC _cvlf_5:
832: 802 00014BAC 0000 .word L313
833: 803 00014BAE #
834: 804 00014BAE #
835: 805 00014BAE #
836: 806 00014BAE # /************************************************************************
837: 807 00014BAE # *
838: 808 00014BAE # * SUBTEST 5 - pipelined entry test
839: 809 00014BAE # *
840: 810 00014BAE # ************************************************************************/
841: 811 00014BAE # cvlf_5()
842: 812 00014BAE # {
843: 813 00014BAE 13 0184 jbr L315
844: 814 00014BB1 L316:
845: 815 00014BB1 # force_loop = FALSE;
846: 816 00014BB1 4d effffff8e5 clrl _force_loop
847: 817 00014BB7 # subtest = 5;
848: 818 00014BB7 0d 05 effffff8de movl $5,_subtest
849: 819 00014BBE # for( index = 0; index < max_cvlf_1_index; index++ ) {
850: 820 00014BBE 4d effffff8d8 clrl _index
851: 821 00014BC4 L319:
852: 822 00014BC4 1d effffff8d2 effffff8cd cmpl _index,_max_cvlf_1_index
853: 823 00014BCF 91 03 13 0160 jgeq L318
854: 824 00014BD4 # sgl_ld_acc = 0x7fffffff; /* get the base value */
855: 825 00014BD4 0d 8f7fffffff effffff8bd movl $2147483647,_sgl_ld_acc
856: 826 00014BDF # sgl_value_1 = cvlf_1_data[index].ld; /* get value to negate */
857: 827 00014BDF 0d effffff8b7 50 movl _index,r0
858: 828 00014BE6 48 03 50 50 shll $3,r0,r0
859: 829 00014BEA 0d e000000000 effffff8a7 movl _cvlf_1_data(r0),_sgl_value_1
860: 830 00014BF5 # sgl_expected = cvlf_1_data[index].exp; /* get expected result */
861: 831 00014BF5 0d effffff8a1 50 movl _index,r0
862: 832 00014BFC 48 03 50 50 shll $3,r0,r0
863: 833 00014C00 0d e000000004 effffff891 movl _cvlf_1_data+4(r0),_sgl_expected
864: 834 00014C0B # /*
865: 835 00014C0B # * If LOOP ON ERROR is set, this is the loop for this subtest.
866: 836 00014C0B # * The force loop flag is set after the first error.
867: 837 00014C0B # */
868: 838 00014C0B # asm("_cvlf_5_lp1:");
869: 839 00014C0B _cvlf_5_lp1:
870: 840 00014C0B # asm("movl $0,r0"); /* clear r0 */
871: 841 00014C0B 0d 00 50 movl $0,r0
872: 842 00014C0E # asm("ldf r0"); /* load the Acc. with 0.0 */
873: 843 00014C0E 06 50 ldf r0
874: 844 00014C10 # asm("addf _sgl_ld_acc"); /* add the value */
875: 845 00014C10 c6 effffff886 addf _sgl_ld_acc
876: 846 00014C16 # asm("stf _sgl_st_acc"); /* store the result */
877: 847 00014C16 26 effffff880 stf _sgl_st_acc
878: 848 00014C1C # asm("cvlf _sgl_value_1"); /* convert the value */
879: 849 00014C1C 76 effffff87a cvlf _sgl_value_1
880: 850 00014C22 # asm("stf _sgl_st_acc"); /* store the result */
881: 851 00014C22 26 effffff874 stf _sgl_st_acc
882: 852 00014C28 # if( force_loop )
883: 853 00014C28 5d effffff86e tstl _force_loop
884: 854 00014C2E 31 02 jeql L320
885: 855 00014C30 # asm("brb _cvlf_5_lp1");; /* loop on the error */
886: 856 00014C30 11 d9 brb _cvlf_5_lp1
887: 857 00014C32 L320:
888: 858 00014C32 # /*
889: 859 00014C32 # * end error loop - test the results
890: 860 00014C32 # */
891: 861 00014C32 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
892: 862 00014C32 1d effffff864 effffff85f cmpl _sgl_st_acc,_sgl_expected
893: 863 00014C3D 21 03 13 00e9 jeql L321
894: 864 00014C42 # errcnt++; /* bump the error count */
895: 865 00014C42 6d effffff854 incl _errcnt
896: 866 00014C48 # if( prt_error ) {
897: 867 00014C48 5d effffff84e tstl _prt_error
898: 868 00014C4E 21 03 13 00b5 jeql L322
899: 869 00014C53 # writes(" \n"); /* start a new print line */
900: 870 00014C53 .data 1
901: 871 00000cee * L323:
902: 872 00000cee * 200A00 .ascii " \12\0"
903: 873 00000cf1 * .text
904: 874 00014C53 dd 8f00000cee pushl $L323
905: 875 00014C59 fe 08 effffff83c callf $8,_writes
906: 876 00014C60 # writes("cycle: ");
907: 877 00014C60 .data 1
908: 878 00000cf1 * L324:
909: 879 00000cf1 * 6379636C653A2000 .ascii "cycle: \0"
910: 880 00000cf9 * .text
911: 881 00014C60 dd 8f00000cf1 pushl $L324
912: 882 00014C66 fe 08 effffff82f callf $8,_writes
913: 883 00014C6D # writed( cycle );
914: 884 00014C6D dd effffff829 pushl _cycle
915: 885 00014C73 fe 08 effffff822 callf $8,_writed
916: 886 00014C7A # writes(" CVLF test ");
917: 887 00014C7A .data 1
918: 888 00000cf9 * L325:
919: 889 00000cf9 * 202043564C462074657374200 .ascii " CVLF test \0"
920: 0
921: 890 00000d06 * .text
922: 891 00014C7A dd 8f00000cf9 pushl $L325
923: 892 00014C80 fe 08 effffff815 callf $8,_writes
924: 893 00014C87 # writed( test_no );
925: 894 00014C87 dd effffff80f pushl _test_no
926: 895 00014C8D fe 08 effffff808 callf $8,_writed
927: 896 00014C94 # writes(", subtest 5 (Piped Entry) - BAD FINAL ACC\n");
928: 897 00014C94 .data 1
929: 898 00000d06 * L326:
930: 899 00000d06 * 2C20737562746573742035202 .ascii ", subtest 5 (Piped Entry) - BAD FINAL ACC\12\0"
931: 8506970656420456E74727929
932: 202D204241442046494E414C2
933: 04143430A00
934: 900 00000d31 * .text
935: 901 00014C94 dd 8f00000d06 pushl $L326
936: 902 00014C9A fe 08 effffff7fb callf $8,_writes
937: 903 00014CA1 # print_cvlf_data();
938: 904 00014CA1 fe 04 ef0000020c callf $4,_print_cvlf_data
939: 905 00014CA8 # writes(", data index = ");
940: 906 00014CA8 .data 1
941: 907 00000d31 * L327:
942: 908 00000d31 * 2C2020206461746120696E646 .ascii ", data index = \0"
943: 578203D2000
944: 909 00000d43 * .text
945: 910 00014CA8 dd 8f00000d31 pushl $L327
946: 911 00014CAE fe 08 effffff7e7 callf $8,_writes
947: 912 00014CB5 # writed( index );
948: 913 00014CB5 dd effffff7e1 pushl _index
949: 914 00014CBB fe 08 effffff7da callf $8,_writed
950: 915 00014CC2 # writec('\n');
951: 916 00014CC2 dd 0a pushl $10
952: 917 00014CC4 fe 08 effffff7d1 callf $8,_writec
953: 918 00014CCB # writes(" operand = ");
954: 919 00014CCB .data 1
955: 920 00000d43 * L328:
956: 921 00000d43 * 202020206F706572616E64203 .ascii " operand = \0"
957: D2000
958: 922 00000d52 * .text
959: 923 00014CCB dd 8f00000d43 pushl $L328
960: 924 00014CD1 fe 08 effffff7c4 callf $8,_writes
961: 925 00014CD8 # write32h( sgl_value_1 );
962: 926 00014CD8 dd effffff7be pushl _sgl_value_1
963: 927 00014CDE fe 08 effffff7b7 callf $8,_write32h
964: 928 00014CE5 # writes(", expected Acc = ");
965: 929 00014CE5 .data 1
966: 930 00000d52 * L329:
967: 931 00000d52 * 2C20206578706563746564204 .ascii ", expected Acc = \0"
968: 16363203D2000
969: 932 00000d65 * .text
970: 933 00014CE5 dd 8f00000d52 pushl $L329
971: 934 00014CEB fe 08 effffff7aa callf $8,_writes
972: 935 00014CF2 # write32h( sgl_expected );
973: 936 00014CF2 dd effffff7a4 pushl _sgl_expected
974: 937 00014CF8 fe 08 effffff79d callf $8,_write32h
975: 938 00014CFF # writec('\n');
976: 939 00014CFF dd 0a pushl $10
977: 940 00014D01 fe 08 effffff794 callf $8,_writec
978: 941 00014D08 # }
979: 942 00014D08 # if( halt_flg )
980: 943 00014D08 L322:
981: 944 00014D08 5d effffff78e tstl _halt_flg
982: 945 00014D0E 31 09 jeql L330
983: 946 00014D10 # cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */
984: 947 00014D10 dd 01 pushl $1
985: 948 00014D12 fe 08 ef000001d7 callf $8,_cvlf_er_halt
986: 949 00014D19 # if( loop_on_err ) {
987: 950 00014D19 L330:
988: 951 00014D19 5d effffff77d tstl _loop_on_err
989: 952 00014D1F 31 0a jeql L331
990: 953 00014D21 # force_loop = TRUE; /* set the force loop flag */
991: 954 00014D21 0d 01 effffff774 movl $1,_force_loop
992: 955 00014D28 # asm("brw _cvlf_5_lp1");; /* and loop on the error */
993: 956 00014D28 13 fee0 brw _cvlf_5_lp1
994: 957 00014D2B # } /* end of loop on error */
995: 958 00014D2B # } /* end of compare error */
996: 959 00014D2B L331:
997: 960 00014D2B # } /* end of WHILE loop */
998: 961 00014D2B L321:
999: 962 00014D2B L317:
1000: 963 00014D2B 6d effffff76b incl _index
1001: 964 00014D31 13 fe90 jbr L319
1002: 965 00014D34 L318:
1003: 966 00014D34 # } /* end of subtest 5 */
1004: 967 00014D34 40 ret#2
1005: 968 00014D35 .set L313,0x0
1006: 969 00014D35 L315:
1007: 970 00014D35 13 fe79 jbr L316
1008: 971 00014D38 .data
1009: 972 00000b04 * .text
1010: 973 00014D38 .align 1
1011: 974 00014D38 .globl _cvlf_6
1012: 975 00014D38 _cvlf_6:
1013: 976 00014D38 0000 .word L332
1014: 977 00014D3A #
1015: 978 00014D3A #
1016: 979 00014D3A #
1017: 980 00014D3A # /************************************************************************
1018: 981 00014D3A # *
1019: 982 00014D3A # * SUBTEST 6 - pipelined exit test
1020: 983 00014D3A # *
1021: 984 00014D3A # ************************************************************************/
1022: 985 00014D3A # cvlf_6()
1023: 986 00014D3A # {
1024: 987 00014D3A 13 0173 jbr L334
1025: 988 00014D3D L335:
1026: 989 00014D3D # force_loop = FALSE;
1027: 990 00014D3D 4d effffff759 clrl _force_loop
1028: 991 00014D43 # subtest = 6;
1029: 992 00014D43 0d 06 effffff752 movl $6,_subtest
1030: 993 00014D4A # for( index = 0; index < max_cvlf_1_index; index++ ) {
1031: 994 00014D4A 4d effffff74c clrl _index
1032: 995 00014D50 L338:
1033: 996 00014D50 1d effffff746 effffff741 cmpl _index,_max_cvlf_1_index
1034: 997 00014D5B 91 03 13 014f jgeq L337
1035: 998 00014D60 # sgl_ld_acc = cvlf_1_data[index].ld; /* get initial acc val */
1036: 999 00014D60 0d effffff736 50 movl _index,r0
1037: 1000 00014D67 48 03 50 50 shll $3,r0,r0
1038: 1001 00014D6B 0d e000000000 effffff726 movl _cvlf_1_data(r0),_sgl_ld_acc
1039: 1002 00014D76 # sgl_expected = cvlf_1_data[index].exp; /* get expected result */
1040: 1003 00014D76 0d effffff720 50 movl _index,r0
1041: 1004 00014D7D 48 03 50 50 shll $3,r0,r0
1042: 1005 00014D81 0d e000000004 effffff710 movl _cvlf_1_data+4(r0),_sgl_expected
1043: 1006 00014D8C # /*
1044: 1007 00014D8C # * If LOOP ON ERROR is set, this is the loop for this subtest.
1045: 1008 00014D8C # * The force loop flag is set after the first error.
1046: 1009 00014D8C # */
1047: 1010 00014D8C # asm("_cvlf_6_lp1:");
1048: 1011 00014D8C _cvlf_6_lp1:
1049: 1012 00014D8C # asm("movl $0,r0"); /* clear r0 */
1050: 1013 00014D8C 0d 00 50 movl $0,r0
1051: 1014 00014D8F # asm("ldf _sgl_ld_acc"); /* load the value */
1052: 1015 00014D8F 06 effffff707 ldf _sgl_ld_acc
1053: 1016 00014D95 # asm("cvlf _sgl_ld_acc"); /* convert the value */
1054: 1017 00014D95 76 effffff701 cvlf _sgl_ld_acc
1055: 1018 00014D9B # asm("addf r0"); /* add a zero to the acc */
1056: 1019 00014D9B c6 50 addf r0
1057: 1020 00014D9D # asm("stf _sgl_st_acc"); /* store the result */
1058: 1021 00014D9D 26 effffff6f9 stf _sgl_st_acc
1059: 1022 00014DA3 # if( force_loop )
1060: 1023 00014DA3 5d effffff6f3 tstl _force_loop
1061: 1024 00014DA9 31 02 jeql L339
1062: 1025 00014DAB # asm("brb _cvlf_6_lp1");; /* loop on the error */
1063: 1026 00014DAB 11 df brb _cvlf_6_lp1
1064: 1027 00014DAD L339:
1065: 1028 00014DAD # /*
1066: 1029 00014DAD # * end error loop - test the results
1067: 1030 00014DAD # */
1068: 1031 00014DAD # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1069: 1032 00014DAD 1d effffff6e9 effffff6e4 cmpl _sgl_st_acc,_sgl_expected
1070: 1033 00014DB8 21 03 13 00e9 jeql L340
1071: 1034 00014DBD # errcnt++; /* bump the error count */
1072: 1035 00014DBD 6d effffff6d9 incl _errcnt
1073: 1036 00014DC3 # if( prt_error ) {
1074: 1037 00014DC3 5d effffff6d3 tstl _prt_error
1075: 1038 00014DC9 21 03 13 00b5 jeql L341
1076: 1039 00014DCE # writes(" \n"); /* start a new print line */
1077: 1040 00014DCE .data 1
1078: 1041 00000d65 * L342:
1079: 1042 00000d65 * 200A00 .ascii " \12\0"
1080: 1043 00000d68 * .text
1081: 1044 00014DCE dd 8f00000d65 pushl $L342
1082: 1045 00014DD4 fe 08 effffff6c1 callf $8,_writes
1083: 1046 00014DDB # writes("cycle: ");
1084: 1047 00014DDB .data 1
1085: 1048 00000d68 * L343:
1086: 1049 00000d68 * 6379636C653A2000 .ascii "cycle: \0"
1087: 1050 00000d70 * .text
1088: 1051 00014DDB dd 8f00000d68 pushl $L343
1089: 1052 00014DE1 fe 08 effffff6b4 callf $8,_writes
1090: 1053 00014DE8 # writed( cycle );
1091: 1054 00014DE8 dd effffff6ae pushl _cycle
1092: 1055 00014DEE fe 08 effffff6a7 callf $8,_writed
1093: 1056 00014DF5 # writes(" CVLF test ");
1094: 1057 00014DF5 .data 1
1095: 1058 00000d70 * L344:
1096: 1059 00000d70 * 202043564C462074657374200 .ascii " CVLF test \0"
1097: 0
1098: 1060 00000d7d * .text
1099: 1061 00014DF5 dd 8f00000d70 pushl $L344
1100: 1062 00014DFB fe 08 effffff69a callf $8,_writes
1101: 1063 00014E02 # writed( test_no );
1102: 1064 00014E02 dd effffff694 pushl _test_no
1103: 1065 00014E08 fe 08 effffff68d callf $8,_writed
1104: 1066 00014E0F # writes(", subtest 6 (Piped Exit) - BAD FINAL ACC\n");
1105: 1067 00014E0F .data 1
1106: 1068 00000d7d * L345:
1107: 1069 00000d7d * 2C20737562746573742036202 .ascii ", subtest 6 (Piped Exit) - BAD FINAL ACC\12\0"
1108: 8506970656420457869742920
1109: 2D204241442046494E414C204
1110: 143430A00
1111: 1070 00000da7 * .text
1112: 1071 00014E0F dd 8f00000d7d pushl $L345
1113: 1072 00014E15 fe 08 effffff680 callf $8,_writes
1114: 1073 00014E1C # print_cvlf_data();
1115: 1074 00014E1C fe 04 ef00000091 callf $4,_print_cvlf_data
1116: 1075 00014E23 # writes(", data index = ");
1117: 1076 00014E23 .data 1
1118: 1077 00000da7 * L346:
1119: 1078 00000da7 * 2C2020206461746120696E646 .ascii ", data index = \0"
1120: 578203D2000
1121: 1079 00000db9 * .text
1122: 1080 00014E23 dd 8f00000da7 pushl $L346
1123: 1081 00014E29 fe 08 effffff66c callf $8,_writes
1124: 1082 00014E30 # writed( index );
1125: 1083 00014E30 dd effffff666 pushl _index
1126: 1084 00014E36 fe 08 effffff65f callf $8,_writed
1127: 1085 00014E3D # writec('\n');
1128: 1086 00014E3D dd 0a pushl $10
1129: 1087 00014E3F fe 08 effffff656 callf $8,_writec
1130: 1088 00014E46 # writes(" operand = ");
1131: 1089 00014E46 .data 1
1132: 1090 00000db9 * L347:
1133: 1091 00000db9 * 202020206F706572616E64203 .ascii " operand = \0"
1134: D2000
1135: 1092 00000dc8 * .text
1136: 1093 00014E46 dd 8f00000db9 pushl $L347
1137: 1094 00014E4C fe 08 effffff649 callf $8,_writes
1138: 1095 00014E53 # write32h( sgl_value_1 );
1139: 1096 00014E53 dd effffff643 pushl _sgl_value_1
1140: 1097 00014E59 fe 08 effffff63c callf $8,_write32h
1141: 1098 00014E60 # writes(", expected Acc = ");
1142: 1099 00014E60 .data 1
1143: 1100 00000dc8 * L348:
1144: 1101 00000dc8 * 2C20206578706563746564204 .ascii ", expected Acc = \0"
1145: 16363203D2000
1146: 1102 00000ddb * .text
1147: 1103 00014E60 dd 8f00000dc8 pushl $L348
1148: 1104 00014E66 fe 08 effffff62f callf $8,_writes
1149: 1105 00014E6D # write32h( sgl_expected );
1150: 1106 00014E6D dd effffff629 pushl _sgl_expected
1151: 1107 00014E73 fe 08 effffff622 callf $8,_write32h
1152: 1108 00014E7A # writec('\n');
1153: 1109 00014E7A dd 0a pushl $10
1154: 1110 00014E7C fe 08 effffff619 callf $8,_writec
1155: 1111 00014E83 # }
1156: 1112 00014E83 # if( halt_flg )
1157: 1113 00014E83 L341:
1158: 1114 00014E83 5d effffff613 tstl _halt_flg
1159: 1115 00014E89 31 09 jeql L349
1160: 1116 00014E8B # cvlf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1161: 1117 00014E8B dd 01 pushl $1
1162: 1118 00014E8D fe 08 ef0000005c callf $8,_cvlf_er_halt
1163: 1119 00014E94 # if( loop_on_err ) {
1164: 1120 00014E94 L349:
1165: 1121 00014E94 5d effffff602 tstl _loop_on_err
1166: 1122 00014E9A 31 0a jeql L350
1167: 1123 00014E9C # force_loop = TRUE; /* set the force loop flag */
1168: 1124 00014E9C 0d 01 effffff5f9 movl $1,_force_loop
1169: 1125 00014EA3 # asm("brw _cvlf_6_lp1");; /* and loop on the error */
1170: 1126 00014EA3 13 fee6 brw _cvlf_6_lp1
1171: 1127 00014EA6 # } /* end of loop on error */
1172: 1128 00014EA6 # } /* end of compare error */
1173: 1129 00014EA6 L350:
1174: 1130 00014EA6 # } /* end of WHILE loop */
1175: 1131 00014EA6 L340:
1176: 1132 00014EA6 L336:
1177: 1133 00014EA6 6d effffff5f0 incl _index
1178: 1134 00014EAC 13 fea1 jbr L338
1179: 1135 00014EAF L337:
1180: 1136 00014EAF # } /* end of subtest 6 */
1181: 1137 00014EAF 40 ret#2
1182: 1138 00014EB0 .set L332,0x0
1183: 1139 00014EB0 L334:
1184: 1140 00014EB0 13 fe8a jbr L335
1185: 1141 00014EB3 .data
1186: 1142 00000b04 * .text
1187: 1143 00014EB3 00 .align 1
1188: 1144 00014EB4 .globl _print_cvlf_data
1189: 1145 00014EB4 _print_cvlf_data:
1190: 1146 00014EB4 0000 .word L351
1191: 1147 00014EB6 #
1192: 1148 00014EB6 #
1193: 1149 00014EB6 #
1194: 1150 00014EB6 # /**************************************************************************
1195: 1151 00014EB6 # *
1196: 1152 00014EB6 # * PRINT THE DATA AND STORE RESULTS
1197: 1153 00014EB6 # *
1198: 1154 00014EB6 # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx
1199: 1155 00014EB6 # * operand = xxxxxxxx, expected = xxxxxxxx
1200: 1156 00014EB6 # **************************************************************************/
1201: 1157 00014EB6 # print_cvlf_data()
1202: 1158 00014EB6 # {
1203: 1159 00014EB6 11 35 jbr L353
1204: 1160 00014EB8 L354:
1205: 1161 00014EB8 # writes("initial Acc = ");
1206: 1162 00014EB8 .data 1
1207: 1163 00000ddb * L355:
1208: 1164 00000ddb * 696E697469616C20416363203 .ascii "initial Acc = \0"
1209: D2000
1210: 1165 00000dea * .text
1211: 1166 00014EB8 dd 8f00000ddb pushl $L355
1212: 1167 00014EBE fe 08 effffff5d7 callf $8,_writes
1213: 1168 00014EC5 # write32h( sgl_ld_acc );
1214: 1169 00014EC5 dd effffff5d1 pushl _sgl_ld_acc
1215: 1170 00014ECB fe 08 effffff5ca callf $8,_write32h
1216: 1171 00014ED2 # writes(", final Acc = ");
1217: 1172 00014ED2 .data 1
1218: 1173 00000dea * L356:
1219: 1174 00000dea * 2C202020202066696E616C204 .ascii ", final Acc = \0"
1220: 16363203D2000
1221: 1175 00000dfd * .text
1222: 1176 00014ED2 dd 8f00000dea pushl $L356
1223: 1177 00014ED8 fe 08 effffff5bd callf $8,_writes
1224: 1178 00014EDF # write32h( sgl_st_acc );
1225: 1179 00014EDF dd effffff5b7 pushl _sgl_st_acc
1226: 1180 00014EE5 fe 08 effffff5b0 callf $8,_write32h
1227: 1181 00014EEC # }
1228: 1182 00014EEC 40 ret#2
1229: 1183 00014EED .set L351,0x0
1230: 1184 00014EED L353:
1231: 1185 00014EED 11 c9 jbr L354
1232: 1186 00014EEF .data
1233: 1187 00000b04 * .text
1234: 1188 00014EEF 00 .align 1
1235: 1189 00014EF0 .globl _cvlf_er_halt
1236: 1190 00014EF0 _cvlf_er_halt:
1237: 1191 00014EF0 0000 .word L357
1238: 1192 00014EF2 #
1239: 1193 00014EF2 #
1240: 1194 00014EF2 #
1241: 1195 00014EF2 # /**************************************************************************
1242: 1196 00014EF2 # *
1243: 1197 00014EF2 # * HALT ON ERROR ROUTINE
1244: 1198 00014EF2 # *
1245: 1199 00014EF2 # **************************************************************************/
1246: 1200 00014EF2 # cvlf_er_halt( halt_code )
1247: 1201 00014EF2 # int halt_code;
1248: 1202 00014EF2 # {
1249: 1203 00014EF2 13 00a8 jbr L359
1250: 1204 00014EF5 L360:
1251: 1205 00014EF5 # sgl_dummy1 = halt_code; /* get the error type */
1252: 1206 00014EF5 0d ad04 effffff59f movl 4(fp),_sgl_dummy1
1253: 1207 00014EFD # asm("movl _test_no,r0"); /* r0 = test number */
1254: 1208 00014EFD 0d effffff599 50 movl _test_no,r0
1255: 1209 00014F04 # asm("movl _subtest,r1"); /* r1 = subtest number */
1256: 1210 00014F04 0d effffff592 51 movl _subtest,r1
1257: 1211 00014F0B # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1258: 1212 00014F0B 0d effffff58b 52 movl _sgl_dummy1,r2
1259: 1213 00014F12 # asm("movl _cycle,r3"); /* r3 = cycle count */
1260: 1214 00014F12 0d effffff584 53 movl _cycle,r3
1261: 1215 00014F19 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1262: 1216 00014F19 0d effffff57d 54 movl _sgl_ld_acc,r4
1263: 1217 00014F20 # /* asm("movl _sgl_value_1,r5"); /* r5 = data loaded */
1264: 1218 00014F20 # asm("movl _sgl_st_acc,r6"); /* r6 = data stored */
1265: 1219 00014F20 0d effffff576 56 movl _sgl_st_acc,r6
1266: 1220 00014F27 # if( halt_code == BAD_ACC_HLT ) {
1267: 1221 00014F27 1d ad04 01 cmpl 4(fp),$1
1268: 1222 00014F2B 21 10 jneq L361
1269: 1223 00014F2D # asm("movl _sgl_expected,r7"); /* r7 = data expected */
1270: 1224 00014F2D 0d effffff569 57 movl _sgl_expected,r7
1271: 1225 00014F34 # asm("movl _index,r8"); /* r8 = data expected */
1272: 1226 00014F34 0d effffff562 58 movl _index,r8
1273: 1227 00014F3B # } else
1274: 1228 00014F3B 11 5e jbr L362
1275: 1229 00014F3D L361:
1276: 1230 00014F3D # if( halt_code == BAD_REG_HLT ) {
1277: 1231 00014F3D 1d ad04 02 cmpl 4(fp),$2
1278: 1232 00014F41 21 3d jneq L363
1279: 1233 00014F43 # sgl_dummy1 = load_regs[index2];
1280: 1234 00014F43 0d effffff553 50 movl _index2,r0
1281: 1235 00014F4A 0d 40effffff54b movl _load_regs[r0],_sgl_dummy1
1282: effffff546
1283: 1236 00014F56 # sgl_dummy2 = store_regs[index2];
1284: 1237 00014F56 0d effffff540 50 movl _index2,r0
1285: 1238 00014F5D 0d 40effffff538 movl _store_regs[r0],_sgl_dummy2
1286: effffff533
1287: 1239 00014F69 # asm("movl _index2,r7"); /* r7 = bad register # */
1288: 1240 00014F69 0d effffff52d 57 movl _index2,r7
1289: 1241 00014F70 # asm("movl _sgl_dummy2,r8"); /* r8 = final reg value */
1290: 1242 00014F70 0d effffff526 58 movl _sgl_dummy2,r8
1291: 1243 00014F77 # asm("movl _sgl_dummy1,r9"); /* r9 = init reg value */
1292: 1244 00014F77 0d effffff51f 59 movl _sgl_dummy1,r9
1293: 1245 00014F7E # } else
1294: 1246 00014F7E 11 1b jbr L364
1295: 1247 00014F80 L363:
1296: 1248 00014F80 # if( halt_code == BAD_PSL_HLT ) {
1297: 1249 00014F80 1d ad04 03 cmpl 4(fp),$3
1298: 1250 00014F84 21 15 jneq L365
1299: 1251 00014F86 # asm("movl _init_psl,r7"); /* r7 = initial PSL */
1300: 1252 00014F86 0d effffff510 57 movl _init_psl,r7
1301: 1253 00014F8D # asm("movl _psl_val,r8"); /* r8 = final PSL */
1302: 1254 00014F8D 0d effffff509 58 movl _psl_val,r8
1303: 1255 00014F94 # asm("movl _exp_psl,r9"); /* r9 = expected PSL */
1304: 1256 00014F94 0d effffff502 59 movl _exp_psl,r9
1305: 1257 00014F9B # };
1306: 1258 00014F9B L365:
1307: 1259 00014F9B L364:
1308: 1260 00014F9B L362:
1309: 1261 00014F9B # asm("halt"); /* HALT ... */
1310: 1262 00014F9B 00 halt
1311: 1263 00014F9C # }
1312: 1264 00014F9C 40 ret#2
1313: 1265 00014F9D .set L357,0x0
1314: 1266 00014F9D L359:
1315: 1267 00014F9D 13 ff55 jbr L360
1316: 1268 00000b04 * .data
1317: 1268 00000b04 * .data
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