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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to expf.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000a60 * .text
4 00000000 .align 1
5 00000000 .globl _expf
6 00000000 _expf:
7 00020B5C 0000 .word L215
8 00020B5E # #include "fpp_defs.h"
9 00020B5E #
10 00020B5E #
11 00020B5E #
12 00020B5E # /***************************************************************************
13 00020B5E # *
14 00020B5E # * EXPF - SINGLE PRECISION FLOATING POINT EXPF FUNCTION TEST
15 00020B5E # *
16 00020B5E # * EXPF TEST MONITOR
17 00020B5E # *
18 00020B5E # *****************************************************************************/
19 00020B5E # expf()
20 00020B5E # {
21 00020B5E 11 4f jbr L217
22 00020B60 L218:
23 00020B60 # asm(".globl _expf_t");
24 00020B60 .globl _expf_t
25 00020B60 # asm("_expf_t:"); /* entry address */
26 00020B60 _expf_t:
27 00020B60 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
28 00020B60 1d effffffff6 01 cmpl _cycle,$1
29 00020B67 21 15 jneq L219
30 00020B69 5d efffffffed tstl _prt_hdrs
31 00020B6F 31 0d jeql L219
32 00020B71 # {
33 00020B71 # writes(" EXPF");
34 00020B71 .data 1
35 00000a60 * L221:
36 00000a60 * 204558504600 .ascii " EXPF\0"
37 00000a66 * .text
38 00020B71 dd 8f00000a60 pushl $L221
39 00020B77 fe 08 efffffffde callf $8,_writes
40 00020B7E # }
41 00020B7E # expf_1(); /* test expf with delay */
42 00020B7E L219:
43 00020B7E fe 04 ef0000002d callf $4,_expf_1
44 00020B85 # expf_2(); /* test expf */
45 00020B85 fe 04 ef00000198 callf $4,_expf_2
46 00020B8C # expf_3(); /* register corruption */
47 00020B8C fe 04 ef000002f1 callf $4,_expf_3
48 00020B93 # expf_4(); /* test the PSL */
49 00020B93 fe 04 ef000004d4 callf $4,_expf_4
50 00020B9A # expf_5(); /* pipelined entry */
51 00020B9A fe 04 ef0000067d callf $4,_expf_5
52 00020BA1 # expf_6(); /* pipelined exit */
53 00020BA1 fe 04 ef000007d2 callf $4,_expf_6
54 00020BA8 # asm("jmp *return"); /* return to the test monitor */
55 00020BA8 71 ffffffffae jmp *return
56 00020BAE # }
57 00020BAE 40 ret#2
58 00020BAF .set L215,0x0
59 00020BAF L217:
60 00020BAF 11 af jbr L218
61 00020BB1 .data
62 00000a60 * .text
63 00020BB1 00 .align 1
64 00020BB2 .globl _expf_1
65 00020BB2 _expf_1:
66 00020BB2 0000 .word L228
67 00020BB4 #
68 00020BB4 #
69 00020BB4 #
70 00020BB4 # /***************************************************************************
71 00020BB4 # *
72 00020BB4 # * SUBTEST 1 - EXPF
73 00020BB4 # *
74 00020BB4 # ***************************************************************************/
75 00020BB4 # expf_1()
76 00020BB4 # {
77 00020BB4 13 016a jbr L230
78 00020BB7 L231:
79 00020BB7 # #define DELAY 10 /* wait 20 ticks between EXPF & STF */
80 00020BB7 # force_loop = FALSE; /* clear the LOOP flag */
81 00020BB7 4d efffffff9f clrl _force_loop
82 00020BBD # subtest = 1;
83 00020BBD 0d 01 efffffff98 movl $1,_subtest
84 00020BC4 # index = 0;
85 00020BC4 4d efffffff92 clrl _index
86 00020BCA # do
87 00020BCA L234:
88 00020BCA # {
89 00020BCA # sgl_ld_acc = expf_1_data[index].ld; /* get the operand */
90 00020BCA 0d efffffff8c 50 movl _index,r0
91 00020BD1 48 03 50 50 shll $3,r0,r0
92 00020BD5 0d e000000000 efffffff7c movl _expf_1_data(r0),_sgl_ld_acc
93 00020BE0 # sgl_expected = expf_1_data[index].exp; /* get expected results */
94 00020BE0 0d efffffff76 50 movl _index,r0
95 00020BE7 48 03 50 50 shll $3,r0,r0
96 00020BEB 0d e000000004 efffffff66 movl _expf_1_data+4(r0),_sgl_expected
97 00020BF6 # sgl_dummy1 = DELAY;
98 00020BF6 0d 0a efffffff5f movl $10,_sgl_dummy1
99 00020BFD # /*
100 00020BFD # * If LOOP ON ERROR is set, this is the loop for this subtest.
101 00020BFD # * The force loop flag is set after the first error.
102 00020BFD # */
103 00020BFD # asm("_expf_1_lp1:");
104 00020BFD _expf_1_lp1:
105 00020BFD # asm("movl _sgl_ld_acc,r4"); /* set the data to load */
106 00020BFD 0d efffffff59 54 movl _sgl_ld_acc,r4
107 00020C04 # asm("ldf r4"); /* load the accumulator */
108 00020C04 06 54 ldf r4
109 00020C06 # asm("movl _sgl_dummy1,r0"); /* get the delay factor */
110 00020C06 0d efffffff50 50 movl _sgl_dummy1,r0
111 00020C0D # asm("expf"); /* get ACC.s' exponent */
112 00020C0D 55 expf
113 00020C0E # asm("1:");
114 00020C0E 1:
115 00020C0E # asm("decl r0"); /* delay to let the EXPF */
116 00020C0E 7d 50 decl r0
117 00020C10 # asm("bgtr 1b"); /* instruction finish */
118 00020C10 41 fc bgtr 1b
119 00020C12 # asm("stf r5"); /* store the result */
120 00020C12 26 55 stf r5
121 00020C14 # if( force_loop )
122 00020C14 5d efffffff42 tstl _force_loop
123 00020C1A 31 02 jeql L235
124 00020C1C # asm("brb _expf_1_lp1");; /* loop on the error */
125 00020C1C 11 df brb _expf_1_lp1
126 00020C1E L235:
127 00020C1E # /*
128 00020C1E # * end error loop
129 00020C1E # */
130 00020C1E # asm("movl r5,_sgl_st_acc"); /* save the result */
131 00020C1E 0d 55 efffffff37 movl r5,_sgl_st_acc
132 00020C25 # if( sgl_st_acc != sgl_expected ) /* COMPARE the values */
133 00020C25 1d efffffff31 efffffff2c cmpl _sgl_st_acc,_sgl_expected
134 00020C30 21 03 13 00d2 jeql L236
135 00020C35 # {
136 00020C35 # errcnt++; /* bump the error count */
137 00020C35 6d efffffff21 incl _errcnt
138 00020C3B # if ( prt_error )
139 00020C3B 5d efffffff1b tstl _prt_error
140 00020C41 21 03 13 009b jeql L237
141 00020C46 # {
142 00020C46 # writes(" \n"); /* start a new print line */
143 00020C46 .data 1
144 00000a66 * L238:
145 00000a66 * 200A00 .ascii " \12\0"
146 00000a69 * .text
147 00020C46 dd 8f00000a66 pushl $L238
148 00020C4C fe 08 efffffff09 callf $8,_writes
149 00020C53 # writes("cycle: ");
150 00020C53 .data 1
151 00000a69 * L239:
152 00000a69 * 6379636C653A2000 .ascii "cycle: \0"
153 00000a71 * .text
154 00020C53 dd 8f00000a69 pushl $L239
155 00020C59 fe 08 effffffefc callf $8,_writes
156 00020C60 # writed( cycle );
157 00020C60 dd effffffef6 pushl _cycle
158 00020C66 fe 08 effffffeef callf $8,_writed
159 00020C6D # writes(" EXPF test ");
160 00020C6D .data 1
161 00000a71 * L241:
162 00000a71 * 2020204558504620746573742 .ascii " EXPF test \0"
000
163 00000a7f * .text
164 00020C6D dd 8f00000a71 pushl $L241
165 00020C73 fe 08 effffffee2 callf $8,_writes
166 00020C7A # writed( test_no );
167 00020C7A dd effffffedc pushl _test_no
168 00020C80 fe 08 effffffed5 callf $8,_writed
169 00020C87 # writes(", subtest 1 (delayed store) - BAD FINAL ACC\n");
170 00020C87 .data 1
171 00000a7f * L242:
172 00000a7f * 2C20737562746573742031202 .ascii ", subtest 1 (delayed store) - BAD FINAL ACC\12\0"
864656C617965642073746F72
6529202D204241442046494E4
14C204143430A00
173 00000aac * .text
174 00020C87 dd 8f00000a7f pushl $L242
175 00020C8D fe 08 effffffec8 callf $8,_writes
176 00020C94 # print_expf_data();
177 00020C94 fe 04 ef0000083b callf $4,_print_expf_data
178 00020C9B # writes(", data index = ");
179 00020C9B .data 1
180 00000aac * L244:
181 00000aac * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
182 00000abd * .text
183 00020C9B dd 8f00000aac pushl $L244
184 00020CA1 fe 08 effffffeb4 callf $8,_writes
185 00020CA8 # writed( index );
186 00020CA8 dd effffffeae pushl _index
187 00020CAE fe 08 effffffea7 callf $8,_writed
188 00020CB5 # writec('\n');
189 00020CB5 dd 0a pushl $10
190 00020CB7 fe 08 effffffe9e callf $8,_writec
191 00020CBE # writes(" Acc expected = ");
192 00020CBE .data 1
193 00000abd * L246:
194 00000abd * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020416363
206578706563746564203D200
0
195 00000ae3 * .text
196 00020CBE dd 8f00000abd pushl $L246
197 00020CC4 fe 08 effffffe91 callf $8,_writes
198 00020CCB # write32h( sgl_expected );
199 00020CCB dd effffffe8b pushl _sgl_expected
200 00020CD1 fe 08 effffffe84 callf $8,_write32h
201 00020CD8 # writec('\n');
202 00020CD8 dd 0a pushl $10
203 00020CDA fe 08 effffffe7b callf $8,_writec
204 00020CE1 # }
205 00020CE1 # if ( halt_flg ) /* halt on error? */
206 00020CE1 L237:
207 00020CE1 5d effffffe75 tstl _halt_flg
208 00020CE7 31 09 jeql L248
209 00020CE9 # expf_er_halt( BAD_ACC_HLT );
210 00020CE9 dd 01 pushl $1
211 00020CEB fe 08 ef00000820 callf $8,_expf_er_halt
212 00020CF2 # if ( loop_on_err )
213 00020CF2 L248:
214 00020CF2 5d effffffe64 tstl _loop_on_err
215 00020CF8 31 0d jeql L250
216 00020CFA # {
217 00020CFA # force_loop = TRUE; /* set the force loop flag */
218 00020CFA 0d 01 effffffe5b movl $1,_force_loop
219 00020D01 # asm("jmp _expf_1_lp1"); /* and loop */
220 00020D01 71 effffffef6 jmp _expf_1_lp1
221 00020D07 # }
222 00020D07 # } /* end of compare error */
223 00020D07 L250:
224 00020D07 # } while( index++ < max_expf_1_index );
225 00020D07 L236:
226 00020D07 L233:
227 00020D07 0d effffffe4f 50 movl _index,r0
228 00020D0E 6d effffffe48 incl _index
229 00020D14 1d 50 effffffe41 cmpl r0,_max_expf_1_index
230 00020D1B 81 03 13 feaa jlss L234
231 00020D20 L232:
232 00020D20 # } /* end of subtest 1 */
233 00020D20 40 ret#2
234 00020D21 .set L228,0x0
235 00020D21 L230:
236 00020D21 13 fe93 jbr L231
237 00020D24 .data
238 00000a60 * .text
239 00020D24 .align 1
240 00020D24 .globl _expf_2
241 00020D24 _expf_2:
242 00020D24 0000 .word L251
243 00020D26 #
244 00020D26 #
245 00020D26 #
246 00020D26 # /***************************************************************************
247 00020D26 # *
248 00020D26 # * SUBTEST 2 - EXPF FUNCTION
249 00020D26 # *
250 00020D26 # ***************************************************************************/
251 00020D26 # expf_2()
252 00020D26 # {
253 00020D26 13 0158 jbr L253
254 00020D29 L254:
255 00020D29 # force_loop = FALSE; /* clear the LOOP flag */
256 00020D29 4d effffffe2d clrl _force_loop
257 00020D2F # subtest = 2;
258 00020D2F 0d 02 effffffe26 movl $2,_subtest
259 00020D36 # index = 0;
260 00020D36 4d effffffe20 clrl _index
261 00020D3C # do
262 00020D3C L257:
263 00020D3C # {
264 00020D3C # sgl_ld_acc = expf_1_data[index].ld; /* get the operand */
265 00020D3C 0d effffffe1a 50 movl _index,r0
266 00020D43 48 03 50 50 shll $3,r0,r0
267 00020D47 0d e000000000 effffffe0a movl _expf_1_data(r0),_sgl_ld_acc
268 00020D52 # sgl_expected = expf_1_data[index].exp; /* get expected results */
269 00020D52 0d effffffe04 50 movl _index,r0
270 00020D59 48 03 50 50 shll $3,r0,r0
271 00020D5D 0d e000000004 effffffdf4 movl _expf_1_data+4(r0),_sgl_expected
272 00020D68 # /*
273 00020D68 # * If LOOP ON ERROR is set, this is the loop for this subtest.
274 00020D68 # * The force loop flag is set after the first error.
275 00020D68 # */
276 00020D68 # asm("_expf_2_lp1:");
277 00020D68 _expf_2_lp1:
278 00020D68 # asm("movl _sgl_ld_acc,r4"); /* set the data to load */
279 00020D68 0d effffffdee 54 movl _sgl_ld_acc,r4
280 00020D6F # asm("ldf r4"); /* load the accumulator */
281 00020D6F 06 54 ldf r4
282 00020D71 # asm("expf"); /* get ACC.'s exponent */
283 00020D71 55 expf
284 00020D72 # asm("stf r5"); /* store the result */
285 00020D72 26 55 stf r5
286 00020D74 # if( force_loop )
287 00020D74 5d effffffde2 tstl _force_loop
288 00020D7A 31 02 jeql L258
289 00020D7C # asm("brb _expf_2_lp1");; /* loop on the error */
290 00020D7C 11 ea brb _expf_2_lp1
291 00020D7E L258:
292 00020D7E # /*
293 00020D7E # * end error loop
294 00020D7E # */
295 00020D7E # asm("movl r5,_sgl_st_acc"); /* save the result */
296 00020D7E 0d 55 effffffdd7 movl r5,_sgl_st_acc
297 00020D85 # if( sgl_st_acc != sgl_expected ) /* COMPARE the values */
298 00020D85 1d effffffdd1 effffffdcc cmpl _sgl_st_acc,_sgl_expected
299 00020D90 21 03 13 00d2 jeql L259
300 00020D95 # {
301 00020D95 # errcnt++; /* bump the error count */
302 00020D95 6d effffffdc1 incl _errcnt
303 00020D9B # if ( prt_error )
304 00020D9B 5d effffffdbb tstl _prt_error
305 00020DA1 21 03 13 009b jeql L260
306 00020DA6 # {
307 00020DA6 # writes(" \n"); /* start a new print line */
308 00020DA6 .data 1
309 00000ae3 * L261:
310 00000ae3 * 200A00 .ascii " \12\0"
311 00000ae6 * .text
312 00020DA6 dd 8f00000ae3 pushl $L261
313 00020DAC fe 08 effffffda9 callf $8,_writes
314 00020DB3 # writes("cycle: ");
315 00020DB3 .data 1
316 00000ae6 * L262:
317 00000ae6 * 6379636C653A2000 .ascii "cycle: \0"
318 00000aee * .text
319 00020DB3 dd 8f00000ae6 pushl $L262
320 00020DB9 fe 08 effffffd9c callf $8,_writes
321 00020DC0 # writed( cycle );
322 00020DC0 dd effffffd96 pushl _cycle
323 00020DC6 fe 08 effffffd8f callf $8,_writed
324 00020DCD # writes(" EXPF test ");
325 00020DCD .data 1
326 00000aee * L263:
327 00000aee * 2020204558504620746573742 .ascii " EXPF test \0"
000
328 00000afc * .text
329 00020DCD dd 8f00000aee pushl $L263
330 00020DD3 fe 08 effffffd82 callf $8,_writes
331 00020DDA # writed( test_no );
332 00020DDA dd effffffd7c pushl _test_no
333 00020DE0 fe 08 effffffd75 callf $8,_writed
334 00020DE7 # writes(", subtest 2 (immediate store) - BAD FINAL ACC\n");
335 00020DE7 .data 1
336 00000afc * L264:
337 00000afc * 2C20737562746573742032202 .ascii ", subtest 2 (immediate store) - BAD FINAL ACC\12\0"
8696D6D656469617465207374
6F726529202D2042414420464
94E414C204143430A00
338 00000b2b * .text
339 00020DE7 dd 8f00000afc pushl $L264
340 00020DED fe 08 effffffd68 callf $8,_writes
341 00020DF4 # print_expf_data();
342 00020DF4 fe 04 ef000006db callf $4,_print_expf_data
343 00020DFB # writes(", data index = ");
344 00020DFB .data 1
345 00000b2b * L265:
346 00000b2b * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
347 00000b3c * .text
348 00020DFB dd 8f00000b2b pushl $L265
349 00020E01 fe 08 effffffd54 callf $8,_writes
350 00020E08 # writed( index );
351 00020E08 dd effffffd4e pushl _index
352 00020E0E fe 08 effffffd47 callf $8,_writed
353 00020E15 # writec('\n');
354 00020E15 dd 0a pushl $10
355 00020E17 fe 08 effffffd3e callf $8,_writec
356 00020E1E # writes(" Acc expected = ");
357 00020E1E .data 1
358 00000b3c * L266:
359 00000b3c * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020416363
206578706563746564203D200
0
360 00000b62 * .text
361 00020E1E dd 8f00000b3c pushl $L266
362 00020E24 fe 08 effffffd31 callf $8,_writes
363 00020E2B # write32h( sgl_expected );
364 00020E2B dd effffffd2b pushl _sgl_expected
365 00020E31 fe 08 effffffd24 callf $8,_write32h
366 00020E38 # writec('\n');
367 00020E38 dd 0a pushl $10
368 00020E3A fe 08 effffffd1b callf $8,_writec
369 00020E41 # }
370 00020E41 # if ( halt_flg ) /* halt on error? */
371 00020E41 L260:
372 00020E41 5d effffffd15 tstl _halt_flg
373 00020E47 31 09 jeql L267
374 00020E49 # expf_er_halt( BAD_ACC_HLT );
375 00020E49 dd 01 pushl $1
376 00020E4B fe 08 ef000006c0 callf $8,_expf_er_halt
377 00020E52 # if ( loop_on_err )
378 00020E52 L267:
379 00020E52 5d effffffd04 tstl _loop_on_err
380 00020E58 31 0d jeql L268
381 00020E5A # {
382 00020E5A # force_loop = TRUE; /* set the force loop flag */
383 00020E5A 0d 01 effffffcfb movl $1,_force_loop
384 00020E61 # asm("jmp _expf_2_lp1"); /* and loop */
385 00020E61 71 efffffff01 jmp _expf_2_lp1
386 00020E67 # }
387 00020E67 # } /* end of compare error */
388 00020E67 L268:
389 00020E67 # } while( index++ < max_expf_1_index );
390 00020E67 L259:
391 00020E67 L256:
392 00020E67 0d effffffcef 50 movl _index,r0
393 00020E6E 6d effffffce8 incl _index
394 00020E74 1d 50 effffffce1 cmpl r0,_max_expf_1_index
395 00020E7B 81 03 13 febc jlss L257
396 00020E80 L255:
397 00020E80 # } /* end of subtest 2 */
398 00020E80 40 ret#2
399 00020E81 .set L251,0x0
400 00020E81 L253:
401 00020E81 13 fea5 jbr L254
402 00020E84 .data
403 00000a60 * .text
404 00020E84 .align 1
405 00020E84 .globl _expf_3
406 00020E84 _expf_3:
407 00020E84 0000 .word L269
408 00020E86 #
409 00020E86 #
410 00020E86 #
411 00020E86 # /***************************************************************************
412 00020E86 # *
413 00020E86 # * SUBTEST 3 - REGISTER INTEGRITY WITH THE EXPF FUNCTION
414 00020E86 # *
415 00020E86 # ***************************************************************************/
416 00020E86 # expf_3()
417 00020E86 # {
418 00020E86 13 01e1 jbr L271
419 00020E89 L272:
420 00020E89 # fill_reg_buf( load_regs ); /* set reg values to load */
421 00020E89 dd 8f00000000 pushl $_load_regs
422 00020E8F fe 08 effffffcc6 callf $8,_fill_reg_buf
423 00020E96 # force_loop = FALSE; /* clear the LOOP flag */
424 00020E96 4d effffffcc0 clrl _force_loop
425 00020E9C # subtest = 3;
426 00020E9C 0d 03 effffffcb9 movl $3,_subtest
427 00020EA3 # index = 0;
428 00020EA3 4d effffffcb3 clrl _index
429 00020EA9 # do
430 00020EA9 L276:
431 00020EA9 # {
432 00020EA9 # sgl_ld_acc = expf_1_data[index].ld; /* get the operand */
433 00020EA9 0d effffffcad 50 movl _index,r0
434 00020EB0 48 03 50 50 shll $3,r0,r0
435 00020EB4 0d e000000000 effffffc9d movl _expf_1_data(r0),_sgl_ld_acc
436 00020EBF # sgl_expected = expf_1_data[index].exp; /* get expected results */
437 00020EBF 0d effffffc97 50 movl _index,r0
438 00020EC6 48 03 50 50 shll $3,r0,r0
439 00020ECA 0d e000000004 effffffc87 movl _expf_1_data+4(r0),_sgl_expected
440 00020ED5 # /*
441 00020ED5 # * If LOOP ON ERROR is set, this is the loop for this subtest.
442 00020ED5 # * The force loop flag is set after the first error.
443 00020ED5 # */
444 00020ED5 # asm("_expf_3_lp1:");
445 00020ED5 _expf_3_lp1:
446 00020ED5 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 (FP) */
447 00020ED5 ab 891fff effffffc7e loadr $0x1fff,_load_regs
448 00020EDE # asm("ldf _sgl_ld_acc"); /* load the accumulator */
449 00020EDE 06 effffffc78 ldf _sgl_ld_acc
450 00020EE4 # asm("expf"); /* get ACC.'s exponent */
451 00020EE4 55 expf
452 00020EE5 # asm("stf _sgl_st_acc"); /* store the result */
453 00020EE5 26 effffffc71 stf _sgl_st_acc
454 00020EEB # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
455 00020EEB bb 891fff effffffc68 storer $0x1fff,_store_regs
456 00020EF4 # if( force_loop )
457 00020EF4 5d effffffc62 tstl _force_loop
458 00020EFA 31 02 jeql L277
459 00020EFC # asm("brb _expf_3_lp1");; /* loop on the error */
460 00020EFC 11 d7 brb _expf_3_lp1
461 00020EFE L277:
462 00020EFE # /*
463 00020EFE # * end error loop
464 00020EFE # */
465 00020EFE # reg_no = 0;
466 00020EFE 4d effffffc58 clrl _reg_no
467 00020F04 # regs_ok = TRUE;
468 00020F04 0d 01 effffffc51 movl $1,_regs_ok
469 00020F0B # while( (reg_no < 13) && (regs_ok) ) /* check 1st 12 regs */
470 00020F0B L278:
471 00020F0B 1d effffffc4b 0d cmpl _reg_no,$13
472 00020F12 81 35 jgeq L279
473 00020F14 5d effffffc42 tstl _regs_ok
474 00020F1A 31 2d jeql L279
475 00020F1C # if( store_regs[ reg_no ] == load_regs[ reg_no ] )
476 00020F1C 0d effffffc3a 50 movl _reg_no,r0
477 00020F23 0d effffffc33 51 movl _reg_no,r1
478 00020F2A 1d 40effffffc2b cmpl _store_regs[r0],_load_regs[r1]
41effffffc25
479 00020F37 21 08 jneq L280
480 00020F39 # reg_no++;
481 00020F39 6d effffffc1d incl _reg_no
482 00020F3F # else
483 00020F3F 11 06 jbr L281
484 00020F41 L280:
485 00020F41 # regs_ok = FALSE;
486 00020F41 4d effffffc15 clrl _regs_ok
487 00020F47 L281:
488 00020F47 11 c2 jbr L278
489 00020F49 L279:
490 00020F49 # if( !regs_ok )
491 00020F49 5d effffffc0d tstl _regs_ok
492 00020F4F 31 03 13 00fc jneq L282
493 00020F54 # {
494 00020F54 # errcnt++; /* bump the error count */
495 00020F54 6d effffffc02 incl _errcnt
496 00020F5A # if ( prt_error )
497 00020F5A 5d effffffbfc tstl _prt_error
498 00020F60 21 03 13 00eb jeql L283
499 00020F65 # {
500 00020F65 # writes(" \n"); /* start a new print line */
501 00020F65 .data 1
502 00000b62 * L284:
503 00000b62 * 200A00 .ascii " \12\0"
504 00000b65 * .text
505 00020F65 dd 8f00000b62 pushl $L284
506 00020F6B fe 08 effffffbea callf $8,_writes
507 00020F72 # writes("cycle: ");
508 00020F72 .data 1
509 00000b65 * L285:
510 00000b65 * 6379636C653A2000 .ascii "cycle: \0"
511 00000b6d * .text
512 00020F72 dd 8f00000b65 pushl $L285
513 00020F78 fe 08 effffffbdd callf $8,_writes
514 00020F7F # writed( cycle );
515 00020F7F dd effffffbd7 pushl _cycle
516 00020F85 fe 08 effffffbd0 callf $8,_writed
517 00020F8C # writes(" EXPF test ");
518 00020F8C .data 1
519 00000b6d * L286:
520 00000b6d * 2020204558504620746573742 .ascii " EXPF test \0"
000
521 00000b7b * .text
522 00020F8C dd 8f00000b6d pushl $L286
523 00020F92 fe 08 effffffbc3 callf $8,_writes
524 00020F99 # writed( test_no );
525 00020F99 dd effffffbbd pushl _test_no
526 00020F9F fe 08 effffffbb6 callf $8,_writed
527 00020FA6 # writes(", subtest 3 - A REGISTER WAS MODIFIED\n"); {
528 00020FA6 .data 1
529 00000b7b * L287:
530 00000b7b * 2C20737562746573742033202 .ascii ", subtest 3 - A REGISTER WAS MODIFIED\12\0"
D204120524547495354455220
574153204D4F4449464945440
A00
531 00000ba2 * .text
532 00020FA6 dd 8f00000b7b pushl $L287
533 00020FAC fe 08 effffffba9 callf $8,_writes
534 00020FB3 # print_expf_data();
535 00020FB3 fe 04 ef0000051c callf $4,_print_expf_data
536 00020FBA # writec('\n');
537 00020FBA dd 0a pushl $10
538 00020FBC fe 08 effffffb99 callf $8,_writec
539 00020FC3 # writes("register ");
540 00020FC3 .data 1
541 00000ba2 * L288:
542 00000ba2 * 72656769737465722000 .ascii "register \0"
543 00000bac * .text
544 00020FC3 dd 8f00000ba2 pushl $L288
545 00020FC9 fe 08 effffffb8c callf $8,_writes
546 00020FD0 # writed( reg_no );
547 00020FD0 dd effffffb86 pushl _reg_no
548 00020FD6 fe 08 effffffb7f callf $8,_writed
549 00020FDD # writes(" = ");
550 00020FDD .data 1
551 00000bac * L289:
552 00000bac * 203D2000 .ascii " = \0"
553 00000bb0 * .text
554 00020FDD dd 8f00000bac pushl $L289
555 00020FE3 fe 08 effffffb72 callf $8,_writes
556 00020FEA # write32h( load_regs[reg_no] );
557 00020FEA 0d effffffb6c 50 movl _reg_no,r0
558 00020FF1 dd 40effffffb64 pushl _load_regs[r0]
559 00020FF8 fe 08 effffffb5d callf $8,_write32h
560 00020FFF # writes(", should be = ");
561 00020FFF .data 1
562 00000bb0 * L290:
563 00000bb0 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
564 00000bc0 * .text
565 00020FFF dd 8f00000bb0 pushl $L290
566 00021005 fe 08 effffffb50 callf $8,_writes
567 0002100C # write32h( store_regs[reg_no] );
568 0002100C 0d effffffb4a 50 movl _reg_no,r0
569 00021013 dd 40effffffb42 pushl _store_regs[r0]
570 0002101A fe 08 effffffb3b callf $8,_write32h
571 00021021 # writec('\n');
572 00021021 dd 0a pushl $10
573 00021023 fe 08 effffffb32 callf $8,_writec
574 0002102A # }
575 0002102A # if ( halt_flg ) /* halt on error? */
576 0002102A 5d effffffb2c tstl _halt_flg
577 00021030 31 09 jeql L291
578 00021032 # expf_er_halt( BAD_REG_HLT );
579 00021032 dd 02 pushl $2
580 00021034 fe 08 ef000004d7 callf $8,_expf_er_halt
581 0002103B # if ( loop_on_err )
582 0002103B L291:
583 0002103B 5d effffffb1b tstl _loop_on_err
584 00021041 31 0d jeql L292
585 00021043 # {
586 00021043 # force_loop = TRUE; /* get the force loop flag */
587 00021043 0d 01 effffffb12 movl $1,_force_loop
588 0002104A # asm("jmp _expf_3_lp1"); /* and loop */
589 0002104A 71 effffffe85 jmp _expf_3_lp1
590 00021050 # }
591 00021050 # } /* end of compare error */
592 00021050 L292:
593 00021050 # } /* end of while loop */
594 00021050 L283:
595 00021050 # } while( index++ < max_expf_1_index );
596 00021050 L282:
597 00021050 L275:
598 00021050 0d effffffb06 50 movl _index,r0
599 00021057 6d effffffaff incl _index
600 0002105D 1d 50 effffffaf8 cmpl r0,_max_expf_1_index
601 00021064 81 03 13 fe40 jlss L276
602 00021069 L274:
603 00021069 # } /* end of subtest 3 */
604 00021069 40 ret#2
605 0002106A .set L269,0x0
606 0002106A L271:
607 0002106A 13 fe1c jbr L272
608 0002106D .data
609 00000a60 * .text
610 0002106D 00 .align 1
611 0002106E .globl _expf_4
612 0002106E _expf_4:
613 0002106E 0000 .word L293
614 00021070 #
615 00021070 #
616 00021070 #
617 00021070 # /************************************************************************
618 00021070 # *
619 00021070 # * SUBTEST 4 - Check for PSL corruption
620 00021070 # *
621 00021070 # ************************************************************************/
622 00021070 # expf_4()
623 00021070 # {
624 00021070 13 01a8 jbr L295
625 00021073 L296:
626 00021073 # force_loop = FALSE; /* clear force_loop flg */
627 00021073 4d effffffae3 clrl _force_loop
628 00021079 # subtest = 4;
629 00021079 0d 04 effffffadc movl $4,_subtest
630 00021080 # fill_reg_buf( load_regs ); /* get patterns for regs */
631 00021080 dd 8f00000000 pushl $_load_regs
632 00021086 fe 08 effffffacf callf $8,_fill_reg_buf
633 0002108D # for( index = 0; index < 3; index++ ) {
634 0002108D 4d effffffac9 clrl _index
635 00021093 L299:
636 00021093 1d effffffac3 03 cmpl _index,$3
637 0002109A 91 03 13 017b jgeq L298
638 0002109F # sgl_ld_acc = expf_1_data[index].ld; /* get operand 1 */
639 0002109F 0d effffffab7 50 movl _index,r0
640 000210A6 48 03 50 50 shll $3,r0,r0
641 000210AA 0d e000000000 effffffaa7 movl _expf_1_data(r0),_sgl_ld_acc
642 000210B5 # sgl_expected = expf_1_data[index].exp; /* get expected */
643 000210B5 0d effffffaa1 50 movl _index,r0
644 000210BC 48 03 50 50 shll $3,r0,r0
645 000210C0 0d e000000004 effffffa91 movl _expf_1_data+4(r0),_sgl_expected
646 000210CB # sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */
647 000210CB 0d effffffa8b 50 movl _status_index,r0
648 000210D2 0d 40effffffa83 movl _status_array[r0],_sgl_dummy1
effffffa7e
649 000210DE # /*
650 000210DE # * If LOOP ON ERROR is set, this is the loop for this subtest.
651 000210DE # * The force loop flag is set after the first error.
652 000210DE # */
653 000210DE # asm("_expf_4_lp1:");
654 000210DE _expf_4_lp1:
655 000210DE # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
656 000210DE 06 effffffa78 ldf _sgl_ld_acc
657 000210E4 # asm("nop");
658 000210E4 10 nop
659 000210E5 # asm("tstl _sgl_dummy1"); /* set the PSL status */
660 000210E5 5d effffffa71 tstl _sgl_dummy1
661 000210EB # asm("movpsl _init_psl"); /* save the initial PSL */
662 000210EB cd effffffa6b movpsl _init_psl
663 000210F1 # asm("expf"); /* do the expf */
664 000210F1 55 expf
665 000210F2 # asm("nop");
666 000210F2 10 nop
667 000210F3 # asm("movpsl _psl_val"); /* save the final PSL */
668 000210F3 cd effffffa63 movpsl _psl_val
669 000210F9 # asm("stf _sgl_st_acc"); /* save the accumulator */
670 000210F9 26 effffffa5d stf _sgl_st_acc
671 000210FF # if( force_loop )
672 000210FF 5d effffffa57 tstl _force_loop
673 00021105 31 02 jeql L300
674 00021107 # asm("brb _expf_4_lp1");; /* loop on the error */
675 00021107 11 d5 brb _expf_4_lp1
676 00021109 L300:
677 00021109 # /*
678 00021109 # * Now compare the final PSL to the initial PSL -they should be the same
679 00021109 # */
680 00021109 # exp_psl = init_psl;
681 00021109 0d effffffa4d effffffa48 movl _init_psl,_exp_psl
682 00021114 # if( psl_val != exp_psl ) {
683 00021114 1d effffffa42 effffffa3d cmpl _psl_val,_exp_psl
684 0002111F 21 03 13 00ed jeql L301
685 00021124 # errcnt++; /* bump the error count */
686 00021124 6d effffffa32 incl _errcnt
687 0002112A # if( prt_error ) {
688 0002112A 5d effffffa2c tstl _prt_error
689 00021130 21 03 13 00b9 jeql L302
690 00021135 # writes(" \n"); /* start a new print line */
691 00021135 .data 1
692 00000bc0 * L303:
693 00000bc0 * 200A00 .ascii " \12\0"
694 00000bc3 * .text
695 00021135 dd 8f00000bc0 pushl $L303
696 0002113B fe 08 effffffa1a callf $8,_writes
697 00021142 # writes("cycle: ");
698 00021142 .data 1
699 00000bc3 * L304:
700 00000bc3 * 6379636C653A2000 .ascii "cycle: \0"
701 00000bcb * .text
702 00021142 dd 8f00000bc3 pushl $L304
703 00021148 fe 08 effffffa0d callf $8,_writes
704 0002114F # writed( cycle );
705 0002114F dd effffffa07 pushl _cycle
706 00021155 fe 08 effffffa00 callf $8,_writed
707 0002115C # writes(" EXPF test ");
708 0002115C .data 1
709 00000bcb * L305:
710 00000bcb * 2020204558504620746573742 .ascii " EXPF test \0"
000
711 00000bd9 * .text
712 0002115C dd 8f00000bcb pushl $L305
713 00021162 fe 08 effffff9f3 callf $8,_writes
714 00021169 # writed( test_no );
715 00021169 dd effffff9ed pushl _test_no
716 0002116F fe 08 effffff9e6 callf $8,_writed
717 00021176 # writes(", subtest 4 - INCORRECT FINAL PSL\n");
718 00021176 .data 1
719 00000bd9 * L306:
720 00000bd9 * 2C20737562746573742034202 .ascii ", subtest 4 - INCORRECT FINAL PSL\12\0"
D20494E434F52524543542046
494E414C2050534C0A00
721 00000bfc * .text
722 00021176 dd 8f00000bd9 pushl $L306
723 0002117C fe 08 effffff9d9 callf $8,_writes
724 00021183 # print_expf_data(); /* print the operands */
725 00021183 fe 04 ef0000034c callf $4,_print_expf_data
726 0002118A # writec('\n');
727 0002118A dd 0a pushl $10
728 0002118C fe 08 effffff9c9 callf $8,_writec
729 00021193 # writes("initial PSL = ");
730 00021193 .data 1
731 00000bfc * L307:
732 00000bfc * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
733 00000c0b * .text
734 00021193 dd 8f00000bfc pushl $L307
735 00021199 fe 08 effffff9bc callf $8,_writes
736 000211A0 # write32h( init_psl );
737 000211A0 dd effffff9b6 pushl _init_psl
738 000211A6 fe 08 effffff9af callf $8,_write32h
739 000211AD # writes(", final PSL = ");
740 000211AD .data 1
741 00000c0b * L308:
742 00000c0b * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
743 00000c1b * .text
744 000211AD dd 8f00000c0b pushl $L308
745 000211B3 fe 08 effffff9a2 callf $8,_writes
746 000211BA # write32h( psl_val );
747 000211BA dd effffff99c pushl _psl_val
748 000211C0 fe 08 effffff995 callf $8,_write32h
749 000211C7 # writes(", expected PSL = ");
750 000211C7 .data 1
751 00000c1b * L309:
752 00000c1b * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
753 00000c2e * .text
754 000211C7 dd 8f00000c1b pushl $L309
755 000211CD fe 08 effffff988 callf $8,_writes
756 000211D4 # write32h( exp_psl );
757 000211D4 dd effffff982 pushl _exp_psl
758 000211DA fe 08 effffff97b callf $8,_write32h
759 000211E1 # writes("\n");
760 000211E1 .data 1
761 00000c2e * L310:
762 00000c2e * 0A00 .ascii "\12\0"
763 00000c30 * .text
764 000211E1 dd 8f00000c2e pushl $L310
765 000211E7 fe 08 effffff96e callf $8,_writes
766 000211EE # }
767 000211EE # if( halt_flg )
768 000211EE L302:
769 000211EE 5d effffff968 tstl _halt_flg
770 000211F4 31 09 jeql L311
771 000211F6 # expf_er_halt( BAD_PSL_HLT ); /* halt on the error */
772 000211F6 dd 03 pushl $3
773 000211F8 fe 08 ef00000313 callf $8,_expf_er_halt
774 000211FF # if( loop_on_err ) {
775 000211FF L311:
776 000211FF 5d effffff957 tstl _loop_on_err
777 00021205 31 0a jeql L312
778 00021207 # force_loop = TRUE; /* set the force loop flag */
779 00021207 0d 01 effffff94e movl $1,_force_loop
780 0002120E # asm("brw _expf_4_lp1");; /* and loop on the error */
781 0002120E 13 fecd brw _expf_4_lp1
782 00021211 # } /* end of loop on error */
783 00021211 # } /* end of PSL corruption error */
784 00021211 L312:
785 00021211 # } /* end of WHILE loop */
786 00021211 L301:
787 00021211 L297:
788 00021211 6d effffff945 incl _index
789 00021217 13 fe79 jbr L299
790 0002121A L298:
791 0002121A # } /* end of subtest 4 */
792 0002121A 40 ret#2
793 0002121B .set L293,0x0
794 0002121B L295:
795 0002121B 13 fe55 jbr L296
796 0002121E .data
797 00000a60 * .text
798 0002121E .align 1
799 0002121E .globl _expf_5
800 0002121E _expf_5:
801 0002121E 0000 .word L313
802 00021220 #
803 00021220 #
804 00021220 #
805 00021220 # /************************************************************************
806 00021220 # *
807 00021220 # * SUBTEST 5 - pipelined entry test
808 00021220 # *
809 00021220 # ************************************************************************/
810 00021220 # expf_5()
811 00021220 # {
812 00021220 13 0154 jbr L315
813 00021223 L316:
814 00021223 # force_loop = FALSE;
815 00021223 4d effffff933 clrl _force_loop
816 00021229 # subtest = 8;
817 00021229 0d 08 effffff92c movl $8,_subtest
818 00021230 # for( index = 0; index < max_expf_1_index; index++ ) {
819 00021230 4d effffff926 clrl _index
820 00021236 L319:
821 00021236 1d effffff920 effffff91b cmpl _index,_max_expf_1_index
822 00021241 91 03 13 0130 jgeq L318
823 00021246 # sgl_ld_acc = expf_1_data[index].ld; /* get operand 1 */
824 00021246 0d effffff910 50 movl _index,r0
825 0002124D 48 03 50 50 shll $3,r0,r0
826 00021251 0d e000000000 effffff900 movl _expf_1_data(r0),_sgl_ld_acc
827 0002125C # sgl_expected = expf_1_data[index].exp; /* get expected result */
828 0002125C 0d effffff8fa 50 movl _index,r0
829 00021263 48 03 50 50 shll $3,r0,r0
830 00021267 0d e000000004 effffff8ea movl _expf_1_data+4(r0),_sgl_expected
831 00021272 # /*
832 00021272 # * If LOOP ON ERROR is set, this is the loop for this subtest.
833 00021272 # * The force loop flag is set after the first error.
834 00021272 # */
835 00021272 # asm("_expf_5_lp1:");
836 00021272 _expf_5_lp1:
837 00021272 # asm("movl $0,r0"); /* clear r0 */
838 00021272 0d 00 50 movl $0,r0
839 00021275 # asm("ldf r0"); /* load the Acc. with 0.0 */
840 00021275 06 50 ldf r0
841 00021277 # asm("addf _sgl_ld_acc"); /* add the 1st operand */
842 00021277 c6 effffff8df addf _sgl_ld_acc
843 0002127D # asm("expf"); /* get the expf */
844 0002127D 55 expf
845 0002127E # asm("stf _sgl_st_acc"); /* store the result */
846 0002127E 26 effffff8d8 stf _sgl_st_acc
847 00021284 # if( force_loop )
848 00021284 5d effffff8d2 tstl _force_loop
849 0002128A 31 02 jeql L320
850 0002128C # asm("brb _expf_5_lp1");; /* loop on the error */
851 0002128C 11 e4 brb _expf_5_lp1
852 0002128E L320:
853 0002128E # /*
854 0002128E # * end error loop - test the results
855 0002128E # */
856 0002128E # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
857 0002128E 1d effffff8c8 effffff8c3 cmpl _sgl_st_acc,_sgl_expected
858 00021299 21 03 13 00cf jeql L321
859 0002129E # errcnt++; /* bump the error count */
860 0002129E 6d effffff8b8 incl _errcnt
861 000212A4 # if( prt_error ) {
862 000212A4 5d effffff8b2 tstl _prt_error
863 000212AA 21 03 13 009b jeql L322
864 000212AF # writes(" \n"); /* start a new print line */
865 000212AF .data 1
866 00000c30 * L323:
867 00000c30 * 200A00 .ascii " \12\0"
868 00000c33 * .text
869 000212AF dd 8f00000c30 pushl $L323
870 000212B5 fe 08 effffff8a0 callf $8,_writes
871 000212BC # writes("cycle: ");
872 000212BC .data 1
873 00000c33 * L324:
874 00000c33 * 6379636C653A2000 .ascii "cycle: \0"
875 00000c3b * .text
876 000212BC dd 8f00000c33 pushl $L324
877 000212C2 fe 08 effffff893 callf $8,_writes
878 000212C9 # writed( cycle );
879 000212C9 dd effffff88d pushl _cycle
880 000212CF fe 08 effffff886 callf $8,_writed
881 000212D6 # writes(" EXPF test ");
882 000212D6 .data 1
883 00000c3b * L325:
884 00000c3b * 2020204558504620746573742 .ascii " EXPF test \0"
000
885 00000c49 * .text
886 000212D6 dd 8f00000c3b pushl $L325
887 000212DC fe 08 effffff879 callf $8,_writes
888 000212E3 # writed( test_no );
889 000212E3 dd effffff873 pushl _test_no
890 000212E9 fe 08 effffff86c callf $8,_writed
891 000212F0 # writes(", subtest 5 (Piped Entry) - BAD FINAL ACC\n");
892 000212F0 .data 1
893 00000c49 * L326:
894 00000c49 * 2C20737562746573742035202 .ascii ", subtest 5 (Piped Entry) - BAD FINAL ACC\12\0"
8506970656420456E74727929
202D204241442046494E414C2
04143430A00
895 00000c74 * .text
896 000212F0 dd 8f00000c49 pushl $L326
897 000212F6 fe 08 effffff85f callf $8,_writes
898 000212FD # print_expf_data();
899 000212FD fe 04 ef000001d2 callf $4,_print_expf_data
900 00021304 # writes(", data index = ");
901 00021304 .data 1
902 00000c74 * L327:
903 00000c74 * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
904 00000c85 * .text
905 00021304 dd 8f00000c74 pushl $L327
906 0002130A fe 08 effffff84b callf $8,_writes
907 00021311 # writed( index );
908 00021311 dd effffff845 pushl _index
909 00021317 fe 08 effffff83e callf $8,_writed
910 0002131E # writec('\n');
911 0002131E dd 0a pushl $10
912 00021320 fe 08 effffff835 callf $8,_writec
913 00021327 # writes(" Acc expected = ");
914 00021327 .data 1
915 00000c85 * L328:
916 00000c85 * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020416363
206578706563746564203D200
0
917 00000cab * .text
918 00021327 dd 8f00000c85 pushl $L328
919 0002132D fe 08 effffff828 callf $8,_writes
920 00021334 # write32h( sgl_expected );
921 00021334 dd effffff822 pushl _sgl_expected
922 0002133A fe 08 effffff81b callf $8,_write32h
923 00021341 # writec('\n');
924 00021341 dd 0a pushl $10
925 00021343 fe 08 effffff812 callf $8,_writec
926 0002134A # }
927 0002134A # if( halt_flg )
928 0002134A L322:
929 0002134A 5d effffff80c tstl _halt_flg
930 00021350 31 09 jeql L329
931 00021352 # expf_er_halt( BAD_ACC_HLT ); /* halt on the error */
932 00021352 dd 01 pushl $1
933 00021354 fe 08 ef000001b7 callf $8,_expf_er_halt
934 0002135B # if( loop_on_err ) {
935 0002135B L329:
936 0002135B 5d effffff7fb tstl _loop_on_err
937 00021361 31 0a jeql L330
938 00021363 # force_loop = TRUE; /* set the force loop flag */
939 00021363 0d 01 effffff7f2 movl $1,_force_loop
940 0002136A # asm("brw _expf_5_lp1");; /* and loop on the error */
941 0002136A 13 ff05 brw _expf_5_lp1
942 0002136D # } /* end of loop on error */
943 0002136D # } /* end of compare error */
944 0002136D L330:
945 0002136D # } /* end of WHILE loop */
946 0002136D L321:
947 0002136D L317:
948 0002136D 6d effffff7e9 incl _index
949 00021373 13 fec0 jbr L319
950 00021376 L318:
951 00021376 # } /* end of subtest 5 */
952 00021376 40 ret#2
953 00021377 .set L313,0x0
954 00021377 L315:
955 00021377 13 fea9 jbr L316
956 0002137A .data
957 00000a60 * .text
958 0002137A .align 1
959 0002137A .globl _expf_6
960 0002137A _expf_6:
961 0002137A 0000 .word L331
962 0002137C #
963 0002137C #
964 0002137C #
965 0002137C # /************************************************************************
966 0002137C # *
967 0002137C # * SUBTEST 6 - pipelined exit test
968 0002137C # *
969 0002137C # ************************************************************************/
970 0002137C # expf_6()
971 0002137C # {
972 0002137C 13 0154 jbr L333
973 0002137F L334:
974 0002137F # force_loop = FALSE;
975 0002137F 4d effffff7d7 clrl _force_loop
976 00021385 # subtest = 8;
977 00021385 0d 08 effffff7d0 movl $8,_subtest
978 0002138C # for( index = 0; index < max_expf_1_index; index++ ) {
979 0002138C 4d effffff7ca clrl _index
980 00021392 L337:
981 00021392 1d effffff7c4 effffff7bf cmpl _index,_max_expf_1_index
982 0002139D 91 03 13 0130 jgeq L336
983 000213A2 # sgl_ld_acc = expf_1_data[index].ld; /* get operand 1 */
984 000213A2 0d effffff7b4 50 movl _index,r0
985 000213A9 48 03 50 50 shll $3,r0,r0
986 000213AD 0d e000000000 effffff7a4 movl _expf_1_data(r0),_sgl_ld_acc
987 000213B8 # sgl_expected = expf_1_data[index].exp; /* get expected result */
988 000213B8 0d effffff79e 50 movl _index,r0
989 000213BF 48 03 50 50 shll $3,r0,r0
990 000213C3 0d e000000004 effffff78e movl _expf_1_data+4(r0),_sgl_expected
991 000213CE # /*
992 000213CE # * If LOOP ON ERROR is set, this is the loop for this subtest.
993 000213CE # * The force loop flag is set after the first error.
994 000213CE # */
995 000213CE # asm("_expf_6_lp1:");
996 000213CE _expf_6_lp1:
997 000213CE # asm("movl $0,r0"); /* clear r0 */
998 000213CE 0d 00 50 movl $0,r0
999 000213D1 # asm("ldf _sgl_ld_acc"); /* load the Acc. */
1000 000213D1 06 effffff785 ldf _sgl_ld_acc
1001 000213D7 # asm("expf"); /* get the expf */
1002 000213D7 55 expf
1003 000213D8 # asm("addf r0"); /* add a zero to the acc */
1004 000213D8 c6 50 addf r0
1005 000213DA # asm("stf _sgl_st_acc"); /* store the result */
1006 000213DA 26 effffff77c stf _sgl_st_acc
1007 000213E0 # if( force_loop )
1008 000213E0 5d effffff776 tstl _force_loop
1009 000213E6 31 02 jeql L338
1010 000213E8 # asm("brb _expf_6_lp1");; /* loop on the error */
1011 000213E8 11 e4 brb _expf_6_lp1
1012 000213EA L338:
1013 000213EA # /*
1014 000213EA # * end error loop - test the results
1015 000213EA # */
1016 000213EA # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1017 000213EA 1d effffff76c effffff767 cmpl _sgl_st_acc,_sgl_expected
1018 000213F5 21 03 13 00cf jeql L339
1019 000213FA # errcnt++; /* bump the error count */
1020 000213FA 6d effffff75c incl _errcnt
1021 00021400 # if( prt_error ) {
1022 00021400 5d effffff756 tstl _prt_error
1023 00021406 21 03 13 009b jeql L340
1024 0002140B # writes(" \n"); /* start a new print line */
1025 0002140B .data 1
1026 00000cab * L341:
1027 00000cab * 200A00 .ascii " \12\0"
1028 00000cae * .text
1029 0002140B dd 8f00000cab pushl $L341
1030 00021411 fe 08 effffff744 callf $8,_writes
1031 00021418 # writes("cycle: ");
1032 00021418 .data 1
1033 00000cae * L342:
1034 00000cae * 6379636C653A2000 .ascii "cycle: \0"
1035 00000cb6 * .text
1036 00021418 dd 8f00000cae pushl $L342
1037 0002141E fe 08 effffff737 callf $8,_writes
1038 00021425 # writed( cycle );
1039 00021425 dd effffff731 pushl _cycle
1040 0002142B fe 08 effffff72a callf $8,_writed
1041 00021432 # writes(" EXPF test ");
1042 00021432 .data 1
1043 00000cb6 * L343:
1044 00000cb6 * 2020204558504620746573742 .ascii " EXPF test \0"
000
1045 00000cc4 * .text
1046 00021432 dd 8f00000cb6 pushl $L343
1047 00021438 fe 08 effffff71d callf $8,_writes
1048 0002143F # writed( test_no );
1049 0002143F dd effffff717 pushl _test_no
1050 00021445 fe 08 effffff710 callf $8,_writed
1051 0002144C # writes(", subtest 6 (Piped Exit) - BAD FINAL ACC\n");
1052 0002144C .data 1
1053 00000cc4 * L344:
1054 00000cc4 * 2C20737562746573742036202 .ascii ", subtest 6 (Piped Exit) - BAD FINAL ACC\12\0"
8506970656420457869742920
2D204241442046494E414C204
143430A00
1055 00000cee * .text
1056 0002144C dd 8f00000cc4 pushl $L344
1057 00021452 fe 08 effffff703 callf $8,_writes
1058 00021459 # print_expf_data();
1059 00021459 fe 04 ef00000076 callf $4,_print_expf_data
1060 00021460 # writes(", data index = ");
1061 00021460 .data 1
1062 00000cee * L345:
1063 00000cee * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
1064 00000cff * .text
1065 00021460 dd 8f00000cee pushl $L345
1066 00021466 fe 08 effffff6ef callf $8,_writes
1067 0002146D # writed( index );
1068 0002146D dd effffff6e9 pushl _index
1069 00021473 fe 08 effffff6e2 callf $8,_writed
1070 0002147A # writec('\n');
1071 0002147A dd 0a pushl $10
1072 0002147C fe 08 effffff6d9 callf $8,_writec
1073 00021483 # writes(" Acc expected = ");
1074 00021483 .data 1
1075 00000cff * L346:
1076 00000cff * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020416363
206578706563746564203D200
0
1077 00000d25 * .text
1078 00021483 dd 8f00000cff pushl $L346
1079 00021489 fe 08 effffff6cc callf $8,_writes
1080 00021490 # write32h( sgl_expected );
1081 00021490 dd effffff6c6 pushl _sgl_expected
1082 00021496 fe 08 effffff6bf callf $8,_write32h
1083 0002149D # writec('\n');
1084 0002149D dd 0a pushl $10
1085 0002149F fe 08 effffff6b6 callf $8,_writec
1086 000214A6 # }
1087 000214A6 # if( halt_flg )
1088 000214A6 L340:
1089 000214A6 5d effffff6b0 tstl _halt_flg
1090 000214AC 31 09 jeql L347
1091 000214AE # expf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1092 000214AE dd 01 pushl $1
1093 000214B0 fe 08 ef0000005b callf $8,_expf_er_halt
1094 000214B7 # if( loop_on_err ) {
1095 000214B7 L347:
1096 000214B7 5d effffff69f tstl _loop_on_err
1097 000214BD 31 0a jeql L348
1098 000214BF # force_loop = TRUE; /* set the force loop flag */
1099 000214BF 0d 01 effffff696 movl $1,_force_loop
1100 000214C6 # asm("brw _expf_6_lp1");; /* and loop on the error */
1101 000214C6 13 ff05 brw _expf_6_lp1
1102 000214C9 # } /* end of loop on error */
1103 000214C9 # } /* end of compare error */
1104 000214C9 L348:
1105 000214C9 # } /* end of WHILE loop */
1106 000214C9 L339:
1107 000214C9 L335:
1108 000214C9 6d effffff68d incl _index
1109 000214CF 13 fec0 jbr L337
1110 000214D2 L336:
1111 000214D2 # } /* end of subtest 6 */
1112 000214D2 40 ret#2
1113 000214D3 .set L331,0x0
1114 000214D3 L333:
1115 000214D3 13 fea9 jbr L334
1116 000214D6 .data
1117 00000a60 * .text
1118 000214D6 .align 1
1119 000214D6 .globl _print_expf_data
1120 000214D6 _print_expf_data:
1121 000214D6 0000 .word L349
1122 000214D8 #
1123 000214D8 #
1124 000214D8 #
1125 000214D8 # /**************************************************************************
1126 000214D8 # *
1127 000214D8 # * PRINT THE DATA AND STORE RESULTS
1128 000214D8 # *
1129 000214D8 # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx
1130 000214D8 # * Acc expected = xxxxxxxx
1131 000214D8 # **************************************************************************/
1132 000214D8 # print_expf_data()
1133 000214D8 # {
1134 000214D8 11 35 jbr L351
1135 000214DA L352:
1136 000214DA # writes("initial Acc = ");
1137 000214DA .data 1
1138 00000d25 * L353:
1139 00000d25 * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
1140 00000d34 * .text
1141 000214DA dd 8f00000d25 pushl $L353
1142 000214E0 fe 08 effffff675 callf $8,_writes
1143 000214E7 # write32h( sgl_ld_acc );
1144 000214E7 dd effffff66f pushl _sgl_ld_acc
1145 000214ED fe 08 effffff668 callf $8,_write32h
1146 000214F4 # writes(", final Acc = ");
1147 000214F4 .data 1
1148 00000d34 * L354:
1149 00000d34 * 2C202066696E616C204163632 .ascii ", final Acc = \0"
03D2000
1150 00000d44 * .text
1151 000214F4 dd 8f00000d34 pushl $L354
1152 000214FA fe 08 effffff65b callf $8,_writes
1153 00021501 # write32h( sgl_st_acc );
1154 00021501 dd effffff655 pushl _sgl_st_acc
1155 00021507 fe 08 effffff64e callf $8,_write32h
1156 0002150E # }
1157 0002150E 40 ret#2
1158 0002150F .set L349,0x0
1159 0002150F L351:
1160 0002150F 11 c9 jbr L352
1161 00021511 .data
1162 00000a60 * .text
1163 00021511 00 .align 1
1164 00021512 .globl _expf_er_halt
1165 00021512 _expf_er_halt:
1166 00021512 0000 .word L355
1167 00021514 #
1168 00021514 #
1169 00021514 #
1170 00021514 # /**************************************************************************
1171 00021514 # *
1172 00021514 # * HALT ON ERROR ROUTINE
1173 00021514 # *
1174 00021514 # **************************************************************************/
1175 00021514 # expf_er_halt( halt_code )
1176 00021514 # int halt_code;
1177 00021514 # {
1178 00021514 13 00a0 jbr L357
1179 00021517 L358:
1180 00021517 # sgl_dummy1 = halt_code; /* get the error type */
1181 00021517 0d ad04 effffff63d movl 4(fp),_sgl_dummy1
1182 0002151F # asm("movl _test_no,r0"); /* r0 = test number */
1183 0002151F 0d effffff637 50 movl _test_no,r0
1184 00021526 # asm("movl _subtest,r1"); /* r1 = subtest number */
1185 00021526 0d effffff630 51 movl _subtest,r1
1186 0002152D # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1187 0002152D 0d effffff629 52 movl _sgl_dummy1,r2
1188 00021534 # asm("movl _cycle,r3"); /* r3 = cycle count */
1189 00021534 0d effffff622 53 movl _cycle,r3
1190 0002153B # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1191 0002153B 0d effffff61b 54 movl _sgl_ld_acc,r4
1192 00021542 # asm("movl _sgl_st_acc,r5"); /* r5 = data stored */
1193 00021542 0d effffff614 55 movl _sgl_st_acc,r5
1194 00021549 # asm("movl _sgl_expected,r6"); /* r6 = data expected */
1195 00021549 0d effffff60d 56 movl _sgl_expected,r6
1196 00021550 # asm("movl _index,r7"); /* r7 = data index */
1197 00021550 0d effffff606 57 movl _index,r7
1198 00021557 # if( halt_code == BAD_REG_HLT ) {
1199 00021557 1d ad04 02 cmpl 4(fp),$2
1200 0002155B 21 3d jneq L359
1201 0002155D # sgl_dummy1 = load_regs[index2];
1202 0002155D 0d effffff5f9 50 movl _index2,r0
1203 00021564 0d 40effffff5f1 movl _load_regs[r0],_sgl_dummy1
effffff5ec
1204 00021570 # sgl_dummy2 = store_regs[index2];
1205 00021570 0d effffff5e6 50 movl _index2,r0
1206 00021577 0d 40effffff5de movl _store_regs[r0],_sgl_dummy2
effffff5d9
1207 00021583 # asm("movl _index2,r6"); /* r6 = bad register # */
1208 00021583 0d effffff5d3 56 movl _index2,r6
1209 0002158A # asm("movl _sgl_dummy2,r7"); /* r7 = actual value */
1210 0002158A 0d effffff5cc 57 movl _sgl_dummy2,r7
1211 00021591 # asm("movl _sgl_dummy1,r8"); /* r8 = expected value */
1212 00021591 0d effffff5c5 58 movl _sgl_dummy1,r8
1213 00021598 # } else
1214 00021598 11 1b jbr L360
1215 0002159A L359:
1216 0002159A # if( halt_code == BAD_PSL_HLT ) {
1217 0002159A 1d ad04 03 cmpl 4(fp),$3
1218 0002159E 21 15 jneq L361
1219 000215A0 # asm("movl _init_psl,r6"); /* r6 = initial PSL */
1220 000215A0 0d effffff5b6 56 movl _init_psl,r6
1221 000215A7 # asm("movl _psl_val,r7"); /* r7 = final PSL */
1222 000215A7 0d effffff5af 57 movl _psl_val,r7
1223 000215AE # asm("movl _exp_psl,r8"); /* r8 = expected PSL */
1224 000215AE 0d effffff5a8 58 movl _exp_psl,r8
1225 000215B5 # };
1226 000215B5 L361:
1227 000215B5 L360:
1228 000215B5 # asm("halt"); /* HALT ... */
1229 000215B5 00 halt
1230 000215B6 # }
1231 000215B6 40 ret#2
1232 000215B7 .set L355,0x0
1233 000215B7 L357:
1234 000215B7 13 ff5d jbr L358
1235 000215BA .data
1235 00042116 .data
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