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Return to ldf_stf.c CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
Power 6/32 Unix version 1.21
#include "fpp_defs.h"
/*****************************************************************************
*
* LDF_STF - SINGLE PRECISION FLOATING POINT LOAD_STORE TEST
*
*****************************************************************************/
ldf()
{
asm(".globl _ldf_t");
asm("_ldf_t:"); /* entry address */
if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st cycle */
writes(" LDF_STF");
ldf_1(); /* load through a register */
ldf_2(); /* load through the cache */
ldf_3(); /* register stability ldf */
ldf_4(); /* register stability stf */
ldf_5(); /* PSL stability test -LDF */
ldf_6(); /* PSL stability test -STF */
ldf_7(); /* pipelined entry test */
asm("jmp *return"); /* return to the test monitor */
}
/************************************************************************
*
* SUBTEST 1 - load through a register
*
************************************************************************/
ldf_1()
{
force_loop = FALSE;
subtest = 1;
for( index = 0; index < max_ldf_1_index; index++ ) {
sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
sgl_expected = ldf_1_data[index].exp; /* get expected result */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_1_lp1:");
asm("movl _sgl_ld_acc,r4"); /* get the value to load */
asm("ldf r4"); /* load the value */
asm("nop");
asm("stf r5"); /* store the result in R5 */
if( force_loop )
asm("brb _ldf_1_lp1");; /* loop on the error */
/*
* end error loop - test the results
*/
asm("movl r5,_sgl_st_acc"); /* move R5 data to cache */
if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" (Reg. Data) - BAD FINAL ACC\n");
print_ldf_data();
writes(", data index = ");
writed( index );
writec('\n');
writes(" Acc expected = ");
write32h( sgl_expected );
writec('\n');
}
if( halt_flg )
ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_1_lp1");; /* and loop on the error */
} /* end of loop on error */
} /* end of compare error */
} /* end of WHILE loop */
} /* end of subtest 1 */
/************************************************************************
*
* SUBTEST 2 - load through memory
*
************************************************************************/
ldf_2()
{
force_loop = FALSE;
subtest = 2;
for( index = 0; index < max_ldf_1_index; index++ ) {
sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
sgl_expected = ldf_1_data[index].exp; /* get expected result */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_2_lp1:");
asm("ldf _sgl_ld_acc"); /* load the value */
asm("nop");
asm("stf _sgl_st_acc"); /* store the result */
if( force_loop )
asm("brb _ldf_2_lp1");; /* loop on the error */
/*
* end error loop - test the results
*/
if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" (Cache Data) - BAD FINAL ACC\n");
print_ldf_data();
writes(", data index = ");
writed( index );
writec('\n');
writes(" Acc expected = ");
write32h( sgl_expected );
writec('\n');
}
if( halt_flg )
ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_2_lp1");; /* and loop on the error */
} /* end of loop on error */
} /* end of compare error */
} /* end of WHILE loop */
} /* end of subtest 2 */
/************************************************************************
*
* SUBTEST 3 - Check for register corruption (ldf)
*
************************************************************************/
ldf_3()
{
force_loop = FALSE; /* clear force_loop flg */
subtest = 3;
fill_reg_buf( load_regs ); /* get patterns for regs */
index = 0;
sgl_ld_acc = ldf_1_data[0].ld; /* get value to load */
sgl_expected = ldf_1_data[0].exp; /* get expected result */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_3_lp1:");
asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
asm("nop");
asm("ldf _sgl_ld_acc"); /* load the accumulator */
asm("nop");
asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
asm("nop");
asm("stf _sgl_st_acc"); /* save the accumulator */
if( force_loop )
asm("brb _ldf_3_lp1");; /* loop on the error */
/*
* Now compare the stored register values to those that were loaded
*/
index2 = 0;
while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
index2++; /* check reg values */
if( index2 < 13 ) { /* error if index2 < 13 */
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" - A REGISTER WAS MODIFIED\n");
print_ldf_data();
writes("register "); /* print the information */
writed( index2 ); /* about the corrupted */
writes(" = "); /* register */
write32h( store_regs[index2] );
writes(", should be = ");
write32h( load_regs[index2] );
writes("\n");
}
if( halt_flg )
ldf_er_halt( BAD_REG_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_3_lp1"); /* and loop on the error */
} /* end of loop on error */
} /* end of register corruption error */
} /* end of subtest 3 */
/************************************************************************
*
* SUBTEST 4 - Check for register corruption (stf)
*
************************************************************************/
ldf_4()
{
force_loop = FALSE; /* clear force_loop flg */
subtest = 4;
fill_reg_buf( load_regs ); /* get patterns for regs */
index = 0;
sgl_ld_acc = ldf_1_data[0].ld; /* get value to store */
sgl_expected = ldf_1_data[0].exp; /* get expected result */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_4_lp1:");
asm("ldf _sgl_ld_acc"); /* load the accumulator */
asm("nop");
asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
asm("nop");
asm("stf _sgl_st_acc"); /* save the accumulator */
asm("nop");
asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
if( force_loop )
asm("brb _ldf_4_lp1");; /* loop on the error */
/*
* Now compare the stored register values to those that were loaded
*/
index2 = 0;
while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
index2++; /* check reg values */
if( index2 < 13 ) { /* error if index2 < 13 */
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" - A REGISTER WAS MODIFIED\n");
print_ldf_data();
writes("register "); /* print the information */
writed( index2 ); /* about the corrupted */
writes(" = "); /* register */
write32h( store_regs[index2] );
writes(", should be = ");
write32h( load_regs[index2] );
writes("\n");
}
if( halt_flg )
ldf_er_halt( BAD_REG_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_4_lp1"); /* and loop on the error */
} /* end of loop on error */
} /* end of register corruption error */
} /* end of subtest 4 */
/************************************************************************
*
* SUBTEST 5 - Check for PSL corruption (ldf)
*
************************************************************************/
ldf_5()
{
force_loop = FALSE; /* clear force_loop flg */
subtest = 5;
for( index = 0; index < 3; index++ ) {
sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
sgl_expected = ldf_1_data[index].exp; /* get expected */
sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_5_lp1:");
asm("tstl _sgl_dummy1"); /* set the PSL status */
asm("movpsl _init_psl"); /* save the initial PSL */
asm("nop");
asm("ldf _sgl_ld_acc"); /* load the accumulator */
asm("nop");
asm("movpsl _psl_val"); /* save the final PSL */
asm("nop");
asm("stf _sgl_st_acc"); /* save the accumulator */
if( force_loop )
asm("brb _ldf_5_lp1");; /* loop on the error */
/*
* Now compare the final PSL to the initial PSL -they should be the same
*/
if( psl_val != init_psl ) {
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" - INCORRECT FINAL PSL\n");
print_ldf_data();
writes("initial PSL = ");
write32h( init_psl );
writes(", final PSL = ");
write32h( psl_val );
writes(", expected PSL = ");
write32h( exp_psl );
writes("\n");
}
if( halt_flg )
ldf_er_halt( BAD_PSL_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_5_lp1");; /* and loop on the error */
} /* end of loop on error */
} /* end of PSL corruption error */
} /* end of WHILE loop */
} /* end of subtest 5 */
/************************************************************************
*
* SUBTEST 6 - Check for PSL corruption (stf)
*
************************************************************************/
ldf_6()
{
force_loop = FALSE;
index = 0; /* clear the data index */
status_index = 0; /* clear the status index */
do {
sgl_ld_acc = ldf_1_data[index].ld; /* get the dbl operand */
sgl_dummy1 = status_array[status_index]; /* array = +, -, 0 */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_6_lp1:");
asm("ldf _sgl_ld_acc"); /* load the operand */
asm("tstl _sgl_dummy1"); /* generate initial status */
asm("movpsl _init_psl"); /* save the initial status */
asm("stf _sgl_st_acc"); /* save the accumulator */
asm("movpsl _psl_val"); /* save the final status */
if( force_loop ) /* loop? */
asm("jmp _ldf_6_lp1");; /* run the loop again */
exp_psl = init_psl; /* get the initial PSL */
exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
sgl_dummy2 = sgl_ld_acc; /* get the operand */
sgl_dummy2 &= 0xff800000; /* clear the fraction part */
if( !sgl_dummy2 )
exp_psl |= PSL_Z; /* expect the ZERO bit set */
if( sgl_dummy2 < 0 )
exp_psl |= PSL_N; /* expect the NEG bit set */
if( psl_val != exp_psl ) { /* COMPARE the values */
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" - INCORRECT FINAL PSL\n");
print_ldf_data();
writes("initial PSL = ");
write32h( init_psl );
writes(", final PSL = ");
write32h( psl_val );
writes(", expected PSL = ");
write32h( exp_psl );
writes("\n");
}
if( halt_flg )
ldf_er_halt( BAD_PSL_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_6_lp1");; /* and loop */
}; /* end of loop-on-error */
} /* end of compare error */
if( ++status_index >= 3 )
status_index = 0; /* reset the status index */
} while( index++ < max_ldf_1_index );
} /* end of subtest 6 */
/************************************************************************
*
* SUBTEST 7 - pipelined entry test (ldf)
*
************************************************************************/
ldf_7()
{
force_loop = FALSE;
subtest = 7;
for( index = 0; index < max_ldf_1_index; index++ ) {
sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
sgl_expected = ldf_1_data[index].exp; /* get expected result */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_7_lp1:");
asm("movl $0,r0"); /* clear r0 */
asm("ldf r0"); /* load the Acc. with 0.0 */
asm("ldf _sgl_ld_acc"); /* load the value */
asm("nop");
asm("stf _sgl_st_acc"); /* store the result */
if( force_loop )
asm("brb _ldf_7_lp1");; /* loop on the error */
/*
* end error loop - test the results
*/
if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" (Piped Entry) - BAD FINAL ACC\n");
print_ldf_data();
writes(", data index = ");
writed( index );
writec('\n');
writes(" Acc expected = ");
write32h( sgl_expected );
writec('\n');
}
if( halt_flg )
ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_7_lp1");; /* and loop on the error */
} /* end of loop on error */
} /* end of compare error */
} /* end of WHILE loop */
} /* end of subtest 7 */
/************************************************************************
*
* SUBTEST 8 - pipelined entry test (stf)
*
************************************************************************/
ldf_8()
{
force_loop = FALSE;
subtest = 8;
for( index = 0; index < max_ldf_1_index; index++ ) {
sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
sgl_expected = ldf_1_data[index].exp; /* get expected result */
/*
* If LOOP ON ERROR is set, this is the loop for this subtest.
* The force loop flag is set after the first error.
*/
asm("_ldf_8_lp1:");
asm("ldf _sgl_ld_acc"); /* load the value */
asm("stf _sgl_st_acc"); /* store the result */
if( force_loop )
asm("brb _ldf_8_lp1");; /* loop on the error */
/*
* end error loop - test the results
*/
if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
errcnt++; /* bump the error count */
if( prt_error ) {
print_ldf_er_hdr();
writes(" (Piped Exit) - BAD FINAL ACC\n");
print_ldf_data();
writes(", data index = ");
writed( index );
writec('\n');
writes(" Acc expected = ");
write32h( sgl_expected );
writec('\n');
}
if( halt_flg )
ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
if( loop_on_err ) {
force_loop = TRUE; /* set the force loop flag */
asm("brw _ldf_8_lp1");; /* and loop on the error */
} /* end of loop on error */
} /* end of compare error */
} /* end of WHILE loop */
} /* end of subtest 8 */
/**************************************************************************
*
* PRINT THE ERROR MESSAGE HEADER
*
**************************************************************************/
print_ldf_er_hdr()
{
writes(" \n"); /* start a new print line */
writes("cycle: "); /* print the cycle count */
writed( cycle );
writes(" LDF_STF "); /* print test name header */
writes("test "); /* print the test number */
writed( test_no );
writes(", subtest "); /* print subtest number */
writed( subtest );
}
/**************************************************************************
*
* PRINT THE DATA AND STORE RESULTS
*
* Acc loaded = xxxxxxxx, Acc stored = xxxxxxxx, data index = xx
* Acc expected = xxxxxxxx
**************************************************************************/
print_ldf_data()
{
writes(" Acc loaded = ");
write32h( sgl_ld_acc );
writes(", Acc stored = ");
write32h( sgl_st_acc );
}
/**************************************************************************
*
* HALT ON ERROR ROUTINE
*
**************************************************************************/
ldf_er_halt( halt_code )
int halt_code;
{
sgl_dummy1 = halt_code; /* get the error type */
asm("movl _test_no,r0"); /* r0 = test number */
asm("movl _subtest,r1"); /* r1 = subtest number */
asm("movl _sgl_dummy1,r2"); /* r2 = error code */
asm("movl _cycle,r3"); /* r3 = cycle count */
asm("movl _sgl_ld_acc,r4"); /* r4 = data loaded */
asm("movl _sgl_st_acc,r5"); /* r5 = data stored */
if( halt_code == BAD_ACC_HLT ) {
asm("movl _sgl_expected,r6"); /* r6 = data expected */
asm("movl _index,r7"); /* r7 = data index */
} else
if( halt_code == BAD_REG_HLT ) {
sgl_dummy1 = load_regs[index2];
sgl_dummy2 = store_regs[index2];
asm("movl _index2,r6"); /* r6 = bad register # */
asm("movl _sgl_dummy2,r7"); /* r7 = final reg value */
asm("movl _sgl_dummy1,r8"); /* r8 = expected value */
} else
if( halt_code == BAD_PSL_HLT ) {
asm("movl _init_psl,r6"); /* r6 = initial PSL */
asm("movl _psl_val,r7"); /* r7 = final PSL */
asm("movl _exp_psl,r8"); /* r8 = expected PSL */
};
asm("halt"); /* HALT ... */
}
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