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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to ldf_stf.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 00000be8 * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _ldf
6: 6 00000000 _ldf:
7: 7 0000CA44 0000 .word L215
8: 8 0000CA46 # #include "fpp_defs.h"
9: 9 0000CA46 #
10: 10 0000CA46 #
11: 11 0000CA46 # /*****************************************************************************
12: 12 0000CA46 # *
13: 13 0000CA46 # * LDF_STF - SINGLE PRECISION FLOATING POINT LOAD_STORE TEST
14: 14 0000CA46 # *
15: 15 0000CA46 # *****************************************************************************/
16: 16 0000CA46 # ldf()
17: 17 0000CA46 # {
18: 18 0000CA46 11 56 jbr L217
19: 19 0000CA48 L218:
20: 20 0000CA48 # asm(".globl _ldf_t");
21: 21 0000CA48 .globl _ldf_t
22: 22 0000CA48 # asm("_ldf_t:"); /* entry address */
23: 23 0000CA48 _ldf_t:
24: 24 0000CA48 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st cycle */
25: 25 0000CA48 1d effffffff6 01 cmpl _cycle,$1
26: 26 0000CA4F 21 15 jneq L219
27: 27 0000CA51 5d efffffffed tstl _prt_hdrs
28: 28 0000CA57 31 0d jeql L219
29: 29 0000CA59 # writes(" LDF_STF");
30: 30 0000CA59 .data 1
31: 31 00000be8 * L221:
32: 32 00000be8 * 204C44465F53544600 .ascii " LDF_STF\0"
33: 33 00000bf1 * .text
34: 34 0000CA59 dd 8f00000be8 pushl $L221
35: 35 0000CA5F fe 08 efffffffde callf $8,_writes
36: 36 0000CA66 # ldf_1(); /* load through a register */
37: 37 0000CA66 L219:
38: 38 0000CA66 fe 04 ef00000033 callf $4,_ldf_1
39: 39 0000CA6D # ldf_2(); /* load through the cache */
40: 40 0000CA6D fe 04 ef0000014c callf $4,_ldf_2
41: 41 0000CA74 # ldf_3(); /* register stability ldf */
42: 42 0000CA74 fe 04 ef0000025f callf $4,_ldf_3
43: 43 0000CA7B # ldf_4(); /* register stability stf */
44: 44 0000CA7B fe 04 ef000003bc callf $4,_ldf_4
45: 45 0000CA82 # ldf_5(); /* PSL stability test -LDF */
46: 46 0000CA82 fe 04 ef00000519 callf $4,_ldf_5
47: 47 0000CA89 # ldf_6(); /* PSL stability test -STF */
48: 48 0000CA89 fe 04 ef00000664 callf $4,_ldf_6
49: 49 0000CA90 # ldf_7(); /* pipelined entry test */
50: 50 0000CA90 fe 04 ef000007fd callf $4,_ldf_7
51: 51 0000CA97 # asm("jmp *return"); /* return to the test monitor */
52: 52 0000CA97 71 ffffffffa7 jmp *return
53: 53 0000CA9D # }
54: 54 0000CA9D 40 ret#2
55: 55 0000CA9E .set L215,0x0
56: 56 0000CA9E L217:
57: 57 0000CA9E 11 a8 jbr L218
58: 58 0000CAA0 .data
59: 59 00000be8 * .text
60: 60 0000CAA0 .align 1
61: 61 0000CAA0 .globl _ldf_1
62: 62 0000CAA0 _ldf_1:
63: 63 0000CAA0 0000 .word L229
64: 64 0000CAA2 #
65: 65 0000CAA2 #
66: 66 0000CAA2 # /************************************************************************
67: 67 0000CAA2 # *
68: 68 0000CAA2 # * SUBTEST 1 - load through a register
69: 69 0000CAA2 # *
70: 70 0000CAA2 # ************************************************************************/
71: 71 0000CAA2 # ldf_1()
72: 72 0000CAA2 # {
73: 73 0000CAA2 13 0118 jbr L231
74: 74 0000CAA5 L232:
75: 75 0000CAA5 # force_loop = FALSE;
76: 76 0000CAA5 4d efffffff99 clrl _force_loop
77: 77 0000CAAB # subtest = 1;
78: 78 0000CAAB 0d 01 efffffff92 movl $1,_subtest
79: 79 0000CAB2 # for( index = 0; index < max_ldf_1_index; index++ ) {
80: 80 0000CAB2 4d efffffff8c clrl _index
81: 81 0000CAB8 L235:
82: 82 0000CAB8 1d efffffff86 efffffff81 cmpl _index,_max_ldf_1_index
83: 83 0000CAC3 91 03 13 00f4 jgeq L234
84: 84 0000CAC8 # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
85: 85 0000CAC8 0d efffffff76 50 movl _index,r0
86: 86 0000CACF 48 03 50 50 shll $3,r0,r0
87: 87 0000CAD3 0d e000000000 efffffff66 movl _ldf_1_data(r0),_sgl_ld_acc
88: 88 0000CADE # sgl_expected = ldf_1_data[index].exp; /* get expected result */
89: 89 0000CADE 0d efffffff60 50 movl _index,r0
90: 90 0000CAE5 48 03 50 50 shll $3,r0,r0
91: 91 0000CAE9 0d e000000004 efffffff50 movl _ldf_1_data+4(r0),_sgl_expected
92: 92 0000CAF4 # /*
93: 93 0000CAF4 # * If LOOP ON ERROR is set, this is the loop for this subtest.
94: 94 0000CAF4 # * The force loop flag is set after the first error.
95: 95 0000CAF4 # */
96: 96 0000CAF4 # asm("_ldf_1_lp1:");
97: 97 0000CAF4 _ldf_1_lp1:
98: 98 0000CAF4 # asm("movl _sgl_ld_acc,r4"); /* get the value to load */
99: 99 0000CAF4 0d efffffff4a 54 movl _sgl_ld_acc,r4
100: 100 0000CAFB # asm("ldf r4"); /* load the value */
101: 101 0000CAFB 06 54 ldf r4
102: 102 0000CAFD # asm("nop");
103: 103 0000CAFD 10 nop
104: 104 0000CAFE # asm("stf r5"); /* store the result in R5 */
105: 105 0000CAFE 26 55 stf r5
106: 106 0000CB00 # if( force_loop )
107: 107 0000CB00 5d efffffff3e tstl _force_loop
108: 108 0000CB06 31 02 jeql L236
109: 109 0000CB08 # asm("brb _ldf_1_lp1");; /* loop on the error */
110: 110 0000CB08 11 ea brb _ldf_1_lp1
111: 111 0000CB0A L236:
112: 112 0000CB0A # /*
113: 113 0000CB0A # * end error loop - test the results
114: 114 0000CB0A # */
115: 115 0000CB0A # asm("movl r5,_sgl_st_acc"); /* move R5 data to cache */
116: 116 0000CB0A 0d 55 efffffff33 movl r5,_sgl_st_acc
117: 117 0000CB11 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
118: 118 0000CB11 1d efffffff2d efffffff28 cmpl _sgl_st_acc,_sgl_expected
119: 119 0000CB1C 21 03 13 0092 jeql L237
120: 120 0000CB21 # errcnt++; /* bump the error count */
121: 121 0000CB21 6d efffffff1d incl _errcnt
122: 122 0000CB27 # if( prt_error ) {
123: 123 0000CB27 5d efffffff17 tstl _prt_error
124: 124 0000CB2D 31 61 jeql L238
125: 125 0000CB2F # print_ldf_er_hdr();
126: 126 0000CB2F fe 04 ef00000998 callf $4,_print_ldf_er_hdr
127: 127 0000CB36 # writes(" (Reg. Data) - BAD FINAL ACC\n");
128: 128 0000CB36 .data 1
129: 129 00000bf1 * L240:
130: 130 00000bf1 * 20285265672E2044617461292 .ascii " (Reg. Data) - BAD FINAL ACC\12\0"
131: 02D204241442046494E414C20
132: 4143430A00
133: 131 00000c0f * .text
134: 132 0000CB36 dd 8f00000bf1 pushl $L240
135: 133 0000CB3C fe 08 efffffff01 callf $8,_writes
136: 134 0000CB43 # print_ldf_data();
137: 135 0000CB43 fe 04 ef000009f4 callf $4,_print_ldf_data
138: 136 0000CB4A # writes(", data index = ");
139: 137 0000CB4A .data 1
140: 138 00000c0f * L242:
141: 139 00000c0f * 2C20206461746120696E64657 .ascii ", data index = \0"
142: 8203D2000
143: 140 00000c20 * .text
144: 141 0000CB4A dd 8f00000c0f pushl $L242
145: 142 0000CB50 fe 08 effffffeed callf $8,_writes
146: 143 0000CB57 # writed( index );
147: 144 0000CB57 dd effffffee7 pushl _index
148: 145 0000CB5D fe 08 effffffee0 callf $8,_writed
149: 146 0000CB64 # writec('\n');
150: 147 0000CB64 dd 0a pushl $10
151: 148 0000CB66 fe 08 effffffed7 callf $8,_writec
152: 149 0000CB6D # writes(" Acc expected = ");
153: 150 0000CB6D .data 1
154: 151 00000c20 * L245:
155: 152 00000c20 * 2020202020202020202020202 .ascii " Acc expected = \0"
156: 0202020202020202020204163
157: 63206578706563746564203D2
158: 000
159: 153 00000c47 * .text
160: 154 0000CB6D dd 8f00000c20 pushl $L245
161: 155 0000CB73 fe 08 effffffeca callf $8,_writes
162: 156 0000CB7A # write32h( sgl_expected );
163: 157 0000CB7A dd effffffec4 pushl _sgl_expected
164: 158 0000CB80 fe 08 effffffebd callf $8,_write32h
165: 159 0000CB87 # writec('\n');
166: 160 0000CB87 dd 0a pushl $10
167: 161 0000CB89 fe 08 effffffeb4 callf $8,_writec
168: 162 0000CB90 # }
169: 163 0000CB90 # if( halt_flg )
170: 164 0000CB90 L238:
171: 165 0000CB90 5d effffffeae tstl _halt_flg
172: 166 0000CB96 31 09 jeql L247
173: 167 0000CB98 # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
174: 168 0000CB98 dd 01 pushl $1
175: 169 0000CB9A fe 08 ef000009d9 callf $8,_ldf_er_halt
176: 170 0000CBA1 # if( loop_on_err ) {
177: 171 0000CBA1 L247:
178: 172 0000CBA1 5d effffffe9d tstl _loop_on_err
179: 173 0000CBA7 31 0a jeql L249
180: 174 0000CBA9 # force_loop = TRUE; /* set the force loop flag */
181: 175 0000CBA9 0d 01 effffffe94 movl $1,_force_loop
182: 176 0000CBB0 # asm("brw _ldf_1_lp1");; /* and loop on the error */
183: 177 0000CBB0 13 ff41 brw _ldf_1_lp1
184: 178 0000CBB3 # } /* end of loop on error */
185: 179 0000CBB3 # } /* end of compare error */
186: 180 0000CBB3 L249:
187: 181 0000CBB3 # } /* end of WHILE loop */
188: 182 0000CBB3 L237:
189: 183 0000CBB3 L233:
190: 184 0000CBB3 6d effffffe8b incl _index
191: 185 0000CBB9 13 fefc jbr L235
192: 186 0000CBBC L234:
193: 187 0000CBBC # } /* end of subtest 1 */
194: 188 0000CBBC 40 ret#2
195: 189 0000CBBD .set L229,0x0
196: 190 0000CBBD L231:
197: 191 0000CBBD 13 fee5 jbr L232
198: 192 0000CBC0 .data
199: 193 00000be8 * .text
200: 194 0000CBC0 .align 1
201: 195 0000CBC0 .globl _ldf_2
202: 196 0000CBC0 _ldf_2:
203: 197 0000CBC0 0000 .word L250
204: 198 0000CBC2 #
205: 199 0000CBC2 #
206: 200 0000CBC2 #
207: 201 0000CBC2 # /************************************************************************
208: 202 0000CBC2 # *
209: 203 0000CBC2 # * SUBTEST 2 - load through memory
210: 204 0000CBC2 # *
211: 205 0000CBC2 # ************************************************************************/
212: 206 0000CBC2 # ldf_2()
213: 207 0000CBC2 # {
214: 208 0000CBC2 13 0112 jbr L252
215: 209 0000CBC5 L253:
216: 210 0000CBC5 # force_loop = FALSE;
217: 211 0000CBC5 4d effffffe79 clrl _force_loop
218: 212 0000CBCB # subtest = 2;
219: 213 0000CBCB 0d 02 effffffe72 movl $2,_subtest
220: 214 0000CBD2 # for( index = 0; index < max_ldf_1_index; index++ ) {
221: 215 0000CBD2 4d effffffe6c clrl _index
222: 216 0000CBD8 L256:
223: 217 0000CBD8 1d effffffe66 effffffe61 cmpl _index,_max_ldf_1_index
224: 218 0000CBE3 91 03 13 00ee jgeq L255
225: 219 0000CBE8 # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
226: 220 0000CBE8 0d effffffe56 50 movl _index,r0
227: 221 0000CBEF 48 03 50 50 shll $3,r0,r0
228: 222 0000CBF3 0d e000000000 effffffe46 movl _ldf_1_data(r0),_sgl_ld_acc
229: 223 0000CBFE # sgl_expected = ldf_1_data[index].exp; /* get expected result */
230: 224 0000CBFE 0d effffffe40 50 movl _index,r0
231: 225 0000CC05 48 03 50 50 shll $3,r0,r0
232: 226 0000CC09 0d e000000004 effffffe30 movl _ldf_1_data+4(r0),_sgl_expected
233: 227 0000CC14 # /*
234: 228 0000CC14 # * If LOOP ON ERROR is set, this is the loop for this subtest.
235: 229 0000CC14 # * The force loop flag is set after the first error.
236: 230 0000CC14 # */
237: 231 0000CC14 # asm("_ldf_2_lp1:");
238: 232 0000CC14 _ldf_2_lp1:
239: 233 0000CC14 # asm("ldf _sgl_ld_acc"); /* load the value */
240: 234 0000CC14 06 effffffe2a ldf _sgl_ld_acc
241: 235 0000CC1A # asm("nop");
242: 236 0000CC1A 10 nop
243: 237 0000CC1B # asm("stf _sgl_st_acc"); /* store the result */
244: 238 0000CC1B 26 effffffe23 stf _sgl_st_acc
245: 239 0000CC21 # if( force_loop )
246: 240 0000CC21 5d effffffe1d tstl _force_loop
247: 241 0000CC27 31 02 jeql L257
248: 242 0000CC29 # asm("brb _ldf_2_lp1");; /* loop on the error */
249: 243 0000CC29 11 e9 brb _ldf_2_lp1
250: 244 0000CC2B L257:
251: 245 0000CC2B # /*
252: 246 0000CC2B # * end error loop - test the results
253: 247 0000CC2B # */
254: 248 0000CC2B # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
255: 249 0000CC2B 1d effffffe13 effffffe0e cmpl _sgl_st_acc,_sgl_expected
256: 250 0000CC36 21 03 13 0092 jeql L258
257: 251 0000CC3B # errcnt++; /* bump the error count */
258: 252 0000CC3B 6d effffffe03 incl _errcnt
259: 253 0000CC41 # if( prt_error ) {
260: 254 0000CC41 5d effffffdfd tstl _prt_error
261: 255 0000CC47 31 61 jeql L259
262: 256 0000CC49 # print_ldf_er_hdr();
263: 257 0000CC49 fe 04 ef0000087e callf $4,_print_ldf_er_hdr
264: 258 0000CC50 # writes(" (Cache Data) - BAD FINAL ACC\n");
265: 259 0000CC50 .data 1
266: 260 00000c47 * L260:
267: 261 00000c47 * 2028436163686520446174612 .ascii " (Cache Data) - BAD FINAL ACC\12\0"
268: 9202D204241442046494E414C
269: 204143430A00
270: 262 00000c66 * .text
271: 263 0000CC50 dd 8f00000c47 pushl $L260
272: 264 0000CC56 fe 08 effffffde7 callf $8,_writes
273: 265 0000CC5D # print_ldf_data();
274: 266 0000CC5D fe 04 ef000008da callf $4,_print_ldf_data
275: 267 0000CC64 # writes(", data index = ");
276: 268 0000CC64 .data 1
277: 269 00000c66 * L261:
278: 270 00000c66 * 2C20206461746120696E64657 .ascii ", data index = \0"
279: 8203D2000
280: 271 00000c77 * .text
281: 272 0000CC64 dd 8f00000c66 pushl $L261
282: 273 0000CC6A fe 08 effffffdd3 callf $8,_writes
283: 274 0000CC71 # writed( index );
284: 275 0000CC71 dd effffffdcd pushl _index
285: 276 0000CC77 fe 08 effffffdc6 callf $8,_writed
286: 277 0000CC7E # writec('\n');
287: 278 0000CC7E dd 0a pushl $10
288: 279 0000CC80 fe 08 effffffdbd callf $8,_writec
289: 280 0000CC87 # writes(" Acc expected = ");
290: 281 0000CC87 .data 1
291: 282 00000c77 * L262:
292: 283 00000c77 * 2020202020202020202020202 .ascii " Acc expected = \0"
293: 0202020202020202020204163
294: 63206578706563746564203D2
295: 000
296: 284 00000c9e * .text
297: 285 0000CC87 dd 8f00000c77 pushl $L262
298: 286 0000CC8D fe 08 effffffdb0 callf $8,_writes
299: 287 0000CC94 # write32h( sgl_expected );
300: 288 0000CC94 dd effffffdaa pushl _sgl_expected
301: 289 0000CC9A fe 08 effffffda3 callf $8,_write32h
302: 290 0000CCA1 # writec('\n');
303: 291 0000CCA1 dd 0a pushl $10
304: 292 0000CCA3 fe 08 effffffd9a callf $8,_writec
305: 293 0000CCAA # }
306: 294 0000CCAA # if( halt_flg )
307: 295 0000CCAA L259:
308: 296 0000CCAA 5d effffffd94 tstl _halt_flg
309: 297 0000CCB0 31 09 jeql L263
310: 298 0000CCB2 # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
311: 299 0000CCB2 dd 01 pushl $1
312: 300 0000CCB4 fe 08 ef000008bf callf $8,_ldf_er_halt
313: 301 0000CCBB # if( loop_on_err ) {
314: 302 0000CCBB L263:
315: 303 0000CCBB 5d effffffd83 tstl _loop_on_err
316: 304 0000CCC1 31 0a jeql L264
317: 305 0000CCC3 # force_loop = TRUE; /* set the force loop flag */
318: 306 0000CCC3 0d 01 effffffd7a movl $1,_force_loop
319: 307 0000CCCA # asm("brw _ldf_2_lp1");; /* and loop on the error */
320: 308 0000CCCA 13 ff47 brw _ldf_2_lp1
321: 309 0000CCCD # } /* end of loop on error */
322: 310 0000CCCD # } /* end of compare error */
323: 311 0000CCCD L264:
324: 312 0000CCCD # } /* end of WHILE loop */
325: 313 0000CCCD L258:
326: 314 0000CCCD L254:
327: 315 0000CCCD 6d effffffd71 incl _index
328: 316 0000CCD3 13 ff02 jbr L256
329: 317 0000CCD6 L255:
330: 318 0000CCD6 # } /* end of subtest 2 */
331: 319 0000CCD6 40 ret#2
332: 320 0000CCD7 .set L250,0x0
333: 321 0000CCD7 L252:
334: 322 0000CCD7 13 feeb jbr L253
335: 323 0000CCDA .data
336: 324 00000be8 * .text
337: 325 0000CCDA .align 1
338: 326 0000CCDA .globl _ldf_3
339: 327 0000CCDA _ldf_3:
340: 328 0000CCDA 0000 .word L265
341: 329 0000CCDC #
342: 330 0000CCDC #
343: 331 0000CCDC #
344: 332 0000CCDC # /************************************************************************
345: 333 0000CCDC # *
346: 334 0000CCDC # * SUBTEST 3 - Check for register corruption (ldf)
347: 335 0000CCDC # *
348: 336 0000CCDC # ************************************************************************/
349: 337 0000CCDC # ldf_3()
350: 338 0000CCDC # {
351: 339 0000CCDC 13 015c jbr L267
352: 340 0000CCDF L268:
353: 341 0000CCDF # force_loop = FALSE; /* clear force_loop flg */
354: 342 0000CCDF 4d effffffd5f clrl _force_loop
355: 343 0000CCE5 # subtest = 3;
356: 344 0000CCE5 0d 03 effffffd58 movl $3,_subtest
357: 345 0000CCEC # fill_reg_buf( load_regs ); /* get patterns for regs */
358: 346 0000CCEC dd 8f00000000 pushl $_load_regs
359: 347 0000CCF2 fe 08 effffffd4b callf $8,_fill_reg_buf
360: 348 0000CCF9 # index = 0;
361: 349 0000CCF9 4d effffffd45 clrl _index
362: 350 0000CCFF # sgl_ld_acc = ldf_1_data[0].ld; /* get value to load */
363: 351 0000CCFF 0d effffffd3f effffffd3a movl _ldf_1_data,_sgl_ld_acc
364: 352 0000CD0A # sgl_expected = ldf_1_data[0].exp; /* get expected result */
365: 353 0000CD0A 0d effffffd38 effffffd2f movl _ldf_1_data+4,_sgl_expected
366: 354 0000CD15 # /*
367: 355 0000CD15 # * If LOOP ON ERROR is set, this is the loop for this subtest.
368: 356 0000CD15 # * The force loop flag is set after the first error.
369: 357 0000CD15 # */
370: 358 0000CD15 # asm("_ldf_3_lp1:");
371: 359 0000CD15 _ldf_3_lp1:
372: 360 0000CD15 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
373: 361 0000CD15 ab 891fff effffffd26 loadr $0x1fff,_load_regs
374: 362 0000CD1E # asm("nop");
375: 363 0000CD1E 10 nop
376: 364 0000CD1F # asm("ldf _sgl_ld_acc"); /* load the accumulator */
377: 365 0000CD1F 06 effffffd1f ldf _sgl_ld_acc
378: 366 0000CD25 # asm("nop");
379: 367 0000CD25 10 nop
380: 368 0000CD26 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
381: 369 0000CD26 bb 891fff effffffd15 storer $0x1fff,_store_regs
382: 370 0000CD2F # asm("nop");
383: 371 0000CD2F 10 nop
384: 372 0000CD30 # asm("stf _sgl_st_acc"); /* save the accumulator */
385: 373 0000CD30 26 effffffd0e stf _sgl_st_acc
386: 374 0000CD36 # if( force_loop )
387: 375 0000CD36 5d effffffd08 tstl _force_loop
388: 376 0000CD3C 31 02 jeql L270
389: 377 0000CD3E # asm("brb _ldf_3_lp1");; /* loop on the error */
390: 378 0000CD3E 11 d5 brb _ldf_3_lp1
391: 379 0000CD40 L270:
392: 380 0000CD40 # /*
393: 381 0000CD40 # * Now compare the stored register values to those that were loaded
394: 382 0000CD40 # */
395: 383 0000CD40 # index2 = 0;
396: 384 0000CD40 4d effffffcfe clrl _index2
397: 385 0000CD46 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
398: 386 0000CD46 L271:
399: 387 0000CD46 0d effffffcf8 50 movl _index2,r0
400: 388 0000CD4D 0d effffffcf1 51 movl _index2,r1
401: 389 0000CD54 1d 40effffffce9 cmpl _load_regs[r0],_store_regs[r1]
402: 41effffffce3
403: 390 0000CD61 21 11 jneq L272
404: 391 0000CD63 1d effffffcdb 0d cmpl _index2,$13
405: 392 0000CD6A 81 08 jgeq L272
406: 393 0000CD6C # index2++; /* check reg values */
407: 394 0000CD6C 6d effffffcd2 incl _index2
408: 395 0000CD72 11 d2 jbr L271
409: 396 0000CD74 L272:
410: 397 0000CD74 # if( index2 < 13 ) { /* error if index2 < 13 */
411: 398 0000CD74 1d effffffcca 0d cmpl _index2,$13
412: 399 0000CD7B 91 03 13 00ba jgeq L273
413: 400 0000CD80 # errcnt++; /* bump the error count */
414: 401 0000CD80 6d effffffcbe incl _errcnt
415: 402 0000CD86 # if( prt_error ) {
416: 403 0000CD86 5d effffffcb8 tstl _prt_error
417: 404 0000CD8C 21 03 13 0086 jeql L274
418: 405 0000CD91 # print_ldf_er_hdr();
419: 406 0000CD91 fe 04 ef00000736 callf $4,_print_ldf_er_hdr
420: 407 0000CD98 # writes(" - A REGISTER WAS MODIFIED\n");
421: 408 0000CD98 .data 1
422: 409 00000c9e * L275:
423: 410 00000c9e * 202D204120524547495354455 .ascii " - A REGISTER WAS MODIFIED\12\0"
424: 220574153204D4F4449464945
425: 440A00
426: 411 00000cba * .text
427: 412 0000CD98 dd 8f00000c9e pushl $L275
428: 413 0000CD9E fe 08 effffffc9f callf $8,_writes
429: 414 0000CDA5 # print_ldf_data();
430: 415 0000CDA5 fe 04 ef00000792 callf $4,_print_ldf_data
431: 416 0000CDAC # writes("register "); /* print the information */
432: 417 0000CDAC .data 1
433: 418 00000cba * L276:
434: 419 00000cba * 72656769737465722000 .ascii "register \0"
435: 420 00000cc4 * .text
436: 421 0000CDAC dd 8f00000cba pushl $L276
437: 422 0000CDB2 fe 08 effffffc8b callf $8,_writes
438: 423 0000CDB9 # writed( index2 ); /* about the corrupted */
439: 424 0000CDB9 dd effffffc85 pushl _index2
440: 425 0000CDBF fe 08 effffffc7e callf $8,_writed
441: 426 0000CDC6 # writes(" = "); /* register */
442: 427 0000CDC6 .data 1
443: 428 00000cc4 * L277:
444: 429 00000cc4 * 203D2000 .ascii " = \0"
445: 430 00000cc8 * .text
446: 431 0000CDC6 dd 8f00000cc4 pushl $L277
447: 432 0000CDCC fe 08 effffffc71 callf $8,_writes
448: 433 0000CDD3 # write32h( store_regs[index2] );
449: 434 0000CDD3 0d effffffc6b 50 movl _index2,r0
450: 435 0000CDDA dd 40effffffc63 pushl _store_regs[r0]
451: 436 0000CDE1 fe 08 effffffc5c callf $8,_write32h
452: 437 0000CDE8 # writes(", should be = ");
453: 438 0000CDE8 .data 1
454: 439 00000cc8 * L278:
455: 440 00000cc8 * 2C202073686F756C642062652 .ascii ", should be = \0"
456: 03D2000
457: 441 00000cd8 * .text
458: 442 0000CDE8 dd 8f00000cc8 pushl $L278
459: 443 0000CDEE fe 08 effffffc4f callf $8,_writes
460: 444 0000CDF5 # write32h( load_regs[index2] );
461: 445 0000CDF5 0d effffffc49 50 movl _index2,r0
462: 446 0000CDFC dd 40effffffc41 pushl _load_regs[r0]
463: 447 0000CE03 fe 08 effffffc3a callf $8,_write32h
464: 448 0000CE0A # writes("\n");
465: 449 0000CE0A .data 1
466: 450 00000cd8 * L279:
467: 451 00000cd8 * 0A00 .ascii "\12\0"
468: 452 00000cda * .text
469: 453 0000CE0A dd 8f00000cd8 pushl $L279
470: 454 0000CE10 fe 08 effffffc2d callf $8,_writes
471: 455 0000CE17 # }
472: 456 0000CE17 # if( halt_flg )
473: 457 0000CE17 L274:
474: 458 0000CE17 5d effffffc27 tstl _halt_flg
475: 459 0000CE1D 31 09 jeql L280
476: 460 0000CE1F # ldf_er_halt( BAD_REG_HLT ); /* halt on the error */
477: 461 0000CE1F dd 02 pushl $2
478: 462 0000CE21 fe 08 ef00000752 callf $8,_ldf_er_halt
479: 463 0000CE28 # if( loop_on_err ) {
480: 464 0000CE28 L280:
481: 465 0000CE28 5d effffffc16 tstl _loop_on_err
482: 466 0000CE2E 31 0a jeql L281
483: 467 0000CE30 # force_loop = TRUE; /* set the force loop flag */
484: 468 0000CE30 0d 01 effffffc0d movl $1,_force_loop
485: 469 0000CE37 # asm("brw _ldf_3_lp1"); /* and loop on the error */
486: 470 0000CE37 13 fedb brw _ldf_3_lp1
487: 471 0000CE3A # } /* end of loop on error */
488: 472 0000CE3A # } /* end of register corruption error */
489: 473 0000CE3A L281:
490: 474 0000CE3A # } /* end of subtest 3 */
491: 475 0000CE3A L273:
492: 476 0000CE3A 40 ret#2
493: 477 0000CE3B .set L265,0x0
494: 478 0000CE3B L267:
495: 479 0000CE3B 13 fea1 jbr L268
496: 480 0000CE3E .data
497: 481 00000be8 * .text
498: 482 0000CE3E .align 1
499: 483 0000CE3E .globl _ldf_4
500: 484 0000CE3E _ldf_4:
501: 485 0000CE3E 0000 .word L282
502: 486 0000CE40 #
503: 487 0000CE40 #
504: 488 0000CE40 #
505: 489 0000CE40 # /************************************************************************
506: 490 0000CE40 # *
507: 491 0000CE40 # * SUBTEST 4 - Check for register corruption (stf)
508: 492 0000CE40 # *
509: 493 0000CE40 # ************************************************************************/
510: 494 0000CE40 # ldf_4()
511: 495 0000CE40 # {
512: 496 0000CE40 13 015c jbr L284
513: 497 0000CE43 L285:
514: 498 0000CE43 # force_loop = FALSE; /* clear force_loop flg */
515: 499 0000CE43 4d effffffbfb clrl _force_loop
516: 500 0000CE49 # subtest = 4;
517: 501 0000CE49 0d 04 effffffbf4 movl $4,_subtest
518: 502 0000CE50 # fill_reg_buf( load_regs ); /* get patterns for regs */
519: 503 0000CE50 dd 8f00000000 pushl $_load_regs
520: 504 0000CE56 fe 08 effffffbe7 callf $8,_fill_reg_buf
521: 505 0000CE5D # index = 0;
522: 506 0000CE5D 4d effffffbe1 clrl _index
523: 507 0000CE63 # sgl_ld_acc = ldf_1_data[0].ld; /* get value to store */
524: 508 0000CE63 0d effffffbdb effffffbd6 movl _ldf_1_data,_sgl_ld_acc
525: 509 0000CE6E # sgl_expected = ldf_1_data[0].exp; /* get expected result */
526: 510 0000CE6E 0d effffffbd4 effffffbcb movl _ldf_1_data+4,_sgl_expected
527: 511 0000CE79 # /*
528: 512 0000CE79 # * If LOOP ON ERROR is set, this is the loop for this subtest.
529: 513 0000CE79 # * The force loop flag is set after the first error.
530: 514 0000CE79 # */
531: 515 0000CE79 # asm("_ldf_4_lp1:");
532: 516 0000CE79 _ldf_4_lp1:
533: 517 0000CE79 # asm("ldf _sgl_ld_acc"); /* load the accumulator */
534: 518 0000CE79 06 effffffbc5 ldf _sgl_ld_acc
535: 519 0000CE7F # asm("nop");
536: 520 0000CE7F 10 nop
537: 521 0000CE80 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
538: 522 0000CE80 ab 891fff effffffbbb loadr $0x1fff,_load_regs
539: 523 0000CE89 # asm("nop");
540: 524 0000CE89 10 nop
541: 525 0000CE8A # asm("stf _sgl_st_acc"); /* save the accumulator */
542: 526 0000CE8A 26 effffffbb4 stf _sgl_st_acc
543: 527 0000CE90 # asm("nop");
544: 528 0000CE90 10 nop
545: 529 0000CE91 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
546: 530 0000CE91 bb 891fff effffffbaa storer $0x1fff,_store_regs
547: 531 0000CE9A # if( force_loop )
548: 532 0000CE9A 5d effffffba4 tstl _force_loop
549: 533 0000CEA0 31 02 jeql L286
550: 534 0000CEA2 # asm("brb _ldf_4_lp1");; /* loop on the error */
551: 535 0000CEA2 11 d5 brb _ldf_4_lp1
552: 536 0000CEA4 L286:
553: 537 0000CEA4 # /*
554: 538 0000CEA4 # * Now compare the stored register values to those that were loaded
555: 539 0000CEA4 # */
556: 540 0000CEA4 # index2 = 0;
557: 541 0000CEA4 4d effffffb9a clrl _index2
558: 542 0000CEAA # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
559: 543 0000CEAA L287:
560: 544 0000CEAA 0d effffffb94 50 movl _index2,r0
561: 545 0000CEB1 0d effffffb8d 51 movl _index2,r1
562: 546 0000CEB8 1d 40effffffb85 cmpl _load_regs[r0],_store_regs[r1]
563: 41effffffb7f
564: 547 0000CEC5 21 11 jneq L288
565: 548 0000CEC7 1d effffffb77 0d cmpl _index2,$13
566: 549 0000CECE 81 08 jgeq L288
567: 550 0000CED0 # index2++; /* check reg values */
568: 551 0000CED0 6d effffffb6e incl _index2
569: 552 0000CED6 11 d2 jbr L287
570: 553 0000CED8 L288:
571: 554 0000CED8 # if( index2 < 13 ) { /* error if index2 < 13 */
572: 555 0000CED8 1d effffffb66 0d cmpl _index2,$13
573: 556 0000CEDF 91 03 13 00ba jgeq L289
574: 557 0000CEE4 # errcnt++; /* bump the error count */
575: 558 0000CEE4 6d effffffb5a incl _errcnt
576: 559 0000CEEA # if( prt_error ) {
577: 560 0000CEEA 5d effffffb54 tstl _prt_error
578: 561 0000CEF0 21 03 13 0086 jeql L290
579: 562 0000CEF5 # print_ldf_er_hdr();
580: 563 0000CEF5 fe 04 ef000005d2 callf $4,_print_ldf_er_hdr
581: 564 0000CEFC # writes(" - A REGISTER WAS MODIFIED\n");
582: 565 0000CEFC .data 1
583: 566 00000cda * L291:
584: 567 00000cda * 202D204120524547495354455 .ascii " - A REGISTER WAS MODIFIED\12\0"
585: 220574153204D4F4449464945
586: 440A00
587: 568 00000cf6 * .text
588: 569 0000CEFC dd 8f00000cda pushl $L291
589: 570 0000CF02 fe 08 effffffb3b callf $8,_writes
590: 571 0000CF09 # print_ldf_data();
591: 572 0000CF09 fe 04 ef0000062e callf $4,_print_ldf_data
592: 573 0000CF10 # writes("register "); /* print the information */
593: 574 0000CF10 .data 1
594: 575 00000cf6 * L292:
595: 576 00000cf6 * 72656769737465722000 .ascii "register \0"
596: 577 00000d00 * .text
597: 578 0000CF10 dd 8f00000cf6 pushl $L292
598: 579 0000CF16 fe 08 effffffb27 callf $8,_writes
599: 580 0000CF1D # writed( index2 ); /* about the corrupted */
600: 581 0000CF1D dd effffffb21 pushl _index2
601: 582 0000CF23 fe 08 effffffb1a callf $8,_writed
602: 583 0000CF2A # writes(" = "); /* register */
603: 584 0000CF2A .data 1
604: 585 00000d00 * L293:
605: 586 00000d00 * 203D2000 .ascii " = \0"
606: 587 00000d04 * .text
607: 588 0000CF2A dd 8f00000d00 pushl $L293
608: 589 0000CF30 fe 08 effffffb0d callf $8,_writes
609: 590 0000CF37 # write32h( store_regs[index2] );
610: 591 0000CF37 0d effffffb07 50 movl _index2,r0
611: 592 0000CF3E dd 40effffffaff pushl _store_regs[r0]
612: 593 0000CF45 fe 08 effffffaf8 callf $8,_write32h
613: 594 0000CF4C # writes(", should be = ");
614: 595 0000CF4C .data 1
615: 596 00000d04 * L294:
616: 597 00000d04 * 2C202073686F756C642062652 .ascii ", should be = \0"
617: 03D2000
618: 598 00000d14 * .text
619: 599 0000CF4C dd 8f00000d04 pushl $L294
620: 600 0000CF52 fe 08 effffffaeb callf $8,_writes
621: 601 0000CF59 # write32h( load_regs[index2] );
622: 602 0000CF59 0d effffffae5 50 movl _index2,r0
623: 603 0000CF60 dd 40effffffadd pushl _load_regs[r0]
624: 604 0000CF67 fe 08 effffffad6 callf $8,_write32h
625: 605 0000CF6E # writes("\n");
626: 606 0000CF6E .data 1
627: 607 00000d14 * L295:
628: 608 00000d14 * 0A00 .ascii "\12\0"
629: 609 00000d16 * .text
630: 610 0000CF6E dd 8f00000d14 pushl $L295
631: 611 0000CF74 fe 08 effffffac9 callf $8,_writes
632: 612 0000CF7B # }
633: 613 0000CF7B # if( halt_flg )
634: 614 0000CF7B L290:
635: 615 0000CF7B 5d effffffac3 tstl _halt_flg
636: 616 0000CF81 31 09 jeql L296
637: 617 0000CF83 # ldf_er_halt( BAD_REG_HLT ); /* halt on the error */
638: 618 0000CF83 dd 02 pushl $2
639: 619 0000CF85 fe 08 ef000005ee callf $8,_ldf_er_halt
640: 620 0000CF8C # if( loop_on_err ) {
641: 621 0000CF8C L296:
642: 622 0000CF8C 5d effffffab2 tstl _loop_on_err
643: 623 0000CF92 31 0a jeql L297
644: 624 0000CF94 # force_loop = TRUE; /* set the force loop flag */
645: 625 0000CF94 0d 01 effffffaa9 movl $1,_force_loop
646: 626 0000CF9B # asm("brw _ldf_4_lp1"); /* and loop on the error */
647: 627 0000CF9B 13 fedb brw _ldf_4_lp1
648: 628 0000CF9E # } /* end of loop on error */
649: 629 0000CF9E # } /* end of register corruption error */
650: 630 0000CF9E L297:
651: 631 0000CF9E # } /* end of subtest 4 */
652: 632 0000CF9E L289:
653: 633 0000CF9E 40 ret#2
654: 634 0000CF9F .set L282,0x0
655: 635 0000CF9F L284:
656: 636 0000CF9F 13 fea1 jbr L285
657: 637 0000CFA2 .data
658: 638 00000be8 * .text
659: 639 0000CFA2 .align 1
660: 640 0000CFA2 .globl _ldf_5
661: 641 0000CFA2 _ldf_5:
662: 642 0000CFA2 0000 .word L298
663: 643 0000CFA4 #
664: 644 0000CFA4 #
665: 645 0000CFA4 #
666: 646 0000CFA4 # /************************************************************************
667: 647 0000CFA4 # *
668: 648 0000CFA4 # * SUBTEST 5 - Check for PSL corruption (ldf)
669: 649 0000CFA4 # *
670: 650 0000CFA4 # ************************************************************************/
671: 651 0000CFA4 # ldf_5()
672: 652 0000CFA4 # {
673: 653 0000CFA4 13 014a jbr L300
674: 654 0000CFA7 L301:
675: 655 0000CFA7 # force_loop = FALSE; /* clear force_loop flg */
676: 656 0000CFA7 4d effffffa97 clrl _force_loop
677: 657 0000CFAD # subtest = 5;
678: 658 0000CFAD 0d 05 effffffa90 movl $5,_subtest
679: 659 0000CFB4 # for( index = 0; index < 3; index++ ) {
680: 660 0000CFB4 4d effffffa8a clrl _index
681: 661 0000CFBA L304:
682: 662 0000CFBA 1d effffffa84 03 cmpl _index,$3
683: 663 0000CFC1 91 03 13 012a jgeq L303
684: 664 0000CFC6 # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
685: 665 0000CFC6 0d effffffa78 50 movl _index,r0
686: 666 0000CFCD 48 03 50 50 shll $3,r0,r0
687: 667 0000CFD1 0d e000000000 effffffa68 movl _ldf_1_data(r0),_sgl_ld_acc
688: 668 0000CFDC # sgl_expected = ldf_1_data[index].exp; /* get expected */
689: 669 0000CFDC 0d effffffa62 50 movl _index,r0
690: 670 0000CFE3 48 03 50 50 shll $3,r0,r0
691: 671 0000CFE7 0d e000000004 effffffa52 movl _ldf_1_data+4(r0),_sgl_expected
692: 672 0000CFF2 # sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */
693: 673 0000CFF2 0d effffffa4c 50 movl _status_index,r0
694: 674 0000CFF9 0d 40effffffa44 movl _status_array[r0],_sgl_dummy1
695: effffffa3f
696: 675 0000D005 # /*
697: 676 0000D005 # * If LOOP ON ERROR is set, this is the loop for this subtest.
698: 677 0000D005 # * The force loop flag is set after the first error.
699: 678 0000D005 # */
700: 679 0000D005 # asm("_ldf_5_lp1:");
701: 680 0000D005 _ldf_5_lp1:
702: 681 0000D005 # asm("tstl _sgl_dummy1"); /* set the PSL status */
703: 682 0000D005 5d effffffa39 tstl _sgl_dummy1
704: 683 0000D00B # asm("movpsl _init_psl"); /* save the initial PSL */
705: 684 0000D00B cd effffffa33 movpsl _init_psl
706: 685 0000D011 # asm("nop");
707: 686 0000D011 10 nop
708: 687 0000D012 # asm("ldf _sgl_ld_acc"); /* load the accumulator */
709: 688 0000D012 06 effffffa2c ldf _sgl_ld_acc
710: 689 0000D018 # asm("nop");
711: 690 0000D018 10 nop
712: 691 0000D019 # asm("movpsl _psl_val"); /* save the final PSL */
713: 692 0000D019 cd effffffa25 movpsl _psl_val
714: 693 0000D01F # asm("nop");
715: 694 0000D01F 10 nop
716: 695 0000D020 # asm("stf _sgl_st_acc"); /* save the accumulator */
717: 696 0000D020 26 effffffa1e stf _sgl_st_acc
718: 697 0000D026 # if( force_loop )
719: 698 0000D026 5d effffffa18 tstl _force_loop
720: 699 0000D02C 31 02 jeql L305
721: 700 0000D02E # asm("brb _ldf_5_lp1");; /* loop on the error */
722: 701 0000D02E 11 d5 brb _ldf_5_lp1
723: 702 0000D030 L305:
724: 703 0000D030 # /*
725: 704 0000D030 # * Now compare the final PSL to the initial PSL -they should be the same
726: 705 0000D030 # */
727: 706 0000D030 # if( psl_val != init_psl ) {
728: 707 0000D030 1d effffffa0e effffffa09 cmpl _psl_val,_init_psl
729: 708 0000D03B 21 03 13 00a7 jeql L306
730: 709 0000D040 # errcnt++; /* bump the error count */
731: 710 0000D040 6d effffff9fe incl _errcnt
732: 711 0000D046 # if( prt_error ) {
733: 712 0000D046 5d effffff9f8 tstl _prt_error
734: 713 0000D04C 31 76 jeql L307
735: 714 0000D04E # print_ldf_er_hdr();
736: 715 0000D04E fe 04 ef00000479 callf $4,_print_ldf_er_hdr
737: 716 0000D055 # writes(" - INCORRECT FINAL PSL\n");
738: 717 0000D055 .data 1
739: 718 00000d16 * L308:
740: 719 00000d16 * 202D20494E434F52524543542 .ascii " - INCORRECT FINAL PSL\12\0"
741: 046494E414C2050534C0A00
742: 720 00000d2e * .text
743: 721 0000D055 dd 8f00000d16 pushl $L308
744: 722 0000D05B fe 08 effffff9e2 callf $8,_writes
745: 723 0000D062 # print_ldf_data();
746: 724 0000D062 fe 04 ef000004d5 callf $4,_print_ldf_data
747: 725 0000D069 # writes("initial PSL = ");
748: 726 0000D069 .data 1
749: 727 00000d2e * L309:
750: 728 00000d2e * 696E697469616C2050534C203 .ascii "initial PSL = \0"
751: D2000
752: 729 00000d3d * .text
753: 730 0000D069 dd 8f00000d2e pushl $L309
754: 731 0000D06F fe 08 effffff9ce callf $8,_writes
755: 732 0000D076 # write32h( init_psl );
756: 733 0000D076 dd effffff9c8 pushl _init_psl
757: 734 0000D07C fe 08 effffff9c1 callf $8,_write32h
758: 735 0000D083 # writes(", final PSL = ");
759: 736 0000D083 .data 1
760: 737 00000d3d * L310:
761: 738 00000d3d * 2C20202066696E616C2050534 .ascii ", final PSL = \0"
762: C203D2000
763: 739 00000d4e * .text
764: 740 0000D083 dd 8f00000d3d pushl $L310
765: 741 0000D089 fe 08 effffff9b4 callf $8,_writes
766: 742 0000D090 # write32h( psl_val );
767: 743 0000D090 dd effffff9ae pushl _psl_val
768: 744 0000D096 fe 08 effffff9a7 callf $8,_write32h
769: 745 0000D09D # writes(", expected PSL = ");
770: 746 0000D09D .data 1
771: 747 00000d4e * L311:
772: 748 00000d4e * 2C20206578706563746564205 .ascii ", expected PSL = \0"
773: 0534C203D2000
774: 749 00000d61 * .text
775: 750 0000D09D dd 8f00000d4e pushl $L311
776: 751 0000D0A3 fe 08 effffff99a callf $8,_writes
777: 752 0000D0AA # write32h( exp_psl );
778: 753 0000D0AA dd effffff994 pushl _exp_psl
779: 754 0000D0B0 fe 08 effffff98d callf $8,_write32h
780: 755 0000D0B7 # writes("\n");
781: 756 0000D0B7 .data 1
782: 757 00000d61 * L312:
783: 758 00000d61 * 0A00 .ascii "\12\0"
784: 759 00000d63 * .text
785: 760 0000D0B7 dd 8f00000d61 pushl $L312
786: 761 0000D0BD fe 08 effffff980 callf $8,_writes
787: 762 0000D0C4 # }
788: 763 0000D0C4 # if( halt_flg )
789: 764 0000D0C4 L307:
790: 765 0000D0C4 5d effffff97a tstl _halt_flg
791: 766 0000D0CA 31 09 jeql L313
792: 767 0000D0CC # ldf_er_halt( BAD_PSL_HLT ); /* halt on the error */
793: 768 0000D0CC dd 03 pushl $3
794: 769 0000D0CE fe 08 ef000004a5 callf $8,_ldf_er_halt
795: 770 0000D0D5 # if( loop_on_err ) {
796: 771 0000D0D5 L313:
797: 772 0000D0D5 5d effffff969 tstl _loop_on_err
798: 773 0000D0DB 31 0a jeql L314
799: 774 0000D0DD # force_loop = TRUE; /* set the force loop flag */
800: 775 0000D0DD 0d 01 effffff960 movl $1,_force_loop
801: 776 0000D0E4 # asm("brw _ldf_5_lp1");; /* and loop on the error */
802: 777 0000D0E4 13 ff1e brw _ldf_5_lp1
803: 778 0000D0E7 # } /* end of loop on error */
804: 779 0000D0E7 # } /* end of PSL corruption error */
805: 780 0000D0E7 L314:
806: 781 0000D0E7 # } /* end of WHILE loop */
807: 782 0000D0E7 L306:
808: 783 0000D0E7 L302:
809: 784 0000D0E7 6d effffff957 incl _index
810: 785 0000D0ED 13 feca jbr L304
811: 786 0000D0F0 L303:
812: 787 0000D0F0 # } /* end of subtest 5 */
813: 788 0000D0F0 40 ret#2
814: 789 0000D0F1 .set L298,0x0
815: 790 0000D0F1 L300:
816: 791 0000D0F1 13 feb3 jbr L301
817: 792 0000D0F4 .data
818: 793 00000be8 * .text
819: 794 0000D0F4 .align 1
820: 795 0000D0F4 .globl _ldf_6
821: 796 0000D0F4 _ldf_6:
822: 797 0000D0F4 0000 .word L315
823: 798 0000D0F6 #
824: 799 0000D0F6 #
825: 800 0000D0F6 #
826: 801 0000D0F6 # /************************************************************************
827: 802 0000D0F6 # *
828: 803 0000D0F6 # * SUBTEST 6 - Check for PSL corruption (stf)
829: 804 0000D0F6 # *
830: 805 0000D0F6 # ************************************************************************/
831: 806 0000D0F6 # ldf_6()
832: 807 0000D0F6 # {
833: 808 0000D0F6 13 0197 jbr L317
834: 809 0000D0F9 L318:
835: 810 0000D0F9 # force_loop = FALSE;
836: 811 0000D0F9 4d effffff945 clrl _force_loop
837: 812 0000D0FF # index = 0; /* clear the data index */
838: 813 0000D0FF 4d effffff93f clrl _index
839: 814 0000D105 # status_index = 0; /* clear the status index */
840: 815 0000D105 4d effffff939 clrl _status_index
841: 816 0000D10B # do {
842: 817 0000D10B L321:
843: 818 0000D10B # sgl_ld_acc = ldf_1_data[index].ld; /* get the dbl operand */
844: 819 0000D10B 0d effffff933 50 movl _index,r0
845: 820 0000D112 48 03 50 50 shll $3,r0,r0
846: 821 0000D116 0d e000000000 effffff923 movl _ldf_1_data(r0),_sgl_ld_acc
847: 822 0000D121 # sgl_dummy1 = status_array[status_index]; /* array = +, -, 0 */
848: 823 0000D121 0d effffff91d 50 movl _status_index,r0
849: 824 0000D128 0d 40effffff915 movl _status_array[r0],_sgl_dummy1
850: effffff910
851: 825 0000D134 # /*
852: 826 0000D134 # * If LOOP ON ERROR is set, this is the loop for this subtest.
853: 827 0000D134 # * The force loop flag is set after the first error.
854: 828 0000D134 # */
855: 829 0000D134 # asm("_ldf_6_lp1:");
856: 830 0000D134 _ldf_6_lp1:
857: 831 0000D134 # asm("ldf _sgl_ld_acc"); /* load the operand */
858: 832 0000D134 06 effffff90a ldf _sgl_ld_acc
859: 833 0000D13A # asm("tstl _sgl_dummy1"); /* generate initial status */
860: 834 0000D13A 5d effffff904 tstl _sgl_dummy1
861: 835 0000D140 # asm("movpsl _init_psl"); /* save the initial status */
862: 836 0000D140 cd effffff8fe movpsl _init_psl
863: 837 0000D146 # asm("stf _sgl_st_acc"); /* save the accumulator */
864: 838 0000D146 26 effffff8f8 stf _sgl_st_acc
865: 839 0000D14C # asm("movpsl _psl_val"); /* save the final status */
866: 840 0000D14C cd effffff8f2 movpsl _psl_val
867: 841 0000D152 # if( force_loop ) /* loop? */
868: 842 0000D152 5d effffff8ec tstl _force_loop
869: 843 0000D158 31 06 jeql L322
870: 844 0000D15A # asm("jmp _ldf_6_lp1");; /* run the loop again */
871: 845 0000D15A 71 efffffffd4 jmp _ldf_6_lp1
872: 846 0000D160 L322:
873: 847 0000D160 # exp_psl = init_psl; /* get the initial PSL */
874: 848 0000D160 0d effffff8de effffff8d9 movl _init_psl,_exp_psl
875: 849 0000D16B # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
876: 850 0000D16B ac 88f3 effffff8d1 andl2 $-13,_exp_psl
877: 851 0000D173 # sgl_dummy2 = sgl_ld_acc; /* get the operand */
878: 852 0000D173 0d effffff8cb effffff8c6 movl _sgl_ld_acc,_sgl_dummy2
879: 853 0000D17E # sgl_dummy2 &= 0xff800000; /* clear the fraction part */
880: 854 0000D17E ac 8fff800000 effffff8bb andl2 $-8388608,_sgl_dummy2
881: 855 0000D189 # if( !sgl_dummy2 )
882: 856 0000D189 5d effffff8b5 tstl _sgl_dummy2
883: 857 0000D18F 21 07 jneq L323
884: 858 0000D191 # exp_psl |= PSL_Z; /* expect the ZERO bit set */
885: 859 0000D191 8c 04 effffff8ac orl2 $4,_exp_psl
886: 860 0000D198 # if( sgl_dummy2 < 0 )
887: 861 0000D198 L323:
888: 862 0000D198 5d effffff8a6 tstl _sgl_dummy2
889: 863 0000D19E 81 07 jgeq L324
890: 864 0000D1A0 # exp_psl |= PSL_N; /* expect the NEG bit set */
891: 865 0000D1A0 8c 08 effffff89d orl2 $8,_exp_psl
892: 866 0000D1A7 # if( psl_val != exp_psl ) { /* COMPARE the values */
893: 867 0000D1A7 L324:
894: 868 0000D1A7 1d effffff897 effffff892 cmpl _psl_val,_exp_psl
895: 869 0000D1B2 21 03 13 00a7 jeql L325
896: 870 0000D1B7 # errcnt++; /* bump the error count */
897: 871 0000D1B7 6d effffff887 incl _errcnt
898: 872 0000D1BD # if( prt_error ) {
899: 873 0000D1BD 5d effffff881 tstl _prt_error
900: 874 0000D1C3 31 76 jeql L326
901: 875 0000D1C5 # print_ldf_er_hdr();
902: 876 0000D1C5 fe 04 ef00000302 callf $4,_print_ldf_er_hdr
903: 877 0000D1CC # writes(" - INCORRECT FINAL PSL\n");
904: 878 0000D1CC .data 1
905: 879 00000d63 * L327:
906: 880 00000d63 * 202D20494E434F52524543542 .ascii " - INCORRECT FINAL PSL\12\0"
907: 046494E414C2050534C0A00
908: 881 00000d7b * .text
909: 882 0000D1CC dd 8f00000d63 pushl $L327
910: 883 0000D1D2 fe 08 effffff86b callf $8,_writes
911: 884 0000D1D9 # print_ldf_data();
912: 885 0000D1D9 fe 04 ef0000035e callf $4,_print_ldf_data
913: 886 0000D1E0 # writes("initial PSL = ");
914: 887 0000D1E0 .data 1
915: 888 00000d7b * L328:
916: 889 00000d7b * 696E697469616C2050534C203 .ascii "initial PSL = \0"
917: D2000
918: 890 00000d8a * .text
919: 891 0000D1E0 dd 8f00000d7b pushl $L328
920: 892 0000D1E6 fe 08 effffff857 callf $8,_writes
921: 893 0000D1ED # write32h( init_psl );
922: 894 0000D1ED dd effffff851 pushl _init_psl
923: 895 0000D1F3 fe 08 effffff84a callf $8,_write32h
924: 896 0000D1FA # writes(", final PSL = ");
925: 897 0000D1FA .data 1
926: 898 00000d8a * L329:
927: 899 00000d8a * 2C20202066696E616C2050534 .ascii ", final PSL = \0"
928: C203D2000
929: 900 00000d9b * .text
930: 901 0000D1FA dd 8f00000d8a pushl $L329
931: 902 0000D200 fe 08 effffff83d callf $8,_writes
932: 903 0000D207 # write32h( psl_val );
933: 904 0000D207 dd effffff837 pushl _psl_val
934: 905 0000D20D fe 08 effffff830 callf $8,_write32h
935: 906 0000D214 # writes(", expected PSL = ");
936: 907 0000D214 .data 1
937: 908 00000d9b * L330:
938: 909 00000d9b * 2C20206578706563746564205 .ascii ", expected PSL = \0"
939: 0534C203D2000
940: 910 00000dae * .text
941: 911 0000D214 dd 8f00000d9b pushl $L330
942: 912 0000D21A fe 08 effffff823 callf $8,_writes
943: 913 0000D221 # write32h( exp_psl );
944: 914 0000D221 dd effffff81d pushl _exp_psl
945: 915 0000D227 fe 08 effffff816 callf $8,_write32h
946: 916 0000D22E # writes("\n");
947: 917 0000D22E .data 1
948: 918 00000dae * L331:
949: 919 00000dae * 0A00 .ascii "\12\0"
950: 920 00000db0 * .text
951: 921 0000D22E dd 8f00000dae pushl $L331
952: 922 0000D234 fe 08 effffff809 callf $8,_writes
953: 923 0000D23B # }
954: 924 0000D23B # if( halt_flg )
955: 925 0000D23B L326:
956: 926 0000D23B 5d effffff803 tstl _halt_flg
957: 927 0000D241 31 09 jeql L332
958: 928 0000D243 # ldf_er_halt( BAD_PSL_HLT ); /* halt on the error */
959: 929 0000D243 dd 03 pushl $3
960: 930 0000D245 fe 08 ef0000032e callf $8,_ldf_er_halt
961: 931 0000D24C # if( loop_on_err ) {
962: 932 0000D24C L332:
963: 933 0000D24C 5d effffff7f2 tstl _loop_on_err
964: 934 0000D252 31 0a jeql L333
965: 935 0000D254 # force_loop = TRUE; /* set the force loop flag */
966: 936 0000D254 0d 01 effffff7e9 movl $1,_force_loop
967: 937 0000D25B # asm("brw _ldf_6_lp1");; /* and loop */
968: 938 0000D25B 13 fed6 brw _ldf_6_lp1
969: 939 0000D25E # }; /* end of loop-on-error */
970: 940 0000D25E L333:
971: 941 0000D25E # } /* end of compare error */
972: 942 0000D25E # if( ++status_index >= 3 )
973: 943 0000D25E L325:
974: 944 0000D25E 6d effffff7e0 incl _status_index
975: 945 0000D264 0d effffff7da 50 movl _status_index,r0
976: 946 0000D26B 1d 50 03 cmpl r0,$3
977: 947 0000D26E 91 06 jlss L334
978: 948 0000D270 # status_index = 0; /* reset the status index */
979: 949 0000D270 4d effffff7ce clrl _status_index
980: 950 0000D276 # } while( index++ < max_ldf_1_index );
981: 951 0000D276 L334:
982: 952 0000D276 L320:
983: 953 0000D276 0d effffff7c8 50 movl _index,r0
984: 954 0000D27D 6d effffff7c1 incl _index
985: 955 0000D283 1d 50 effffff7ba cmpl r0,_max_ldf_1_index
986: 956 0000D28A 81 03 13 fe7c jlss L321
987: 957 0000D28F L319:
988: 958 0000D28F # } /* end of subtest 6 */
989: 959 0000D28F 40 ret#2
990: 960 0000D290 .set L315,0x0
991: 961 0000D290 L317:
992: 962 0000D290 13 fe66 jbr L318
993: 963 0000D293 .data
994: 964 00000be8 * .text
995: 965 0000D293 00 .align 1
996: 966 0000D294 .globl _ldf_7
997: 967 0000D294 _ldf_7:
998: 968 0000D294 0000 .word L335
999: 969 0000D296 #
1000: 970 0000D296 #
1001: 971 0000D296 #
1002: 972 0000D296 # /************************************************************************
1003: 973 0000D296 # *
1004: 974 0000D296 # * SUBTEST 7 - pipelined entry test (ldf)
1005: 975 0000D296 # *
1006: 976 0000D296 # ************************************************************************/
1007: 977 0000D296 # ldf_7()
1008: 978 0000D296 # {
1009: 979 0000D296 13 0117 jbr L337
1010: 980 0000D299 L338:
1011: 981 0000D299 # force_loop = FALSE;
1012: 982 0000D299 4d effffff7a5 clrl _force_loop
1013: 983 0000D29F # subtest = 7;
1014: 984 0000D29F 0d 07 effffff79e movl $7,_subtest
1015: 985 0000D2A6 # for( index = 0; index < max_ldf_1_index; index++ ) {
1016: 986 0000D2A6 4d effffff798 clrl _index
1017: 987 0000D2AC L341:
1018: 988 0000D2AC 1d effffff792 effffff78d cmpl _index,_max_ldf_1_index
1019: 989 0000D2B7 91 03 13 00f3 jgeq L340
1020: 990 0000D2BC # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
1021: 991 0000D2BC 0d effffff782 50 movl _index,r0
1022: 992 0000D2C3 48 03 50 50 shll $3,r0,r0
1023: 993 0000D2C7 0d e000000000 effffff772 movl _ldf_1_data(r0),_sgl_ld_acc
1024: 994 0000D2D2 # sgl_expected = ldf_1_data[index].exp; /* get expected result */
1025: 995 0000D2D2 0d effffff76c 50 movl _index,r0
1026: 996 0000D2D9 48 03 50 50 shll $3,r0,r0
1027: 997 0000D2DD 0d e000000004 effffff75c movl _ldf_1_data+4(r0),_sgl_expected
1028: 998 0000D2E8 # /*
1029: 999 0000D2E8 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1030: 1000 0000D2E8 # * The force loop flag is set after the first error.
1031: 1001 0000D2E8 # */
1032: 1002 0000D2E8 # asm("_ldf_7_lp1:");
1033: 1003 0000D2E8 _ldf_7_lp1:
1034: 1004 0000D2E8 # asm("movl $0,r0"); /* clear r0 */
1035: 1005 0000D2E8 0d 00 50 movl $0,r0
1036: 1006 0000D2EB # asm("ldf r0"); /* load the Acc. with 0.0 */
1037: 1007 0000D2EB 06 50 ldf r0
1038: 1008 0000D2ED # asm("ldf _sgl_ld_acc"); /* load the value */
1039: 1009 0000D2ED 06 effffff751 ldf _sgl_ld_acc
1040: 1010 0000D2F3 # asm("nop");
1041: 1011 0000D2F3 10 nop
1042: 1012 0000D2F4 # asm("stf _sgl_st_acc"); /* store the result */
1043: 1013 0000D2F4 26 effffff74a stf _sgl_st_acc
1044: 1014 0000D2FA # if( force_loop )
1045: 1015 0000D2FA 5d effffff744 tstl _force_loop
1046: 1016 0000D300 31 02 jeql L342
1047: 1017 0000D302 # asm("brb _ldf_7_lp1");; /* loop on the error */
1048: 1018 0000D302 11 e4 brb _ldf_7_lp1
1049: 1019 0000D304 L342:
1050: 1020 0000D304 # /*
1051: 1021 0000D304 # * end error loop - test the results
1052: 1022 0000D304 # */
1053: 1023 0000D304 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1054: 1024 0000D304 1d effffff73a effffff735 cmpl _sgl_st_acc,_sgl_expected
1055: 1025 0000D30F 21 03 13 0092 jeql L343
1056: 1026 0000D314 # errcnt++; /* bump the error count */
1057: 1027 0000D314 6d effffff72a incl _errcnt
1058: 1028 0000D31A # if( prt_error ) {
1059: 1029 0000D31A 5d effffff724 tstl _prt_error
1060: 1030 0000D320 31 61 jeql L344
1061: 1031 0000D322 # print_ldf_er_hdr();
1062: 1032 0000D322 fe 04 ef000001a5 callf $4,_print_ldf_er_hdr
1063: 1033 0000D329 # writes(" (Piped Entry) - BAD FINAL ACC\n");
1064: 1034 0000D329 .data 1
1065: 1035 00000db0 * L345:
1066: 1036 00000db0 * 2028506970656420456E74727 .ascii " (Piped Entry) - BAD FINAL ACC\12\0"
1067: 929202D204241442046494E41
1068: 4C204143430A00
1069: 1037 00000dd0 * .text
1070: 1038 0000D329 dd 8f00000db0 pushl $L345
1071: 1039 0000D32F fe 08 effffff70e callf $8,_writes
1072: 1040 0000D336 # print_ldf_data();
1073: 1041 0000D336 fe 04 ef00000201 callf $4,_print_ldf_data
1074: 1042 0000D33D # writes(", data index = ");
1075: 1043 0000D33D .data 1
1076: 1044 00000dd0 * L346:
1077: 1045 00000dd0 * 2C20206461746120696E64657 .ascii ", data index = \0"
1078: 8203D2000
1079: 1046 00000de1 * .text
1080: 1047 0000D33D dd 8f00000dd0 pushl $L346
1081: 1048 0000D343 fe 08 effffff6fa callf $8,_writes
1082: 1049 0000D34A # writed( index );
1083: 1050 0000D34A dd effffff6f4 pushl _index
1084: 1051 0000D350 fe 08 effffff6ed callf $8,_writed
1085: 1052 0000D357 # writec('\n');
1086: 1053 0000D357 dd 0a pushl $10
1087: 1054 0000D359 fe 08 effffff6e4 callf $8,_writec
1088: 1055 0000D360 # writes(" Acc expected = ");
1089: 1056 0000D360 .data 1
1090: 1057 00000de1 * L347:
1091: 1058 00000de1 * 2020202020202020202020202 .ascii " Acc expected = \0"
1092: 0202020202020202020204163
1093: 63206578706563746564203D2
1094: 000
1095: 1059 00000e08 * .text
1096: 1060 0000D360 dd 8f00000de1 pushl $L347
1097: 1061 0000D366 fe 08 effffff6d7 callf $8,_writes
1098: 1062 0000D36D # write32h( sgl_expected );
1099: 1063 0000D36D dd effffff6d1 pushl _sgl_expected
1100: 1064 0000D373 fe 08 effffff6ca callf $8,_write32h
1101: 1065 0000D37A # writec('\n');
1102: 1066 0000D37A dd 0a pushl $10
1103: 1067 0000D37C fe 08 effffff6c1 callf $8,_writec
1104: 1068 0000D383 # }
1105: 1069 0000D383 # if( halt_flg )
1106: 1070 0000D383 L344:
1107: 1071 0000D383 5d effffff6bb tstl _halt_flg
1108: 1072 0000D389 31 09 jeql L348
1109: 1073 0000D38B # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1110: 1074 0000D38B dd 01 pushl $1
1111: 1075 0000D38D fe 08 ef000001e6 callf $8,_ldf_er_halt
1112: 1076 0000D394 # if( loop_on_err ) {
1113: 1077 0000D394 L348:
1114: 1078 0000D394 5d effffff6aa tstl _loop_on_err
1115: 1079 0000D39A 31 0a jeql L349
1116: 1080 0000D39C # force_loop = TRUE; /* set the force loop flag */
1117: 1081 0000D39C 0d 01 effffff6a1 movl $1,_force_loop
1118: 1082 0000D3A3 # asm("brw _ldf_7_lp1");; /* and loop on the error */
1119: 1083 0000D3A3 13 ff42 brw _ldf_7_lp1
1120: 1084 0000D3A6 # } /* end of loop on error */
1121: 1085 0000D3A6 # } /* end of compare error */
1122: 1086 0000D3A6 L349:
1123: 1087 0000D3A6 # } /* end of WHILE loop */
1124: 1088 0000D3A6 L343:
1125: 1089 0000D3A6 L339:
1126: 1090 0000D3A6 6d effffff698 incl _index
1127: 1091 0000D3AC 13 fefd jbr L341
1128: 1092 0000D3AF L340:
1129: 1093 0000D3AF # } /* end of subtest 7 */
1130: 1094 0000D3AF 40 ret#2
1131: 1095 0000D3B0 .set L335,0x0
1132: 1096 0000D3B0 L337:
1133: 1097 0000D3B0 13 fee6 jbr L338
1134: 1098 0000D3B3 .data
1135: 1099 00000be8 * .text
1136: 1100 0000D3B3 00 .align 1
1137: 1101 0000D3B4 .globl _ldf_8
1138: 1102 0000D3B4 _ldf_8:
1139: 1103 0000D3B4 0000 .word L351
1140: 1104 0000D3B6 #
1141: 1105 0000D3B6 #
1142: 1106 0000D3B6 #
1143: 1107 0000D3B6 # /************************************************************************
1144: 1108 0000D3B6 # *
1145: 1109 0000D3B6 # * SUBTEST 8 - pipelined entry test (stf)
1146: 1110 0000D3B6 # *
1147: 1111 0000D3B6 # ************************************************************************/
1148: 1112 0000D3B6 # ldf_8()
1149: 1113 0000D3B6 # {
1150: 1114 0000D3B6 13 0111 jbr L353
1151: 1115 0000D3B9 L354:
1152: 1116 0000D3B9 # force_loop = FALSE;
1153: 1117 0000D3B9 4d effffff685 clrl _force_loop
1154: 1118 0000D3BF # subtest = 8;
1155: 1119 0000D3BF 0d 08 effffff67e movl $8,_subtest
1156: 1120 0000D3C6 # for( index = 0; index < max_ldf_1_index; index++ ) {
1157: 1121 0000D3C6 4d effffff678 clrl _index
1158: 1122 0000D3CC L357:
1159: 1123 0000D3CC 1d effffff672 effffff66d cmpl _index,_max_ldf_1_index
1160: 1124 0000D3D7 91 03 13 00ed jgeq L356
1161: 1125 0000D3DC # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
1162: 1126 0000D3DC 0d effffff662 50 movl _index,r0
1163: 1127 0000D3E3 48 03 50 50 shll $3,r0,r0
1164: 1128 0000D3E7 0d e000000000 effffff652 movl _ldf_1_data(r0),_sgl_ld_acc
1165: 1129 0000D3F2 # sgl_expected = ldf_1_data[index].exp; /* get expected result */
1166: 1130 0000D3F2 0d effffff64c 50 movl _index,r0
1167: 1131 0000D3F9 48 03 50 50 shll $3,r0,r0
1168: 1132 0000D3FD 0d e000000004 effffff63c movl _ldf_1_data+4(r0),_sgl_expected
1169: 1133 0000D408 # /*
1170: 1134 0000D408 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1171: 1135 0000D408 # * The force loop flag is set after the first error.
1172: 1136 0000D408 # */
1173: 1137 0000D408 # asm("_ldf_8_lp1:");
1174: 1138 0000D408 _ldf_8_lp1:
1175: 1139 0000D408 # asm("ldf _sgl_ld_acc"); /* load the value */
1176: 1140 0000D408 06 effffff636 ldf _sgl_ld_acc
1177: 1141 0000D40E # asm("stf _sgl_st_acc"); /* store the result */
1178: 1142 0000D40E 26 effffff630 stf _sgl_st_acc
1179: 1143 0000D414 # if( force_loop )
1180: 1144 0000D414 5d effffff62a tstl _force_loop
1181: 1145 0000D41A 31 02 jeql L358
1182: 1146 0000D41C # asm("brb _ldf_8_lp1");; /* loop on the error */
1183: 1147 0000D41C 11 ea brb _ldf_8_lp1
1184: 1148 0000D41E L358:
1185: 1149 0000D41E # /*
1186: 1150 0000D41E # * end error loop - test the results
1187: 1151 0000D41E # */
1188: 1152 0000D41E # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1189: 1153 0000D41E 1d effffff620 effffff61b cmpl _sgl_st_acc,_sgl_expected
1190: 1154 0000D429 21 03 13 0092 jeql L359
1191: 1155 0000D42E # errcnt++; /* bump the error count */
1192: 1156 0000D42E 6d effffff610 incl _errcnt
1193: 1157 0000D434 # if( prt_error ) {
1194: 1158 0000D434 5d effffff60a tstl _prt_error
1195: 1159 0000D43A 31 61 jeql L360
1196: 1160 0000D43C # print_ldf_er_hdr();
1197: 1161 0000D43C fe 04 ef0000008b callf $4,_print_ldf_er_hdr
1198: 1162 0000D443 # writes(" (Piped Exit) - BAD FINAL ACC\n");
1199: 1163 0000D443 .data 1
1200: 1164 00000e08 * L361:
1201: 1165 00000e08 * 2028506970656420457869742 .ascii " (Piped Exit) - BAD FINAL ACC\12\0"
1202: 9202D204241442046494E414C
1203: 204143430A00
1204: 1166 00000e27 * .text
1205: 1167 0000D443 dd 8f00000e08 pushl $L361
1206: 1168 0000D449 fe 08 effffff5f4 callf $8,_writes
1207: 1169 0000D450 # print_ldf_data();
1208: 1170 0000D450 fe 04 ef000000e7 callf $4,_print_ldf_data
1209: 1171 0000D457 # writes(", data index = ");
1210: 1172 0000D457 .data 1
1211: 1173 00000e27 * L362:
1212: 1174 00000e27 * 2C20206461746120696E64657 .ascii ", data index = \0"
1213: 8203D2000
1214: 1175 00000e38 * .text
1215: 1176 0000D457 dd 8f00000e27 pushl $L362
1216: 1177 0000D45D fe 08 effffff5e0 callf $8,_writes
1217: 1178 0000D464 # writed( index );
1218: 1179 0000D464 dd effffff5da pushl _index
1219: 1180 0000D46A fe 08 effffff5d3 callf $8,_writed
1220: 1181 0000D471 # writec('\n');
1221: 1182 0000D471 dd 0a pushl $10
1222: 1183 0000D473 fe 08 effffff5ca callf $8,_writec
1223: 1184 0000D47A # writes(" Acc expected = ");
1224: 1185 0000D47A .data 1
1225: 1186 00000e38 * L363:
1226: 1187 00000e38 * 2020202020202020202020202 .ascii " Acc expected = \0"
1227: 0202020202020202020204163
1228: 63206578706563746564203D2
1229: 000
1230: 1188 00000e5f * .text
1231: 1189 0000D47A dd 8f00000e38 pushl $L363
1232: 1190 0000D480 fe 08 effffff5bd callf $8,_writes
1233: 1191 0000D487 # write32h( sgl_expected );
1234: 1192 0000D487 dd effffff5b7 pushl _sgl_expected
1235: 1193 0000D48D fe 08 effffff5b0 callf $8,_write32h
1236: 1194 0000D494 # writec('\n');
1237: 1195 0000D494 dd 0a pushl $10
1238: 1196 0000D496 fe 08 effffff5a7 callf $8,_writec
1239: 1197 0000D49D # }
1240: 1198 0000D49D # if( halt_flg )
1241: 1199 0000D49D L360:
1242: 1200 0000D49D 5d effffff5a1 tstl _halt_flg
1243: 1201 0000D4A3 31 09 jeql L364
1244: 1202 0000D4A5 # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1245: 1203 0000D4A5 dd 01 pushl $1
1246: 1204 0000D4A7 fe 08 ef000000cc callf $8,_ldf_er_halt
1247: 1205 0000D4AE # if( loop_on_err ) {
1248: 1206 0000D4AE L364:
1249: 1207 0000D4AE 5d effffff590 tstl _loop_on_err
1250: 1208 0000D4B4 31 0a jeql L365
1251: 1209 0000D4B6 # force_loop = TRUE; /* set the force loop flag */
1252: 1210 0000D4B6 0d 01 effffff587 movl $1,_force_loop
1253: 1211 0000D4BD # asm("brw _ldf_8_lp1");; /* and loop on the error */
1254: 1212 0000D4BD 13 ff48 brw _ldf_8_lp1
1255: 1213 0000D4C0 # } /* end of loop on error */
1256: 1214 0000D4C0 # } /* end of compare error */
1257: 1215 0000D4C0 L365:
1258: 1216 0000D4C0 # } /* end of WHILE loop */
1259: 1217 0000D4C0 L359:
1260: 1218 0000D4C0 L355:
1261: 1219 0000D4C0 6d effffff57e incl _index
1262: 1220 0000D4C6 13 ff03 jbr L357
1263: 1221 0000D4C9 L356:
1264: 1222 0000D4C9 # } /* end of subtest 8 */
1265: 1223 0000D4C9 40 ret#2
1266: 1224 0000D4CA .set L351,0x0
1267: 1225 0000D4CA L353:
1268: 1226 0000D4CA 13 feec jbr L354
1269: 1227 0000D4CD .data
1270: 1228 00000be8 * .text
1271: 1229 0000D4CD 00 .align 1
1272: 1230 0000D4CE .globl _print_ldf_er_hdr
1273: 1231 0000D4CE _print_ldf_er_hdr:
1274: 1232 0000D4CE 0000 .word L366
1275: 1233 0000D4D0 #
1276: 1234 0000D4D0 #
1277: 1235 0000D4D0 #
1278: 1236 0000D4D0 # /**************************************************************************
1279: 1237 0000D4D0 # *
1280: 1238 0000D4D0 # * PRINT THE ERROR MESSAGE HEADER
1281: 1239 0000D4D0 # *
1282: 1240 0000D4D0 # **************************************************************************/
1283: 1241 0000D4D0 # print_ldf_er_hdr()
1284: 1242 0000D4D0 # {
1285: 1243 0000D4D0 11 69 jbr L368
1286: 1244 0000D4D2 L369:
1287: 1245 0000D4D2 # writes(" \n"); /* start a new print line */
1288: 1246 0000D4D2 .data 1
1289: 1247 00000e5f * L370:
1290: 1248 00000e5f * 200A00 .ascii " \12\0"
1291: 1249 00000e62 * .text
1292: 1250 0000D4D2 dd 8f00000e5f pushl $L370
1293: 1251 0000D4D8 fe 08 effffff565 callf $8,_writes
1294: 1252 0000D4DF # writes("cycle: "); /* print the cycle count */
1295: 1253 0000D4DF .data 1
1296: 1254 00000e62 * L371:
1297: 1255 00000e62 * 6379636C653A2000 .ascii "cycle: \0"
1298: 1256 00000e6a * .text
1299: 1257 0000D4DF dd 8f00000e62 pushl $L371
1300: 1258 0000D4E5 fe 08 effffff558 callf $8,_writes
1301: 1259 0000D4EC # writed( cycle );
1302: 1260 0000D4EC dd effffff552 pushl _cycle
1303: 1261 0000D4F2 fe 08 effffff54b callf $8,_writed
1304: 1262 0000D4F9 # writes(" LDF_STF "); /* print test name header */
1305: 1263 0000D4F9 .data 1
1306: 1264 00000e6a * L372:
1307: 1265 00000e6a * 20204C44465F5354462000 .ascii " LDF_STF \0"
1308: 1266 00000e75 * .text
1309: 1267 0000D4F9 dd 8f00000e6a pushl $L372
1310: 1268 0000D4FF fe 08 effffff53e callf $8,_writes
1311: 1269 0000D506 # writes("test "); /* print the test number */
1312: 1270 0000D506 .data 1
1313: 1271 00000e75 * L373:
1314: 1272 00000e75 * 746573742000 .ascii "test \0"
1315: 1273 00000e7b * .text
1316: 1274 0000D506 dd 8f00000e75 pushl $L373
1317: 1275 0000D50C fe 08 effffff531 callf $8,_writes
1318: 1276 0000D513 # writed( test_no );
1319: 1277 0000D513 dd effffff52b pushl _test_no
1320: 1278 0000D519 fe 08 effffff524 callf $8,_writed
1321: 1279 0000D520 # writes(", subtest "); /* print subtest number */
1322: 1280 0000D520 .data 1
1323: 1281 00000e7b * L374:
1324: 1282 00000e7b * 2C20737562746573742000 .ascii ", subtest \0"
1325: 1283 00000e86 * .text
1326: 1284 0000D520 dd 8f00000e7b pushl $L374
1327: 1285 0000D526 fe 08 effffff517 callf $8,_writes
1328: 1286 0000D52D # writed( subtest );
1329: 1287 0000D52D dd effffff511 pushl _subtest
1330: 1288 0000D533 fe 08 effffff50a callf $8,_writed
1331: 1289 0000D53A # }
1332: 1290 0000D53A 40 ret#2
1333: 1291 0000D53B .set L366,0x0
1334: 1292 0000D53B L368:
1335: 1293 0000D53B 11 95 jbr L369
1336: 1294 0000D53D .data
1337: 1295 00000be8 * .text
1338: 1296 0000D53D 00 .align 1
1339: 1297 0000D53E .globl _print_ldf_data
1340: 1298 0000D53E _print_ldf_data:
1341: 1299 0000D53E 0000 .word L375
1342: 1300 0000D540 #
1343: 1301 0000D540 #
1344: 1302 0000D540 #
1345: 1303 0000D540 # /**************************************************************************
1346: 1304 0000D540 # *
1347: 1305 0000D540 # * PRINT THE DATA AND STORE RESULTS
1348: 1306 0000D540 # *
1349: 1307 0000D540 # * Acc loaded = xxxxxxxx, Acc stored = xxxxxxxx, data index = xx
1350: 1308 0000D540 # * Acc expected = xxxxxxxx
1351: 1309 0000D540 # **************************************************************************/
1352: 1310 0000D540 # print_ldf_data()
1353: 1311 0000D540 # {
1354: 1312 0000D540 11 35 jbr L377
1355: 1313 0000D542 L378:
1356: 1314 0000D542 # writes(" Acc loaded = ");
1357: 1315 0000D542 .data 1
1358: 1316 00000e86 * L379:
1359: 1317 00000e86 * 20416363206C6F61646564203 .ascii " Acc loaded = \0"
1360: D2000
1361: 1318 00000e95 * .text
1362: 1319 0000D542 dd 8f00000e86 pushl $L379
1363: 1320 0000D548 fe 08 effffff4f5 callf $8,_writes
1364: 1321 0000D54F # write32h( sgl_ld_acc );
1365: 1322 0000D54F dd effffff4ef pushl _sgl_ld_acc
1366: 1323 0000D555 fe 08 effffff4e8 callf $8,_write32h
1367: 1324 0000D55C # writes(", Acc stored = ");
1368: 1325 0000D55C .data 1
1369: 1326 00000e95 * L380:
1370: 1327 00000e95 * 2C20204163632073746F72656 .ascii ", Acc stored = \0"
1371: 4203D2000
1372: 1328 00000ea6 * .text
1373: 1329 0000D55C dd 8f00000e95 pushl $L380
1374: 1330 0000D562 fe 08 effffff4db callf $8,_writes
1375: 1331 0000D569 # write32h( sgl_st_acc );
1376: 1332 0000D569 dd effffff4d5 pushl _sgl_st_acc
1377: 1333 0000D56F fe 08 effffff4ce callf $8,_write32h
1378: 1334 0000D576 # }
1379: 1335 0000D576 40 ret#2
1380: 1336 0000D577 .set L375,0x0
1381: 1337 0000D577 L377:
1382: 1338 0000D577 11 c9 jbr L378
1383: 1339 0000D579 .data
1384: 1340 00000be8 * .text
1385: 1341 0000D579 00 .align 1
1386: 1342 0000D57A .globl _ldf_er_halt
1387: 1343 0000D57A _ldf_er_halt:
1388: 1344 0000D57A 0000 .word L381
1389: 1345 0000D57C #
1390: 1346 0000D57C #
1391: 1347 0000D57C #
1392: 1348 0000D57C # /**************************************************************************
1393: 1349 0000D57C # *
1394: 1350 0000D57C # * HALT ON ERROR ROUTINE
1395: 1351 0000D57C # *
1396: 1352 0000D57C # **************************************************************************/
1397: 1353 0000D57C # ldf_er_halt( halt_code )
1398: 1354 0000D57C # int halt_code;
1399: 1355 0000D57C # {
1400: 1356 0000D57C 13 00a8 jbr L383
1401: 1357 0000D57F L384:
1402: 1358 0000D57F # sgl_dummy1 = halt_code; /* get the error type */
1403: 1359 0000D57F 0d ad04 effffff4bd movl 4(fp),_sgl_dummy1
1404: 1360 0000D587 # asm("movl _test_no,r0"); /* r0 = test number */
1405: 1361 0000D587 0d effffff4b7 50 movl _test_no,r0
1406: 1362 0000D58E # asm("movl _subtest,r1"); /* r1 = subtest number */
1407: 1363 0000D58E 0d effffff4b0 51 movl _subtest,r1
1408: 1364 0000D595 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1409: 1365 0000D595 0d effffff4a9 52 movl _sgl_dummy1,r2
1410: 1366 0000D59C # asm("movl _cycle,r3"); /* r3 = cycle count */
1411: 1367 0000D59C 0d effffff4a2 53 movl _cycle,r3
1412: 1368 0000D5A3 # asm("movl _sgl_ld_acc,r4"); /* r4 = data loaded */
1413: 1369 0000D5A3 0d effffff49b 54 movl _sgl_ld_acc,r4
1414: 1370 0000D5AA # asm("movl _sgl_st_acc,r5"); /* r5 = data stored */
1415: 1371 0000D5AA 0d effffff494 55 movl _sgl_st_acc,r5
1416: 1372 0000D5B1 # if( halt_code == BAD_ACC_HLT ) {
1417: 1373 0000D5B1 1d ad04 01 cmpl 4(fp),$1
1418: 1374 0000D5B5 21 10 jneq L385
1419: 1375 0000D5B7 # asm("movl _sgl_expected,r6"); /* r6 = data expected */
1420: 1376 0000D5B7 0d effffff487 56 movl _sgl_expected,r6
1421: 1377 0000D5BE # asm("movl _index,r7"); /* r7 = data index */
1422: 1378 0000D5BE 0d effffff480 57 movl _index,r7
1423: 1379 0000D5C5 # } else
1424: 1380 0000D5C5 11 5e jbr L386
1425: 1381 0000D5C7 L385:
1426: 1382 0000D5C7 # if( halt_code == BAD_REG_HLT ) {
1427: 1383 0000D5C7 1d ad04 02 cmpl 4(fp),$2
1428: 1384 0000D5CB 21 3d jneq L387
1429: 1385 0000D5CD # sgl_dummy1 = load_regs[index2];
1430: 1386 0000D5CD 0d effffff471 50 movl _index2,r0
1431: 1387 0000D5D4 0d 40effffff469 movl _load_regs[r0],_sgl_dummy1
1432: effffff464
1433: 1388 0000D5E0 # sgl_dummy2 = store_regs[index2];
1434: 1389 0000D5E0 0d effffff45e 50 movl _index2,r0
1435: 1390 0000D5E7 0d 40effffff456 movl _store_regs[r0],_sgl_dummy2
1436: effffff451
1437: 1391 0000D5F3 # asm("movl _index2,r6"); /* r6 = bad register # */
1438: 1392 0000D5F3 0d effffff44b 56 movl _index2,r6
1439: 1393 0000D5FA # asm("movl _sgl_dummy2,r7"); /* r7 = final reg value */
1440: 1394 0000D5FA 0d effffff444 57 movl _sgl_dummy2,r7
1441: 1395 0000D601 # asm("movl _sgl_dummy1,r8"); /* r8 = expected value */
1442: 1396 0000D601 0d effffff43d 58 movl _sgl_dummy1,r8
1443: 1397 0000D608 # } else
1444: 1398 0000D608 11 1b jbr L388
1445: 1399 0000D60A L387:
1446: 1400 0000D60A # if( halt_code == BAD_PSL_HLT ) {
1447: 1401 0000D60A 1d ad04 03 cmpl 4(fp),$3
1448: 1402 0000D60E 21 15 jneq L389
1449: 1403 0000D610 # asm("movl _init_psl,r6"); /* r6 = initial PSL */
1450: 1404 0000D610 0d effffff42e 56 movl _init_psl,r6
1451: 1405 0000D617 # asm("movl _psl_val,r7"); /* r7 = final PSL */
1452: 1406 0000D617 0d effffff427 57 movl _psl_val,r7
1453: 1407 0000D61E # asm("movl _exp_psl,r8"); /* r8 = expected PSL */
1454: 1408 0000D61E 0d effffff420 58 movl _exp_psl,r8
1455: 1409 0000D625 # };
1456: 1410 0000D625 L389:
1457: 1411 0000D625 L388:
1458: 1412 0000D625 L386:
1459: 1413 0000D625 # asm("halt"); /* HALT ... */
1460: 1414 0000D625 00 halt
1461: 1415 0000D626 # }
1462: 1416 0000D626 40 ret#2
1463: 1417 0000D627 .set L381,0x0
1464: 1418 0000D627 L383:
1465: 1419 0000D627 13 ff55 jbr L384
1466: 1420 0000D62A .data
1467: 1420 0001A06E .data
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