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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to ldf_stf.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000be8 * .text
4 00000000 .align 1
5 00000000 .globl _ldf
6 00000000 _ldf:
7 0000CA44 0000 .word L215
8 0000CA46 # #include "fpp_defs.h"
9 0000CA46 #
10 0000CA46 #
11 0000CA46 # /*****************************************************************************
12 0000CA46 # *
13 0000CA46 # * LDF_STF - SINGLE PRECISION FLOATING POINT LOAD_STORE TEST
14 0000CA46 # *
15 0000CA46 # *****************************************************************************/
16 0000CA46 # ldf()
17 0000CA46 # {
18 0000CA46 11 56 jbr L217
19 0000CA48 L218:
20 0000CA48 # asm(".globl _ldf_t");
21 0000CA48 .globl _ldf_t
22 0000CA48 # asm("_ldf_t:"); /* entry address */
23 0000CA48 _ldf_t:
24 0000CA48 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st cycle */
25 0000CA48 1d effffffff6 01 cmpl _cycle,$1
26 0000CA4F 21 15 jneq L219
27 0000CA51 5d efffffffed tstl _prt_hdrs
28 0000CA57 31 0d jeql L219
29 0000CA59 # writes(" LDF_STF");
30 0000CA59 .data 1
31 00000be8 * L221:
32 00000be8 * 204C44465F53544600 .ascii " LDF_STF\0"
33 00000bf1 * .text
34 0000CA59 dd 8f00000be8 pushl $L221
35 0000CA5F fe 08 efffffffde callf $8,_writes
36 0000CA66 # ldf_1(); /* load through a register */
37 0000CA66 L219:
38 0000CA66 fe 04 ef00000033 callf $4,_ldf_1
39 0000CA6D # ldf_2(); /* load through the cache */
40 0000CA6D fe 04 ef0000014c callf $4,_ldf_2
41 0000CA74 # ldf_3(); /* register stability ldf */
42 0000CA74 fe 04 ef0000025f callf $4,_ldf_3
43 0000CA7B # ldf_4(); /* register stability stf */
44 0000CA7B fe 04 ef000003bc callf $4,_ldf_4
45 0000CA82 # ldf_5(); /* PSL stability test -LDF */
46 0000CA82 fe 04 ef00000519 callf $4,_ldf_5
47 0000CA89 # ldf_6(); /* PSL stability test -STF */
48 0000CA89 fe 04 ef00000664 callf $4,_ldf_6
49 0000CA90 # ldf_7(); /* pipelined entry test */
50 0000CA90 fe 04 ef000007fd callf $4,_ldf_7
51 0000CA97 # asm("jmp *return"); /* return to the test monitor */
52 0000CA97 71 ffffffffa7 jmp *return
53 0000CA9D # }
54 0000CA9D 40 ret#2
55 0000CA9E .set L215,0x0
56 0000CA9E L217:
57 0000CA9E 11 a8 jbr L218
58 0000CAA0 .data
59 00000be8 * .text
60 0000CAA0 .align 1
61 0000CAA0 .globl _ldf_1
62 0000CAA0 _ldf_1:
63 0000CAA0 0000 .word L229
64 0000CAA2 #
65 0000CAA2 #
66 0000CAA2 # /************************************************************************
67 0000CAA2 # *
68 0000CAA2 # * SUBTEST 1 - load through a register
69 0000CAA2 # *
70 0000CAA2 # ************************************************************************/
71 0000CAA2 # ldf_1()
72 0000CAA2 # {
73 0000CAA2 13 0118 jbr L231
74 0000CAA5 L232:
75 0000CAA5 # force_loop = FALSE;
76 0000CAA5 4d efffffff99 clrl _force_loop
77 0000CAAB # subtest = 1;
78 0000CAAB 0d 01 efffffff92 movl $1,_subtest
79 0000CAB2 # for( index = 0; index < max_ldf_1_index; index++ ) {
80 0000CAB2 4d efffffff8c clrl _index
81 0000CAB8 L235:
82 0000CAB8 1d efffffff86 efffffff81 cmpl _index,_max_ldf_1_index
83 0000CAC3 91 03 13 00f4 jgeq L234
84 0000CAC8 # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
85 0000CAC8 0d efffffff76 50 movl _index,r0
86 0000CACF 48 03 50 50 shll $3,r0,r0
87 0000CAD3 0d e000000000 efffffff66 movl _ldf_1_data(r0),_sgl_ld_acc
88 0000CADE # sgl_expected = ldf_1_data[index].exp; /* get expected result */
89 0000CADE 0d efffffff60 50 movl _index,r0
90 0000CAE5 48 03 50 50 shll $3,r0,r0
91 0000CAE9 0d e000000004 efffffff50 movl _ldf_1_data+4(r0),_sgl_expected
92 0000CAF4 # /*
93 0000CAF4 # * If LOOP ON ERROR is set, this is the loop for this subtest.
94 0000CAF4 # * The force loop flag is set after the first error.
95 0000CAF4 # */
96 0000CAF4 # asm("_ldf_1_lp1:");
97 0000CAF4 _ldf_1_lp1:
98 0000CAF4 # asm("movl _sgl_ld_acc,r4"); /* get the value to load */
99 0000CAF4 0d efffffff4a 54 movl _sgl_ld_acc,r4
100 0000CAFB # asm("ldf r4"); /* load the value */
101 0000CAFB 06 54 ldf r4
102 0000CAFD # asm("nop");
103 0000CAFD 10 nop
104 0000CAFE # asm("stf r5"); /* store the result in R5 */
105 0000CAFE 26 55 stf r5
106 0000CB00 # if( force_loop )
107 0000CB00 5d efffffff3e tstl _force_loop
108 0000CB06 31 02 jeql L236
109 0000CB08 # asm("brb _ldf_1_lp1");; /* loop on the error */
110 0000CB08 11 ea brb _ldf_1_lp1
111 0000CB0A L236:
112 0000CB0A # /*
113 0000CB0A # * end error loop - test the results
114 0000CB0A # */
115 0000CB0A # asm("movl r5,_sgl_st_acc"); /* move R5 data to cache */
116 0000CB0A 0d 55 efffffff33 movl r5,_sgl_st_acc
117 0000CB11 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
118 0000CB11 1d efffffff2d efffffff28 cmpl _sgl_st_acc,_sgl_expected
119 0000CB1C 21 03 13 0092 jeql L237
120 0000CB21 # errcnt++; /* bump the error count */
121 0000CB21 6d efffffff1d incl _errcnt
122 0000CB27 # if( prt_error ) {
123 0000CB27 5d efffffff17 tstl _prt_error
124 0000CB2D 31 61 jeql L238
125 0000CB2F # print_ldf_er_hdr();
126 0000CB2F fe 04 ef00000998 callf $4,_print_ldf_er_hdr
127 0000CB36 # writes(" (Reg. Data) - BAD FINAL ACC\n");
128 0000CB36 .data 1
129 00000bf1 * L240:
130 00000bf1 * 20285265672E2044617461292 .ascii " (Reg. Data) - BAD FINAL ACC\12\0"
02D204241442046494E414C20
4143430A00
131 00000c0f * .text
132 0000CB36 dd 8f00000bf1 pushl $L240
133 0000CB3C fe 08 efffffff01 callf $8,_writes
134 0000CB43 # print_ldf_data();
135 0000CB43 fe 04 ef000009f4 callf $4,_print_ldf_data
136 0000CB4A # writes(", data index = ");
137 0000CB4A .data 1
138 00000c0f * L242:
139 00000c0f * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
140 00000c20 * .text
141 0000CB4A dd 8f00000c0f pushl $L242
142 0000CB50 fe 08 effffffeed callf $8,_writes
143 0000CB57 # writed( index );
144 0000CB57 dd effffffee7 pushl _index
145 0000CB5D fe 08 effffffee0 callf $8,_writed
146 0000CB64 # writec('\n');
147 0000CB64 dd 0a pushl $10
148 0000CB66 fe 08 effffffed7 callf $8,_writec
149 0000CB6D # writes(" Acc expected = ");
150 0000CB6D .data 1
151 00000c20 * L245:
152 00000c20 * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020204163
63206578706563746564203D2
000
153 00000c47 * .text
154 0000CB6D dd 8f00000c20 pushl $L245
155 0000CB73 fe 08 effffffeca callf $8,_writes
156 0000CB7A # write32h( sgl_expected );
157 0000CB7A dd effffffec4 pushl _sgl_expected
158 0000CB80 fe 08 effffffebd callf $8,_write32h
159 0000CB87 # writec('\n');
160 0000CB87 dd 0a pushl $10
161 0000CB89 fe 08 effffffeb4 callf $8,_writec
162 0000CB90 # }
163 0000CB90 # if( halt_flg )
164 0000CB90 L238:
165 0000CB90 5d effffffeae tstl _halt_flg
166 0000CB96 31 09 jeql L247
167 0000CB98 # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
168 0000CB98 dd 01 pushl $1
169 0000CB9A fe 08 ef000009d9 callf $8,_ldf_er_halt
170 0000CBA1 # if( loop_on_err ) {
171 0000CBA1 L247:
172 0000CBA1 5d effffffe9d tstl _loop_on_err
173 0000CBA7 31 0a jeql L249
174 0000CBA9 # force_loop = TRUE; /* set the force loop flag */
175 0000CBA9 0d 01 effffffe94 movl $1,_force_loop
176 0000CBB0 # asm("brw _ldf_1_lp1");; /* and loop on the error */
177 0000CBB0 13 ff41 brw _ldf_1_lp1
178 0000CBB3 # } /* end of loop on error */
179 0000CBB3 # } /* end of compare error */
180 0000CBB3 L249:
181 0000CBB3 # } /* end of WHILE loop */
182 0000CBB3 L237:
183 0000CBB3 L233:
184 0000CBB3 6d effffffe8b incl _index
185 0000CBB9 13 fefc jbr L235
186 0000CBBC L234:
187 0000CBBC # } /* end of subtest 1 */
188 0000CBBC 40 ret#2
189 0000CBBD .set L229,0x0
190 0000CBBD L231:
191 0000CBBD 13 fee5 jbr L232
192 0000CBC0 .data
193 00000be8 * .text
194 0000CBC0 .align 1
195 0000CBC0 .globl _ldf_2
196 0000CBC0 _ldf_2:
197 0000CBC0 0000 .word L250
198 0000CBC2 #
199 0000CBC2 #
200 0000CBC2 #
201 0000CBC2 # /************************************************************************
202 0000CBC2 # *
203 0000CBC2 # * SUBTEST 2 - load through memory
204 0000CBC2 # *
205 0000CBC2 # ************************************************************************/
206 0000CBC2 # ldf_2()
207 0000CBC2 # {
208 0000CBC2 13 0112 jbr L252
209 0000CBC5 L253:
210 0000CBC5 # force_loop = FALSE;
211 0000CBC5 4d effffffe79 clrl _force_loop
212 0000CBCB # subtest = 2;
213 0000CBCB 0d 02 effffffe72 movl $2,_subtest
214 0000CBD2 # for( index = 0; index < max_ldf_1_index; index++ ) {
215 0000CBD2 4d effffffe6c clrl _index
216 0000CBD8 L256:
217 0000CBD8 1d effffffe66 effffffe61 cmpl _index,_max_ldf_1_index
218 0000CBE3 91 03 13 00ee jgeq L255
219 0000CBE8 # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
220 0000CBE8 0d effffffe56 50 movl _index,r0
221 0000CBEF 48 03 50 50 shll $3,r0,r0
222 0000CBF3 0d e000000000 effffffe46 movl _ldf_1_data(r0),_sgl_ld_acc
223 0000CBFE # sgl_expected = ldf_1_data[index].exp; /* get expected result */
224 0000CBFE 0d effffffe40 50 movl _index,r0
225 0000CC05 48 03 50 50 shll $3,r0,r0
226 0000CC09 0d e000000004 effffffe30 movl _ldf_1_data+4(r0),_sgl_expected
227 0000CC14 # /*
228 0000CC14 # * If LOOP ON ERROR is set, this is the loop for this subtest.
229 0000CC14 # * The force loop flag is set after the first error.
230 0000CC14 # */
231 0000CC14 # asm("_ldf_2_lp1:");
232 0000CC14 _ldf_2_lp1:
233 0000CC14 # asm("ldf _sgl_ld_acc"); /* load the value */
234 0000CC14 06 effffffe2a ldf _sgl_ld_acc
235 0000CC1A # asm("nop");
236 0000CC1A 10 nop
237 0000CC1B # asm("stf _sgl_st_acc"); /* store the result */
238 0000CC1B 26 effffffe23 stf _sgl_st_acc
239 0000CC21 # if( force_loop )
240 0000CC21 5d effffffe1d tstl _force_loop
241 0000CC27 31 02 jeql L257
242 0000CC29 # asm("brb _ldf_2_lp1");; /* loop on the error */
243 0000CC29 11 e9 brb _ldf_2_lp1
244 0000CC2B L257:
245 0000CC2B # /*
246 0000CC2B # * end error loop - test the results
247 0000CC2B # */
248 0000CC2B # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
249 0000CC2B 1d effffffe13 effffffe0e cmpl _sgl_st_acc,_sgl_expected
250 0000CC36 21 03 13 0092 jeql L258
251 0000CC3B # errcnt++; /* bump the error count */
252 0000CC3B 6d effffffe03 incl _errcnt
253 0000CC41 # if( prt_error ) {
254 0000CC41 5d effffffdfd tstl _prt_error
255 0000CC47 31 61 jeql L259
256 0000CC49 # print_ldf_er_hdr();
257 0000CC49 fe 04 ef0000087e callf $4,_print_ldf_er_hdr
258 0000CC50 # writes(" (Cache Data) - BAD FINAL ACC\n");
259 0000CC50 .data 1
260 00000c47 * L260:
261 00000c47 * 2028436163686520446174612 .ascii " (Cache Data) - BAD FINAL ACC\12\0"
9202D204241442046494E414C
204143430A00
262 00000c66 * .text
263 0000CC50 dd 8f00000c47 pushl $L260
264 0000CC56 fe 08 effffffde7 callf $8,_writes
265 0000CC5D # print_ldf_data();
266 0000CC5D fe 04 ef000008da callf $4,_print_ldf_data
267 0000CC64 # writes(", data index = ");
268 0000CC64 .data 1
269 00000c66 * L261:
270 00000c66 * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
271 00000c77 * .text
272 0000CC64 dd 8f00000c66 pushl $L261
273 0000CC6A fe 08 effffffdd3 callf $8,_writes
274 0000CC71 # writed( index );
275 0000CC71 dd effffffdcd pushl _index
276 0000CC77 fe 08 effffffdc6 callf $8,_writed
277 0000CC7E # writec('\n');
278 0000CC7E dd 0a pushl $10
279 0000CC80 fe 08 effffffdbd callf $8,_writec
280 0000CC87 # writes(" Acc expected = ");
281 0000CC87 .data 1
282 00000c77 * L262:
283 00000c77 * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020204163
63206578706563746564203D2
000
284 00000c9e * .text
285 0000CC87 dd 8f00000c77 pushl $L262
286 0000CC8D fe 08 effffffdb0 callf $8,_writes
287 0000CC94 # write32h( sgl_expected );
288 0000CC94 dd effffffdaa pushl _sgl_expected
289 0000CC9A fe 08 effffffda3 callf $8,_write32h
290 0000CCA1 # writec('\n');
291 0000CCA1 dd 0a pushl $10
292 0000CCA3 fe 08 effffffd9a callf $8,_writec
293 0000CCAA # }
294 0000CCAA # if( halt_flg )
295 0000CCAA L259:
296 0000CCAA 5d effffffd94 tstl _halt_flg
297 0000CCB0 31 09 jeql L263
298 0000CCB2 # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
299 0000CCB2 dd 01 pushl $1
300 0000CCB4 fe 08 ef000008bf callf $8,_ldf_er_halt
301 0000CCBB # if( loop_on_err ) {
302 0000CCBB L263:
303 0000CCBB 5d effffffd83 tstl _loop_on_err
304 0000CCC1 31 0a jeql L264
305 0000CCC3 # force_loop = TRUE; /* set the force loop flag */
306 0000CCC3 0d 01 effffffd7a movl $1,_force_loop
307 0000CCCA # asm("brw _ldf_2_lp1");; /* and loop on the error */
308 0000CCCA 13 ff47 brw _ldf_2_lp1
309 0000CCCD # } /* end of loop on error */
310 0000CCCD # } /* end of compare error */
311 0000CCCD L264:
312 0000CCCD # } /* end of WHILE loop */
313 0000CCCD L258:
314 0000CCCD L254:
315 0000CCCD 6d effffffd71 incl _index
316 0000CCD3 13 ff02 jbr L256
317 0000CCD6 L255:
318 0000CCD6 # } /* end of subtest 2 */
319 0000CCD6 40 ret#2
320 0000CCD7 .set L250,0x0
321 0000CCD7 L252:
322 0000CCD7 13 feeb jbr L253
323 0000CCDA .data
324 00000be8 * .text
325 0000CCDA .align 1
326 0000CCDA .globl _ldf_3
327 0000CCDA _ldf_3:
328 0000CCDA 0000 .word L265
329 0000CCDC #
330 0000CCDC #
331 0000CCDC #
332 0000CCDC # /************************************************************************
333 0000CCDC # *
334 0000CCDC # * SUBTEST 3 - Check for register corruption (ldf)
335 0000CCDC # *
336 0000CCDC # ************************************************************************/
337 0000CCDC # ldf_3()
338 0000CCDC # {
339 0000CCDC 13 015c jbr L267
340 0000CCDF L268:
341 0000CCDF # force_loop = FALSE; /* clear force_loop flg */
342 0000CCDF 4d effffffd5f clrl _force_loop
343 0000CCE5 # subtest = 3;
344 0000CCE5 0d 03 effffffd58 movl $3,_subtest
345 0000CCEC # fill_reg_buf( load_regs ); /* get patterns for regs */
346 0000CCEC dd 8f00000000 pushl $_load_regs
347 0000CCF2 fe 08 effffffd4b callf $8,_fill_reg_buf
348 0000CCF9 # index = 0;
349 0000CCF9 4d effffffd45 clrl _index
350 0000CCFF # sgl_ld_acc = ldf_1_data[0].ld; /* get value to load */
351 0000CCFF 0d effffffd3f effffffd3a movl _ldf_1_data,_sgl_ld_acc
352 0000CD0A # sgl_expected = ldf_1_data[0].exp; /* get expected result */
353 0000CD0A 0d effffffd38 effffffd2f movl _ldf_1_data+4,_sgl_expected
354 0000CD15 # /*
355 0000CD15 # * If LOOP ON ERROR is set, this is the loop for this subtest.
356 0000CD15 # * The force loop flag is set after the first error.
357 0000CD15 # */
358 0000CD15 # asm("_ldf_3_lp1:");
359 0000CD15 _ldf_3_lp1:
360 0000CD15 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
361 0000CD15 ab 891fff effffffd26 loadr $0x1fff,_load_regs
362 0000CD1E # asm("nop");
363 0000CD1E 10 nop
364 0000CD1F # asm("ldf _sgl_ld_acc"); /* load the accumulator */
365 0000CD1F 06 effffffd1f ldf _sgl_ld_acc
366 0000CD25 # asm("nop");
367 0000CD25 10 nop
368 0000CD26 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
369 0000CD26 bb 891fff effffffd15 storer $0x1fff,_store_regs
370 0000CD2F # asm("nop");
371 0000CD2F 10 nop
372 0000CD30 # asm("stf _sgl_st_acc"); /* save the accumulator */
373 0000CD30 26 effffffd0e stf _sgl_st_acc
374 0000CD36 # if( force_loop )
375 0000CD36 5d effffffd08 tstl _force_loop
376 0000CD3C 31 02 jeql L270
377 0000CD3E # asm("brb _ldf_3_lp1");; /* loop on the error */
378 0000CD3E 11 d5 brb _ldf_3_lp1
379 0000CD40 L270:
380 0000CD40 # /*
381 0000CD40 # * Now compare the stored register values to those that were loaded
382 0000CD40 # */
383 0000CD40 # index2 = 0;
384 0000CD40 4d effffffcfe clrl _index2
385 0000CD46 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
386 0000CD46 L271:
387 0000CD46 0d effffffcf8 50 movl _index2,r0
388 0000CD4D 0d effffffcf1 51 movl _index2,r1
389 0000CD54 1d 40effffffce9 cmpl _load_regs[r0],_store_regs[r1]
41effffffce3
390 0000CD61 21 11 jneq L272
391 0000CD63 1d effffffcdb 0d cmpl _index2,$13
392 0000CD6A 81 08 jgeq L272
393 0000CD6C # index2++; /* check reg values */
394 0000CD6C 6d effffffcd2 incl _index2
395 0000CD72 11 d2 jbr L271
396 0000CD74 L272:
397 0000CD74 # if( index2 < 13 ) { /* error if index2 < 13 */
398 0000CD74 1d effffffcca 0d cmpl _index2,$13
399 0000CD7B 91 03 13 00ba jgeq L273
400 0000CD80 # errcnt++; /* bump the error count */
401 0000CD80 6d effffffcbe incl _errcnt
402 0000CD86 # if( prt_error ) {
403 0000CD86 5d effffffcb8 tstl _prt_error
404 0000CD8C 21 03 13 0086 jeql L274
405 0000CD91 # print_ldf_er_hdr();
406 0000CD91 fe 04 ef00000736 callf $4,_print_ldf_er_hdr
407 0000CD98 # writes(" - A REGISTER WAS MODIFIED\n");
408 0000CD98 .data 1
409 00000c9e * L275:
410 00000c9e * 202D204120524547495354455 .ascii " - A REGISTER WAS MODIFIED\12\0"
220574153204D4F4449464945
440A00
411 00000cba * .text
412 0000CD98 dd 8f00000c9e pushl $L275
413 0000CD9E fe 08 effffffc9f callf $8,_writes
414 0000CDA5 # print_ldf_data();
415 0000CDA5 fe 04 ef00000792 callf $4,_print_ldf_data
416 0000CDAC # writes("register "); /* print the information */
417 0000CDAC .data 1
418 00000cba * L276:
419 00000cba * 72656769737465722000 .ascii "register \0"
420 00000cc4 * .text
421 0000CDAC dd 8f00000cba pushl $L276
422 0000CDB2 fe 08 effffffc8b callf $8,_writes
423 0000CDB9 # writed( index2 ); /* about the corrupted */
424 0000CDB9 dd effffffc85 pushl _index2
425 0000CDBF fe 08 effffffc7e callf $8,_writed
426 0000CDC6 # writes(" = "); /* register */
427 0000CDC6 .data 1
428 00000cc4 * L277:
429 00000cc4 * 203D2000 .ascii " = \0"
430 00000cc8 * .text
431 0000CDC6 dd 8f00000cc4 pushl $L277
432 0000CDCC fe 08 effffffc71 callf $8,_writes
433 0000CDD3 # write32h( store_regs[index2] );
434 0000CDD3 0d effffffc6b 50 movl _index2,r0
435 0000CDDA dd 40effffffc63 pushl _store_regs[r0]
436 0000CDE1 fe 08 effffffc5c callf $8,_write32h
437 0000CDE8 # writes(", should be = ");
438 0000CDE8 .data 1
439 00000cc8 * L278:
440 00000cc8 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
441 00000cd8 * .text
442 0000CDE8 dd 8f00000cc8 pushl $L278
443 0000CDEE fe 08 effffffc4f callf $8,_writes
444 0000CDF5 # write32h( load_regs[index2] );
445 0000CDF5 0d effffffc49 50 movl _index2,r0
446 0000CDFC dd 40effffffc41 pushl _load_regs[r0]
447 0000CE03 fe 08 effffffc3a callf $8,_write32h
448 0000CE0A # writes("\n");
449 0000CE0A .data 1
450 00000cd8 * L279:
451 00000cd8 * 0A00 .ascii "\12\0"
452 00000cda * .text
453 0000CE0A dd 8f00000cd8 pushl $L279
454 0000CE10 fe 08 effffffc2d callf $8,_writes
455 0000CE17 # }
456 0000CE17 # if( halt_flg )
457 0000CE17 L274:
458 0000CE17 5d effffffc27 tstl _halt_flg
459 0000CE1D 31 09 jeql L280
460 0000CE1F # ldf_er_halt( BAD_REG_HLT ); /* halt on the error */
461 0000CE1F dd 02 pushl $2
462 0000CE21 fe 08 ef00000752 callf $8,_ldf_er_halt
463 0000CE28 # if( loop_on_err ) {
464 0000CE28 L280:
465 0000CE28 5d effffffc16 tstl _loop_on_err
466 0000CE2E 31 0a jeql L281
467 0000CE30 # force_loop = TRUE; /* set the force loop flag */
468 0000CE30 0d 01 effffffc0d movl $1,_force_loop
469 0000CE37 # asm("brw _ldf_3_lp1"); /* and loop on the error */
470 0000CE37 13 fedb brw _ldf_3_lp1
471 0000CE3A # } /* end of loop on error */
472 0000CE3A # } /* end of register corruption error */
473 0000CE3A L281:
474 0000CE3A # } /* end of subtest 3 */
475 0000CE3A L273:
476 0000CE3A 40 ret#2
477 0000CE3B .set L265,0x0
478 0000CE3B L267:
479 0000CE3B 13 fea1 jbr L268
480 0000CE3E .data
481 00000be8 * .text
482 0000CE3E .align 1
483 0000CE3E .globl _ldf_4
484 0000CE3E _ldf_4:
485 0000CE3E 0000 .word L282
486 0000CE40 #
487 0000CE40 #
488 0000CE40 #
489 0000CE40 # /************************************************************************
490 0000CE40 # *
491 0000CE40 # * SUBTEST 4 - Check for register corruption (stf)
492 0000CE40 # *
493 0000CE40 # ************************************************************************/
494 0000CE40 # ldf_4()
495 0000CE40 # {
496 0000CE40 13 015c jbr L284
497 0000CE43 L285:
498 0000CE43 # force_loop = FALSE; /* clear force_loop flg */
499 0000CE43 4d effffffbfb clrl _force_loop
500 0000CE49 # subtest = 4;
501 0000CE49 0d 04 effffffbf4 movl $4,_subtest
502 0000CE50 # fill_reg_buf( load_regs ); /* get patterns for regs */
503 0000CE50 dd 8f00000000 pushl $_load_regs
504 0000CE56 fe 08 effffffbe7 callf $8,_fill_reg_buf
505 0000CE5D # index = 0;
506 0000CE5D 4d effffffbe1 clrl _index
507 0000CE63 # sgl_ld_acc = ldf_1_data[0].ld; /* get value to store */
508 0000CE63 0d effffffbdb effffffbd6 movl _ldf_1_data,_sgl_ld_acc
509 0000CE6E # sgl_expected = ldf_1_data[0].exp; /* get expected result */
510 0000CE6E 0d effffffbd4 effffffbcb movl _ldf_1_data+4,_sgl_expected
511 0000CE79 # /*
512 0000CE79 # * If LOOP ON ERROR is set, this is the loop for this subtest.
513 0000CE79 # * The force loop flag is set after the first error.
514 0000CE79 # */
515 0000CE79 # asm("_ldf_4_lp1:");
516 0000CE79 _ldf_4_lp1:
517 0000CE79 # asm("ldf _sgl_ld_acc"); /* load the accumulator */
518 0000CE79 06 effffffbc5 ldf _sgl_ld_acc
519 0000CE7F # asm("nop");
520 0000CE7F 10 nop
521 0000CE80 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
522 0000CE80 ab 891fff effffffbbb loadr $0x1fff,_load_regs
523 0000CE89 # asm("nop");
524 0000CE89 10 nop
525 0000CE8A # asm("stf _sgl_st_acc"); /* save the accumulator */
526 0000CE8A 26 effffffbb4 stf _sgl_st_acc
527 0000CE90 # asm("nop");
528 0000CE90 10 nop
529 0000CE91 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
530 0000CE91 bb 891fff effffffbaa storer $0x1fff,_store_regs
531 0000CE9A # if( force_loop )
532 0000CE9A 5d effffffba4 tstl _force_loop
533 0000CEA0 31 02 jeql L286
534 0000CEA2 # asm("brb _ldf_4_lp1");; /* loop on the error */
535 0000CEA2 11 d5 brb _ldf_4_lp1
536 0000CEA4 L286:
537 0000CEA4 # /*
538 0000CEA4 # * Now compare the stored register values to those that were loaded
539 0000CEA4 # */
540 0000CEA4 # index2 = 0;
541 0000CEA4 4d effffffb9a clrl _index2
542 0000CEAA # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
543 0000CEAA L287:
544 0000CEAA 0d effffffb94 50 movl _index2,r0
545 0000CEB1 0d effffffb8d 51 movl _index2,r1
546 0000CEB8 1d 40effffffb85 cmpl _load_regs[r0],_store_regs[r1]
41effffffb7f
547 0000CEC5 21 11 jneq L288
548 0000CEC7 1d effffffb77 0d cmpl _index2,$13
549 0000CECE 81 08 jgeq L288
550 0000CED0 # index2++; /* check reg values */
551 0000CED0 6d effffffb6e incl _index2
552 0000CED6 11 d2 jbr L287
553 0000CED8 L288:
554 0000CED8 # if( index2 < 13 ) { /* error if index2 < 13 */
555 0000CED8 1d effffffb66 0d cmpl _index2,$13
556 0000CEDF 91 03 13 00ba jgeq L289
557 0000CEE4 # errcnt++; /* bump the error count */
558 0000CEE4 6d effffffb5a incl _errcnt
559 0000CEEA # if( prt_error ) {
560 0000CEEA 5d effffffb54 tstl _prt_error
561 0000CEF0 21 03 13 0086 jeql L290
562 0000CEF5 # print_ldf_er_hdr();
563 0000CEF5 fe 04 ef000005d2 callf $4,_print_ldf_er_hdr
564 0000CEFC # writes(" - A REGISTER WAS MODIFIED\n");
565 0000CEFC .data 1
566 00000cda * L291:
567 00000cda * 202D204120524547495354455 .ascii " - A REGISTER WAS MODIFIED\12\0"
220574153204D4F4449464945
440A00
568 00000cf6 * .text
569 0000CEFC dd 8f00000cda pushl $L291
570 0000CF02 fe 08 effffffb3b callf $8,_writes
571 0000CF09 # print_ldf_data();
572 0000CF09 fe 04 ef0000062e callf $4,_print_ldf_data
573 0000CF10 # writes("register "); /* print the information */
574 0000CF10 .data 1
575 00000cf6 * L292:
576 00000cf6 * 72656769737465722000 .ascii "register \0"
577 00000d00 * .text
578 0000CF10 dd 8f00000cf6 pushl $L292
579 0000CF16 fe 08 effffffb27 callf $8,_writes
580 0000CF1D # writed( index2 ); /* about the corrupted */
581 0000CF1D dd effffffb21 pushl _index2
582 0000CF23 fe 08 effffffb1a callf $8,_writed
583 0000CF2A # writes(" = "); /* register */
584 0000CF2A .data 1
585 00000d00 * L293:
586 00000d00 * 203D2000 .ascii " = \0"
587 00000d04 * .text
588 0000CF2A dd 8f00000d00 pushl $L293
589 0000CF30 fe 08 effffffb0d callf $8,_writes
590 0000CF37 # write32h( store_regs[index2] );
591 0000CF37 0d effffffb07 50 movl _index2,r0
592 0000CF3E dd 40effffffaff pushl _store_regs[r0]
593 0000CF45 fe 08 effffffaf8 callf $8,_write32h
594 0000CF4C # writes(", should be = ");
595 0000CF4C .data 1
596 00000d04 * L294:
597 00000d04 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
598 00000d14 * .text
599 0000CF4C dd 8f00000d04 pushl $L294
600 0000CF52 fe 08 effffffaeb callf $8,_writes
601 0000CF59 # write32h( load_regs[index2] );
602 0000CF59 0d effffffae5 50 movl _index2,r0
603 0000CF60 dd 40effffffadd pushl _load_regs[r0]
604 0000CF67 fe 08 effffffad6 callf $8,_write32h
605 0000CF6E # writes("\n");
606 0000CF6E .data 1
607 00000d14 * L295:
608 00000d14 * 0A00 .ascii "\12\0"
609 00000d16 * .text
610 0000CF6E dd 8f00000d14 pushl $L295
611 0000CF74 fe 08 effffffac9 callf $8,_writes
612 0000CF7B # }
613 0000CF7B # if( halt_flg )
614 0000CF7B L290:
615 0000CF7B 5d effffffac3 tstl _halt_flg
616 0000CF81 31 09 jeql L296
617 0000CF83 # ldf_er_halt( BAD_REG_HLT ); /* halt on the error */
618 0000CF83 dd 02 pushl $2
619 0000CF85 fe 08 ef000005ee callf $8,_ldf_er_halt
620 0000CF8C # if( loop_on_err ) {
621 0000CF8C L296:
622 0000CF8C 5d effffffab2 tstl _loop_on_err
623 0000CF92 31 0a jeql L297
624 0000CF94 # force_loop = TRUE; /* set the force loop flag */
625 0000CF94 0d 01 effffffaa9 movl $1,_force_loop
626 0000CF9B # asm("brw _ldf_4_lp1"); /* and loop on the error */
627 0000CF9B 13 fedb brw _ldf_4_lp1
628 0000CF9E # } /* end of loop on error */
629 0000CF9E # } /* end of register corruption error */
630 0000CF9E L297:
631 0000CF9E # } /* end of subtest 4 */
632 0000CF9E L289:
633 0000CF9E 40 ret#2
634 0000CF9F .set L282,0x0
635 0000CF9F L284:
636 0000CF9F 13 fea1 jbr L285
637 0000CFA2 .data
638 00000be8 * .text
639 0000CFA2 .align 1
640 0000CFA2 .globl _ldf_5
641 0000CFA2 _ldf_5:
642 0000CFA2 0000 .word L298
643 0000CFA4 #
644 0000CFA4 #
645 0000CFA4 #
646 0000CFA4 # /************************************************************************
647 0000CFA4 # *
648 0000CFA4 # * SUBTEST 5 - Check for PSL corruption (ldf)
649 0000CFA4 # *
650 0000CFA4 # ************************************************************************/
651 0000CFA4 # ldf_5()
652 0000CFA4 # {
653 0000CFA4 13 014a jbr L300
654 0000CFA7 L301:
655 0000CFA7 # force_loop = FALSE; /* clear force_loop flg */
656 0000CFA7 4d effffffa97 clrl _force_loop
657 0000CFAD # subtest = 5;
658 0000CFAD 0d 05 effffffa90 movl $5,_subtest
659 0000CFB4 # for( index = 0; index < 3; index++ ) {
660 0000CFB4 4d effffffa8a clrl _index
661 0000CFBA L304:
662 0000CFBA 1d effffffa84 03 cmpl _index,$3
663 0000CFC1 91 03 13 012a jgeq L303
664 0000CFC6 # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
665 0000CFC6 0d effffffa78 50 movl _index,r0
666 0000CFCD 48 03 50 50 shll $3,r0,r0
667 0000CFD1 0d e000000000 effffffa68 movl _ldf_1_data(r0),_sgl_ld_acc
668 0000CFDC # sgl_expected = ldf_1_data[index].exp; /* get expected */
669 0000CFDC 0d effffffa62 50 movl _index,r0
670 0000CFE3 48 03 50 50 shll $3,r0,r0
671 0000CFE7 0d e000000004 effffffa52 movl _ldf_1_data+4(r0),_sgl_expected
672 0000CFF2 # sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */
673 0000CFF2 0d effffffa4c 50 movl _status_index,r0
674 0000CFF9 0d 40effffffa44 movl _status_array[r0],_sgl_dummy1
effffffa3f
675 0000D005 # /*
676 0000D005 # * If LOOP ON ERROR is set, this is the loop for this subtest.
677 0000D005 # * The force loop flag is set after the first error.
678 0000D005 # */
679 0000D005 # asm("_ldf_5_lp1:");
680 0000D005 _ldf_5_lp1:
681 0000D005 # asm("tstl _sgl_dummy1"); /* set the PSL status */
682 0000D005 5d effffffa39 tstl _sgl_dummy1
683 0000D00B # asm("movpsl _init_psl"); /* save the initial PSL */
684 0000D00B cd effffffa33 movpsl _init_psl
685 0000D011 # asm("nop");
686 0000D011 10 nop
687 0000D012 # asm("ldf _sgl_ld_acc"); /* load the accumulator */
688 0000D012 06 effffffa2c ldf _sgl_ld_acc
689 0000D018 # asm("nop");
690 0000D018 10 nop
691 0000D019 # asm("movpsl _psl_val"); /* save the final PSL */
692 0000D019 cd effffffa25 movpsl _psl_val
693 0000D01F # asm("nop");
694 0000D01F 10 nop
695 0000D020 # asm("stf _sgl_st_acc"); /* save the accumulator */
696 0000D020 26 effffffa1e stf _sgl_st_acc
697 0000D026 # if( force_loop )
698 0000D026 5d effffffa18 tstl _force_loop
699 0000D02C 31 02 jeql L305
700 0000D02E # asm("brb _ldf_5_lp1");; /* loop on the error */
701 0000D02E 11 d5 brb _ldf_5_lp1
702 0000D030 L305:
703 0000D030 # /*
704 0000D030 # * Now compare the final PSL to the initial PSL -they should be the same
705 0000D030 # */
706 0000D030 # if( psl_val != init_psl ) {
707 0000D030 1d effffffa0e effffffa09 cmpl _psl_val,_init_psl
708 0000D03B 21 03 13 00a7 jeql L306
709 0000D040 # errcnt++; /* bump the error count */
710 0000D040 6d effffff9fe incl _errcnt
711 0000D046 # if( prt_error ) {
712 0000D046 5d effffff9f8 tstl _prt_error
713 0000D04C 31 76 jeql L307
714 0000D04E # print_ldf_er_hdr();
715 0000D04E fe 04 ef00000479 callf $4,_print_ldf_er_hdr
716 0000D055 # writes(" - INCORRECT FINAL PSL\n");
717 0000D055 .data 1
718 00000d16 * L308:
719 00000d16 * 202D20494E434F52524543542 .ascii " - INCORRECT FINAL PSL\12\0"
046494E414C2050534C0A00
720 00000d2e * .text
721 0000D055 dd 8f00000d16 pushl $L308
722 0000D05B fe 08 effffff9e2 callf $8,_writes
723 0000D062 # print_ldf_data();
724 0000D062 fe 04 ef000004d5 callf $4,_print_ldf_data
725 0000D069 # writes("initial PSL = ");
726 0000D069 .data 1
727 00000d2e * L309:
728 00000d2e * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
729 00000d3d * .text
730 0000D069 dd 8f00000d2e pushl $L309
731 0000D06F fe 08 effffff9ce callf $8,_writes
732 0000D076 # write32h( init_psl );
733 0000D076 dd effffff9c8 pushl _init_psl
734 0000D07C fe 08 effffff9c1 callf $8,_write32h
735 0000D083 # writes(", final PSL = ");
736 0000D083 .data 1
737 00000d3d * L310:
738 00000d3d * 2C20202066696E616C2050534 .ascii ", final PSL = \0"
C203D2000
739 00000d4e * .text
740 0000D083 dd 8f00000d3d pushl $L310
741 0000D089 fe 08 effffff9b4 callf $8,_writes
742 0000D090 # write32h( psl_val );
743 0000D090 dd effffff9ae pushl _psl_val
744 0000D096 fe 08 effffff9a7 callf $8,_write32h
745 0000D09D # writes(", expected PSL = ");
746 0000D09D .data 1
747 00000d4e * L311:
748 00000d4e * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
749 00000d61 * .text
750 0000D09D dd 8f00000d4e pushl $L311
751 0000D0A3 fe 08 effffff99a callf $8,_writes
752 0000D0AA # write32h( exp_psl );
753 0000D0AA dd effffff994 pushl _exp_psl
754 0000D0B0 fe 08 effffff98d callf $8,_write32h
755 0000D0B7 # writes("\n");
756 0000D0B7 .data 1
757 00000d61 * L312:
758 00000d61 * 0A00 .ascii "\12\0"
759 00000d63 * .text
760 0000D0B7 dd 8f00000d61 pushl $L312
761 0000D0BD fe 08 effffff980 callf $8,_writes
762 0000D0C4 # }
763 0000D0C4 # if( halt_flg )
764 0000D0C4 L307:
765 0000D0C4 5d effffff97a tstl _halt_flg
766 0000D0CA 31 09 jeql L313
767 0000D0CC # ldf_er_halt( BAD_PSL_HLT ); /* halt on the error */
768 0000D0CC dd 03 pushl $3
769 0000D0CE fe 08 ef000004a5 callf $8,_ldf_er_halt
770 0000D0D5 # if( loop_on_err ) {
771 0000D0D5 L313:
772 0000D0D5 5d effffff969 tstl _loop_on_err
773 0000D0DB 31 0a jeql L314
774 0000D0DD # force_loop = TRUE; /* set the force loop flag */
775 0000D0DD 0d 01 effffff960 movl $1,_force_loop
776 0000D0E4 # asm("brw _ldf_5_lp1");; /* and loop on the error */
777 0000D0E4 13 ff1e brw _ldf_5_lp1
778 0000D0E7 # } /* end of loop on error */
779 0000D0E7 # } /* end of PSL corruption error */
780 0000D0E7 L314:
781 0000D0E7 # } /* end of WHILE loop */
782 0000D0E7 L306:
783 0000D0E7 L302:
784 0000D0E7 6d effffff957 incl _index
785 0000D0ED 13 feca jbr L304
786 0000D0F0 L303:
787 0000D0F0 # } /* end of subtest 5 */
788 0000D0F0 40 ret#2
789 0000D0F1 .set L298,0x0
790 0000D0F1 L300:
791 0000D0F1 13 feb3 jbr L301
792 0000D0F4 .data
793 00000be8 * .text
794 0000D0F4 .align 1
795 0000D0F4 .globl _ldf_6
796 0000D0F4 _ldf_6:
797 0000D0F4 0000 .word L315
798 0000D0F6 #
799 0000D0F6 #
800 0000D0F6 #
801 0000D0F6 # /************************************************************************
802 0000D0F6 # *
803 0000D0F6 # * SUBTEST 6 - Check for PSL corruption (stf)
804 0000D0F6 # *
805 0000D0F6 # ************************************************************************/
806 0000D0F6 # ldf_6()
807 0000D0F6 # {
808 0000D0F6 13 0197 jbr L317
809 0000D0F9 L318:
810 0000D0F9 # force_loop = FALSE;
811 0000D0F9 4d effffff945 clrl _force_loop
812 0000D0FF # index = 0; /* clear the data index */
813 0000D0FF 4d effffff93f clrl _index
814 0000D105 # status_index = 0; /* clear the status index */
815 0000D105 4d effffff939 clrl _status_index
816 0000D10B # do {
817 0000D10B L321:
818 0000D10B # sgl_ld_acc = ldf_1_data[index].ld; /* get the dbl operand */
819 0000D10B 0d effffff933 50 movl _index,r0
820 0000D112 48 03 50 50 shll $3,r0,r0
821 0000D116 0d e000000000 effffff923 movl _ldf_1_data(r0),_sgl_ld_acc
822 0000D121 # sgl_dummy1 = status_array[status_index]; /* array = +, -, 0 */
823 0000D121 0d effffff91d 50 movl _status_index,r0
824 0000D128 0d 40effffff915 movl _status_array[r0],_sgl_dummy1
effffff910
825 0000D134 # /*
826 0000D134 # * If LOOP ON ERROR is set, this is the loop for this subtest.
827 0000D134 # * The force loop flag is set after the first error.
828 0000D134 # */
829 0000D134 # asm("_ldf_6_lp1:");
830 0000D134 _ldf_6_lp1:
831 0000D134 # asm("ldf _sgl_ld_acc"); /* load the operand */
832 0000D134 06 effffff90a ldf _sgl_ld_acc
833 0000D13A # asm("tstl _sgl_dummy1"); /* generate initial status */
834 0000D13A 5d effffff904 tstl _sgl_dummy1
835 0000D140 # asm("movpsl _init_psl"); /* save the initial status */
836 0000D140 cd effffff8fe movpsl _init_psl
837 0000D146 # asm("stf _sgl_st_acc"); /* save the accumulator */
838 0000D146 26 effffff8f8 stf _sgl_st_acc
839 0000D14C # asm("movpsl _psl_val"); /* save the final status */
840 0000D14C cd effffff8f2 movpsl _psl_val
841 0000D152 # if( force_loop ) /* loop? */
842 0000D152 5d effffff8ec tstl _force_loop
843 0000D158 31 06 jeql L322
844 0000D15A # asm("jmp _ldf_6_lp1");; /* run the loop again */
845 0000D15A 71 efffffffd4 jmp _ldf_6_lp1
846 0000D160 L322:
847 0000D160 # exp_psl = init_psl; /* get the initial PSL */
848 0000D160 0d effffff8de effffff8d9 movl _init_psl,_exp_psl
849 0000D16B # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
850 0000D16B ac 88f3 effffff8d1 andl2 $-13,_exp_psl
851 0000D173 # sgl_dummy2 = sgl_ld_acc; /* get the operand */
852 0000D173 0d effffff8cb effffff8c6 movl _sgl_ld_acc,_sgl_dummy2
853 0000D17E # sgl_dummy2 &= 0xff800000; /* clear the fraction part */
854 0000D17E ac 8fff800000 effffff8bb andl2 $-8388608,_sgl_dummy2
855 0000D189 # if( !sgl_dummy2 )
856 0000D189 5d effffff8b5 tstl _sgl_dummy2
857 0000D18F 21 07 jneq L323
858 0000D191 # exp_psl |= PSL_Z; /* expect the ZERO bit set */
859 0000D191 8c 04 effffff8ac orl2 $4,_exp_psl
860 0000D198 # if( sgl_dummy2 < 0 )
861 0000D198 L323:
862 0000D198 5d effffff8a6 tstl _sgl_dummy2
863 0000D19E 81 07 jgeq L324
864 0000D1A0 # exp_psl |= PSL_N; /* expect the NEG bit set */
865 0000D1A0 8c 08 effffff89d orl2 $8,_exp_psl
866 0000D1A7 # if( psl_val != exp_psl ) { /* COMPARE the values */
867 0000D1A7 L324:
868 0000D1A7 1d effffff897 effffff892 cmpl _psl_val,_exp_psl
869 0000D1B2 21 03 13 00a7 jeql L325
870 0000D1B7 # errcnt++; /* bump the error count */
871 0000D1B7 6d effffff887 incl _errcnt
872 0000D1BD # if( prt_error ) {
873 0000D1BD 5d effffff881 tstl _prt_error
874 0000D1C3 31 76 jeql L326
875 0000D1C5 # print_ldf_er_hdr();
876 0000D1C5 fe 04 ef00000302 callf $4,_print_ldf_er_hdr
877 0000D1CC # writes(" - INCORRECT FINAL PSL\n");
878 0000D1CC .data 1
879 00000d63 * L327:
880 00000d63 * 202D20494E434F52524543542 .ascii " - INCORRECT FINAL PSL\12\0"
046494E414C2050534C0A00
881 00000d7b * .text
882 0000D1CC dd 8f00000d63 pushl $L327
883 0000D1D2 fe 08 effffff86b callf $8,_writes
884 0000D1D9 # print_ldf_data();
885 0000D1D9 fe 04 ef0000035e callf $4,_print_ldf_data
886 0000D1E0 # writes("initial PSL = ");
887 0000D1E0 .data 1
888 00000d7b * L328:
889 00000d7b * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
890 00000d8a * .text
891 0000D1E0 dd 8f00000d7b pushl $L328
892 0000D1E6 fe 08 effffff857 callf $8,_writes
893 0000D1ED # write32h( init_psl );
894 0000D1ED dd effffff851 pushl _init_psl
895 0000D1F3 fe 08 effffff84a callf $8,_write32h
896 0000D1FA # writes(", final PSL = ");
897 0000D1FA .data 1
898 00000d8a * L329:
899 00000d8a * 2C20202066696E616C2050534 .ascii ", final PSL = \0"
C203D2000
900 00000d9b * .text
901 0000D1FA dd 8f00000d8a pushl $L329
902 0000D200 fe 08 effffff83d callf $8,_writes
903 0000D207 # write32h( psl_val );
904 0000D207 dd effffff837 pushl _psl_val
905 0000D20D fe 08 effffff830 callf $8,_write32h
906 0000D214 # writes(", expected PSL = ");
907 0000D214 .data 1
908 00000d9b * L330:
909 00000d9b * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
910 00000dae * .text
911 0000D214 dd 8f00000d9b pushl $L330
912 0000D21A fe 08 effffff823 callf $8,_writes
913 0000D221 # write32h( exp_psl );
914 0000D221 dd effffff81d pushl _exp_psl
915 0000D227 fe 08 effffff816 callf $8,_write32h
916 0000D22E # writes("\n");
917 0000D22E .data 1
918 00000dae * L331:
919 00000dae * 0A00 .ascii "\12\0"
920 00000db0 * .text
921 0000D22E dd 8f00000dae pushl $L331
922 0000D234 fe 08 effffff809 callf $8,_writes
923 0000D23B # }
924 0000D23B # if( halt_flg )
925 0000D23B L326:
926 0000D23B 5d effffff803 tstl _halt_flg
927 0000D241 31 09 jeql L332
928 0000D243 # ldf_er_halt( BAD_PSL_HLT ); /* halt on the error */
929 0000D243 dd 03 pushl $3
930 0000D245 fe 08 ef0000032e callf $8,_ldf_er_halt
931 0000D24C # if( loop_on_err ) {
932 0000D24C L332:
933 0000D24C 5d effffff7f2 tstl _loop_on_err
934 0000D252 31 0a jeql L333
935 0000D254 # force_loop = TRUE; /* set the force loop flag */
936 0000D254 0d 01 effffff7e9 movl $1,_force_loop
937 0000D25B # asm("brw _ldf_6_lp1");; /* and loop */
938 0000D25B 13 fed6 brw _ldf_6_lp1
939 0000D25E # }; /* end of loop-on-error */
940 0000D25E L333:
941 0000D25E # } /* end of compare error */
942 0000D25E # if( ++status_index >= 3 )
943 0000D25E L325:
944 0000D25E 6d effffff7e0 incl _status_index
945 0000D264 0d effffff7da 50 movl _status_index,r0
946 0000D26B 1d 50 03 cmpl r0,$3
947 0000D26E 91 06 jlss L334
948 0000D270 # status_index = 0; /* reset the status index */
949 0000D270 4d effffff7ce clrl _status_index
950 0000D276 # } while( index++ < max_ldf_1_index );
951 0000D276 L334:
952 0000D276 L320:
953 0000D276 0d effffff7c8 50 movl _index,r0
954 0000D27D 6d effffff7c1 incl _index
955 0000D283 1d 50 effffff7ba cmpl r0,_max_ldf_1_index
956 0000D28A 81 03 13 fe7c jlss L321
957 0000D28F L319:
958 0000D28F # } /* end of subtest 6 */
959 0000D28F 40 ret#2
960 0000D290 .set L315,0x0
961 0000D290 L317:
962 0000D290 13 fe66 jbr L318
963 0000D293 .data
964 00000be8 * .text
965 0000D293 00 .align 1
966 0000D294 .globl _ldf_7
967 0000D294 _ldf_7:
968 0000D294 0000 .word L335
969 0000D296 #
970 0000D296 #
971 0000D296 #
972 0000D296 # /************************************************************************
973 0000D296 # *
974 0000D296 # * SUBTEST 7 - pipelined entry test (ldf)
975 0000D296 # *
976 0000D296 # ************************************************************************/
977 0000D296 # ldf_7()
978 0000D296 # {
979 0000D296 13 0117 jbr L337
980 0000D299 L338:
981 0000D299 # force_loop = FALSE;
982 0000D299 4d effffff7a5 clrl _force_loop
983 0000D29F # subtest = 7;
984 0000D29F 0d 07 effffff79e movl $7,_subtest
985 0000D2A6 # for( index = 0; index < max_ldf_1_index; index++ ) {
986 0000D2A6 4d effffff798 clrl _index
987 0000D2AC L341:
988 0000D2AC 1d effffff792 effffff78d cmpl _index,_max_ldf_1_index
989 0000D2B7 91 03 13 00f3 jgeq L340
990 0000D2BC # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
991 0000D2BC 0d effffff782 50 movl _index,r0
992 0000D2C3 48 03 50 50 shll $3,r0,r0
993 0000D2C7 0d e000000000 effffff772 movl _ldf_1_data(r0),_sgl_ld_acc
994 0000D2D2 # sgl_expected = ldf_1_data[index].exp; /* get expected result */
995 0000D2D2 0d effffff76c 50 movl _index,r0
996 0000D2D9 48 03 50 50 shll $3,r0,r0
997 0000D2DD 0d e000000004 effffff75c movl _ldf_1_data+4(r0),_sgl_expected
998 0000D2E8 # /*
999 0000D2E8 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1000 0000D2E8 # * The force loop flag is set after the first error.
1001 0000D2E8 # */
1002 0000D2E8 # asm("_ldf_7_lp1:");
1003 0000D2E8 _ldf_7_lp1:
1004 0000D2E8 # asm("movl $0,r0"); /* clear r0 */
1005 0000D2E8 0d 00 50 movl $0,r0
1006 0000D2EB # asm("ldf r0"); /* load the Acc. with 0.0 */
1007 0000D2EB 06 50 ldf r0
1008 0000D2ED # asm("ldf _sgl_ld_acc"); /* load the value */
1009 0000D2ED 06 effffff751 ldf _sgl_ld_acc
1010 0000D2F3 # asm("nop");
1011 0000D2F3 10 nop
1012 0000D2F4 # asm("stf _sgl_st_acc"); /* store the result */
1013 0000D2F4 26 effffff74a stf _sgl_st_acc
1014 0000D2FA # if( force_loop )
1015 0000D2FA 5d effffff744 tstl _force_loop
1016 0000D300 31 02 jeql L342
1017 0000D302 # asm("brb _ldf_7_lp1");; /* loop on the error */
1018 0000D302 11 e4 brb _ldf_7_lp1
1019 0000D304 L342:
1020 0000D304 # /*
1021 0000D304 # * end error loop - test the results
1022 0000D304 # */
1023 0000D304 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1024 0000D304 1d effffff73a effffff735 cmpl _sgl_st_acc,_sgl_expected
1025 0000D30F 21 03 13 0092 jeql L343
1026 0000D314 # errcnt++; /* bump the error count */
1027 0000D314 6d effffff72a incl _errcnt
1028 0000D31A # if( prt_error ) {
1029 0000D31A 5d effffff724 tstl _prt_error
1030 0000D320 31 61 jeql L344
1031 0000D322 # print_ldf_er_hdr();
1032 0000D322 fe 04 ef000001a5 callf $4,_print_ldf_er_hdr
1033 0000D329 # writes(" (Piped Entry) - BAD FINAL ACC\n");
1034 0000D329 .data 1
1035 00000db0 * L345:
1036 00000db0 * 2028506970656420456E74727 .ascii " (Piped Entry) - BAD FINAL ACC\12\0"
929202D204241442046494E41
4C204143430A00
1037 00000dd0 * .text
1038 0000D329 dd 8f00000db0 pushl $L345
1039 0000D32F fe 08 effffff70e callf $8,_writes
1040 0000D336 # print_ldf_data();
1041 0000D336 fe 04 ef00000201 callf $4,_print_ldf_data
1042 0000D33D # writes(", data index = ");
1043 0000D33D .data 1
1044 00000dd0 * L346:
1045 00000dd0 * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
1046 00000de1 * .text
1047 0000D33D dd 8f00000dd0 pushl $L346
1048 0000D343 fe 08 effffff6fa callf $8,_writes
1049 0000D34A # writed( index );
1050 0000D34A dd effffff6f4 pushl _index
1051 0000D350 fe 08 effffff6ed callf $8,_writed
1052 0000D357 # writec('\n');
1053 0000D357 dd 0a pushl $10
1054 0000D359 fe 08 effffff6e4 callf $8,_writec
1055 0000D360 # writes(" Acc expected = ");
1056 0000D360 .data 1
1057 00000de1 * L347:
1058 00000de1 * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020204163
63206578706563746564203D2
000
1059 00000e08 * .text
1060 0000D360 dd 8f00000de1 pushl $L347
1061 0000D366 fe 08 effffff6d7 callf $8,_writes
1062 0000D36D # write32h( sgl_expected );
1063 0000D36D dd effffff6d1 pushl _sgl_expected
1064 0000D373 fe 08 effffff6ca callf $8,_write32h
1065 0000D37A # writec('\n');
1066 0000D37A dd 0a pushl $10
1067 0000D37C fe 08 effffff6c1 callf $8,_writec
1068 0000D383 # }
1069 0000D383 # if( halt_flg )
1070 0000D383 L344:
1071 0000D383 5d effffff6bb tstl _halt_flg
1072 0000D389 31 09 jeql L348
1073 0000D38B # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1074 0000D38B dd 01 pushl $1
1075 0000D38D fe 08 ef000001e6 callf $8,_ldf_er_halt
1076 0000D394 # if( loop_on_err ) {
1077 0000D394 L348:
1078 0000D394 5d effffff6aa tstl _loop_on_err
1079 0000D39A 31 0a jeql L349
1080 0000D39C # force_loop = TRUE; /* set the force loop flag */
1081 0000D39C 0d 01 effffff6a1 movl $1,_force_loop
1082 0000D3A3 # asm("brw _ldf_7_lp1");; /* and loop on the error */
1083 0000D3A3 13 ff42 brw _ldf_7_lp1
1084 0000D3A6 # } /* end of loop on error */
1085 0000D3A6 # } /* end of compare error */
1086 0000D3A6 L349:
1087 0000D3A6 # } /* end of WHILE loop */
1088 0000D3A6 L343:
1089 0000D3A6 L339:
1090 0000D3A6 6d effffff698 incl _index
1091 0000D3AC 13 fefd jbr L341
1092 0000D3AF L340:
1093 0000D3AF # } /* end of subtest 7 */
1094 0000D3AF 40 ret#2
1095 0000D3B0 .set L335,0x0
1096 0000D3B0 L337:
1097 0000D3B0 13 fee6 jbr L338
1098 0000D3B3 .data
1099 00000be8 * .text
1100 0000D3B3 00 .align 1
1101 0000D3B4 .globl _ldf_8
1102 0000D3B4 _ldf_8:
1103 0000D3B4 0000 .word L351
1104 0000D3B6 #
1105 0000D3B6 #
1106 0000D3B6 #
1107 0000D3B6 # /************************************************************************
1108 0000D3B6 # *
1109 0000D3B6 # * SUBTEST 8 - pipelined entry test (stf)
1110 0000D3B6 # *
1111 0000D3B6 # ************************************************************************/
1112 0000D3B6 # ldf_8()
1113 0000D3B6 # {
1114 0000D3B6 13 0111 jbr L353
1115 0000D3B9 L354:
1116 0000D3B9 # force_loop = FALSE;
1117 0000D3B9 4d effffff685 clrl _force_loop
1118 0000D3BF # subtest = 8;
1119 0000D3BF 0d 08 effffff67e movl $8,_subtest
1120 0000D3C6 # for( index = 0; index < max_ldf_1_index; index++ ) {
1121 0000D3C6 4d effffff678 clrl _index
1122 0000D3CC L357:
1123 0000D3CC 1d effffff672 effffff66d cmpl _index,_max_ldf_1_index
1124 0000D3D7 91 03 13 00ed jgeq L356
1125 0000D3DC # sgl_ld_acc = ldf_1_data[index].ld; /* get value to load */
1126 0000D3DC 0d effffff662 50 movl _index,r0
1127 0000D3E3 48 03 50 50 shll $3,r0,r0
1128 0000D3E7 0d e000000000 effffff652 movl _ldf_1_data(r0),_sgl_ld_acc
1129 0000D3F2 # sgl_expected = ldf_1_data[index].exp; /* get expected result */
1130 0000D3F2 0d effffff64c 50 movl _index,r0
1131 0000D3F9 48 03 50 50 shll $3,r0,r0
1132 0000D3FD 0d e000000004 effffff63c movl _ldf_1_data+4(r0),_sgl_expected
1133 0000D408 # /*
1134 0000D408 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1135 0000D408 # * The force loop flag is set after the first error.
1136 0000D408 # */
1137 0000D408 # asm("_ldf_8_lp1:");
1138 0000D408 _ldf_8_lp1:
1139 0000D408 # asm("ldf _sgl_ld_acc"); /* load the value */
1140 0000D408 06 effffff636 ldf _sgl_ld_acc
1141 0000D40E # asm("stf _sgl_st_acc"); /* store the result */
1142 0000D40E 26 effffff630 stf _sgl_st_acc
1143 0000D414 # if( force_loop )
1144 0000D414 5d effffff62a tstl _force_loop
1145 0000D41A 31 02 jeql L358
1146 0000D41C # asm("brb _ldf_8_lp1");; /* loop on the error */
1147 0000D41C 11 ea brb _ldf_8_lp1
1148 0000D41E L358:
1149 0000D41E # /*
1150 0000D41E # * end error loop - test the results
1151 0000D41E # */
1152 0000D41E # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1153 0000D41E 1d effffff620 effffff61b cmpl _sgl_st_acc,_sgl_expected
1154 0000D429 21 03 13 0092 jeql L359
1155 0000D42E # errcnt++; /* bump the error count */
1156 0000D42E 6d effffff610 incl _errcnt
1157 0000D434 # if( prt_error ) {
1158 0000D434 5d effffff60a tstl _prt_error
1159 0000D43A 31 61 jeql L360
1160 0000D43C # print_ldf_er_hdr();
1161 0000D43C fe 04 ef0000008b callf $4,_print_ldf_er_hdr
1162 0000D443 # writes(" (Piped Exit) - BAD FINAL ACC\n");
1163 0000D443 .data 1
1164 00000e08 * L361:
1165 00000e08 * 2028506970656420457869742 .ascii " (Piped Exit) - BAD FINAL ACC\12\0"
9202D204241442046494E414C
204143430A00
1166 00000e27 * .text
1167 0000D443 dd 8f00000e08 pushl $L361
1168 0000D449 fe 08 effffff5f4 callf $8,_writes
1169 0000D450 # print_ldf_data();
1170 0000D450 fe 04 ef000000e7 callf $4,_print_ldf_data
1171 0000D457 # writes(", data index = ");
1172 0000D457 .data 1
1173 00000e27 * L362:
1174 00000e27 * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
1175 00000e38 * .text
1176 0000D457 dd 8f00000e27 pushl $L362
1177 0000D45D fe 08 effffff5e0 callf $8,_writes
1178 0000D464 # writed( index );
1179 0000D464 dd effffff5da pushl _index
1180 0000D46A fe 08 effffff5d3 callf $8,_writed
1181 0000D471 # writec('\n');
1182 0000D471 dd 0a pushl $10
1183 0000D473 fe 08 effffff5ca callf $8,_writec
1184 0000D47A # writes(" Acc expected = ");
1185 0000D47A .data 1
1186 00000e38 * L363:
1187 00000e38 * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020204163
63206578706563746564203D2
000
1188 00000e5f * .text
1189 0000D47A dd 8f00000e38 pushl $L363
1190 0000D480 fe 08 effffff5bd callf $8,_writes
1191 0000D487 # write32h( sgl_expected );
1192 0000D487 dd effffff5b7 pushl _sgl_expected
1193 0000D48D fe 08 effffff5b0 callf $8,_write32h
1194 0000D494 # writec('\n');
1195 0000D494 dd 0a pushl $10
1196 0000D496 fe 08 effffff5a7 callf $8,_writec
1197 0000D49D # }
1198 0000D49D # if( halt_flg )
1199 0000D49D L360:
1200 0000D49D 5d effffff5a1 tstl _halt_flg
1201 0000D4A3 31 09 jeql L364
1202 0000D4A5 # ldf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1203 0000D4A5 dd 01 pushl $1
1204 0000D4A7 fe 08 ef000000cc callf $8,_ldf_er_halt
1205 0000D4AE # if( loop_on_err ) {
1206 0000D4AE L364:
1207 0000D4AE 5d effffff590 tstl _loop_on_err
1208 0000D4B4 31 0a jeql L365
1209 0000D4B6 # force_loop = TRUE; /* set the force loop flag */
1210 0000D4B6 0d 01 effffff587 movl $1,_force_loop
1211 0000D4BD # asm("brw _ldf_8_lp1");; /* and loop on the error */
1212 0000D4BD 13 ff48 brw _ldf_8_lp1
1213 0000D4C0 # } /* end of loop on error */
1214 0000D4C0 # } /* end of compare error */
1215 0000D4C0 L365:
1216 0000D4C0 # } /* end of WHILE loop */
1217 0000D4C0 L359:
1218 0000D4C0 L355:
1219 0000D4C0 6d effffff57e incl _index
1220 0000D4C6 13 ff03 jbr L357
1221 0000D4C9 L356:
1222 0000D4C9 # } /* end of subtest 8 */
1223 0000D4C9 40 ret#2
1224 0000D4CA .set L351,0x0
1225 0000D4CA L353:
1226 0000D4CA 13 feec jbr L354
1227 0000D4CD .data
1228 00000be8 * .text
1229 0000D4CD 00 .align 1
1230 0000D4CE .globl _print_ldf_er_hdr
1231 0000D4CE _print_ldf_er_hdr:
1232 0000D4CE 0000 .word L366
1233 0000D4D0 #
1234 0000D4D0 #
1235 0000D4D0 #
1236 0000D4D0 # /**************************************************************************
1237 0000D4D0 # *
1238 0000D4D0 # * PRINT THE ERROR MESSAGE HEADER
1239 0000D4D0 # *
1240 0000D4D0 # **************************************************************************/
1241 0000D4D0 # print_ldf_er_hdr()
1242 0000D4D0 # {
1243 0000D4D0 11 69 jbr L368
1244 0000D4D2 L369:
1245 0000D4D2 # writes(" \n"); /* start a new print line */
1246 0000D4D2 .data 1
1247 00000e5f * L370:
1248 00000e5f * 200A00 .ascii " \12\0"
1249 00000e62 * .text
1250 0000D4D2 dd 8f00000e5f pushl $L370
1251 0000D4D8 fe 08 effffff565 callf $8,_writes
1252 0000D4DF # writes("cycle: "); /* print the cycle count */
1253 0000D4DF .data 1
1254 00000e62 * L371:
1255 00000e62 * 6379636C653A2000 .ascii "cycle: \0"
1256 00000e6a * .text
1257 0000D4DF dd 8f00000e62 pushl $L371
1258 0000D4E5 fe 08 effffff558 callf $8,_writes
1259 0000D4EC # writed( cycle );
1260 0000D4EC dd effffff552 pushl _cycle
1261 0000D4F2 fe 08 effffff54b callf $8,_writed
1262 0000D4F9 # writes(" LDF_STF "); /* print test name header */
1263 0000D4F9 .data 1
1264 00000e6a * L372:
1265 00000e6a * 20204C44465F5354462000 .ascii " LDF_STF \0"
1266 00000e75 * .text
1267 0000D4F9 dd 8f00000e6a pushl $L372
1268 0000D4FF fe 08 effffff53e callf $8,_writes
1269 0000D506 # writes("test "); /* print the test number */
1270 0000D506 .data 1
1271 00000e75 * L373:
1272 00000e75 * 746573742000 .ascii "test \0"
1273 00000e7b * .text
1274 0000D506 dd 8f00000e75 pushl $L373
1275 0000D50C fe 08 effffff531 callf $8,_writes
1276 0000D513 # writed( test_no );
1277 0000D513 dd effffff52b pushl _test_no
1278 0000D519 fe 08 effffff524 callf $8,_writed
1279 0000D520 # writes(", subtest "); /* print subtest number */
1280 0000D520 .data 1
1281 00000e7b * L374:
1282 00000e7b * 2C20737562746573742000 .ascii ", subtest \0"
1283 00000e86 * .text
1284 0000D520 dd 8f00000e7b pushl $L374
1285 0000D526 fe 08 effffff517 callf $8,_writes
1286 0000D52D # writed( subtest );
1287 0000D52D dd effffff511 pushl _subtest
1288 0000D533 fe 08 effffff50a callf $8,_writed
1289 0000D53A # }
1290 0000D53A 40 ret#2
1291 0000D53B .set L366,0x0
1292 0000D53B L368:
1293 0000D53B 11 95 jbr L369
1294 0000D53D .data
1295 00000be8 * .text
1296 0000D53D 00 .align 1
1297 0000D53E .globl _print_ldf_data
1298 0000D53E _print_ldf_data:
1299 0000D53E 0000 .word L375
1300 0000D540 #
1301 0000D540 #
1302 0000D540 #
1303 0000D540 # /**************************************************************************
1304 0000D540 # *
1305 0000D540 # * PRINT THE DATA AND STORE RESULTS
1306 0000D540 # *
1307 0000D540 # * Acc loaded = xxxxxxxx, Acc stored = xxxxxxxx, data index = xx
1308 0000D540 # * Acc expected = xxxxxxxx
1309 0000D540 # **************************************************************************/
1310 0000D540 # print_ldf_data()
1311 0000D540 # {
1312 0000D540 11 35 jbr L377
1313 0000D542 L378:
1314 0000D542 # writes(" Acc loaded = ");
1315 0000D542 .data 1
1316 00000e86 * L379:
1317 00000e86 * 20416363206C6F61646564203 .ascii " Acc loaded = \0"
D2000
1318 00000e95 * .text
1319 0000D542 dd 8f00000e86 pushl $L379
1320 0000D548 fe 08 effffff4f5 callf $8,_writes
1321 0000D54F # write32h( sgl_ld_acc );
1322 0000D54F dd effffff4ef pushl _sgl_ld_acc
1323 0000D555 fe 08 effffff4e8 callf $8,_write32h
1324 0000D55C # writes(", Acc stored = ");
1325 0000D55C .data 1
1326 00000e95 * L380:
1327 00000e95 * 2C20204163632073746F72656 .ascii ", Acc stored = \0"
4203D2000
1328 00000ea6 * .text
1329 0000D55C dd 8f00000e95 pushl $L380
1330 0000D562 fe 08 effffff4db callf $8,_writes
1331 0000D569 # write32h( sgl_st_acc );
1332 0000D569 dd effffff4d5 pushl _sgl_st_acc
1333 0000D56F fe 08 effffff4ce callf $8,_write32h
1334 0000D576 # }
1335 0000D576 40 ret#2
1336 0000D577 .set L375,0x0
1337 0000D577 L377:
1338 0000D577 11 c9 jbr L378
1339 0000D579 .data
1340 00000be8 * .text
1341 0000D579 00 .align 1
1342 0000D57A .globl _ldf_er_halt
1343 0000D57A _ldf_er_halt:
1344 0000D57A 0000 .word L381
1345 0000D57C #
1346 0000D57C #
1347 0000D57C #
1348 0000D57C # /**************************************************************************
1349 0000D57C # *
1350 0000D57C # * HALT ON ERROR ROUTINE
1351 0000D57C # *
1352 0000D57C # **************************************************************************/
1353 0000D57C # ldf_er_halt( halt_code )
1354 0000D57C # int halt_code;
1355 0000D57C # {
1356 0000D57C 13 00a8 jbr L383
1357 0000D57F L384:
1358 0000D57F # sgl_dummy1 = halt_code; /* get the error type */
1359 0000D57F 0d ad04 effffff4bd movl 4(fp),_sgl_dummy1
1360 0000D587 # asm("movl _test_no,r0"); /* r0 = test number */
1361 0000D587 0d effffff4b7 50 movl _test_no,r0
1362 0000D58E # asm("movl _subtest,r1"); /* r1 = subtest number */
1363 0000D58E 0d effffff4b0 51 movl _subtest,r1
1364 0000D595 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1365 0000D595 0d effffff4a9 52 movl _sgl_dummy1,r2
1366 0000D59C # asm("movl _cycle,r3"); /* r3 = cycle count */
1367 0000D59C 0d effffff4a2 53 movl _cycle,r3
1368 0000D5A3 # asm("movl _sgl_ld_acc,r4"); /* r4 = data loaded */
1369 0000D5A3 0d effffff49b 54 movl _sgl_ld_acc,r4
1370 0000D5AA # asm("movl _sgl_st_acc,r5"); /* r5 = data stored */
1371 0000D5AA 0d effffff494 55 movl _sgl_st_acc,r5
1372 0000D5B1 # if( halt_code == BAD_ACC_HLT ) {
1373 0000D5B1 1d ad04 01 cmpl 4(fp),$1
1374 0000D5B5 21 10 jneq L385
1375 0000D5B7 # asm("movl _sgl_expected,r6"); /* r6 = data expected */
1376 0000D5B7 0d effffff487 56 movl _sgl_expected,r6
1377 0000D5BE # asm("movl _index,r7"); /* r7 = data index */
1378 0000D5BE 0d effffff480 57 movl _index,r7
1379 0000D5C5 # } else
1380 0000D5C5 11 5e jbr L386
1381 0000D5C7 L385:
1382 0000D5C7 # if( halt_code == BAD_REG_HLT ) {
1383 0000D5C7 1d ad04 02 cmpl 4(fp),$2
1384 0000D5CB 21 3d jneq L387
1385 0000D5CD # sgl_dummy1 = load_regs[index2];
1386 0000D5CD 0d effffff471 50 movl _index2,r0
1387 0000D5D4 0d 40effffff469 movl _load_regs[r0],_sgl_dummy1
effffff464
1388 0000D5E0 # sgl_dummy2 = store_regs[index2];
1389 0000D5E0 0d effffff45e 50 movl _index2,r0
1390 0000D5E7 0d 40effffff456 movl _store_regs[r0],_sgl_dummy2
effffff451
1391 0000D5F3 # asm("movl _index2,r6"); /* r6 = bad register # */
1392 0000D5F3 0d effffff44b 56 movl _index2,r6
1393 0000D5FA # asm("movl _sgl_dummy2,r7"); /* r7 = final reg value */
1394 0000D5FA 0d effffff444 57 movl _sgl_dummy2,r7
1395 0000D601 # asm("movl _sgl_dummy1,r8"); /* r8 = expected value */
1396 0000D601 0d effffff43d 58 movl _sgl_dummy1,r8
1397 0000D608 # } else
1398 0000D608 11 1b jbr L388
1399 0000D60A L387:
1400 0000D60A # if( halt_code == BAD_PSL_HLT ) {
1401 0000D60A 1d ad04 03 cmpl 4(fp),$3
1402 0000D60E 21 15 jneq L389
1403 0000D610 # asm("movl _init_psl,r6"); /* r6 = initial PSL */
1404 0000D610 0d effffff42e 56 movl _init_psl,r6
1405 0000D617 # asm("movl _psl_val,r7"); /* r7 = final PSL */
1406 0000D617 0d effffff427 57 movl _psl_val,r7
1407 0000D61E # asm("movl _exp_psl,r8"); /* r8 = expected PSL */
1408 0000D61E 0d effffff420 58 movl _exp_psl,r8
1409 0000D625 # };
1410 0000D625 L389:
1411 0000D625 L388:
1412 0000D625 L386:
1413 0000D625 # asm("halt"); /* HALT ... */
1414 0000D625 00 halt
1415 0000D626 # }
1416 0000D626 40 ret#2
1417 0000D627 .set L381,0x0
1418 0000D627 L383:
1419 0000D627 13 ff55 jbr L384
1420 0000D62A .data
1420 0001A06E .data
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