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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to ldfd.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 000008ac * .text
4 00000000 .align 1
5 00000000 .globl _ldfd
6 00000000 _ldfd:
7 0001EDA4 0000 .word L215
8 0001EDA6 #
9 0001EDA6 # #include "fpp_defs.h"
10 0001EDA6 #
11 0001EDA6 #
12 0001EDA6 # /*****************************************************************************
13 0001EDA6 # *
14 0001EDA6 # * LDFD - SINGLE PRECISION FLOATING POINT CONVERT LONG TO FLOAT TEST
15 0001EDA6 # *
16 0001EDA6 # *****************************************************************************/
17 0001EDA6 # ldfd()
18 0001EDA6 # {
19 0001EDA6 11 41 jbr L217
20 0001EDA8 L218:
21 0001EDA8 # asm(".globl _ldfd_t");
22 0001EDA8 .globl _ldfd_t
23 0001EDA8 # asm("_ldfd_t:"); /* entry address */
24 0001EDA8 _ldfd_t:
25 0001EDA8 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
26 0001EDA8 1d effffffff6 01 cmpl _cycle,$1
27 0001EDAF 21 15 jneq L219
28 0001EDB1 5d efffffffed tstl _prt_hdrs
29 0001EDB7 31 0d jeql L219
30 0001EDB9 # writes(" LDFD");
31 0001EDB9 .data 1
32 000008ac * L221:
33 000008ac * 204C44464400 .ascii " LDFD\0"
34 000008b2 * .text
35 0001EDB9 dd 8f000008ac pushl $L221
36 0001EDBF fe 08 efffffffde callf $8,_writes
37 0001EDC6 # ldfd_1(); /* load through a register */
38 0001EDC6 L219:
39 0001EDC6 fe 04 ef0000001f callf $4,_ldfd_1
40 0001EDCD # ldfd_2(); /* load through the cache */
41 0001EDCD fe 04 ef000001b8 callf $4,_ldfd_2
42 0001EDD4 # ldfd_3(); /* register stability */
43 0001EDD4 fe 04 ef00000345 callf $4,_ldfd_3
44 0001EDDB # ldfd_4(); /* PSL stability test */
45 0001EDDB fe 04 ef00000524 callf $4,_ldfd_4
46 0001EDE2 # asm("jmp *return"); /* return to the test monitor */
47 0001EDE2 71 ffffffffbc jmp *return
48 0001EDE8 # }
49 0001EDE8 40 ret#2
50 0001EDE9 .set L215,0x0
51 0001EDE9 L217:
52 0001EDE9 11 bd jbr L218
53 0001EDEB .data
54 000008ac * .text
55 0001EDEB 00 .align 1
56 0001EDEC .globl _ldfd_1
57 0001EDEC _ldfd_1:
58 0001EDEC 0000 .word L226
59 0001EDEE #
60 0001EDEE #
61 0001EDEE #
62 0001EDEE # /************************************************************************
63 0001EDEE # *
64 0001EDEE # * SUBTEST 1
65 0001EDEE # *
66 0001EDEE # ************************************************************************/
67 0001EDEE # ldfd_1()
68 0001EDEE # {
69 0001EDEE 13 0198 jbr L228
70 0001EDF1 L229:
71 0001EDF1 # force_loop = FALSE;
72 0001EDF1 4d efffffffad clrl _force_loop
73 0001EDF7 # subtest = 1;
74 0001EDF7 0d 01 efffffffa6 movl $1,_subtest
75 0001EDFE # index = 0;
76 0001EDFE 4d efffffffa0 clrl _index
77 0001EE04 # do
78 0001EE04 L232:
79 0001EE04 # {
80 0001EE04 # sgl_ld_acc = ldfd_1_data[index].ld; /* get the operand */
81 0001EE04 5c 0c efffffff99 50 mull3 $12,_index,r0
82 0001EE0C 0d e000000000 efffffff8d movl _ldfd_1_data(r0),_sgl_ld_acc
83 0001EE17 # dbl_expected.m = ldfd_1_data[index].exp.m;/* get expected result */
84 0001EE17 5c 0c efffffff86 50 mull3 $12,_index,r0
85 0001EE1F 0d e000000004 efffffff7a movl _ldfd_1_data+4(r0),_dbl_expected
86 0001EE2A # dbl_expected.l = 0; /* get expected result */
87 0001EE2A 4d efffffff78 clrl _dbl_expected+4
88 0001EE30 # /*
89 0001EE30 # * If LOOP ON ERROR is set, this is the loop for this subtest.
90 0001EE30 # * The force loop flag is set after the first error.
91 0001EE30 # */
92 0001EE30 # asm("_ldfd_1_lp1:");
93 0001EE30 _ldfd_1_lp1:
94 0001EE30 # asm("movl _sgl_ld_acc,r4"); /* get the value to convert */
95 0001EE30 0d efffffff6e 54 movl _sgl_ld_acc,r4
96 0001EE37 # asm("ldfd r4"); /* load the data */
97 0001EE37 97 54 ldfd r4
98 0001EE39 # asm("std r6"); /* store the result in R8 */
99 0001EE39 27 56 std r6
100 0001EE3B # if( force_loop )
101 0001EE3B 5d efffffff63 tstl _force_loop
102 0001EE41 31 02 jeql L233
103 0001EE43 # asm("brb _ldfd_1_lp1");; /* loop on the error */
104 0001EE43 11 eb brb _ldfd_1_lp1
105 0001EE45 L233:
106 0001EE45 # /*
107 0001EE45 # * end error loop - test the results
108 0001EE45 # */
109 0001EE45 # asm("movl r6,_dbl_st_acc"); /* move MSW to cache */
110 0001EE45 0d 56 efffffff58 movl r6,_dbl_st_acc
111 0001EE4C # asm("movl r7,_dbl_st_acc+4"); /* move LSW to cache */
112 0001EE4C 0d 57 efffffff55 movl r7,_dbl_st_acc+4
113 0001EE53 # if( ( dbl_st_acc.m != dbl_expected.m ) || /* COMPARE the values */
114 0001EE53 # ( dbl_st_acc.l != dbl_expected.l ) ){
115 0001EE53 1d efffffff4b efffffff46 cmpl _dbl_st_acc,_dbl_expected
116 0001EE5E 21 10 jneq L9999
117 0001EE60 1d efffffff42 efffffff3d cmpl _dbl_st_acc+4,_dbl_expected+4
118 0001EE6B 21 03 13 00ff jeql L234
119 0001EE70 L9999:
120 0001EE70 # errcnt++; /* bump the error count */
121 0001EE70 6d efffffff2e incl _errcnt
122 0001EE76 # if( prt_error ) {
123 0001EE76 5d efffffff28 tstl _prt_error
124 0001EE7C 21 03 13 00cb jeql L235
125 0001EE81 # writes(" \n"); /* start a new print line */
126 0001EE81 .data 1
127 000008b2 * L236:
128 000008b2 * 200A00 .ascii " \12\0"
129 000008b5 * .text
130 0001EE81 dd 8f000008b2 pushl $L236
131 0001EE87 fe 08 efffffff16 callf $8,_writes
132 0001EE8E # writes("cycle: ");
133 0001EE8E .data 1
134 000008b5 * L237:
135 000008b5 * 6379636C653A2000 .ascii "cycle: \0"
136 000008bd * .text
137 0001EE8E dd 8f000008b5 pushl $L237
138 0001EE94 fe 08 efffffff09 callf $8,_writes
139 0001EE9B # writed( cycle );
140 0001EE9B dd efffffff03 pushl _cycle
141 0001EEA1 fe 08 effffffefc callf $8,_writed
142 0001EEA8 # writes(" LDFD test ");
143 0001EEA8 .data 1
144 000008bd * L239:
145 000008bd * 20204C4446442074657374200 .ascii " LDFD test \0"
0
146 000008ca * .text
147 0001EEA8 dd 8f000008bd pushl $L239
148 0001EEAE fe 08 effffffeef callf $8,_writes
149 0001EEB5 # writed( test_no );
150 0001EEB5 dd effffffee9 pushl _test_no
151 0001EEBB fe 08 effffffee2 callf $8,_writed
152 0001EEC2 # writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n");
153 0001EEC2 .data 1
154 000008ca * L240:
155 000008ca * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0"
85265672E204461746129202D
204241442046494E414C20414
3430A00
156 000008f3 * .text
157 0001EEC2 dd 8f000008ca pushl $L240
158 0001EEC8 fe 08 effffffed5 callf $8,_writes
159 0001EECF # print_ldfd_data();
160 0001EECF fe 04 ef00000610 callf $4,_print_ldfd_data
161 0001EED6 # writes(", index = ");
162 0001EED6 .data 1
163 000008f3 * L242:
164 000008f3 * 2C202020696E646578203D200 .ascii ", index = \0"
0
165 00000900 * .text
166 0001EED6 dd 8f000008f3 pushl $L242
167 0001EEDC fe 08 effffffec1 callf $8,_writes
168 0001EEE3 # writed( index );
169 0001EEE3 dd effffffebb pushl _index
170 0001EEE9 fe 08 effffffeb4 callf $8,_writed
171 0001EEF0 # writec('\n');
172 0001EEF0 dd 0a pushl $10
173 0001EEF2 fe 08 effffffeab callf $8,_writec
174 0001EEF9 # writes(" operand = ");
175 0001EEF9 .data 1
176 00000900 * L244:
177 00000900 * 202020206F706572616E64203 .ascii " operand = \0"
D2000
178 0000090f * .text
179 0001EEF9 dd 8f00000900 pushl $L244
180 0001EEFF fe 08 effffffe9e callf $8,_writes
181 0001EF06 # write32h( sgl_ld_acc );
182 0001EF06 dd effffffe98 pushl _sgl_ld_acc
183 0001EF0C fe 08 effffffe91 callf $8,_write32h
184 0001EF13 # writes(", expected Acc = ");
185 0001EF13 .data 1
186 0000090f * L246:
187 0000090f * 2C20202020202020206578706 .ascii ", expected Acc = \0"
56374656420416363203D2000
188 00000928 * .text
189 0001EF13 dd 8f0000090f pushl $L246
190 0001EF19 fe 08 effffffe84 callf $8,_writes
191 0001EF20 # write32h( dbl_expected.m );
192 0001EF20 dd effffffe7e pushl _dbl_expected
193 0001EF26 fe 08 effffffe77 callf $8,_write32h
194 0001EF2D # writec(' ');
195 0001EF2D dd 20 pushl $32
196 0001EF2F fe 08 effffffe6e callf $8,_writec
197 0001EF36 # write32h( dbl_expected.l );
198 0001EF36 dd effffffe6c pushl _dbl_expected+4
199 0001EF3C fe 08 effffffe61 callf $8,_write32h
200 0001EF43 # writec('\n');
201 0001EF43 dd 0a pushl $10
202 0001EF45 fe 08 effffffe58 callf $8,_writec
203 0001EF4C # }
204 0001EF4C # if( halt_flg )
205 0001EF4C L235:
206 0001EF4C 5d effffffe52 tstl _halt_flg
207 0001EF52 31 09 jeql L247
208 0001EF54 # ldfd_er_halt( BAD_ACC_HLT ); /* halt on the error */
209 0001EF54 dd 01 pushl $1
210 0001EF56 fe 08 ef000005e7 callf $8,_ldfd_er_halt
211 0001EF5D # if( loop_on_err ) {
212 0001EF5D L247:
213 0001EF5D 5d effffffe41 tstl _loop_on_err
214 0001EF63 31 0a jeql L249
215 0001EF65 # force_loop = TRUE; /* set the force loop flag */
216 0001EF65 0d 01 effffffe38 movl $1,_force_loop
217 0001EF6C # asm("brw _ldfd_1_lp1");; /* and loop on the error */
218 0001EF6C 13 fec1 brw _ldfd_1_lp1
219 0001EF6F # } /* end of loop on error */
220 0001EF6F # } /* end of compare error */
221 0001EF6F L249:
222 0001EF6F # } while( index++ < max_ldfd_1_index ); /* end of WHILE loop */
223 0001EF6F L234:
224 0001EF6F L231:
225 0001EF6F 0d effffffe2f 50 movl _index,r0
226 0001EF76 6d effffffe28 incl _index
227 0001EF7C 1d 50 effffffe21 cmpl r0,_max_ldfd_1_index
228 0001EF83 81 03 13 fe7c jlss L232
229 0001EF88 L230:
230 0001EF88 # } /* end of subtest 1 */
231 0001EF88 40 ret#2
232 0001EF89 .set L226,0x0
233 0001EF89 L228:
234 0001EF89 13 fe65 jbr L229
235 0001EF8C .data
236 000008ac * .text
237 0001EF8C .align 1
238 0001EF8C .globl _ldfd_2
239 0001EF8C _ldfd_2:
240 0001EF8C 0000 .word L250
241 0001EF8E #
242 0001EF8E #
243 0001EF8E #
244 0001EF8E # /************************************************************************
245 0001EF8E # *
246 0001EF8E # * SUBTEST 2 - convert through memory
247 0001EF8E # *
248 0001EF8E # ************************************************************************/
249 0001EF8E # ldfd_2()
250 0001EF8E # {
251 0001EF8E 13 018b jbr L252
252 0001EF91 L253:
253 0001EF91 # force_loop = FALSE;
254 0001EF91 4d effffffe0d clrl _force_loop
255 0001EF97 # subtest = 2;
256 0001EF97 0d 02 effffffe06 movl $2,_subtest
257 0001EF9E # index = 0;
258 0001EF9E 4d effffffe00 clrl _index
259 0001EFA4 # do
260 0001EFA4 L256:
261 0001EFA4 # {
262 0001EFA4 # sgl_ld_acc = ldfd_1_data[index].ld; /* get the operand */
263 0001EFA4 5c 0c effffffdf9 50 mull3 $12,_index,r0
264 0001EFAC 0d e000000000 effffffded movl _ldfd_1_data(r0),_sgl_ld_acc
265 0001EFB7 # dbl_expected.m = ldfd_1_data[index].exp.m;/* get expected result */
266 0001EFB7 5c 0c effffffde6 50 mull3 $12,_index,r0
267 0001EFBF 0d e000000004 effffffdda movl _ldfd_1_data+4(r0),_dbl_expected
268 0001EFCA # dbl_expected.l = 0; /* get expected result */
269 0001EFCA 4d effffffdd8 clrl _dbl_expected+4
270 0001EFD0 # /*
271 0001EFD0 # * If LOOP ON ERROR is set, this is the loop for this subtest.
272 0001EFD0 # * The force loop flag is set after the first error.
273 0001EFD0 # */
274 0001EFD0 # asm("_ldfd_2_lp1:");
275 0001EFD0 _ldfd_2_lp1:
276 0001EFD0 # asm("ldfd _sgl_ld_acc"); /* convert the value */
277 0001EFD0 97 effffffdce ldfd _sgl_ld_acc
278 0001EFD6 # asm("std _dbl_st_acc"); /* store the result */
279 0001EFD6 27 effffffdc8 std _dbl_st_acc
280 0001EFDC # if( force_loop )
281 0001EFDC 5d effffffdc2 tstl _force_loop
282 0001EFE2 31 02 jeql L257
283 0001EFE4 # asm("brb _ldfd_2_lp1");; /* loop on the error */
284 0001EFE4 11 ea brb _ldfd_2_lp1
285 0001EFE6 L257:
286 0001EFE6 # /*
287 0001EFE6 # * end error loop - test the results
288 0001EFE6 # */
289 0001EFE6 # if( ( dbl_st_acc.m != dbl_expected.m ) || /* COMPARE the values */
290 0001EFE6 # ( dbl_st_acc.l != dbl_expected.l ) ){
291 0001EFE6 1d effffffdb8 effffffdb3 cmpl _dbl_st_acc,_dbl_expected
292 0001EFF1 21 10 jneq L9998
293 0001EFF3 1d effffffdaf effffffdaa cmpl _dbl_st_acc+4,_dbl_expected+4
294 0001EFFE 21 03 13 00ff jeql L258
295 0001F003 L9998:
296 0001F003 # errcnt++; /* bump the error count */
297 0001F003 6d effffffd9b incl _errcnt
298 0001F009 # if( prt_error ) {
299 0001F009 5d effffffd95 tstl _prt_error
300 0001F00F 21 03 13 00cb jeql L259
301 0001F014 # writes(" \n"); /* start a new print line */
302 0001F014 .data 1
303 00000928 * L260:
304 00000928 * 200A00 .ascii " \12\0"
305 0000092b * .text
306 0001F014 dd 8f00000928 pushl $L260
307 0001F01A fe 08 effffffd83 callf $8,_writes
308 0001F021 # writes("cycle: ");
309 0001F021 .data 1
310 0000092b * L261:
311 0000092b * 6379636C653A2000 .ascii "cycle: \0"
312 00000933 * .text
313 0001F021 dd 8f0000092b pushl $L261
314 0001F027 fe 08 effffffd76 callf $8,_writes
315 0001F02E # writed( cycle );
316 0001F02E dd effffffd70 pushl _cycle
317 0001F034 fe 08 effffffd69 callf $8,_writed
318 0001F03B # writes(" LDFD test ");
319 0001F03B .data 1
320 00000933 * L262:
321 00000933 * 20204C4446442074657374200 .ascii " LDFD test \0"
0
322 00000940 * .text
323 0001F03B dd 8f00000933 pushl $L262
324 0001F041 fe 08 effffffd5c callf $8,_writes
325 0001F048 # writed( test_no );
326 0001F048 dd effffffd56 pushl _test_no
327 0001F04E fe 08 effffffd4f callf $8,_writed
328 0001F055 # writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n");
329 0001F055 .data 1
330 00000940 * L263:
331 00000940 * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL ACC\12\0"
8436163686520446174612920
2D204241442046494E414C204
143430A00
332 0000096a * .text
333 0001F055 dd 8f00000940 pushl $L263
334 0001F05B fe 08 effffffd42 callf $8,_writes
335 0001F062 # print_ldfd_data();
336 0001F062 fe 04 ef0000047d callf $4,_print_ldfd_data
337 0001F069 # writes(", index = ");
338 0001F069 .data 1
339 0000096a * L264:
340 0000096a * 2C202020696E646578203D200 .ascii ", index = \0"
0
341 00000977 * .text
342 0001F069 dd 8f0000096a pushl $L264
343 0001F06F fe 08 effffffd2e callf $8,_writes
344 0001F076 # writed( index );
345 0001F076 dd effffffd28 pushl _index
346 0001F07C fe 08 effffffd21 callf $8,_writed
347 0001F083 # writec('\n');
348 0001F083 dd 0a pushl $10
349 0001F085 fe 08 effffffd18 callf $8,_writec
350 0001F08C # writes(" operand = ");
351 0001F08C .data 1
352 00000977 * L265:
353 00000977 * 202020206F706572616E64203 .ascii " operand = \0"
D2000
354 00000986 * .text
355 0001F08C dd 8f00000977 pushl $L265
356 0001F092 fe 08 effffffd0b callf $8,_writes
357 0001F099 # write32h( sgl_ld_acc );
358 0001F099 dd effffffd05 pushl _sgl_ld_acc
359 0001F09F fe 08 effffffcfe callf $8,_write32h
360 0001F0A6 # writes(", expected Acc = ");
361 0001F0A6 .data 1
362 00000986 * L266:
363 00000986 * 2C20202020202020206578706 .ascii ", expected Acc = \0"
56374656420416363203D2000
364 0000099f * .text
365 0001F0A6 dd 8f00000986 pushl $L266
366 0001F0AC fe 08 effffffcf1 callf $8,_writes
367 0001F0B3 # write32h( dbl_expected.m );
368 0001F0B3 dd effffffceb pushl _dbl_expected
369 0001F0B9 fe 08 effffffce4 callf $8,_write32h
370 0001F0C0 # writec(' ');
371 0001F0C0 dd 20 pushl $32
372 0001F0C2 fe 08 effffffcdb callf $8,_writec
373 0001F0C9 # write32h( dbl_expected.l );
374 0001F0C9 dd effffffcd9 pushl _dbl_expected+4
375 0001F0CF fe 08 effffffcce callf $8,_write32h
376 0001F0D6 # writec('\n');
377 0001F0D6 dd 0a pushl $10
378 0001F0D8 fe 08 effffffcc5 callf $8,_writec
379 0001F0DF # }
380 0001F0DF # if( halt_flg )
381 0001F0DF L259:
382 0001F0DF 5d effffffcbf tstl _halt_flg
383 0001F0E5 31 09 jeql L267
384 0001F0E7 # ldfd_er_halt( BAD_ACC_HLT ); /* halt on the error */
385 0001F0E7 dd 01 pushl $1
386 0001F0E9 fe 08 ef00000454 callf $8,_ldfd_er_halt
387 0001F0F0 # if( loop_on_err ) {
388 0001F0F0 L267:
389 0001F0F0 5d effffffcae tstl _loop_on_err
390 0001F0F6 31 0a jeql L268
391 0001F0F8 # force_loop = TRUE; /* set the force loop flag */
392 0001F0F8 0d 01 effffffca5 movl $1,_force_loop
393 0001F0FF # asm("brw _ldfd_2_lp1");; /* and loop on the error */
394 0001F0FF 13 fece brw _ldfd_2_lp1
395 0001F102 # } /* end of loop on error */
396 0001F102 # } /* end of compare error */
397 0001F102 L268:
398 0001F102 # } while( index++ < max_ldfd_1_index ); /* end of WHILE loop */
399 0001F102 L258:
400 0001F102 L255:
401 0001F102 0d effffffc9c 50 movl _index,r0
402 0001F109 6d effffffc95 incl _index
403 0001F10F 1d 50 effffffc8e cmpl r0,_max_ldfd_1_index
404 0001F116 81 03 13 fe89 jlss L256
405 0001F11B L254:
406 0001F11B # } /* end of subtest 2 */
407 0001F11B 40 ret#2
408 0001F11C .set L250,0x0
409 0001F11C L252:
410 0001F11C 13 fe72 jbr L253
411 0001F11F .data
412 000008ac * .text
413 0001F11F 00 .align 1
414 0001F120 .globl _ldfd_3
415 0001F120 _ldfd_3:
416 0001F120 0000 .word L269
417 0001F122 #
418 0001F122 #
419 0001F122 #
420 0001F122 # /************************************************************************
421 0001F122 # *
422 0001F122 # * SUBTEST 3 - Check for register corruption
423 0001F122 # *
424 0001F122 # ************************************************************************/
425 0001F122 # ldfd_3()
426 0001F122 # {
427 0001F122 13 01de jbr L271
428 0001F125 L272:
429 0001F125 # force_loop = FALSE; /* clear force_loop flg */
430 0001F125 4d effffffc79 clrl _force_loop
431 0001F12B # subtest = 3;
432 0001F12B 0d 03 effffffc72 movl $3,_subtest
433 0001F132 # fill_reg_buf( load_regs ); /* get patterns for regs */
434 0001F132 dd 8f00000000 pushl $_load_regs
435 0001F138 fe 08 effffffc65 callf $8,_fill_reg_buf
436 0001F13F # index = 0;
437 0001F13F 4d effffffc5f clrl _index
438 0001F145 # sgl_ld_acc = ldfd_1_data[index].ld; /* get the operand */
439 0001F145 5c 0c effffffc58 50 mull3 $12,_index,r0
440 0001F14D 0d e000000000 effffffc4c movl _ldfd_1_data(r0),_sgl_ld_acc
441 0001F158 # /*
442 0001F158 # * If LOOP ON ERROR is set, this is the loop for this subtest.
443 0001F158 # * The force loop flag is set after the first error.
444 0001F158 # */
445 0001F158 # asm("_ldfd_3_lp1:");
446 0001F158 _ldfd_3_lp1:
447 0001F158 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
448 0001F158 ab 891fff effffffc43 loadr $0x1fff,_load_regs
449 0001F161 # asm("nop");
450 0001F161 10 nop
451 0001F162 # asm("ldfd _sgl_ld_acc"); /* convert the value */
452 0001F162 97 effffffc3c ldfd _sgl_ld_acc
453 0001F168 # asm("nop");
454 0001F168 10 nop
455 0001F169 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
456 0001F169 bb 891fff effffffc32 storer $0x1fff,_store_regs
457 0001F172 # asm("std _dbl_st_acc"); /* save the acc */
458 0001F172 27 effffffc2c std _dbl_st_acc
459 0001F178 # if( force_loop )
460 0001F178 5d effffffc26 tstl _force_loop
461 0001F17E 31 02 jeql L274
462 0001F180 # asm("brb _ldfd_3_lp1");; /* loop on the error */
463 0001F180 11 d6 brb _ldfd_3_lp1
464 0001F182 L274:
465 0001F182 # /*
466 0001F182 # * Now compare the stored register values to those that were loaded
467 0001F182 # */
468 0001F182 # index2 = 0;
469 0001F182 4d effffffc1c clrl _index2
470 0001F188 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
471 0001F188 L275:
472 0001F188 0d effffffc16 50 movl _index2,r0
473 0001F18F 0d effffffc0f 51 movl _index2,r1
474 0001F196 1d 40effffffc07 cmpl _load_regs[r0],_store_regs[r1]
41effffffc01
475 0001F1A3 21 11 jneq L276
476 0001F1A5 1d effffffbf9 0d cmpl _index2,$13
477 0001F1AC 81 08 jgeq L276
478 0001F1AE # index2++; /* check reg values */
479 0001F1AE 6d effffffbf0 incl _index2
480 0001F1B4 11 d2 jbr L275
481 0001F1B6 L276:
482 0001F1B6 # if( index2 < 13 ) { /* error if index2 < 13 */
483 0001F1B6 1d effffffbe8 0d cmpl _index2,$13
484 0001F1BD 91 03 13 0128 jgeq L277
485 0001F1C2 # errcnt++; /* bump the error count */
486 0001F1C2 6d effffffbdc incl _errcnt
487 0001F1C8 # if( prt_error ) {
488 0001F1C8 5d effffffbd6 tstl _prt_error
489 0001F1CE 21 03 13 00f4 jeql L278
490 0001F1D3 # writes(" \n"); /* start a new print line */
491 0001F1D3 .data 1
492 0000099f * L279:
493 0000099f * 200A00 .ascii " \12\0"
494 000009a2 * .text
495 0001F1D3 dd 8f0000099f pushl $L279
496 0001F1D9 fe 08 effffffbc4 callf $8,_writes
497 0001F1E0 # writes("cycle: ");
498 0001F1E0 .data 1
499 000009a2 * L280:
500 000009a2 * 6379636C653A2000 .ascii "cycle: \0"
501 000009aa * .text
502 0001F1E0 dd 8f000009a2 pushl $L280
503 0001F1E6 fe 08 effffffbb7 callf $8,_writes
504 0001F1ED # writed( cycle );
505 0001F1ED dd effffffbb1 pushl _cycle
506 0001F1F3 fe 08 effffffbaa callf $8,_writed
507 0001F1FA # writes(" LDFD test ");
508 0001F1FA .data 1
509 000009aa * L281:
510 000009aa * 20204C4446442074657374200 .ascii " LDFD test \0"
0
511 000009b7 * .text
512 0001F1FA dd 8f000009aa pushl $L281
513 0001F200 fe 08 effffffb9d callf $8,_writes
514 0001F207 # writed( test_no );
515 0001F207 dd effffffb97 pushl _test_no
516 0001F20D fe 08 effffffb90 callf $8,_writed
517 0001F214 # writes(", subtest 3 - A REGISTER WAS MODIFIED\n");
518 0001F214 .data 1
519 000009b7 * L282:
520 000009b7 * 2C20737562746573742033202 .ascii ", subtest 3 - A REGISTER WAS MODIFIED\12\0"
D204120524547495354455220
574153204D4F4449464945440
A00
521 000009de * .text
522 0001F214 dd 8f000009b7 pushl $L282
523 0001F21A fe 08 effffffb83 callf $8,_writes
524 0001F221 # print_ldfd_data(); /* print the operands */
525 0001F221 fe 04 ef000002be callf $4,_print_ldfd_data
526 0001F228 # writes("\n");
527 0001F228 .data 1
528 000009de * L283:
529 000009de * 0A00 .ascii "\12\0"
530 000009e0 * .text
531 0001F228 dd 8f000009de pushl $L283
532 0001F22E fe 08 effffffb6f callf $8,_writes
533 0001F235 # writes(" operand = ");
534 0001F235 .data 1
535 000009e0 * L284:
536 000009e0 * 202020206F706572616E64203 .ascii " operand = \0"
D2000
537 000009ef * .text
538 0001F235 dd 8f000009e0 pushl $L284
539 0001F23B fe 08 effffffb62 callf $8,_writes
540 0001F242 # write32h( sgl_ld_acc );
541 0001F242 dd effffffb5c pushl _sgl_ld_acc
542 0001F248 fe 08 effffffb55 callf $8,_write32h
543 0001F24F # writes("\n");
544 0001F24F .data 1
545 000009ef * L285:
546 000009ef * 0A00 .ascii "\12\0"
547 000009f1 * .text
548 0001F24F dd 8f000009ef pushl $L285
549 0001F255 fe 08 effffffb48 callf $8,_writes
550 0001F25C # writes("register "); /* print the information */
551 0001F25C .data 1
552 000009f1 * L286:
553 000009f1 * 72656769737465722000 .ascii "register \0"
554 000009fb * .text
555 0001F25C dd 8f000009f1 pushl $L286
556 0001F262 fe 08 effffffb3b callf $8,_writes
557 0001F269 # writed( index2 ); /* about the corrupted */
558 0001F269 dd effffffb35 pushl _index2
559 0001F26F fe 08 effffffb2e callf $8,_writed
560 0001F276 # writes(" = "); /* register */
561 0001F276 .data 1
562 000009fb * L287:
563 000009fb * 203D2000 .ascii " = \0"
564 000009ff * .text
565 0001F276 dd 8f000009fb pushl $L287
566 0001F27C fe 08 effffffb21 callf $8,_writes
567 0001F283 # write32h( store_regs[index2] );
568 0001F283 0d effffffb1b 50 movl _index2,r0
569 0001F28A dd 40effffffb13 pushl _store_regs[r0]
570 0001F291 fe 08 effffffb0c callf $8,_write32h
571 0001F298 # writes(", should be = ");
572 0001F298 .data 1
573 000009ff * L288:
574 000009ff * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
575 00000a0f * .text
576 0001F298 dd 8f000009ff pushl $L288
577 0001F29E fe 08 effffffaff callf $8,_writes
578 0001F2A5 # write32h( load_regs[index2] );
579 0001F2A5 0d effffffaf9 50 movl _index2,r0
580 0001F2AC dd 40effffffaf1 pushl _load_regs[r0]
581 0001F2B3 fe 08 effffffaea callf $8,_write32h
582 0001F2BA # writes("\n");
583 0001F2BA .data 1
584 00000a0f * L289:
585 00000a0f * 0A00 .ascii "\12\0"
586 00000a11 * .text
587 0001F2BA dd 8f00000a0f pushl $L289
588 0001F2C0 fe 08 effffffadd callf $8,_writes
589 0001F2C7 # }
590 0001F2C7 # if( halt_flg )
591 0001F2C7 L278:
592 0001F2C7 5d effffffad7 tstl _halt_flg
593 0001F2CD 31 09 jeql L290
594 0001F2CF # ldfd_er_halt( BAD_REG_HLT ); /* halt on the error */
595 0001F2CF dd 02 pushl $2
596 0001F2D1 fe 08 ef0000026c callf $8,_ldfd_er_halt
597 0001F2D8 # if( loop_on_err ) {
598 0001F2D8 L290:
599 0001F2D8 5d effffffac6 tstl _loop_on_err
600 0001F2DE 31 0a jeql L291
601 0001F2E0 # force_loop = TRUE; /* set the force loop flag */
602 0001F2E0 0d 01 effffffabd movl $1,_force_loop
603 0001F2E7 # asm("brw _ldfd_3_lp1");; /* and loop on the error */
604 0001F2E7 13 fe6e brw _ldfd_3_lp1
605 0001F2EA # } /* end of loop on error */
606 0001F2EA # } while( index++ < max_ldfd_1_index ); /* end of reg corruption error */
607 0001F2EA L291:
608 0001F2EA L277:
609 0001F2EA L292:
610 0001F2EA 0d effffffab4 50 movl _index,r0
611 0001F2F1 6d effffffaad incl _index
612 0001F2F7 1d 50 effffffaa6 cmpl r0,_max_ldfd_1_index
613 0001F2FE 81 02 jgeq L293
614 0001F300 11 e8 jbr L292
615 0001F302 L293:
616 0001F302 # } /* end of subtest 3 */
617 0001F302 40 ret#2
618 0001F303 .set L269,0x0
619 0001F303 L271:
620 0001F303 13 fe1f jbr L272
621 0001F306 .data
622 000008ac * .text
623 0001F306 .align 1
624 0001F306 .globl _ldfd_4
625 0001F306 _ldfd_4:
626 0001F306 0000 .word L294
627 0001F308 #
628 0001F308 #
629 0001F308 #
630 0001F308 # /************************************************************************
631 0001F308 # *
632 0001F308 # * SUBTEST 4 - Check for PSL corruption
633 0001F308 # *
634 0001F308 # ************************************************************************/
635 0001F308 # ldfd_4()
636 0001F308 # {
637 0001F308 13 01d7 jbr L296
638 0001F30B L297:
639 0001F30B # force_loop = FALSE; /* clear force_loop flg */
640 0001F30B 4d effffffa93 clrl _force_loop
641 0001F311 # subtest = 4;
642 0001F311 0d 04 effffffa8c movl $4,_subtest
643 0001F318 # for( index = 0; index < max_ldfd_1_index; index++ ) {
644 0001F318 4d effffffa86 clrl _index
645 0001F31E L300:
646 0001F31E 1d effffffa80 effffffa7b cmpl _index,_max_ldfd_1_index
647 0001F329 91 03 13 01b3 jgeq L299
648 0001F32E # sgl_ld_acc = ldfd_1_data[index].ld; /* get the operand */
649 0001F32E 5c 0c effffffa6f 50 mull3 $12,_index,r0
650 0001F336 0d e000000000 effffffa63 movl _ldfd_1_data(r0),_sgl_ld_acc
651 0001F341 # for( status_index = 0; status_index < 3; status_index++ ) {
652 0001F341 4d effffffa5d clrl _status_index
653 0001F347 L303:
654 0001F347 1d effffffa57 03 cmpl _status_index,$3
655 0001F34E 91 03 13 0185 jgeq L302
656 0001F353 # sgl_dummy1 = status_array[status_index];/* status = +, -, 0 */
657 0001F353 0d effffffa4b 50 movl _status_index,r0
658 0001F35A 0d 40effffffa43 movl _status_array[r0],_sgl_dummy1
effffffa3e
659 0001F366 # /*
660 0001F366 # * If LOOP ON ERROR is set, this is the loop for this subtest.
661 0001F366 # * The force loop flag is set after the first error.
662 0001F366 # */
663 0001F366 # asm("_ldfd_4_lp1:");
664 0001F366 _ldfd_4_lp1:
665 0001F366 # asm("movl _sgl_ld_acc,r4"); /* load the base value */
666 0001F366 0d effffffa38 54 movl _sgl_ld_acc,r4
667 0001F36D # asm("tstl _sgl_dummy1"); /* set the PSL status */
668 0001F36D 5d effffffa31 tstl _sgl_dummy1
669 0001F373 # asm("movpsl _init_psl"); /* save the initial PSL */
670 0001F373 cd effffffa2b movpsl _init_psl
671 0001F379 # asm("nop");
672 0001F379 10 nop
673 0001F37A # asm("ldfd r4"); /* convert the value */
674 0001F37A 97 54 ldfd r4
675 0001F37C # asm("nop");
676 0001F37C 10 nop
677 0001F37D # asm("movpsl _psl_val"); /* save the final PSL */
678 0001F37D cd effffffa21 movpsl _psl_val
679 0001F383 # asm("std _dbl_st_acc"); /* save the acc */
680 0001F383 27 effffffa1b std _dbl_st_acc
681 0001F389 # if( force_loop )
682 0001F389 5d effffffa15 tstl _force_loop
683 0001F38F 31 02 jeql L304
684 0001F391 # asm("brb _ldfd_4_lp1");; /* loop on the error */
685 0001F391 11 d3 brb _ldfd_4_lp1
686 0001F393 L304:
687 0001F393 # /*
688 0001F393 # * Now compare the final PSL to the initial PSL -they should be the same
689 0001F393 # */
690 0001F393 # exp_psl = init_psl;
691 0001F393 0d effffffa0b effffffa06 movl _init_psl,_exp_psl
692 0001F39E # exp_psl |= PSL_DBL;
693 0001F39E 8c 890080 effffff9fd orl2 $128,_exp_psl
694 0001F3A7 # if( psl_val != exp_psl ) {
695 0001F3A7 1d effffff9f7 effffff9f2 cmpl _psl_val,_exp_psl
696 0001F3B2 21 03 13 0118 jeql L305
697 0001F3B7 # errcnt++; /* bump the error count */
698 0001F3B7 6d effffff9e7 incl _errcnt
699 0001F3BD # if( prt_error ) {
700 0001F3BD 5d effffff9e1 tstl _prt_error
701 0001F3C3 21 03 13 00e4 jeql L306
702 0001F3C8 # writes(" \n"); /* start a new print line */
703 0001F3C8 .data 1
704 00000a11 * L307:
705 00000a11 * 200A00 .ascii " \12\0"
706 00000a14 * .text
707 0001F3C8 dd 8f00000a11 pushl $L307
708 0001F3CE fe 08 effffff9cf callf $8,_writes
709 0001F3D5 # writes("cycle: ");
710 0001F3D5 .data 1
711 00000a14 * L308:
712 00000a14 * 6379636C653A2000 .ascii "cycle: \0"
713 00000a1c * .text
714 0001F3D5 dd 8f00000a14 pushl $L308
715 0001F3DB fe 08 effffff9c2 callf $8,_writes
716 0001F3E2 # writed( cycle );
717 0001F3E2 dd effffff9bc pushl _cycle
718 0001F3E8 fe 08 effffff9b5 callf $8,_writed
719 0001F3EF # writes(" LDFD test ");
720 0001F3EF .data 1
721 00000a1c * L309:
722 00000a1c * 20204C4446442074657374200 .ascii " LDFD test \0"
0
723 00000a29 * .text
724 0001F3EF dd 8f00000a1c pushl $L309
725 0001F3F5 fe 08 effffff9a8 callf $8,_writes
726 0001F3FC # writed( test_no );
727 0001F3FC dd effffff9a2 pushl _test_no
728 0001F402 fe 08 effffff99b callf $8,_writed
729 0001F409 # writes(", subtest 4 - INCORRECT FINAL PSL\n");
730 0001F409 .data 1
731 00000a29 * L310:
732 00000a29 * 2C20737562746573742034202 .ascii ", subtest 4 - INCORRECT FINAL PSL\12\0"
D20494E434F52524543542046
494E414C2050534C0A00
733 00000a4c * .text
734 0001F409 dd 8f00000a29 pushl $L310
735 0001F40F fe 08 effffff98e callf $8,_writes
736 0001F416 # print_ldfd_data(); /* print operands */
737 0001F416 fe 04 ef000000c9 callf $4,_print_ldfd_data
738 0001F41D # writes("\n");
739 0001F41D .data 1
740 00000a4c * L311:
741 00000a4c * 0A00 .ascii "\12\0"
742 00000a4e * .text
743 0001F41D dd 8f00000a4c pushl $L311
744 0001F423 fe 08 effffff97a callf $8,_writes
745 0001F42A # writes(" operand = ");
746 0001F42A .data 1
747 00000a4e * L312:
748 00000a4e * 202020206F706572616E64203 .ascii " operand = \0"
D2000
749 00000a5d * .text
750 0001F42A dd 8f00000a4e pushl $L312
751 0001F430 fe 08 effffff96d callf $8,_writes
752 0001F437 # write32h( sgl_ld_acc );
753 0001F437 dd effffff967 pushl _sgl_ld_acc
754 0001F43D fe 08 effffff960 callf $8,_write32h
755 0001F444 # writes("\n");
756 0001F444 .data 1
757 00000a5d * L313:
758 00000a5d * 0A00 .ascii "\12\0"
759 00000a5f * .text
760 0001F444 dd 8f00000a5d pushl $L313
761 0001F44A fe 08 effffff953 callf $8,_writes
762 0001F451 # writes("initial PSL = ");
763 0001F451 .data 1
764 00000a5f * L314:
765 00000a5f * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
766 00000a6e * .text
767 0001F451 dd 8f00000a5f pushl $L314
768 0001F457 fe 08 effffff946 callf $8,_writes
769 0001F45E # write32h( init_psl );
770 0001F45E dd effffff940 pushl _init_psl
771 0001F464 fe 08 effffff939 callf $8,_write32h
772 0001F46B # writes(", final PSL = ");
773 0001F46B .data 1
774 00000a6e * L315:
775 00000a6e * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
776 00000a7e * .text
777 0001F46B dd 8f00000a6e pushl $L315
778 0001F471 fe 08 effffff92c callf $8,_writes
779 0001F478 # write32h( psl_val );
780 0001F478 dd effffff926 pushl _psl_val
781 0001F47E fe 08 effffff91f callf $8,_write32h
782 0001F485 # writes(", expectd PSL = ");
783 0001F485 .data 1
784 00000a7e * L316:
785 00000a7e * 2C20206578706563746420505 .ascii ", expectd PSL = \0"
34C203D2000
786 00000a90 * .text
787 0001F485 dd 8f00000a7e pushl $L316
788 0001F48B fe 08 effffff912 callf $8,_writes
789 0001F492 # write32h( exp_psl );
790 0001F492 dd effffff90c pushl _exp_psl
791 0001F498 fe 08 effffff905 callf $8,_write32h
792 0001F49F # writes("\n");
793 0001F49F .data 1
794 00000a90 * L317:
795 00000a90 * 0A00 .ascii "\12\0"
796 00000a92 * .text
797 0001F49F dd 8f00000a90 pushl $L317
798 0001F4A5 fe 08 effffff8f8 callf $8,_writes
799 0001F4AC # }
800 0001F4AC # if( halt_flg )
801 0001F4AC L306:
802 0001F4AC 5d effffff8f2 tstl _halt_flg
803 0001F4B2 31 09 jeql L318
804 0001F4B4 # ldfd_er_halt( BAD_PSL_HLT ); /* halt on error */
805 0001F4B4 dd 03 pushl $3
806 0001F4B6 fe 08 ef00000087 callf $8,_ldfd_er_halt
807 0001F4BD # if( loop_on_err ) {
808 0001F4BD L318:
809 0001F4BD 5d effffff8e1 tstl _loop_on_err
810 0001F4C3 31 0a jeql L319
811 0001F4C5 # force_loop = TRUE; /* set force loop flag */
812 0001F4C5 0d 01 effffff8d8 movl $1,_force_loop
813 0001F4CC # asm("brw _ldfd_4_lp1");; /* and loop on error */
814 0001F4CC 13 fe97 brw _ldfd_4_lp1
815 0001F4CF # } /* end of loop on error */
816 0001F4CF # } /* end of PSL corruption error */
817 0001F4CF L319:
818 0001F4CF # } /* end of PSL corruption error */
819 0001F4CF L305:
820 0001F4CF L301:
821 0001F4CF 6d effffff8cf incl _status_index
822 0001F4D5 13 fe6f jbr L303
823 0001F4D8 L302:
824 0001F4D8 # } /* end of data WHILE loop */
825 0001F4D8 L298:
826 0001F4D8 6d effffff8c6 incl _index
827 0001F4DE 13 fe3d jbr L300
828 0001F4E1 L299:
829 0001F4E1 # } /* end of subtest 4 */
830 0001F4E1 40 ret#2
831 0001F4E2 .set L294,0x0
832 0001F4E2 L296:
833 0001F4E2 13 fe26 jbr L297
834 0001F4E5 .data
835 000008ac * .text
836 0001F4E5 00 .align 1
837 0001F4E6 .globl _print_ldfd_data
838 0001F4E6 _print_ldfd_data:
839 0001F4E6 0000 .word L320
840 0001F4E8 #
841 0001F4E8 #
842 0001F4E8 #
843 0001F4E8 # /**************************************************************************
844 0001F4E8 # *
845 0001F4E8 # * PRINT THE DATA AND STORE RESULTS
846 0001F4E8 # *
847 0001F4E8 # * initial Acc = xxxxxxxx xxxxxxxx, stored = xxxxxxxx xxxxxxxx, index = xx
848 0001F4E8 # **************************************************************************/
849 0001F4E8 # print_ldfd_data()
850 0001F4E8 # {
851 0001F4E8 11 58 jbr L322
852 0001F4EA L323:
853 0001F4EA # writes("initial Acc = ");
854 0001F4EA .data 1
855 00000a92 * L324:
856 00000a92 * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
857 00000aa1 * .text
858 0001F4EA dd 8f00000a92 pushl $L324
859 0001F4F0 fe 08 effffff8ad callf $8,_writes
860 0001F4F7 # write32h( sgl_ld_acc );
861 0001F4F7 dd effffff8a7 pushl _sgl_ld_acc
862 0001F4FD fe 08 effffff8a0 callf $8,_write32h
863 0001F504 # writes(", ");
864 0001F504 .data 1
865 00000aa1 * L325:
866 00000aa1 * 2C202020202020202000 .ascii ", \0"
867 00000aab * .text
868 0001F504 dd 8f00000aa1 pushl $L325
869 0001F50A fe 08 effffff893 callf $8,_writes
870 0001F511 # writes(" final Acc = ");
871 0001F511 .data 1
872 00000aab * L326:
873 00000aab * 20202066696E616C204163632 .ascii " final Acc = \0"
03D2000
874 00000abb * .text
875 0001F511 dd 8f00000aab pushl $L326
876 0001F517 fe 08 effffff886 callf $8,_writes
877 0001F51E # write32h( dbl_st_acc.m );
878 0001F51E dd effffff880 pushl _dbl_st_acc
879 0001F524 fe 08 effffff879 callf $8,_write32h
880 0001F52B # writec(' ');
881 0001F52B dd 20 pushl $32
882 0001F52D fe 08 effffff870 callf $8,_writec
883 0001F534 # write32h( dbl_st_acc.l );
884 0001F534 dd effffff86e pushl _dbl_st_acc+4
885 0001F53A fe 08 effffff863 callf $8,_write32h
886 0001F541 # }
887 0001F541 40 ret#2
888 0001F542 .set L320,0x0
889 0001F542 L322:
890 0001F542 11 a6 jbr L323
891 0001F544 .data
892 000008ac * .text
893 0001F544 .align 1
894 0001F544 .globl _ldfd_er_halt
895 0001F544 _ldfd_er_halt:
896 0001F544 0000 .word L327
897 0001F546 #
898 0001F546 #
899 0001F546 #
900 0001F546 # /**************************************************************************
901 0001F546 # *
902 0001F546 # * HALT ON ERROR ROUTINE
903 0001F546 # *
904 0001F546 # **************************************************************************/
905 0001F546 # ldfd_er_halt( halt_code )
906 0001F546 # int halt_code;
907 0001F546 # {
908 0001F546 13 0101 jbr L329
909 0001F549 L330:
910 0001F549 # sgl_value_1 = sgl_ld_acc;
911 0001F549 0d effffff855 effffff850 movl _sgl_ld_acc,_sgl_value_1
912 0001F554 # sgl_value_2 = dbl_st_acc.m;
913 0001F554 0d effffff84a effffff845 movl _dbl_st_acc,_sgl_value_2
914 0001F55F # sgl_value_3 = dbl_st_acc.l;
915 0001F55F 0d effffff843 effffff83a movl _dbl_st_acc+4,_sgl_value_3
916 0001F56A # sgl_value_5 = 0;
917 0001F56A 4d effffff834 clrl _sgl_value_5
918 0001F570 # sgl_dummy1 = halt_code; /* get the error type */
919 0001F570 0d ad04 effffff82c movl 4(fp),_sgl_dummy1
920 0001F578 # asm("movl _test_no,r0"); /* r0 = test number */
921 0001F578 0d effffff826 50 movl _test_no,r0
922 0001F57F # asm("movl _subtest,r1"); /* r1 = subtest number */
923 0001F57F 0d effffff81f 51 movl _subtest,r1
924 0001F586 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
925 0001F586 0d effffff818 52 movl _sgl_dummy1,r2
926 0001F58D # asm("movl _cycle,r3"); /* r3 = cycle count */
927 0001F58D 0d effffff811 53 movl _cycle,r3
928 0001F594 # asm("movl _sgl_value_1,r4"); /* r4 = MS operand 1 */
929 0001F594 0d effffff80a 54 movl _sgl_value_1,r4
930 0001F59B # asm("movl _sgl_value_5,r5"); /* r5 = LS operand 1 */
931 0001F59B 0d effffff803 55 movl _sgl_value_5,r5
932 0001F5A2 # asm("movl _sgl_value_1,r6"); /* r6 = operand */
933 0001F5A2 0d effffff7fc 56 movl _sgl_value_1,r6
934 0001F5A9 # asm("movl _sgl_value_2,r7"); /* r7 = MS stored */
935 0001F5A9 0d effffff7f5 57 movl _sgl_value_2,r7
936 0001F5B0 # asm("movl _sgl_value_3,r8"); /* r8 = LS stored */
937 0001F5B0 0d effffff7ee 58 movl _sgl_value_3,r8
938 0001F5B7 # if( halt_code == BAD_ACC_HLT ) {
939 0001F5B7 1d ad04 01 cmpl 4(fp),$1
940 0001F5BB 21 2d jneq L331
941 0001F5BD # sgl_value_1 = dbl_expected.m;
942 0001F5BD 0d effffff7e1 effffff7dc movl _dbl_expected,_sgl_value_1
943 0001F5C8 # sgl_value_2 = dbl_expected.l;
944 0001F5C8 0d effffff7da effffff7d1 movl _dbl_expected+4,_sgl_value_2
945 0001F5D3 # asm("movl _sgl_value_1,r9"); /* r9 = MS expected */
946 0001F5D3 0d effffff7cb 59 movl _sgl_value_1,r9
947 0001F5DA # asm("movl _sgl_value_2,r10"); /* r10 = LS expected */
948 0001F5DA 0d effffff7c4 5a movl _sgl_value_2,r10
949 0001F5E1 # asm("movl _index,r11"); /* r11 = data index */
950 0001F5E1 0d effffff7bd 5b movl _index,r11
951 0001F5E8 # } else
952 0001F5E8 11 5e jbr L332
953 0001F5EA L331:
954 0001F5EA # if( halt_code == BAD_REG_HLT ) {
955 0001F5EA 1d ad04 02 cmpl 4(fp),$2
956 0001F5EE 21 3d jneq L333
957 0001F5F0 # sgl_dummy1 = load_regs[index2];
958 0001F5F0 0d effffff7ae 50 movl _index2,r0
959 0001F5F7 0d 40effffff7a6 movl _load_regs[r0],_sgl_dummy1
effffff7a1
960 0001F603 # sgl_dummy2 = store_regs[index2];
961 0001F603 0d effffff79b 50 movl _index2,r0
962 0001F60A 0d 40effffff793 movl _store_regs[r0],_sgl_dummy2
effffff78e
963 0001F616 # asm("movl _index2,r9"); /* r9 = bad register # */
964 0001F616 0d effffff788 59 movl _index2,r9
965 0001F61D # asm("movl _sgl_dummy2,r10"); /* r10 = actual value */
966 0001F61D 0d effffff781 5a movl _sgl_dummy2,r10
967 0001F624 # asm("movl _sgl_dummy1,r11"); /* r11 = expected value */
968 0001F624 0d effffff77a 5b movl _sgl_dummy1,r11
969 0001F62B # } else
970 0001F62B 11 1b jbr L334
971 0001F62D L333:
972 0001F62D # if( halt_code == BAD_PSL_HLT ) {
973 0001F62D 1d ad04 03 cmpl 4(fp),$3
974 0001F631 21 15 jneq L335
975 0001F633 # asm("movl _init_psl,r9"); /* r9 = initial PSL */
976 0001F633 0d effffff76b 59 movl _init_psl,r9
977 0001F63A # asm("movl _psl_val,r10"); /* r10 = final PSL */
978 0001F63A 0d effffff764 5a movl _psl_val,r10
979 0001F641 # asm("movl _exp_psl,r11"); /* r11 = expected PSL */
980 0001F641 0d effffff75d 5b movl _exp_psl,r11
981 0001F648 # };
982 0001F648 L335:
983 0001F648 L334:
984 0001F648 L332:
985 0001F648 # asm("halt"); /* HALT ... */
986 0001F648 00 halt
987 0001F649 # }
988 0001F649 40 ret#2
989 0001F64A .set L327,0x0
990 0001F64A L329:
991 0001F64A 13 fefc jbr L330
992 0001F64D .data
992 0003E3F1 .data
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