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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to lnf.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 0000093c * .text
4 00000000 .align 1
5 00000000 .globl _lnf
6 00000000 _lnf:
7 00010810 0000 .word L215
8 00010812 #
9 00010812 # #include "fpp_defs.h"
10 00010812 #
11 00010812 #
12 00010812 # /*****************************************************************************
13 00010812 # *
14 00010812 # * LNF - SINGLE PRECISION FLOATING POINT LOAD_NEGATE TEST
15 00010812 # *
16 00010812 # *****************************************************************************/
17 00010812 # lnf()
18 00010812 # {
19 00010812 11 57 jbr L217
20 00010814 L218:
21 00010814 # asm(".globl _lnf_t");
22 00010814 .globl _lnf_t
23 00010814 # asm("_lnf_t:"); /* entry address */
24 00010814 _lnf_t:
25 00010814 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
26 00010814 1d effffffff6 01 cmpl _cycle,$1
27 0001081B 21 15 jneq L219
28 0001081D 5d efffffffed tstl _prt_hdrs
29 00010823 31 0d jeql L219
30 00010825 # writes(" LNF");
31 00010825 .data 1
32 0000093c * L221:
33 0000093c * 204C4E4600 .ascii " LNF\0"
34 00000941 * .text
35 00010825 dd 8f0000093c pushl $L221
36 0001082B fe 08 efffffffde callf $8,_writes
37 00010832 # lnf_1(); /* load through a register */
38 00010832 L219:
39 00010832 fe 04 ef00000035 callf $4,_lnf_1
40 00010839 # lnf_2(); /* load through the cache */
41 00010839 fe 04 ef00000164 callf $4,_lnf_2
42 00010840 # lnf_3(); /* register stability */
43 00010840 fe 04 ef0000028d callf $4,_lnf_3
44 00010847 # lnf_4(); /* PSL stability test */
45 00010847 fe 04 ef00000424 callf $4,_lnf_4
46 0001084E # lnf_5(); /* pipelined entry test */
47 0001084E fe 04 ef000005c3 callf $4,_lnf_5
48 00010855 # if ( !no_fpp_wcs )
49 00010855 5d efffffffb5 tstl _no_fpp_wcs
50 0001085B 21 07 jneq L227
51 0001085D # lnf_6();; /* pipelined exit test */
52 0001085D fe 04 ef000006c6 callf $4,_lnf_6
53 00010864 L227:
54 00010864 # asm("jmp *return"); /* return to the test monitor */
55 00010864 71 ffffffffa6 jmp *return
56 0001086A # }
57 0001086A 40 ret#2
58 0001086B .set L215,0x0
59 0001086B L217:
60 0001086B 11 a7 jbr L218
61 0001086D .data
62 0000093c * .text
63 0001086D 00 .align 1
64 0001086E .globl _lnf_1
65 0001086E _lnf_1:
66 0001086E 0000 .word L229
67 00010870 #
68 00010870 #
69 00010870 #
70 00010870 # /************************************************************************
71 00010870 # *
72 00010870 # * SUBTEST 1 - load_negate through a register
73 00010870 # *
74 00010870 # ************************************************************************/
75 00010870 # lnf_1()
76 00010870 # {
77 00010870 13 012e jbr L231
78 00010873 L232:
79 00010873 # force_loop = FALSE;
80 00010873 4d efffffff97 clrl _force_loop
81 00010879 # subtest = 1;
82 00010879 0d 01 efffffff90 movl $1,_subtest
83 00010880 # for( index = 0; index < max_lnf_1_index; index++ ) {
84 00010880 4d efffffff8a clrl _index
85 00010886 L235:
86 00010886 1d efffffff84 efffffff7f cmpl _index,_max_lnf_1_index
87 00010891 91 03 13 010a jgeq L234
88 00010896 # sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */
89 00010896 0d efffffff74 50 movl _index,r0
90 0001089D 48 03 50 50 shll $3,r0,r0
91 000108A1 0d e000000000 efffffff64 movl _lnf_1_data(r0),_sgl_ld_acc
92 000108AC # sgl_expected = lnf_1_data[index].exp; /* get expected result */
93 000108AC 0d efffffff5e 50 movl _index,r0
94 000108B3 48 03 50 50 shll $3,r0,r0
95 000108B7 0d e000000004 efffffff4e movl _lnf_1_data+4(r0),_sgl_expected
96 000108C2 # /*
97 000108C2 # * If LOOP ON ERROR is set, this is the loop for this subtest.
98 000108C2 # * The force loop flag is set after the first error.
99 000108C2 # */
100 000108C2 # asm("_lnf_1_lp1:");
101 000108C2 _lnf_1_lp1:
102 000108C2 # asm("movl _sgl_ld_acc,r4"); /* get the value to negate */
103 000108C2 0d efffffff48 54 movl _sgl_ld_acc,r4
104 000108C9 # asm("lnf r4"); /* load and negate value */
105 000108C9 16 54 lnf r4
106 000108CB # asm("stf r5"); /* store the result in R5 */
107 000108CB 26 55 stf r5
108 000108CD # if( force_loop )
109 000108CD 5d efffffff3d tstl _force_loop
110 000108D3 31 02 jeql L236
111 000108D5 # asm("brb _lnf_1_lp1");; /* loop on the error */
112 000108D5 11 eb brb _lnf_1_lp1
113 000108D7 L236:
114 000108D7 # /*
115 000108D7 # * end error loop - test the results
116 000108D7 # */
117 000108D7 # asm("movl r5,_sgl_st_acc"); /* move R5 data to cache */
118 000108D7 0d 55 efffffff32 movl r5,_sgl_st_acc
119 000108DE # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
120 000108DE 1d efffffff2c efffffff27 cmpl _sgl_st_acc,_sgl_expected
121 000108E9 21 03 13 00a9 jeql L237
122 000108EE # errcnt++; /* bump the error count */
123 000108EE 6d efffffff1c incl _errcnt
124 000108F4 # if( prt_error ) {
125 000108F4 5d efffffff16 tstl _prt_error
126 000108FA 31 78 jeql L238
127 000108FC # writes(" \n"); /* start a new print line */
128 000108FC .data 1
129 00000941 * L239:
130 00000941 * 200A00 .ascii " \12\0"
131 00000944 * .text
132 000108FC dd 8f00000941 pushl $L239
133 00010902 fe 08 efffffff07 callf $8,_writes
134 00010909 # writes("cycle: ");
135 00010909 .data 1
136 00000944 * L240:
137 00000944 * 6379636C653A2000 .ascii "cycle: \0"
138 0000094c * .text
139 00010909 dd 8f00000944 pushl $L240
140 0001090F fe 08 effffffefa callf $8,_writes
141 00010916 # writed( cycle );
142 00010916 dd effffffef4 pushl _cycle
143 0001091C fe 08 effffffeed callf $8,_writed
144 00010923 # writes(" LNF test ");
145 00010923 .data 1
146 0000094c * L242:
147 0000094c * 20204C4E4620746573742000 .ascii " LNF test \0"
148 00000958 * .text
149 00010923 dd 8f0000094c pushl $L242
150 00010929 fe 08 effffffee0 callf $8,_writes
151 00010930 # writed( test_no );
152 00010930 dd effffffeda pushl _test_no
153 00010936 fe 08 effffffed3 callf $8,_writed
154 0001093D # writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n");
155 0001093D .data 1
156 00000958 * L243:
157 00000958 * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0"
85265672E204461746129202D
204241442046494E414C20414
3430A00
158 00000981 * .text
159 0001093D dd 8f00000958 pushl $L243
160 00010943 fe 08 effffffec6 callf $8,_writes
161 0001094A # print_lnf_data();
162 0001094A fe 04 ef000006eb callf $4,_print_lnf_data
163 00010951 # writes(" Acc expected = ");
164 00010951 .data 1
165 00000981 * L245:
166 00000981 * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020202020
4163632065787065637465642
03D2000
167 000009aa * .text
168 00010951 dd 8f00000981 pushl $L245
169 00010957 fe 08 effffffeb2 callf $8,_writes
170 0001095E # write32h( sgl_expected );
171 0001095E dd effffffeac pushl _sgl_expected
172 00010964 fe 08 effffffea5 callf $8,_write32h
173 0001096B # writec('\n');
174 0001096B dd 0a pushl $10
175 0001096D fe 08 effffffe9c callf $8,_writec
176 00010974 # }
177 00010974 # if( halt_flg )
178 00010974 L238:
179 00010974 5d effffffe96 tstl _halt_flg
180 0001097A 31 09 jeql L248
181 0001097C # lnf_er_halt( BAD_ACC_HLT ); /* halt on the error */
182 0001097C dd 01 pushl $1
183 0001097E fe 08 ef00000715 callf $8,_lnf_er_halt
184 00010985 # if( loop_on_err ) {
185 00010985 L248:
186 00010985 5d effffffe85 tstl _loop_on_err
187 0001098B 31 0a jeql L250
188 0001098D # force_loop = TRUE; /* set the force loop flag */
189 0001098D 0d 01 effffffe7c movl $1,_force_loop
190 00010994 # asm("brw _lnf_1_lp1");; /* and loop on the error */
191 00010994 13 ff2b brw _lnf_1_lp1
192 00010997 # } /* end of loop on error */
193 00010997 # } /* end of compare error */
194 00010997 L250:
195 00010997 # } /* end of WHILE loop */
196 00010997 L237:
197 00010997 L233:
198 00010997 6d effffffe73 incl _index
199 0001099D 13 fee6 jbr L235
200 000109A0 L234:
201 000109A0 # } /* end of subtest 1 */
202 000109A0 40 ret#2
203 000109A1 .set L229,0x0
204 000109A1 L231:
205 000109A1 13 fecf jbr L232
206 000109A4 .data
207 0000093c * .text
208 000109A4 .align 1
209 000109A4 .globl _lnf_2
210 000109A4 _lnf_2:
211 000109A4 0000 .word L251
212 000109A6 #
213 000109A6 #
214 000109A6 #
215 000109A6 # /************************************************************************
216 000109A6 # *
217 000109A6 # * SUBTEST 2 - load_negate through memory
218 000109A6 # *
219 000109A6 # ************************************************************************/
220 000109A6 # lnf_2()
221 000109A6 # {
222 000109A6 13 0128 jbr L253
223 000109A9 L254:
224 000109A9 # force_loop = FALSE;
225 000109A9 4d effffffe61 clrl _force_loop
226 000109AF # subtest = 2;
227 000109AF 0d 02 effffffe5a movl $2,_subtest
228 000109B6 # for( index = 0; index < max_lnf_1_index; index++ ) {
229 000109B6 4d effffffe54 clrl _index
230 000109BC L257:
231 000109BC 1d effffffe4e effffffe49 cmpl _index,_max_lnf_1_index
232 000109C7 91 03 13 0104 jgeq L256
233 000109CC # sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */
234 000109CC 0d effffffe3e 50 movl _index,r0
235 000109D3 48 03 50 50 shll $3,r0,r0
236 000109D7 0d e000000000 effffffe2e movl _lnf_1_data(r0),_sgl_ld_acc
237 000109E2 # sgl_expected = lnf_1_data[index].exp; /* get expected result */
238 000109E2 0d effffffe28 50 movl _index,r0
239 000109E9 48 03 50 50 shll $3,r0,r0
240 000109ED 0d e000000004 effffffe18 movl _lnf_1_data+4(r0),_sgl_expected
241 000109F8 # /*
242 000109F8 # * If LOOP ON ERROR is set, this is the loop for this subtest.
243 000109F8 # * The force loop flag is set after the first error.
244 000109F8 # */
245 000109F8 # asm("_lnf_2_lp1:");
246 000109F8 _lnf_2_lp1:
247 000109F8 # asm("lnf _sgl_ld_acc"); /* load and negate the value */
248 000109F8 16 effffffe12 lnf _sgl_ld_acc
249 000109FE # asm("stf _sgl_st_acc"); /* store the result */
250 000109FE 26 effffffe0c stf _sgl_st_acc
251 00010A04 # if( force_loop )
252 00010A04 5d effffffe06 tstl _force_loop
253 00010A0A 31 02 jeql L258
254 00010A0C # asm("brb _lnf_2_lp1");; /* loop on the error */
255 00010A0C 11 ea brb _lnf_2_lp1
256 00010A0E L258:
257 00010A0E # /*
258 00010A0E # * end error loop - test the results
259 00010A0E # */
260 00010A0E # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
261 00010A0E 1d effffffdfc effffffdf7 cmpl _sgl_st_acc,_sgl_expected
262 00010A19 21 03 13 00a9 jeql L259
263 00010A1E # errcnt++; /* bump the error count */
264 00010A1E 6d effffffdec incl _errcnt
265 00010A24 # if( prt_error ) {
266 00010A24 5d effffffde6 tstl _prt_error
267 00010A2A 31 78 jeql L260
268 00010A2C # writes(" \n"); /* start a new print line */
269 00010A2C .data 1
270 000009aa * L261:
271 000009aa * 200A00 .ascii " \12\0"
272 000009ad * .text
273 00010A2C dd 8f000009aa pushl $L261
274 00010A32 fe 08 effffffdd7 callf $8,_writes
275 00010A39 # writes("cycle: ");
276 00010A39 .data 1
277 000009ad * L262:
278 000009ad * 6379636C653A2000 .ascii "cycle: \0"
279 000009b5 * .text
280 00010A39 dd 8f000009ad pushl $L262
281 00010A3F fe 08 effffffdca callf $8,_writes
282 00010A46 # writed( cycle );
283 00010A46 dd effffffdc4 pushl _cycle
284 00010A4C fe 08 effffffdbd callf $8,_writed
285 00010A53 # writes(" LNF test ");
286 00010A53 .data 1
287 000009b5 * L263:
288 000009b5 * 20204C4E4620746573742000 .ascii " LNF test \0"
289 000009c1 * .text
290 00010A53 dd 8f000009b5 pushl $L263
291 00010A59 fe 08 effffffdb0 callf $8,_writes
292 00010A60 # writed( test_no );
293 00010A60 dd effffffdaa pushl _test_no
294 00010A66 fe 08 effffffda3 callf $8,_writed
295 00010A6D # writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n");
296 00010A6D .data 1
297 000009c1 * L264:
298 000009c1 * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL ACC\12\0"
8436163686520446174612920
2D204241442046494E414C204
143430A00
299 000009eb * .text
300 00010A6D dd 8f000009c1 pushl $L264
301 00010A73 fe 08 effffffd96 callf $8,_writes
302 00010A7A # print_lnf_data();
303 00010A7A fe 04 ef000005bb callf $4,_print_lnf_data
304 00010A81 # writes(" Acc expected = ");
305 00010A81 .data 1
306 000009eb * L265:
307 000009eb * 2020202020202020202020202 .ascii " Acc expected = \0"
0202020202020202020202020
4163632065787065637465642
03D2000
308 00000a14 * .text
309 00010A81 dd 8f000009eb pushl $L265
310 00010A87 fe 08 effffffd82 callf $8,_writes
311 00010A8E # write32h( sgl_expected );
312 00010A8E dd effffffd7c pushl _sgl_expected
313 00010A94 fe 08 effffffd75 callf $8,_write32h
314 00010A9B # writec('\n');
315 00010A9B dd 0a pushl $10
316 00010A9D fe 08 effffffd6c callf $8,_writec
317 00010AA4 # }
318 00010AA4 # if( halt_flg )
319 00010AA4 L260:
320 00010AA4 5d effffffd66 tstl _halt_flg
321 00010AAA 31 09 jeql L266
322 00010AAC # lnf_er_halt( BAD_ACC_HLT ); /* halt on the error */
323 00010AAC dd 01 pushl $1
324 00010AAE fe 08 ef000005e5 callf $8,_lnf_er_halt
325 00010AB5 # if( loop_on_err ) {
326 00010AB5 L266:
327 00010AB5 5d effffffd55 tstl _loop_on_err
328 00010ABB 31 0a jeql L267
329 00010ABD # force_loop = TRUE; /* set the force loop flag */
330 00010ABD 0d 01 effffffd4c movl $1,_force_loop
331 00010AC4 # asm("brw _lnf_2_lp1");; /* and loop on the error */
332 00010AC4 13 ff31 brw _lnf_2_lp1
333 00010AC7 # } /* end of loop on error */
334 00010AC7 # } /* end of compare error */
335 00010AC7 L267:
336 00010AC7 # } /* end of WHILE loop */
337 00010AC7 L259:
338 00010AC7 L255:
339 00010AC7 6d effffffd43 incl _index
340 00010ACD 13 feec jbr L257
341 00010AD0 L256:
342 00010AD0 # } /* end of subtest 2 */
343 00010AD0 40 ret#2
344 00010AD1 .set L251,0x0
345 00010AD1 L253:
346 00010AD1 13 fed5 jbr L254
347 00010AD4 .data
348 0000093c * .text
349 00010AD4 .align 1
350 00010AD4 .globl _lnf_3
351 00010AD4 _lnf_3:
352 00010AD4 0000 .word L268
353 00010AD6 #
354 00010AD6 #
355 00010AD6 #
356 00010AD6 # /************************************************************************
357 00010AD6 # *
358 00010AD6 # * SUBTEST 3 - Check for register corruption
359 00010AD6 # *
360 00010AD6 # ************************************************************************/
361 00010AD6 # lnf_3()
362 00010AD6 # {
363 00010AD6 13 0195 jbr L270
364 00010AD9 L271:
365 00010AD9 # force_loop = FALSE; /* clear force_loop flg */
366 00010AD9 4d effffffd31 clrl _force_loop
367 00010ADF # subtest = 3;
368 00010ADF 0d 03 effffffd2a movl $3,_subtest
369 00010AE6 # fill_reg_buf( load_regs ); /* get patterns for regs */
370 00010AE6 dd 8f00000000 pushl $_load_regs
371 00010AEC fe 08 effffffd1d callf $8,_fill_reg_buf
372 00010AF3 # index = 0;
373 00010AF3 4d effffffd17 clrl _index
374 00010AF9 # sgl_ld_acc = lnf_1_data[0].ld; /* get value to negate */
375 00010AF9 0d effffffd11 effffffd0c movl _lnf_1_data,_sgl_ld_acc
376 00010B04 # sgl_expected = lnf_1_data[0].exp; /* get expected result */
377 00010B04 0d effffffd0a effffffd01 movl _lnf_1_data+4,_sgl_expected
378 00010B0F # /*
379 00010B0F # * If LOOP ON ERROR is set, this is the loop for this subtest.
380 00010B0F # * The force loop flag is set after the first error.
381 00010B0F # */
382 00010B0F # asm("_lnf_3_lp1:");
383 00010B0F _lnf_3_lp1:
384 00010B0F # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
385 00010B0F ab 891fff effffffcf8 loadr $0x1fff,_load_regs
386 00010B18 # asm("nop");
387 00010B18 10 nop
388 00010B19 # asm("lnf _sgl_ld_acc"); /* load and negate the value */
389 00010B19 16 effffffcf1 lnf _sgl_ld_acc
390 00010B1F # asm("nop");
391 00010B1F 10 nop
392 00010B20 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
393 00010B20 bb 891fff effffffce7 storer $0x1fff,_store_regs
394 00010B29 # asm("stf _sgl_st_acc"); /* save the accumulator */
395 00010B29 26 effffffce1 stf _sgl_st_acc
396 00010B2F # if( force_loop )
397 00010B2F 5d effffffcdb tstl _force_loop
398 00010B35 31 02 jeql L273
399 00010B37 # asm("brb _lnf_3_lp1");; /* loop on the error */
400 00010B37 11 d6 brb _lnf_3_lp1
401 00010B39 L273:
402 00010B39 # /*
403 00010B39 # * Now compare the stored register values to those that were loaded
404 00010B39 # */
405 00010B39 # index2 = 0;
406 00010B39 4d effffffcd1 clrl _index2
407 00010B3F # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
408 00010B3F L274:
409 00010B3F 0d effffffccb 50 movl _index2,r0
410 00010B46 0d effffffcc4 51 movl _index2,r1
411 00010B4D 1d 40effffffcbc cmpl _load_regs[r0],_store_regs[r1]
41effffffcb6
412 00010B5A 21 11 jneq L275
413 00010B5C 1d effffffcae 0d cmpl _index2,$13
414 00010B63 81 08 jgeq L275
415 00010B65 # index2++; /* check reg values */
416 00010B65 6d effffffca5 incl _index2
417 00010B6B 11 d2 jbr L274
418 00010B6D L275:
419 00010B6D # if( index2 < 13 ) { /* error if index2 < 13 */
420 00010B6D 1d effffffc9d 0d cmpl _index2,$13
421 00010B74 91 03 13 00f4 jgeq L276
422 00010B79 # errcnt++; /* bump the error count */
423 00010B79 6d effffffc91 incl _errcnt
424 00010B7F # if( prt_error ) {
425 00010B7F 5d effffffc8b tstl _prt_error
426 00010B85 21 03 13 00c0 jeql L277
427 00010B8A # writes(" \n"); /* start a new print line */
428 00010B8A .data 1
429 00000a14 * L278:
430 00000a14 * 200A00 .ascii " \12\0"
431 00000a17 * .text
432 00010B8A dd 8f00000a14 pushl $L278
433 00010B90 fe 08 effffffc79 callf $8,_writes
434 00010B97 # writes("cycle: ");
435 00010B97 .data 1
436 00000a17 * L279:
437 00000a17 * 6379636C653A2000 .ascii "cycle: \0"
438 00000a1f * .text
439 00010B97 dd 8f00000a17 pushl $L279
440 00010B9D fe 08 effffffc6c callf $8,_writes
441 00010BA4 # writed( cycle );
442 00010BA4 dd effffffc66 pushl _cycle
443 00010BAA fe 08 effffffc5f callf $8,_writed
444 00010BB1 # writes(" LNF test ");
445 00010BB1 .data 1
446 00000a1f * L280:
447 00000a1f * 20204C4E4620746573742000 .ascii " LNF test \0"
448 00000a2b * .text
449 00010BB1 dd 8f00000a1f pushl $L280
450 00010BB7 fe 08 effffffc52 callf $8,_writes
451 00010BBE # writed( test_no );
452 00010BBE dd effffffc4c pushl _test_no
453 00010BC4 fe 08 effffffc45 callf $8,_writed
454 00010BCB # writes(", subtest 3 - A REGISTER WAS MODIFIED\n");
455 00010BCB .data 1
456 00000a2b * L281:
457 00000a2b * 2C20737562746573742033202 .ascii ", subtest 3 - A REGISTER WAS MODIFIED\12\0"
D204120524547495354455220
574153204D4F4449464945440
A00
458 00000a52 * .text
459 00010BCB dd 8f00000a2b pushl $L281
460 00010BD1 fe 08 effffffc38 callf $8,_writes
461 00010BD8 # print_lnf_data(); /* print the operands */
462 00010BD8 fe 04 ef0000045d callf $4,_print_lnf_data
463 00010BDF # writes("register "); /* print the information */
464 00010BDF .data 1
465 00000a52 * L282:
466 00000a52 * 72656769737465722000 .ascii "register \0"
467 00000a5c * .text
468 00010BDF dd 8f00000a52 pushl $L282
469 00010BE5 fe 08 effffffc24 callf $8,_writes
470 00010BEC # writed( index2 ); /* about the corrupted */
471 00010BEC dd effffffc1e pushl _index2
472 00010BF2 fe 08 effffffc17 callf $8,_writed
473 00010BF9 # writes(" = "); /* register */
474 00010BF9 .data 1
475 00000a5c * L283:
476 00000a5c * 203D2000 .ascii " = \0"
477 00000a60 * .text
478 00010BF9 dd 8f00000a5c pushl $L283
479 00010BFF fe 08 effffffc0a callf $8,_writes
480 00010C06 # write32h( store_regs[index2] );
481 00010C06 0d effffffc04 50 movl _index2,r0
482 00010C0D dd 40effffffbfc pushl _store_regs[r0]
483 00010C14 fe 08 effffffbf5 callf $8,_write32h
484 00010C1B # writes(", should be = ");
485 00010C1B .data 1
486 00000a60 * L284:
487 00000a60 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
488 00000a70 * .text
489 00010C1B dd 8f00000a60 pushl $L284
490 00010C21 fe 08 effffffbe8 callf $8,_writes
491 00010C28 # write32h( load_regs[index2] );
492 00010C28 0d effffffbe2 50 movl _index2,r0
493 00010C2F dd 40effffffbda pushl _load_regs[r0]
494 00010C36 fe 08 effffffbd3 callf $8,_write32h
495 00010C3D # writes("\n");
496 00010C3D .data 1
497 00000a70 * L285:
498 00000a70 * 0A00 .ascii "\12\0"
499 00000a72 * .text
500 00010C3D dd 8f00000a70 pushl $L285
501 00010C43 fe 08 effffffbc6 callf $8,_writes
502 00010C4A # }
503 00010C4A # if( halt_flg )
504 00010C4A L277:
505 00010C4A 5d effffffbc0 tstl _halt_flg
506 00010C50 31 09 jeql L286
507 00010C52 # lnf_er_halt( BAD_REG_HLT ); /* halt on the error */
508 00010C52 dd 02 pushl $2
509 00010C54 fe 08 ef0000043f callf $8,_lnf_er_halt
510 00010C5B # if( loop_on_err ) {
511 00010C5B L286:
512 00010C5B 5d effffffbaf tstl _loop_on_err
513 00010C61 31 0a jeql L287
514 00010C63 # force_loop = TRUE; /* set the force loop flag */
515 00010C63 0d 01 effffffba6 movl $1,_force_loop
516 00010C6A # asm("brw _lnf_3_lp1");; /* and loop on the error */
517 00010C6A 13 fea2 brw _lnf_3_lp1
518 00010C6D # } /* end of loop on error */
519 00010C6D # } /* end of register corruption error */
520 00010C6D L287:
521 00010C6D # } /* end of subtest 3 */
522 00010C6D L276:
523 00010C6D 40 ret#2
524 00010C6E .set L268,0x0
525 00010C6E L270:
526 00010C6E 13 fe68 jbr L271
527 00010C71 .data
528 0000093c * .text
529 00010C71 00 .align 1
530 00010C72 .globl _lnf_4
531 00010C72 _lnf_4:
532 00010C72 0000 .word L288
533 00010C74 #
534 00010C74 #
535 00010C74 #
536 00010C74 # /************************************************************************
537 00010C74 # *
538 00010C74 # * SUBTEST 4 - Check for PSL corruption
539 00010C74 # *
540 00010C74 # ************************************************************************/
541 00010C74 # lnf_4()
542 00010C74 # {
543 00010C74 13 019d jbr L290
544 00010C77 L291:
545 00010C77 # force_loop = FALSE; /* clear force_loop flg */
546 00010C77 4d effffffb93 clrl _force_loop
547 00010C7D # subtest = 4;
548 00010C7D 0d 04 effffffb8c movl $4,_subtest
549 00010C84 # fill_reg_buf( load_regs ); /* get patterns for regs */
550 00010C84 dd 8f00000000 pushl $_load_regs
551 00010C8A fe 08 effffffb7f callf $8,_fill_reg_buf
552 00010C91 # for( index = 0; index < 3; index++ ) {
553 00010C91 4d effffffb79 clrl _index
554 00010C97 L294:
555 00010C97 1d effffffb73 03 cmpl _index,$3
556 00010C9E 91 03 13 0170 jgeq L293
557 00010CA3 # sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */
558 00010CA3 0d effffffb67 50 movl _index,r0
559 00010CAA 48 03 50 50 shll $3,r0,r0
560 00010CAE 0d e000000000 effffffb57 movl _lnf_1_data(r0),_sgl_ld_acc
561 00010CB9 # sgl_expected = lnf_1_data[index].exp; /* get expected */
562 00010CB9 0d effffffb51 50 movl _index,r0
563 00010CC0 48 03 50 50 shll $3,r0,r0
564 00010CC4 0d e000000004 effffffb41 movl _lnf_1_data+4(r0),_sgl_expected
565 00010CCF # sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */
566 00010CCF 0d effffffb3b 50 movl _status_index,r0
567 00010CD6 0d 40effffffb33 movl _status_array[r0],_sgl_dummy1
effffffb2e
568 00010CE2 # /*
569 00010CE2 # * If LOOP ON ERROR is set, this is the loop for this subtest.
570 00010CE2 # * The force loop flag is set after the first error.
571 00010CE2 # */
572 00010CE2 # asm("_lnf_4_lp1:");
573 00010CE2 _lnf_4_lp1:
574 00010CE2 # asm("tstl _sgl_dummy1"); /* set the PSL status */
575 00010CE2 5d effffffb28 tstl _sgl_dummy1
576 00010CE8 # asm("movpsl _init_psl"); /* save the initial PSL */
577 00010CE8 cd effffffb22 movpsl _init_psl
578 00010CEE # asm("lnf _sgl_ld_acc"); /* load and negate the value */
579 00010CEE 16 effffffb1c lnf _sgl_ld_acc
580 00010CF4 # asm("nop");
581 00010CF4 10 nop
582 00010CF5 # asm("movpsl _psl_val"); /* save the final PSL */
583 00010CF5 cd effffffb15 movpsl _psl_val
584 00010CFB # asm("stf _sgl_st_acc"); /* save the accumulator */
585 00010CFB 26 effffffb0f stf _sgl_st_acc
586 00010D01 # if( force_loop )
587 00010D01 5d effffffb09 tstl _force_loop
588 00010D07 31 02 jeql L295
589 00010D09 # asm("brb _lnf_4_lp1");; /* loop on the error */
590 00010D09 11 d7 brb _lnf_4_lp1
591 00010D0B L295:
592 00010D0B # /*
593 00010D0B # * Now compare the final PSL to the initial PSL -they should be the same
594 00010D0B # */
595 00010D0B # exp_psl = init_psl;
596 00010D0B 0d effffffaff effffffafa movl _init_psl,_exp_psl
597 00010D16 # if( psl_val != init_psl ) {
598 00010D16 1d effffffaf4 effffffaef cmpl _psl_val,_init_psl
599 00010D21 21 03 13 00e4 jeql L296
600 00010D26 # errcnt++; /* bump the error count */
601 00010D26 6d effffffae4 incl _errcnt
602 00010D2C # if( prt_error ) {
603 00010D2C 5d effffffade tstl _prt_error
604 00010D32 21 03 13 00b0 jeql L297
605 00010D37 # writes(" \n"); /* start a new print line */
606 00010D37 .data 1
607 00000a72 * L298:
608 00000a72 * 200A00 .ascii " \12\0"
609 00000a75 * .text
610 00010D37 dd 8f00000a72 pushl $L298
611 00010D3D fe 08 effffffacc callf $8,_writes
612 00010D44 # writes("cycle: ");
613 00010D44 .data 1
614 00000a75 * L299:
615 00000a75 * 6379636C653A2000 .ascii "cycle: \0"
616 00000a7d * .text
617 00010D44 dd 8f00000a75 pushl $L299
618 00010D4A fe 08 effffffabf callf $8,_writes
619 00010D51 # writed( cycle );
620 00010D51 dd effffffab9 pushl _cycle
621 00010D57 fe 08 effffffab2 callf $8,_writed
622 00010D5E # writes(" LNF test ");
623 00010D5E .data 1
624 00000a7d * L300:
625 00000a7d * 20204C4E4620746573742000 .ascii " LNF test \0"
626 00000a89 * .text
627 00010D5E dd 8f00000a7d pushl $L300
628 00010D64 fe 08 effffffaa5 callf $8,_writes
629 00010D6B # writed( test_no );
630 00010D6B dd effffffa9f pushl _test_no
631 00010D71 fe 08 effffffa98 callf $8,_writed
632 00010D78 # writes(", subtest 4 - INCORRECT FINAL PSL\n");
633 00010D78 .data 1
634 00000a89 * L301:
635 00000a89 * 2C20737562746573742034202 .ascii ", subtest 4 - INCORRECT FINAL PSL\12\0"
D20494E434F52524543542046
494E414C2050534C0A00
636 00000aac * .text
637 00010D78 dd 8f00000a89 pushl $L301
638 00010D7E fe 08 effffffa8b callf $8,_writes
639 00010D85 # print_lnf_data(); /* print the operands */
640 00010D85 fe 04 ef000002b0 callf $4,_print_lnf_data
641 00010D8C # writes("initial PSL = ");
642 00010D8C .data 1
643 00000aac * L302:
644 00000aac * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
645 00000abb * .text
646 00010D8C dd 8f00000aac pushl $L302
647 00010D92 fe 08 effffffa77 callf $8,_writes
648 00010D99 # write32h( init_psl );
649 00010D99 dd effffffa71 pushl _init_psl
650 00010D9F fe 08 effffffa6a callf $8,_write32h
651 00010DA6 # writes(", final PSL = ");
652 00010DA6 .data 1
653 00000abb * L303:
654 00000abb * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
655 00000acb * .text
656 00010DA6 dd 8f00000abb pushl $L303
657 00010DAC fe 08 effffffa5d callf $8,_writes
658 00010DB3 # write32h( psl_val );
659 00010DB3 dd effffffa57 pushl _psl_val
660 00010DB9 fe 08 effffffa50 callf $8,_write32h
661 00010DC0 # writes(", expected PSL = ");
662 00010DC0 .data 1
663 00000acb * L304:
664 00000acb * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
665 00000ade * .text
666 00010DC0 dd 8f00000acb pushl $L304
667 00010DC6 fe 08 effffffa43 callf $8,_writes
668 00010DCD # write32h( exp_psl );
669 00010DCD dd effffffa3d pushl _exp_psl
670 00010DD3 fe 08 effffffa36 callf $8,_write32h
671 00010DDA # writes("\n");
672 00010DDA .data 1
673 00000ade * L305:
674 00000ade * 0A00 .ascii "\12\0"
675 00000ae0 * .text
676 00010DDA dd 8f00000ade pushl $L305
677 00010DE0 fe 08 effffffa29 callf $8,_writes
678 00010DE7 # }
679 00010DE7 # if( halt_flg )
680 00010DE7 L297:
681 00010DE7 5d effffffa23 tstl _halt_flg
682 00010DED 31 09 jeql L306
683 00010DEF # lnf_er_halt( BAD_PSL_HLT ); /* halt on the error */
684 00010DEF dd 03 pushl $3
685 00010DF1 fe 08 ef000002a2 callf $8,_lnf_er_halt
686 00010DF8 # if( loop_on_err ) {
687 00010DF8 L306:
688 00010DF8 5d effffffa12 tstl _loop_on_err
689 00010DFE 31 0a jeql L307
690 00010E00 # force_loop = TRUE; /* set the force loop flag */
691 00010E00 0d 01 effffffa09 movl $1,_force_loop
692 00010E07 # asm("brw _lnf_4_lp1");; /* and loop on the error */
693 00010E07 13 fed8 brw _lnf_4_lp1
694 00010E0A # } /* end of loop on error */
695 00010E0A # } /* end of PSL corruption error */
696 00010E0A L307:
697 00010E0A # } /* end of WHILE loop */
698 00010E0A L296:
699 00010E0A L292:
700 00010E0A 6d effffffa00 incl _index
701 00010E10 13 fe84 jbr L294
702 00010E13 L293:
703 00010E13 # } /* end of subtest 4 */
704 00010E13 40 ret#2
705 00010E14 .set L288,0x0
706 00010E14 L290:
707 00010E14 13 fe60 jbr L291
708 00010E17 .data
709 0000093c * .text
710 00010E17 00 .align 1
711 00010E18 .globl _lnf_5
712 00010E18 _lnf_5:
713 00010E18 0000 .word L308
714 00010E1A #
715 00010E1A #
716 00010E1A #
717 00010E1A # /************************************************************************
718 00010E1A # *
719 00010E1A # * SUBTEST 5 - pipelined entry test
720 00010E1A # *
721 00010E1A # ************************************************************************/
722 00010E1A # lnf_5()
723 00010E1A # {
724 00010E1A 13 010a jbr L310
725 00010E1D L311:
726 00010E1D # force_loop = FALSE;
727 00010E1D 4d effffff9ed clrl _force_loop
728 00010E23 # subtest = 8;
729 00010E23 0d 08 effffff9e6 movl $8,_subtest
730 00010E2A # for( index = 0; index < max_lnf_1_index; index++ ) {
731 00010E2A 4d effffff9e0 clrl _index
732 00010E30 L314:
733 00010E30 1d effffff9da effffff9d5 cmpl _index,_max_lnf_1_index
734 00010E3B 91 03 13 00e6 jgeq L313
735 00010E40 # sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */
736 00010E40 0d effffff9ca 50 movl _index,r0
737 00010E47 48 03 50 50 shll $3,r0,r0
738 00010E4B 0d e000000000 effffff9ba movl _lnf_1_data(r0),_sgl_ld_acc
739 00010E56 # sgl_expected = lnf_1_data[index].exp; /* get expected result */
740 00010E56 0d effffff9b4 50 movl _index,r0
741 00010E5D 48 03 50 50 shll $3,r0,r0
742 00010E61 0d e000000004 effffff9a4 movl _lnf_1_data+4(r0),_sgl_expected
743 00010E6C # /*
744 00010E6C # * If LOOP ON ERROR is set, this is the loop for this subtest.
745 00010E6C # * The force loop flag is set after the first error.
746 00010E6C # */
747 00010E6C # asm("_lnf_5_lp1:");
748 00010E6C _lnf_5_lp1:
749 00010E6C # asm("movl $0,r0"); /* clear r0 */
750 00010E6C 0d 00 50 movl $0,r0
751 00010E6F # asm("ldf r0"); /* load the Acc. with 0.0 */
752 00010E6F 06 50 ldf r0
753 00010E71 # asm("lnf _sgl_ld_acc"); /* load and negate the value */
754 00010E71 16 effffff999 lnf _sgl_ld_acc
755 00010E77 # asm("stf _sgl_st_acc"); /* store the result */
756 00010E77 26 effffff993 stf _sgl_st_acc
757 00010E7D # if( force_loop )
758 00010E7D 5d effffff98d tstl _force_loop
759 00010E83 31 02 jeql L315
760 00010E85 # asm("brb _lnf_5_lp1");; /* loop on the error */
761 00010E85 11 e5 brb _lnf_5_lp1
762 00010E87 L315:
763 00010E87 # /*
764 00010E87 # * end error loop - test the results
765 00010E87 # */
766 00010E87 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
767 00010E87 1d effffff983 effffff97e cmpl _sgl_st_acc,_sgl_expected
768 00010E92 21 03 13 0086 jeql L316
769 00010E97 # errcnt++; /* bump the error count */
770 00010E97 6d effffff973 incl _errcnt
771 00010E9D # if( prt_error ) {
772 00010E9D 5d effffff96d tstl _prt_error
773 00010EA3 31 55 jeql L317
774 00010EA5 # writes(" \n"); /* start a new print line */
775 00010EA5 .data 1
776 00000ae0 * L318:
777 00000ae0 * 200A00 .ascii " \12\0"
778 00000ae3 * .text
779 00010EA5 dd 8f00000ae0 pushl $L318
780 00010EAB fe 08 effffff95e callf $8,_writes
781 00010EB2 # writes("cycle: ");
782 00010EB2 .data 1
783 00000ae3 * L319:
784 00000ae3 * 6379636C653A2000 .ascii "cycle: \0"
785 00000aeb * .text
786 00010EB2 dd 8f00000ae3 pushl $L319
787 00010EB8 fe 08 effffff951 callf $8,_writes
788 00010EBF # writed( cycle );
789 00010EBF dd effffff94b pushl _cycle
790 00010EC5 fe 08 effffff944 callf $8,_writed
791 00010ECC # writes(" LNF test ");
792 00010ECC .data 1
793 00000aeb * L320:
794 00000aeb * 20204C4E4620746573742000 .ascii " LNF test \0"
795 00000af7 * .text
796 00010ECC dd 8f00000aeb pushl $L320
797 00010ED2 fe 08 effffff937 callf $8,_writes
798 00010ED9 # writed( test_no );
799 00010ED9 dd effffff931 pushl _test_no
800 00010EDF fe 08 effffff92a callf $8,_writed
801 00010EE6 # writes(", subtest 5 (Piped Entry) - BAD FINAL ACC\n");
802 00010EE6 .data 1
803 00000af7 * L321:
804 00000af7 * 2C20737562746573742035202 .ascii ", subtest 5 (Piped Entry) - BAD FINAL ACC\12\0"
8506970656420456E74727929
202D204241442046494E414C2
04143430A00
805 00000b22 * .text
806 00010EE6 dd 8f00000af7 pushl $L321
807 00010EEC fe 08 effffff91d callf $8,_writes
808 00010EF3 # print_lnf_data();
809 00010EF3 fe 04 ef00000142 callf $4,_print_lnf_data
810 00010EFA # }
811 00010EFA # if( halt_flg )
812 00010EFA L317:
813 00010EFA 5d effffff910 tstl _halt_flg
814 00010F00 31 09 jeql L322
815 00010F02 # lnf_er_halt( BAD_ACC_HLT ); /* halt on the error */
816 00010F02 dd 01 pushl $1
817 00010F04 fe 08 ef0000018f callf $8,_lnf_er_halt
818 00010F0B # if( loop_on_err ) {
819 00010F0B L322:
820 00010F0B 5d effffff8ff tstl _loop_on_err
821 00010F11 31 0a jeql L323
822 00010F13 # force_loop = TRUE; /* set the force loop flag */
823 00010F13 0d 01 effffff8f6 movl $1,_force_loop
824 00010F1A # asm("brw _lnf_5_lp1");; /* and loop on the error */
825 00010F1A 13 ff4f brw _lnf_5_lp1
826 00010F1D # } /* end of loop on error */
827 00010F1D # } /* end of compare error */
828 00010F1D L323:
829 00010F1D # } /* end of WHILE loop */
830 00010F1D L316:
831 00010F1D L312:
832 00010F1D 6d effffff8ed incl _index
833 00010F23 13 ff0a jbr L314
834 00010F26 L313:
835 00010F26 # } /* end of subtest 5 */
836 00010F26 40 ret#2
837 00010F27 .set L308,0x0
838 00010F27 L310:
839 00010F27 13 fef3 jbr L311
840 00010F2A .data
841 0000093c * .text
842 00010F2A .align 1
843 00010F2A .globl _lnf_6
844 00010F2A _lnf_6:
845 00010F2A 0000 .word L324
846 00010F2C #
847 00010F2C #
848 00010F2C #
849 00010F2C # /************************************************************************
850 00010F2C # *
851 00010F2C # * SUBTEST 6 - pipelined exit test
852 00010F2C # *
853 00010F2C # ************************************************************************/
854 00010F2C # lnf_6()
855 00010F2C # {
856 00010F2C 13 010a jbr L326
857 00010F2F L327:
858 00010F2F # force_loop = FALSE;
859 00010F2F 4d effffff8db clrl _force_loop
860 00010F35 # subtest = 8;
861 00010F35 0d 08 effffff8d4 movl $8,_subtest
862 00010F3C # for( index = 0; index < max_lnf_1_index; index++ ) {
863 00010F3C 4d effffff8ce clrl _index
864 00010F42 L330:
865 00010F42 1d effffff8c8 effffff8c3 cmpl _index,_max_lnf_1_index
866 00010F4D 91 03 13 00e6 jgeq L329
867 00010F52 # sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */
868 00010F52 0d effffff8b8 50 movl _index,r0
869 00010F59 48 03 50 50 shll $3,r0,r0
870 00010F5D 0d e000000000 effffff8a8 movl _lnf_1_data(r0),_sgl_ld_acc
871 00010F68 # sgl_expected = lnf_1_data[index].exp; /* get expected result */
872 00010F68 0d effffff8a2 50 movl _index,r0
873 00010F6F 48 03 50 50 shll $3,r0,r0
874 00010F73 0d e000000004 effffff892 movl _lnf_1_data+4(r0),_sgl_expected
875 00010F7E # /*
876 00010F7E # * If LOOP ON ERROR is set, this is the loop for this subtest.
877 00010F7E # * The force loop flag is set after the first error.
878 00010F7E # */
879 00010F7E # asm("_lnf_6_lp1:");
880 00010F7E _lnf_6_lp1:
881 00010F7E # asm("movl $0,r0"); /* clear r0 */
882 00010F7E 0d 00 50 movl $0,r0
883 00010F81 # asm("lnf _sgl_ld_acc"); /* load and negate the value */
884 00010F81 16 effffff889 lnf _sgl_ld_acc
885 00010F87 # asm("addf r0"); /* add a zero to the acc. */
886 00010F87 c6 50 addf r0
887 00010F89 # asm("stf _sgl_st_acc"); /* store the result */
888 00010F89 26 effffff881 stf _sgl_st_acc
889 00010F8F # if( force_loop )
890 00010F8F 5d effffff87b tstl _force_loop
891 00010F95 31 02 jeql L331
892 00010F97 # asm("brb _lnf_6_lp1");; /* loop on the error */
893 00010F97 11 e5 brb _lnf_6_lp1
894 00010F99 L331:
895 00010F99 # /*
896 00010F99 # * end error loop - test the results
897 00010F99 # */
898 00010F99 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
899 00010F99 1d effffff871 effffff86c cmpl _sgl_st_acc,_sgl_expected
900 00010FA4 21 03 13 0086 jeql L332
901 00010FA9 # errcnt++; /* bump the error count */
902 00010FA9 6d effffff861 incl _errcnt
903 00010FAF # if( prt_error ) {
904 00010FAF 5d effffff85b tstl _prt_error
905 00010FB5 31 55 jeql L333
906 00010FB7 # writes(" \n"); /* start a new print line */
907 00010FB7 .data 1
908 00000b22 * L334:
909 00000b22 * 200A00 .ascii " \12\0"
910 00000b25 * .text
911 00010FB7 dd 8f00000b22 pushl $L334
912 00010FBD fe 08 effffff84c callf $8,_writes
913 00010FC4 # writes("cycle: ");
914 00010FC4 .data 1
915 00000b25 * L335:
916 00000b25 * 6379636C653A2000 .ascii "cycle: \0"
917 00000b2d * .text
918 00010FC4 dd 8f00000b25 pushl $L335
919 00010FCA fe 08 effffff83f callf $8,_writes
920 00010FD1 # writed( cycle );
921 00010FD1 dd effffff839 pushl _cycle
922 00010FD7 fe 08 effffff832 callf $8,_writed
923 00010FDE # writes(" LNF test ");
924 00010FDE .data 1
925 00000b2d * L336:
926 00000b2d * 20204C4E4620746573742000 .ascii " LNF test \0"
927 00000b39 * .text
928 00010FDE dd 8f00000b2d pushl $L336
929 00010FE4 fe 08 effffff825 callf $8,_writes
930 00010FEB # writed( test_no );
931 00010FEB dd effffff81f pushl _test_no
932 00010FF1 fe 08 effffff818 callf $8,_writed
933 00010FF8 # writes(", subtest 6 (Piped Exit) - BAD FINAL ACC\n");
934 00010FF8 .data 1
935 00000b39 * L337:
936 00000b39 * 2C20737562746573742036202 .ascii ", subtest 6 (Piped Exit) - BAD FINAL ACC\12\0"
8506970656420457869742920
2D204241442046494E414C204
143430A00
937 00000b63 * .text
938 00010FF8 dd 8f00000b39 pushl $L337
939 00010FFE fe 08 effffff80b callf $8,_writes
940 00011005 # print_lnf_data();
941 00011005 fe 04 ef00000030 callf $4,_print_lnf_data
942 0001100C # }
943 0001100C # if( halt_flg )
944 0001100C L333:
945 0001100C 5d effffff7fe tstl _halt_flg
946 00011012 31 09 jeql L338
947 00011014 # lnf_er_halt( BAD_ACC_HLT ); /* halt on the error */
948 00011014 dd 01 pushl $1
949 00011016 fe 08 ef0000007d callf $8,_lnf_er_halt
950 0001101D # if( loop_on_err ) {
951 0001101D L338:
952 0001101D 5d effffff7ed tstl _loop_on_err
953 00011023 31 0a jeql L339
954 00011025 # force_loop = TRUE; /* set the force loop flag */
955 00011025 0d 01 effffff7e4 movl $1,_force_loop
956 0001102C # asm("brw _lnf_6_lp1");; /* and loop on the error */
957 0001102C 13 ff4f brw _lnf_6_lp1
958 0001102F # } /* end of loop on error */
959 0001102F # } /* end of compare error */
960 0001102F L339:
961 0001102F # } /* end of WHILE loop */
962 0001102F L332:
963 0001102F L328:
964 0001102F 6d effffff7db incl _index
965 00011035 13 ff0a jbr L330
966 00011038 L329:
967 00011038 # } /* end of subtest 6 */
968 00011038 40 ret#2
969 00011039 .set L324,0x0
970 00011039 L326:
971 00011039 13 fef3 jbr L327
972 0001103C .data
973 0000093c * .text
974 0001103C .align 1
975 0001103C .globl _print_lnf_data
976 0001103C _print_lnf_data:
977 0001103C 0000 .word L340
978 0001103E #
979 0001103E #
980 0001103E #
981 0001103E # /**************************************************************************
982 0001103E # *
983 0001103E # * PRINT THE DATA AND STORE RESULTS
984 0001103E # *
985 0001103E # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx
986 0001103E # **************************************************************************/
987 0001103E # print_lnf_data()
988 0001103E # {
989 0001103E 11 58 jbr L342
990 00011040 L343:
991 00011040 # writes("initial Acc = ");
992 00011040 .data 1
993 00000b63 * L344:
994 00000b63 * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
995 00000b72 * .text
996 00011040 dd 8f00000b63 pushl $L344
997 00011046 fe 08 effffff7c3 callf $8,_writes
998 0001104D # write32h( sgl_ld_acc );
999 0001104D dd effffff7bd pushl _sgl_ld_acc
1000 00011053 fe 08 effffff7b6 callf $8,_write32h
1001 0001105A # writes(", Acc stored = ");
1002 0001105A .data 1
1003 00000b72 * L345:
1004 00000b72 * 2C202020204163632073746F7 .ascii ", Acc stored = \0"
26564203D2000
1005 00000b85 * .text
1006 0001105A dd 8f00000b72 pushl $L345
1007 00011060 fe 08 effffff7a9 callf $8,_writes
1008 00011067 # write32h( sgl_st_acc );
1009 00011067 dd effffff7a3 pushl _sgl_st_acc
1010 0001106D fe 08 effffff79c callf $8,_write32h
1011 00011074 # writes(", data index = ");
1012 00011074 .data 1
1013 00000b85 * L346:
1014 00000b85 * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
1015 00000b96 * .text
1016 00011074 dd 8f00000b85 pushl $L346
1017 0001107A fe 08 effffff78f callf $8,_writes
1018 00011081 # writed( index );
1019 00011081 dd effffff789 pushl _index
1020 00011087 fe 08 effffff782 callf $8,_writed
1021 0001108E # writec('\n');
1022 0001108E dd 0a pushl $10
1023 00011090 fe 08 effffff779 callf $8,_writec
1024 00011097 # }
1025 00011097 40 ret#2
1026 00011098 .set L340,0x0
1027 00011098 L342:
1028 00011098 11 a6 jbr L343
1029 0001109A .data
1030 0000093c * .text
1031 0001109A .align 1
1032 0001109A .globl _lnf_er_halt
1033 0001109A _lnf_er_halt:
1034 0001109A 0000 .word L347
1035 0001109C #
1036 0001109C #
1037 0001109C #
1038 0001109C # /**************************************************************************
1039 0001109C # *
1040 0001109C # * HALT ON ERROR ROUTINE
1041 0001109C # *
1042 0001109C # **************************************************************************/
1043 0001109C # lnf_er_halt( halt_code )
1044 0001109C # int halt_code;
1045 0001109C # {
1046 0001109C 13 00a8 jbr L349
1047 0001109F L350:
1048 0001109F # sgl_dummy1 = halt_code; /* get the error type */
1049 0001109F 0d ad04 effffff769 movl 4(fp),_sgl_dummy1
1050 000110A7 # asm("movl _test_no,r0"); /* r0 = test number */
1051 000110A7 0d effffff763 50 movl _test_no,r0
1052 000110AE # asm("movl _subtest,r1"); /* r1 = subtest number */
1053 000110AE 0d effffff75c 51 movl _subtest,r1
1054 000110B5 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1055 000110B5 0d effffff755 52 movl _sgl_dummy1,r2
1056 000110BC # asm("movl _cycle,r3"); /* r3 = cycle count */
1057 000110BC 0d effffff74e 53 movl _cycle,r3
1058 000110C3 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1059 000110C3 0d effffff747 54 movl _sgl_ld_acc,r4
1060 000110CA # asm("movl _sgl_st_acc,r5"); /* r5 = data stored */
1061 000110CA 0d effffff740 55 movl _sgl_st_acc,r5
1062 000110D1 # if( halt_code == BAD_ACC_HLT ) {
1063 000110D1 1d ad04 01 cmpl 4(fp),$1
1064 000110D5 21 10 jneq L351
1065 000110D7 # asm("movl _sgl_expected,r6"); /* r6 = data expected */
1066 000110D7 0d effffff733 56 movl _sgl_expected,r6
1067 000110DE # asm("movl _index,r7"); /* r7 = data index */
1068 000110DE 0d effffff72c 57 movl _index,r7
1069 000110E5 # } else
1070 000110E5 11 5e jbr L352
1071 000110E7 L351:
1072 000110E7 # if( halt_code == BAD_REG_HLT ) {
1073 000110E7 1d ad04 02 cmpl 4(fp),$2
1074 000110EB 21 3d jneq L353
1075 000110ED # sgl_dummy1 = load_regs[index2];
1076 000110ED 0d effffff71d 50 movl _index2,r0
1077 000110F4 0d 40effffff715 movl _load_regs[r0],_sgl_dummy1
effffff710
1078 00011100 # sgl_dummy2 = store_regs[index2];
1079 00011100 0d effffff70a 50 movl _index2,r0
1080 00011107 0d 40effffff702 movl _store_regs[r0],_sgl_dummy2
effffff6fd
1081 00011113 # asm("movl _index2,r6"); /* r6 = bad register # */
1082 00011113 0d effffff6f7 56 movl _index2,r6
1083 0001111A # asm("movl _sgl_dummy2,r7"); /* r7 = actual value */
1084 0001111A 0d effffff6f0 57 movl _sgl_dummy2,r7
1085 00011121 # asm("movl _sgl_dummy1,r8"); /* r8 = expected value */
1086 00011121 0d effffff6e9 58 movl _sgl_dummy1,r8
1087 00011128 # } else
1088 00011128 11 1b jbr L354
1089 0001112A L353:
1090 0001112A # if( halt_code == BAD_PSL_HLT ) {
1091 0001112A 1d ad04 03 cmpl 4(fp),$3
1092 0001112E 21 15 jneq L355
1093 00011130 # asm("movl _init_psl,r6"); /* r6 = initial PSL */
1094 00011130 0d effffff6da 56 movl _init_psl,r6
1095 00011137 # asm("movl _psl_val,r7"); /* r7 = final PSL */
1096 00011137 0d effffff6d3 57 movl _psl_val,r7
1097 0001113E # asm("movl _exp_psl,r8"); /* r8 = expected PSL */
1098 0001113E 0d effffff6cc 58 movl _exp_psl,r8
1099 00011145 # };
1100 00011145 L355:
1101 00011145 L354:
1102 00011145 L352:
1103 00011145 # asm("halt"); /* HALT ... */
1104 00011145 00 halt
1105 00011146 # }
1106 00011146 40 ret#2
1107 00011147 .set L347,0x0
1108 00011147 L349:
1109 00011147 13 ff55 jbr L350
1110 0001114A .data
1110 0002195A .data
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