![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to mulf.lst CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to mulf.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
1.1 ! root 1: 1 00000000 LL0: ! 2: 2 00000000 .data ! 3: 3 00000d1c * .text ! 4: 4 00000000 .align 1 ! 5: 5 00000000 .globl _mulf ! 6: 6 00000000 _mulf: ! 7: 7 0000EDCC 0000 .word L215 ! 8: 8 0000EDCE # ! 9: 9 0000EDCE # #include "fpp_defs.h" ! 10: 10 0000EDCE # ! 11: 11 0000EDCE # ! 12: 12 0000EDCE # /***************************************************************************** ! 13: 13 0000EDCE # * ! 14: 14 0000EDCE # * MULF - SINGLE PRECISION FLOATING POINT ADD TEST ! 15: 15 0000EDCE # * ! 16: 16 0000EDCE # *****************************************************************************/ ! 17: 17 0000EDCE # mulf() ! 18: 18 0000EDCE # { ! 19: 19 0000EDCE 11 64 jbr L217 ! 20: 20 0000EDD0 L218: ! 21: 21 0000EDD0 # asm(".globl _mulf_t"); ! 22: 22 0000EDD0 .globl _mulf_t ! 23: 23 0000EDD0 # asm("_mulf_t:"); /* entry address */ ! 24: 24 0000EDD0 _mulf_t: ! 25: 25 0000EDD0 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */ ! 26: 26 0000EDD0 1d effffffff6 01 cmpl _cycle,$1 ! 27: 27 0000EDD7 21 15 jneq L219 ! 28: 28 0000EDD9 5d efffffffed tstl _prt_hdrs ! 29: 29 0000EDDF 31 0d jeql L219 ! 30: 30 0000EDE1 # writes(" MULF"); ! 31: 31 0000EDE1 .data 1 ! 32: 32 00000d1c * L221: ! 33: 33 00000d1c * 204D554C4600 .ascii " MULF\0" ! 34: 34 00000d22 * .text ! 35: 35 0000EDE1 dd 8f00000d1c pushl $L221 ! 36: 36 0000EDE7 fe 08 efffffffde callf $8,_writes ! 37: 37 0000EDEE # mulf_1(); /* multiply through a register*/ ! 38: 38 0000EDEE L219: ! 39: 39 0000EDEE fe 04 ef00000041 callf $4,_mulf_1 ! 40: 40 0000EDF5 # mulf_2(); /* multiply through the cache */ ! 41: 41 0000EDF5 fe 04 ef00000160 callf $4,_mulf_2 ! 42: 42 0000EDFC # mulf_3(); /* wait 3 NOPs */ ! 43: 43 0000EDFC fe 04 ef00000279 callf $4,_mulf_3 ! 44: 44 0000EE03 # mulf_4(); /* wait 2 NOPs */ ! 45: 45 0000EE03 fe 04 ef00000396 callf $4,_mulf_4 ! 46: 46 0000EE0A # mulf_5(); /* wait 1 NOP before storing */ ! 47: 47 0000EE0A fe 04 ef000004b3 callf $4,_mulf_5 ! 48: 48 0000EE11 # mulf_6(); /* register stability test */ ! 49: 49 0000EE11 fe 04 ef000005ce callf $4,_mulf_6 ! 50: 50 0000EE18 # mulf_7(); /* PSL stability test */ ! 51: 51 0000EE18 fe 04 ef00000777 callf $4,_mulf_7 ! 52: 52 0000EE1F # mulf_8(); /* pipelined entry test */ ! 53: 53 0000EE1F fe 04 ef0000091e callf $4,_mulf_8 ! 54: 54 0000EE26 # mulf_9(); /* pipelined exit test */ ! 55: 55 0000EE26 fe 04 ef00000a3d callf $4,_mulf_9 ! 56: 56 0000EE2D # asm("jmp *return"); /* return to the test monitor */ ! 57: 57 0000EE2D 71 ffffffff99 jmp *return ! 58: 58 0000EE33 # } ! 59: 59 0000EE33 40 ret#2 ! 60: 60 0000EE34 .set L215,0x0 ! 61: 61 0000EE34 L217: ! 62: 62 0000EE34 11 9a jbr L218 ! 63: 63 0000EE36 .data ! 64: 64 00000d1c * .text ! 65: 65 0000EE36 .align 1 ! 66: 66 0000EE36 .globl _mulf_1 ! 67: 67 0000EE36 _mulf_1: ! 68: 68 0000EE36 0000 .word L231 ! 69: 69 0000EE38 # ! 70: 70 0000EE38 # ! 71: 71 0000EE38 # ! 72: 72 0000EE38 # /************************************************************************ ! 73: 73 0000EE38 # * ! 74: 74 0000EE38 # * SUBTEST 1 - multiply through a register ! 75: 75 0000EE38 # * ! 76: 76 0000EE38 # ************************************************************************/ ! 77: 77 0000EE38 # mulf_1() ! 78: 78 0000EE38 # { ! 79: 79 0000EE38 13 011e jbr L233 ! 80: 80 0000EE3B L234: ! 81: 81 0000EE3B # force_loop = FALSE; ! 82: 82 0000EE3B 4d efffffff8b clrl _force_loop ! 83: 83 0000EE41 # subtest = 1; ! 84: 84 0000EE41 0d 01 efffffff84 movl $1,_subtest ! 85: 85 0000EE48 # for( index = 0; index < max_mulf_1_index; index++ ) { ! 86: 86 0000EE48 4d efffffff7e clrl _index ! 87: 87 0000EE4E L237: ! 88: 88 0000EE4E 1d efffffff78 efffffff73 cmpl _index,_max_mulf_1_index ! 89: 89 0000EE59 91 03 13 00fa jgeq L236 ! 90: 90 0000EE5E # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 91: 91 0000EE5E 5c 0c efffffff67 50 mull3 $12,_index,r0 ! 92: 92 0000EE66 0d e000000000 efffffff5b movl _mulf_1_data(r0),_sgl_ld_acc ! 93: 93 0000EE71 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 94: 94 0000EE71 5c 0c efffffff54 50 mull3 $12,_index,r0 ! 95: 95 0000EE79 0d e000000004 efffffff48 movl _mulf_1_data+4(r0),_sgl_value_1 ! 96: 96 0000EE84 # sgl_expected = mulf_1_data[index].exp; /* get expected result */ ! 97: 97 0000EE84 5c 0c efffffff41 50 mull3 $12,_index,r0 ! 98: 98 0000EE8C 0d e000000008 efffffff35 movl _mulf_1_data+8(r0),_sgl_expected ! 99: 99 0000EE97 # /* ! 100: 100 0000EE97 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 101: 101 0000EE97 # * The force loop flag is set after the first error. ! 102: 102 0000EE97 # */ ! 103: 103 0000EE97 # asm("_mulf_1_lp1:"); ! 104: 104 0000EE97 _mulf_1_lp1: ! 105: 105 0000EE97 # asm("movl _sgl_ld_acc,r3"); /* move the 1st data to r3 */ ! 106: 106 0000EE97 0d efffffff2f 53 movl _sgl_ld_acc,r3 ! 107: 107 0000EE9E # asm("movl _sgl_value_1,r4"); /* move the 2nd data to r4 */ ! 108: 108 0000EE9E 0d efffffff28 54 movl _sgl_value_1,r4 ! 109: 109 0000EEA5 # asm("ldf r3"); /* load the 1st operand */ ! 110: 110 0000EEA5 06 53 ldf r3 ! 111: 111 0000EEA7 # asm("mulf r4"); /* mul the 2nd operand */ ! 112: 112 0000EEA7 e6 54 mulf r4 ! 113: 113 0000EEA9 # asm("stf _sgl_st_acc"); /* store the result */ ! 114: 114 0000EEA9 26 efffffff1d stf _sgl_st_acc ! 115: 115 0000EEAF # if( force_loop ) ! 116: 116 0000EEAF 5d efffffff17 tstl _force_loop ! 117: 117 0000EEB5 31 02 jeql L238 ! 118: 118 0000EEB7 # asm("brb _mulf_1_lp1");; /* loop on the error */ ! 119: 119 0000EEB7 11 de brb _mulf_1_lp1 ! 120: 120 0000EEB9 L238: ! 121: 121 0000EEB9 # /* ! 122: 122 0000EEB9 # * end error loop - test the results ! 123: 123 0000EEB9 # */ ! 124: 124 0000EEB9 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 125: 125 0000EEB9 1d efffffff0d efffffff08 cmpl _sgl_st_acc,_sgl_expected ! 126: 126 0000EEC4 21 03 13 0086 jeql L239 ! 127: 127 0000EEC9 # errcnt++; /* bump the error count */ ! 128: 128 0000EEC9 6d effffffefd incl _errcnt ! 129: 129 0000EECF # if( prt_error ) { ! 130: 130 0000EECF 5d effffffef7 tstl _prt_error ! 131: 131 0000EED5 31 55 jeql L240 ! 132: 132 0000EED7 # writes(" \n"); /* start a new print line */ ! 133: 133 0000EED7 .data 1 ! 134: 134 00000d22 * L241: ! 135: 135 00000d22 * 200A00 .ascii " \12\0" ! 136: 136 00000d25 * .text ! 137: 137 0000EED7 dd 8f00000d22 pushl $L241 ! 138: 138 0000EEDD fe 08 effffffee8 callf $8,_writes ! 139: 139 0000EEE4 # writes("cycle: "); ! 140: 140 0000EEE4 .data 1 ! 141: 141 00000d25 * L242: ! 142: 142 00000d25 * 6379636C653A2000 .ascii "cycle: \0" ! 143: 143 00000d2d * .text ! 144: 144 0000EEE4 dd 8f00000d25 pushl $L242 ! 145: 145 0000EEEA fe 08 effffffedb callf $8,_writes ! 146: 146 0000EEF1 # writed( cycle ); ! 147: 147 0000EEF1 dd effffffed5 pushl _cycle ! 148: 148 0000EEF7 fe 08 effffffece callf $8,_writed ! 149: 149 0000EEFE # writes(" MULF test "); ! 150: 150 0000EEFE .data 1 ! 151: 151 00000d2d * L244: ! 152: 152 00000d2d * 20204D554C462074657374200 .ascii " MULF test \0" ! 153: 0 ! 154: 153 00000d3a * .text ! 155: 154 0000EEFE dd 8f00000d2d pushl $L244 ! 156: 155 0000EF04 fe 08 effffffec1 callf $8,_writes ! 157: 156 0000EF0B # writed( test_no ); ! 158: 157 0000EF0B dd effffffebb pushl _test_no ! 159: 158 0000EF11 fe 08 effffffeb4 callf $8,_writed ! 160: 159 0000EF18 # writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n"); ! 161: 160 0000EF18 .data 1 ! 162: 161 00000d3a * L245: ! 163: 162 00000d3a * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0" ! 164: 85265672E204461746129202D ! 165: 204241442046494E414C20414 ! 166: 3430A00 ! 167: 163 00000d63 * .text ! 168: 164 0000EF18 dd 8f00000d3a pushl $L245 ! 169: 165 0000EF1E fe 08 effffffea7 callf $8,_writes ! 170: 166 0000EF25 # print_mulf_data(); ! 171: 167 0000EF25 fe 04 ef00000a64 callf $4,_print_mulf_data ! 172: 168 0000EF2C # } ! 173: 169 0000EF2C # if( halt_flg ) ! 174: 170 0000EF2C L240: ! 175: 171 0000EF2C 5d effffffe9a tstl _halt_flg ! 176: 172 0000EF32 31 09 jeql L247 ! 177: 173 0000EF34 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 178: 174 0000EF34 dd 01 pushl $1 ! 179: 175 0000EF36 fe 08 ef00000af1 callf $8,_mulf_er_halt ! 180: 176 0000EF3D # if( loop_on_err ) { ! 181: 177 0000EF3D L247: ! 182: 178 0000EF3D 5d effffffe89 tstl _loop_on_err ! 183: 179 0000EF43 31 0a jeql L249 ! 184: 180 0000EF45 # force_loop = TRUE; /* set the force loop flag */ ! 185: 181 0000EF45 0d 01 effffffe80 movl $1,_force_loop ! 186: 182 0000EF4C # asm("brw _mulf_1_lp1");; /* and loop on the error */ ! 187: 183 0000EF4C 13 ff48 brw _mulf_1_lp1 ! 188: 184 0000EF4F # } /* end of loop on error */ ! 189: 185 0000EF4F # } /* end of compare error */ ! 190: 186 0000EF4F L249: ! 191: 187 0000EF4F # } /* end of WHILE loop */ ! 192: 188 0000EF4F L239: ! 193: 189 0000EF4F L235: ! 194: 190 0000EF4F 6d effffffe77 incl _index ! 195: 191 0000EF55 13 fef6 jbr L237 ! 196: 192 0000EF58 L236: ! 197: 193 0000EF58 # } /* end of subtest 1 */ ! 198: 194 0000EF58 40 ret#2 ! 199: 195 0000EF59 .set L231,0x0 ! 200: 196 0000EF59 L233: ! 201: 197 0000EF59 13 fedf jbr L234 ! 202: 198 0000EF5C .data ! 203: 199 00000d1c * .text ! 204: 200 0000EF5C .align 1 ! 205: 201 0000EF5C .globl _mulf_2 ! 206: 202 0000EF5C _mulf_2: ! 207: 203 0000EF5C 0000 .word L250 ! 208: 204 0000EF5E # ! 209: 205 0000EF5E # ! 210: 206 0000EF5E # ! 211: 207 0000EF5E # /************************************************************************ ! 212: 208 0000EF5E # * ! 213: 209 0000EF5E # * SUBTEST 2 - multiply through memory ! 214: 210 0000EF5E # * ! 215: 211 0000EF5E # ************************************************************************/ ! 216: 212 0000EF5E # mulf_2() ! 217: 213 0000EF5E # { ! 218: 214 0000EF5E 13 0118 jbr L252 ! 219: 215 0000EF61 L253: ! 220: 216 0000EF61 # force_loop = FALSE; ! 221: 217 0000EF61 4d effffffe65 clrl _force_loop ! 222: 218 0000EF67 # subtest = 2; ! 223: 219 0000EF67 0d 02 effffffe5e movl $2,_subtest ! 224: 220 0000EF6E # for( index = 0; index < max_mulf_1_index; index++ ) { ! 225: 221 0000EF6E 4d effffffe58 clrl _index ! 226: 222 0000EF74 L256: ! 227: 223 0000EF74 1d effffffe52 effffffe4d cmpl _index,_max_mulf_1_index ! 228: 224 0000EF7F 91 03 13 00f4 jgeq L255 ! 229: 225 0000EF84 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 230: 226 0000EF84 5c 0c effffffe41 50 mull3 $12,_index,r0 ! 231: 227 0000EF8C 0d e000000000 effffffe35 movl _mulf_1_data(r0),_sgl_ld_acc ! 232: 228 0000EF97 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 233: 229 0000EF97 5c 0c effffffe2e 50 mull3 $12,_index,r0 ! 234: 230 0000EF9F 0d e000000004 effffffe22 movl _mulf_1_data+4(r0),_sgl_value_1 ! 235: 231 0000EFAA # sgl_expected = mulf_1_data[index].exp; /* get expected result */ ! 236: 232 0000EFAA 5c 0c effffffe1b 50 mull3 $12,_index,r0 ! 237: 233 0000EFB2 0d e000000008 effffffe0f movl _mulf_1_data+8(r0),_sgl_expected ! 238: 234 0000EFBD # /* ! 239: 235 0000EFBD # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 240: 236 0000EFBD # * The force loop flag is set after the first error. ! 241: 237 0000EFBD # */ ! 242: 238 0000EFBD # asm("_mulf_2_lp1:"); ! 243: 239 0000EFBD _mulf_2_lp1: ! 244: 240 0000EFBD # asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 245: 241 0000EFBD 06 effffffe09 ldf _sgl_ld_acc ! 246: 242 0000EFC3 # asm("mulf _sgl_value_1"); /* mul the 2nd operand */ ! 247: 243 0000EFC3 e6 effffffe03 mulf _sgl_value_1 ! 248: 244 0000EFC9 # asm("stf _sgl_st_acc"); /* store the result */ ! 249: 245 0000EFC9 26 effffffdfd stf _sgl_st_acc ! 250: 246 0000EFCF # if( force_loop ) ! 251: 247 0000EFCF 5d effffffdf7 tstl _force_loop ! 252: 248 0000EFD5 31 02 jeql L257 ! 253: 249 0000EFD7 # asm("brb _mulf_2_lp1");; /* loop on the error */ ! 254: 250 0000EFD7 11 e4 brb _mulf_2_lp1 ! 255: 251 0000EFD9 L257: ! 256: 252 0000EFD9 # /* ! 257: 253 0000EFD9 # * end error loop - test the results ! 258: 254 0000EFD9 # */ ! 259: 255 0000EFD9 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 260: 256 0000EFD9 1d effffffded effffffde8 cmpl _sgl_st_acc,_sgl_expected ! 261: 257 0000EFE4 21 03 13 0086 jeql L258 ! 262: 258 0000EFE9 # errcnt++; /* bump the error count */ ! 263: 259 0000EFE9 6d effffffddd incl _errcnt ! 264: 260 0000EFEF # if( prt_error ) { ! 265: 261 0000EFEF 5d effffffdd7 tstl _prt_error ! 266: 262 0000EFF5 31 55 jeql L259 ! 267: 263 0000EFF7 # writes(" \n"); /* start a new print line */ ! 268: 264 0000EFF7 .data 1 ! 269: 265 00000d63 * L260: ! 270: 266 00000d63 * 200A00 .ascii " \12\0" ! 271: 267 00000d66 * .text ! 272: 268 0000EFF7 dd 8f00000d63 pushl $L260 ! 273: 269 0000EFFD fe 08 effffffdc8 callf $8,_writes ! 274: 270 0000F004 # writes("cycle: "); ! 275: 271 0000F004 .data 1 ! 276: 272 00000d66 * L261: ! 277: 273 00000d66 * 6379636C653A2000 .ascii "cycle: \0" ! 278: 274 00000d6e * .text ! 279: 275 0000F004 dd 8f00000d66 pushl $L261 ! 280: 276 0000F00A fe 08 effffffdbb callf $8,_writes ! 281: 277 0000F011 # writed( cycle ); ! 282: 278 0000F011 dd effffffdb5 pushl _cycle ! 283: 279 0000F017 fe 08 effffffdae callf $8,_writed ! 284: 280 0000F01E # writes(" MULF test "); ! 285: 281 0000F01E .data 1 ! 286: 282 00000d6e * L262: ! 287: 283 00000d6e * 20204D554C462074657374200 .ascii " MULF test \0" ! 288: 0 ! 289: 284 00000d7b * .text ! 290: 285 0000F01E dd 8f00000d6e pushl $L262 ! 291: 286 0000F024 fe 08 effffffda1 callf $8,_writes ! 292: 287 0000F02B # writed( test_no ); ! 293: 288 0000F02B dd effffffd9b pushl _test_no ! 294: 289 0000F031 fe 08 effffffd94 callf $8,_writed ! 295: 290 0000F038 # writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n"); ! 296: 291 0000F038 .data 1 ! 297: 292 00000d7b * L263: ! 298: 293 00000d7b * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL ACC\12\0" ! 299: 8436163686520446174612920 ! 300: 2D204241442046494E414C204 ! 301: 143430A00 ! 302: 294 00000da5 * .text ! 303: 295 0000F038 dd 8f00000d7b pushl $L263 ! 304: 296 0000F03E fe 08 effffffd87 callf $8,_writes ! 305: 297 0000F045 # print_mulf_data(); ! 306: 298 0000F045 fe 04 ef00000944 callf $4,_print_mulf_data ! 307: 299 0000F04C # } ! 308: 300 0000F04C # if( halt_flg ) ! 309: 301 0000F04C L259: ! 310: 302 0000F04C 5d effffffd7a tstl _halt_flg ! 311: 303 0000F052 31 09 jeql L264 ! 312: 304 0000F054 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 313: 305 0000F054 dd 01 pushl $1 ! 314: 306 0000F056 fe 08 ef000009d1 callf $8,_mulf_er_halt ! 315: 307 0000F05D # if( loop_on_err ) { ! 316: 308 0000F05D L264: ! 317: 309 0000F05D 5d effffffd69 tstl _loop_on_err ! 318: 310 0000F063 31 0a jeql L265 ! 319: 311 0000F065 # force_loop = TRUE; /* set the force loop flag */ ! 320: 312 0000F065 0d 01 effffffd60 movl $1,_force_loop ! 321: 313 0000F06C # asm("brw _mulf_2_lp1");; /* and loop on the error */ ! 322: 314 0000F06C 13 ff4e brw _mulf_2_lp1 ! 323: 315 0000F06F # } /* end of loop on error */ ! 324: 316 0000F06F # } /* end of compare error */ ! 325: 317 0000F06F L265: ! 326: 318 0000F06F # } /* end of WHILE loop */ ! 327: 319 0000F06F L258: ! 328: 320 0000F06F L254: ! 329: 321 0000F06F 6d effffffd57 incl _index ! 330: 322 0000F075 13 fefc jbr L256 ! 331: 323 0000F078 L255: ! 332: 324 0000F078 # } /* end of subtest 2 */ ! 333: 325 0000F078 40 ret#2 ! 334: 326 0000F079 .set L250,0x0 ! 335: 327 0000F079 L252: ! 336: 328 0000F079 13 fee5 jbr L253 ! 337: 329 0000F07C .data ! 338: 330 00000d1c * .text ! 339: 331 0000F07C .align 1 ! 340: 332 0000F07C .globl _mulf_3 ! 341: 333 0000F07C _mulf_3: ! 342: 334 0000F07C 0000 .word L266 ! 343: 335 0000F07E # ! 344: 336 0000F07E # ! 345: 337 0000F07E # ! 346: 338 0000F07E # /************************************************************************ ! 347: 339 0000F07E # * ! 348: 340 0000F07E # * SUBTEST 3 - Wait 3 NOPs before storing the results ! 349: 341 0000F07E # * ! 350: 342 0000F07E # ************************************************************************/ ! 351: 343 0000F07E # mulf_3() ! 352: 344 0000F07E # { ! 353: 345 0000F07E 13 011c jbr L268 ! 354: 346 0000F081 L269: ! 355: 347 0000F081 # force_loop = FALSE; ! 356: 348 0000F081 4d effffffd45 clrl _force_loop ! 357: 349 0000F087 # subtest = 3; ! 358: 350 0000F087 0d 03 effffffd3e movl $3,_subtest ! 359: 351 0000F08E # for( index = 0; index < max_mulf_1_index; index++ ) { ! 360: 352 0000F08E 4d effffffd38 clrl _index ! 361: 353 0000F094 L272: ! 362: 354 0000F094 1d effffffd32 effffffd2d cmpl _index,_max_mulf_1_index ! 363: 355 0000F09F 91 03 13 00f8 jgeq L271 ! 364: 356 0000F0A4 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 365: 357 0000F0A4 5c 0c effffffd21 50 mull3 $12,_index,r0 ! 366: 358 0000F0AC 0d e000000000 effffffd15 movl _mulf_1_data(r0),_sgl_ld_acc ! 367: 359 0000F0B7 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 368: 360 0000F0B7 5c 0c effffffd0e 50 mull3 $12,_index,r0 ! 369: 361 0000F0BF 0d e000000004 effffffd02 movl _mulf_1_data+4(r0),_sgl_value_1 ! 370: 362 0000F0CA # sgl_expected = mulf_1_data[index].exp; /* get expected result */ ! 371: 363 0000F0CA 5c 0c effffffcfb 50 mull3 $12,_index,r0 ! 372: 364 0000F0D2 0d e000000008 effffffcef movl _mulf_1_data+8(r0),_sgl_expected ! 373: 365 0000F0DD # /* ! 374: 366 0000F0DD # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 375: 367 0000F0DD # * The force loop flag is set after the first error. ! 376: 368 0000F0DD # */ ! 377: 369 0000F0DD # asm("_mulf_3_lp1:"); ! 378: 370 0000F0DD _mulf_3_lp1: ! 379: 371 0000F0DD # asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 380: 372 0000F0DD 06 effffffce9 ldf _sgl_ld_acc ! 381: 373 0000F0E3 # asm("nop"); /* delay */ ! 382: 374 0000F0E3 10 nop ! 383: 375 0000F0E4 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */ ! 384: 376 0000F0E4 e6 effffffce2 mulf _sgl_value_1 ! 385: 377 0000F0EA # asm("nop"); /* delay before ... */ ! 386: 378 0000F0EA 10 nop ! 387: 379 0000F0EB # asm("nop"); ! 388: 380 0000F0EB 10 nop ! 389: 381 0000F0EC # asm("nop"); /* ... storing the result */ ! 390: 382 0000F0EC 10 nop ! 391: 383 0000F0ED # asm("stf _sgl_st_acc"); /* store the result */ ! 392: 384 0000F0ED 26 effffffcd9 stf _sgl_st_acc ! 393: 385 0000F0F3 # if( force_loop ) ! 394: 386 0000F0F3 5d effffffcd3 tstl _force_loop ! 395: 387 0000F0F9 31 02 jeql L273 ! 396: 388 0000F0FB # asm("brb _mulf_3_lp1");; /* loop on the error */ ! 397: 389 0000F0FB 11 e0 brb _mulf_3_lp1 ! 398: 390 0000F0FD L273: ! 399: 391 0000F0FD # /* ! 400: 392 0000F0FD # * end error loop - test the results ! 401: 393 0000F0FD # */ ! 402: 394 0000F0FD # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 403: 395 0000F0FD 1d effffffcc9 effffffcc4 cmpl _sgl_st_acc,_sgl_expected ! 404: 396 0000F108 21 03 13 0086 jeql L274 ! 405: 397 0000F10D # errcnt++; /* bump the error count */ ! 406: 398 0000F10D 6d effffffcb9 incl _errcnt ! 407: 399 0000F113 # if( prt_error ) { ! 408: 400 0000F113 5d effffffcb3 tstl _prt_error ! 409: 401 0000F119 31 55 jeql L275 ! 410: 402 0000F11B # writes(" \n"); /* start a new print line */ ! 411: 403 0000F11B .data 1 ! 412: 404 00000da5 * L276: ! 413: 405 00000da5 * 200A00 .ascii " \12\0" ! 414: 406 00000da8 * .text ! 415: 407 0000F11B dd 8f00000da5 pushl $L276 ! 416: 408 0000F121 fe 08 effffffca4 callf $8,_writes ! 417: 409 0000F128 # writes("cycle: "); ! 418: 410 0000F128 .data 1 ! 419: 411 00000da8 * L277: ! 420: 412 00000da8 * 6379636C653A2000 .ascii "cycle: \0" ! 421: 413 00000db0 * .text ! 422: 414 0000F128 dd 8f00000da8 pushl $L277 ! 423: 415 0000F12E fe 08 effffffc97 callf $8,_writes ! 424: 416 0000F135 # writed( cycle ); ! 425: 417 0000F135 dd effffffc91 pushl _cycle ! 426: 418 0000F13B fe 08 effffffc8a callf $8,_writed ! 427: 419 0000F142 # writes(" MULF test "); ! 428: 420 0000F142 .data 1 ! 429: 421 00000db0 * L278: ! 430: 422 00000db0 * 20204D554C462074657374200 .ascii " MULF test \0" ! 431: 0 ! 432: 423 00000dbd * .text ! 433: 424 0000F142 dd 8f00000db0 pushl $L278 ! 434: 425 0000F148 fe 08 effffffc7d callf $8,_writes ! 435: 426 0000F14F # writed( test_no ); ! 436: 427 0000F14F dd effffffc77 pushl _test_no ! 437: 428 0000F155 fe 08 effffffc70 callf $8,_writed ! 438: 429 0000F15C # writes(", subtest 3 (Cache Data - 3 NOPs) - BAD FINAL ACC\n"); ! 439: 430 0000F15C .data 1 ! 440: 431 00000dbd * L279: ! 441: 432 00000dbd * 2C20737562746573742033202 .ascii ", subtest 3 (Cache Data - 3 NOPs) - BAD FINAL ACC\12\0" ! 442: 843616368652044617461202D ! 443: 2033204E4F507329202D20424 ! 444: 1442046494E414C204143430A ! 445: 00 ! 446: 433 00000df0 * .text ! 447: 434 0000F15C dd 8f00000dbd pushl $L279 ! 448: 435 0000F162 fe 08 effffffc63 callf $8,_writes ! 449: 436 0000F169 # print_mulf_data(); ! 450: 437 0000F169 fe 04 ef00000820 callf $4,_print_mulf_data ! 451: 438 0000F170 # } ! 452: 439 0000F170 # if( halt_flg ) ! 453: 440 0000F170 L275: ! 454: 441 0000F170 5d effffffc56 tstl _halt_flg ! 455: 442 0000F176 31 09 jeql L280 ! 456: 443 0000F178 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 457: 444 0000F178 dd 01 pushl $1 ! 458: 445 0000F17A fe 08 ef000008ad callf $8,_mulf_er_halt ! 459: 446 0000F181 # if( loop_on_err ) { ! 460: 447 0000F181 L280: ! 461: 448 0000F181 5d effffffc45 tstl _loop_on_err ! 462: 449 0000F187 31 0a jeql L281 ! 463: 450 0000F189 # force_loop = TRUE; /* set the force loop flag */ ! 464: 451 0000F189 0d 01 effffffc3c movl $1,_force_loop ! 465: 452 0000F190 # asm("brw _mulf_3_lp1");; /* and loop on the error */ ! 466: 453 0000F190 13 ff4a brw _mulf_3_lp1 ! 467: 454 0000F193 # } /* end of loop on error */ ! 468: 455 0000F193 # } /* end of compare error */ ! 469: 456 0000F193 L281: ! 470: 457 0000F193 # } /* end of WHILE loop */ ! 471: 458 0000F193 L274: ! 472: 459 0000F193 L270: ! 473: 460 0000F193 6d effffffc33 incl _index ! 474: 461 0000F199 13 fef8 jbr L272 ! 475: 462 0000F19C L271: ! 476: 463 0000F19C # } /* end of subtest 3 */ ! 477: 464 0000F19C 40 ret#2 ! 478: 465 0000F19D .set L266,0x0 ! 479: 466 0000F19D L268: ! 480: 467 0000F19D 13 fee1 jbr L269 ! 481: 468 0000F1A0 .data ! 482: 469 00000d1c * .text ! 483: 470 0000F1A0 .align 1 ! 484: 471 0000F1A0 .globl _mulf_4 ! 485: 472 0000F1A0 _mulf_4: ! 486: 473 0000F1A0 0000 .word L282 ! 487: 474 0000F1A2 # ! 488: 475 0000F1A2 # ! 489: 476 0000F1A2 # ! 490: 477 0000F1A2 # /************************************************************************ ! 491: 478 0000F1A2 # * ! 492: 479 0000F1A2 # * SUBTEST 4 - Wait 2 NOPs before storing the results ! 493: 480 0000F1A2 # * ! 494: 481 0000F1A2 # ************************************************************************/ ! 495: 482 0000F1A2 # mulf_4() ! 496: 483 0000F1A2 # { ! 497: 484 0000F1A2 13 011b jbr L284 ! 498: 485 0000F1A5 L285: ! 499: 486 0000F1A5 # force_loop = FALSE; ! 500: 487 0000F1A5 4d effffffc21 clrl _force_loop ! 501: 488 0000F1AB # subtest = 4; ! 502: 489 0000F1AB 0d 04 effffffc1a movl $4,_subtest ! 503: 490 0000F1B2 # for( index = 0; index < max_mulf_1_index; index++ ) { ! 504: 491 0000F1B2 4d effffffc14 clrl _index ! 505: 492 0000F1B8 L288: ! 506: 493 0000F1B8 1d effffffc0e effffffc09 cmpl _index,_max_mulf_1_index ! 507: 494 0000F1C3 91 03 13 00f7 jgeq L287 ! 508: 495 0000F1C8 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 509: 496 0000F1C8 5c 0c effffffbfd 50 mull3 $12,_index,r0 ! 510: 497 0000F1D0 0d e000000000 effffffbf1 movl _mulf_1_data(r0),_sgl_ld_acc ! 511: 498 0000F1DB # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 512: 499 0000F1DB 5c 0c effffffbea 50 mull3 $12,_index,r0 ! 513: 500 0000F1E3 0d e000000004 effffffbde movl _mulf_1_data+4(r0),_sgl_value_1 ! 514: 501 0000F1EE # sgl_expected = mulf_1_data[index].exp; /* get expected result */ ! 515: 502 0000F1EE 5c 0c effffffbd7 50 mull3 $12,_index,r0 ! 516: 503 0000F1F6 0d e000000008 effffffbcb movl _mulf_1_data+8(r0),_sgl_expected ! 517: 504 0000F201 # /* ! 518: 505 0000F201 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 519: 506 0000F201 # * The force loop flag is set after the first error. ! 520: 507 0000F201 # */ ! 521: 508 0000F201 # asm("_mulf_4_lp1:"); ! 522: 509 0000F201 _mulf_4_lp1: ! 523: 510 0000F201 # asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 524: 511 0000F201 06 effffffbc5 ldf _sgl_ld_acc ! 525: 512 0000F207 # asm("nop"); /* delay */ ! 526: 513 0000F207 10 nop ! 527: 514 0000F208 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */ ! 528: 515 0000F208 e6 effffffbbe mulf _sgl_value_1 ! 529: 516 0000F20E # asm("nop"); /* delay before ... */ ! 530: 517 0000F20E 10 nop ! 531: 518 0000F20F # asm("nop"); /* ... storing the result */ ! 532: 519 0000F20F 10 nop ! 533: 520 0000F210 # asm("stf _sgl_st_acc"); /* store the result */ ! 534: 521 0000F210 26 effffffbb6 stf _sgl_st_acc ! 535: 522 0000F216 # if( force_loop ) ! 536: 523 0000F216 5d effffffbb0 tstl _force_loop ! 537: 524 0000F21C 31 02 jeql L289 ! 538: 525 0000F21E # asm("brb _mulf_4_lp1");; /* loop on the error */ ! 539: 526 0000F21E 11 e1 brb _mulf_4_lp1 ! 540: 527 0000F220 L289: ! 541: 528 0000F220 # /* ! 542: 529 0000F220 # * end error loop - test the results ! 543: 530 0000F220 # */ ! 544: 531 0000F220 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 545: 532 0000F220 1d effffffba6 effffffba1 cmpl _sgl_st_acc,_sgl_expected ! 546: 533 0000F22B 21 03 13 0086 jeql L290 ! 547: 534 0000F230 # errcnt++; /* bump the error count */ ! 548: 535 0000F230 6d effffffb96 incl _errcnt ! 549: 536 0000F236 # if( prt_error ) { ! 550: 537 0000F236 5d effffffb90 tstl _prt_error ! 551: 538 0000F23C 31 55 jeql L291 ! 552: 539 0000F23E # writes(" \n"); /* start a new print line */ ! 553: 540 0000F23E .data 1 ! 554: 541 00000df0 * L292: ! 555: 542 00000df0 * 200A00 .ascii " \12\0" ! 556: 543 00000df3 * .text ! 557: 544 0000F23E dd 8f00000df0 pushl $L292 ! 558: 545 0000F244 fe 08 effffffb81 callf $8,_writes ! 559: 546 0000F24B # writes("cycle: "); ! 560: 547 0000F24B .data 1 ! 561: 548 00000df3 * L293: ! 562: 549 00000df3 * 6379636C653A2000 .ascii "cycle: \0" ! 563: 550 00000dfb * .text ! 564: 551 0000F24B dd 8f00000df3 pushl $L293 ! 565: 552 0000F251 fe 08 effffffb74 callf $8,_writes ! 566: 553 0000F258 # writed( cycle ); ! 567: 554 0000F258 dd effffffb6e pushl _cycle ! 568: 555 0000F25E fe 08 effffffb67 callf $8,_writed ! 569: 556 0000F265 # writes(" MULF test "); ! 570: 557 0000F265 .data 1 ! 571: 558 00000dfb * L294: ! 572: 559 00000dfb * 20204D554C462074657374200 .ascii " MULF test \0" ! 573: 0 ! 574: 560 00000e08 * .text ! 575: 561 0000F265 dd 8f00000dfb pushl $L294 ! 576: 562 0000F26B fe 08 effffffb5a callf $8,_writes ! 577: 563 0000F272 # writed( test_no ); ! 578: 564 0000F272 dd effffffb54 pushl _test_no ! 579: 565 0000F278 fe 08 effffffb4d callf $8,_writed ! 580: 566 0000F27F # writes(", subtest 4 (Cache Data - 2 NOPs) - BAD FINAL ACC\n"); ! 581: 567 0000F27F .data 1 ! 582: 568 00000e08 * L295: ! 583: 569 00000e08 * 2C20737562746573742034202 .ascii ", subtest 4 (Cache Data - 2 NOPs) - BAD FINAL ACC\12\0" ! 584: 843616368652044617461202D ! 585: 2032204E4F507329202D20424 ! 586: 1442046494E414C204143430A ! 587: 00 ! 588: 570 00000e3b * .text ! 589: 571 0000F27F dd 8f00000e08 pushl $L295 ! 590: 572 0000F285 fe 08 effffffb40 callf $8,_writes ! 591: 573 0000F28C # print_mulf_data(); ! 592: 574 0000F28C fe 04 ef000006fd callf $4,_print_mulf_data ! 593: 575 0000F293 # } ! 594: 576 0000F293 # if( halt_flg ) ! 595: 577 0000F293 L291: ! 596: 578 0000F293 5d effffffb33 tstl _halt_flg ! 597: 579 0000F299 31 09 jeql L296 ! 598: 580 0000F29B # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 599: 581 0000F29B dd 01 pushl $1 ! 600: 582 0000F29D fe 08 ef0000078a callf $8,_mulf_er_halt ! 601: 583 0000F2A4 # if( loop_on_err ) { ! 602: 584 0000F2A4 L296: ! 603: 585 0000F2A4 5d effffffb22 tstl _loop_on_err ! 604: 586 0000F2AA 31 0a jeql L297 ! 605: 587 0000F2AC # force_loop = TRUE; /* set the force loop flag */ ! 606: 588 0000F2AC 0d 01 effffffb19 movl $1,_force_loop ! 607: 589 0000F2B3 # asm("brw _mulf_4_lp1");; /* and loop on the error */ ! 608: 590 0000F2B3 13 ff4b brw _mulf_4_lp1 ! 609: 591 0000F2B6 # } /* end of loop on error */ ! 610: 592 0000F2B6 # } /* end of compare error */ ! 611: 593 0000F2B6 L297: ! 612: 594 0000F2B6 # } /* end of WHILE loop */ ! 613: 595 0000F2B6 L290: ! 614: 596 0000F2B6 L286: ! 615: 597 0000F2B6 6d effffffb10 incl _index ! 616: 598 0000F2BC 13 fef9 jbr L288 ! 617: 599 0000F2BF L287: ! 618: 600 0000F2BF # } /* end of subtest 4 */ ! 619: 601 0000F2BF 40 ret#2 ! 620: 602 0000F2C0 .set L282,0x0 ! 621: 603 0000F2C0 L284: ! 622: 604 0000F2C0 13 fee2 jbr L285 ! 623: 605 0000F2C3 .data ! 624: 606 00000d1c * .text ! 625: 607 0000F2C3 00 .align 1 ! 626: 608 0000F2C4 .globl _mulf_5 ! 627: 609 0000F2C4 _mulf_5: ! 628: 610 0000F2C4 0000 .word L298 ! 629: 611 0000F2C6 # ! 630: 612 0000F2C6 # ! 631: 613 0000F2C6 # ! 632: 614 0000F2C6 # /************************************************************************ ! 633: 615 0000F2C6 # * ! 634: 616 0000F2C6 # * SUBTEST 5 - Wait 1 NOP before storing the results ! 635: 617 0000F2C6 # * ! 636: 618 0000F2C6 # ************************************************************************/ ! 637: 619 0000F2C6 # mulf_5() ! 638: 620 0000F2C6 # { ! 639: 621 0000F2C6 13 011a jbr L300 ! 640: 622 0000F2C9 L301: ! 641: 623 0000F2C9 # force_loop = FALSE; ! 642: 624 0000F2C9 4d effffffafd clrl _force_loop ! 643: 625 0000F2CF # subtest = 5; ! 644: 626 0000F2CF 0d 05 effffffaf6 movl $5,_subtest ! 645: 627 0000F2D6 # for( index = 0; index < max_mulf_1_index; index++ ) { ! 646: 628 0000F2D6 4d effffffaf0 clrl _index ! 647: 629 0000F2DC L304: ! 648: 630 0000F2DC 1d effffffaea effffffae5 cmpl _index,_max_mulf_1_index ! 649: 631 0000F2E7 91 03 13 00f6 jgeq L303 ! 650: 632 0000F2EC # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 651: 633 0000F2EC 5c 0c effffffad9 50 mull3 $12,_index,r0 ! 652: 634 0000F2F4 0d e000000000 effffffacd movl _mulf_1_data(r0),_sgl_ld_acc ! 653: 635 0000F2FF # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 654: 636 0000F2FF 5c 0c effffffac6 50 mull3 $12,_index,r0 ! 655: 637 0000F307 0d e000000004 effffffaba movl _mulf_1_data+4(r0),_sgl_value_1 ! 656: 638 0000F312 # sgl_expected = mulf_1_data[index].exp; /* get expected result */ ! 657: 639 0000F312 5c 0c effffffab3 50 mull3 $12,_index,r0 ! 658: 640 0000F31A 0d e000000008 effffffaa7 movl _mulf_1_data+8(r0),_sgl_expected ! 659: 641 0000F325 # /* ! 660: 642 0000F325 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 661: 643 0000F325 # * The force loop flag is set after the first error. ! 662: 644 0000F325 # */ ! 663: 645 0000F325 # asm("_mulf_5_lp1:"); ! 664: 646 0000F325 _mulf_5_lp1: ! 665: 647 0000F325 # asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 666: 648 0000F325 06 effffffaa1 ldf _sgl_ld_acc ! 667: 649 0000F32B # asm("nop"); /* delay */ ! 668: 650 0000F32B 10 nop ! 669: 651 0000F32C # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */ ! 670: 652 0000F32C e6 effffffa9a mulf _sgl_value_1 ! 671: 653 0000F332 # asm("nop"); /* delay before storing */ ! 672: 654 0000F332 10 nop ! 673: 655 0000F333 # asm("stf _sgl_st_acc"); /* store the result */ ! 674: 656 0000F333 26 effffffa93 stf _sgl_st_acc ! 675: 657 0000F339 # if( force_loop ) ! 676: 658 0000F339 5d effffffa8d tstl _force_loop ! 677: 659 0000F33F 31 02 jeql L305 ! 678: 660 0000F341 # asm("brb _mulf_5_lp1");; /* loop on the error */ ! 679: 661 0000F341 11 e2 brb _mulf_5_lp1 ! 680: 662 0000F343 L305: ! 681: 663 0000F343 # /* ! 682: 664 0000F343 # * end error loop - test the results ! 683: 665 0000F343 # */ ! 684: 666 0000F343 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 685: 667 0000F343 1d effffffa83 effffffa7e cmpl _sgl_st_acc,_sgl_expected ! 686: 668 0000F34E 21 03 13 0086 jeql L306 ! 687: 669 0000F353 # errcnt++; /* bump the error count */ ! 688: 670 0000F353 6d effffffa73 incl _errcnt ! 689: 671 0000F359 # if( prt_error ) { ! 690: 672 0000F359 5d effffffa6d tstl _prt_error ! 691: 673 0000F35F 31 55 jeql L307 ! 692: 674 0000F361 # writes(" \n"); /* start a new print line */ ! 693: 675 0000F361 .data 1 ! 694: 676 00000e3b * L308: ! 695: 677 00000e3b * 200A00 .ascii " \12\0" ! 696: 678 00000e3e * .text ! 697: 679 0000F361 dd 8f00000e3b pushl $L308 ! 698: 680 0000F367 fe 08 effffffa5e callf $8,_writes ! 699: 681 0000F36E # writes("cycle: "); ! 700: 682 0000F36E .data 1 ! 701: 683 00000e3e * L309: ! 702: 684 00000e3e * 6379636C653A2000 .ascii "cycle: \0" ! 703: 685 00000e46 * .text ! 704: 686 0000F36E dd 8f00000e3e pushl $L309 ! 705: 687 0000F374 fe 08 effffffa51 callf $8,_writes ! 706: 688 0000F37B # writed( cycle ); ! 707: 689 0000F37B dd effffffa4b pushl _cycle ! 708: 690 0000F381 fe 08 effffffa44 callf $8,_writed ! 709: 691 0000F388 # writes(" MULF test "); ! 710: 692 0000F388 .data 1 ! 711: 693 00000e46 * L310: ! 712: 694 00000e46 * 20204D554C462074657374200 .ascii " MULF test \0" ! 713: 0 ! 714: 695 00000e53 * .text ! 715: 696 0000F388 dd 8f00000e46 pushl $L310 ! 716: 697 0000F38E fe 08 effffffa37 callf $8,_writes ! 717: 698 0000F395 # writed( test_no ); ! 718: 699 0000F395 dd effffffa31 pushl _test_no ! 719: 700 0000F39B fe 08 effffffa2a callf $8,_writed ! 720: 701 0000F3A2 # writes(", subtest 5 (Cache Data - 1 NOPs) - BAD FINAL ACC\n"); ! 721: 702 0000F3A2 .data 1 ! 722: 703 00000e53 * L311: ! 723: 704 00000e53 * 2C20737562746573742035202 .ascii ", subtest 5 (Cache Data - 1 NOPs) - BAD FINAL ACC\12\0" ! 724: 843616368652044617461202D ! 725: 2031204E4F507329202D20424 ! 726: 1442046494E414C204143430A ! 727: 00 ! 728: 705 00000e86 * .text ! 729: 706 0000F3A2 dd 8f00000e53 pushl $L311 ! 730: 707 0000F3A8 fe 08 effffffa1d callf $8,_writes ! 731: 708 0000F3AF # print_mulf_data(); ! 732: 709 0000F3AF fe 04 ef000005da callf $4,_print_mulf_data ! 733: 710 0000F3B6 # } ! 734: 711 0000F3B6 # if( halt_flg ) ! 735: 712 0000F3B6 L307: ! 736: 713 0000F3B6 5d effffffa10 tstl _halt_flg ! 737: 714 0000F3BC 31 09 jeql L312 ! 738: 715 0000F3BE # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 739: 716 0000F3BE dd 01 pushl $1 ! 740: 717 0000F3C0 fe 08 ef00000667 callf $8,_mulf_er_halt ! 741: 718 0000F3C7 # if( loop_on_err ) { ! 742: 719 0000F3C7 L312: ! 743: 720 0000F3C7 5d effffff9ff tstl _loop_on_err ! 744: 721 0000F3CD 31 0a jeql L313 ! 745: 722 0000F3CF # force_loop = TRUE; /* set the force loop flag */ ! 746: 723 0000F3CF 0d 01 effffff9f6 movl $1,_force_loop ! 747: 724 0000F3D6 # asm("brw _mulf_5_lp1");; /* and loop on the error */ ! 748: 725 0000F3D6 13 ff4c brw _mulf_5_lp1 ! 749: 726 0000F3D9 # } /* end of loop on error */ ! 750: 727 0000F3D9 # } /* end of compare error */ ! 751: 728 0000F3D9 L313: ! 752: 729 0000F3D9 # } /* end of WHILE loop */ ! 753: 730 0000F3D9 L306: ! 754: 731 0000F3D9 L302: ! 755: 732 0000F3D9 6d effffff9ed incl _index ! 756: 733 0000F3DF 13 fefa jbr L304 ! 757: 734 0000F3E2 L303: ! 758: 735 0000F3E2 # } /* end of subtest 5 */ ! 759: 736 0000F3E2 40 ret#2 ! 760: 737 0000F3E3 .set L298,0x0 ! 761: 738 0000F3E3 L300: ! 762: 739 0000F3E3 13 fee3 jbr L301 ! 763: 740 0000F3E6 .data ! 764: 741 00000d1c * .text ! 765: 742 0000F3E6 .align 1 ! 766: 743 0000F3E6 .globl _mulf_6 ! 767: 744 0000F3E6 _mulf_6: ! 768: 745 0000F3E6 0000 .word L314 ! 769: 746 0000F3E8 # ! 770: 747 0000F3E8 # ! 771: 748 0000F3E8 # ! 772: 749 0000F3E8 # /************************************************************************ ! 773: 750 0000F3E8 # * ! 774: 751 0000F3E8 # * SUBTEST 6 - Check for register corruption ! 775: 752 0000F3E8 # * ! 776: 753 0000F3E8 # ************************************************************************/ ! 777: 754 0000F3E8 # mulf_6() ! 778: 755 0000F3E8 # { ! 779: 756 0000F3E8 13 01a7 jbr L316 ! 780: 757 0000F3EB L317: ! 781: 758 0000F3EB # force_loop = FALSE; /* clear force_loop flg */ ! 782: 759 0000F3EB 4d effffff9db clrl _force_loop ! 783: 760 0000F3F1 # subtest = 6; ! 784: 761 0000F3F1 0d 06 effffff9d4 movl $6,_subtest ! 785: 762 0000F3F8 # fill_reg_buf( load_regs ); /* get patterns for regs */ ! 786: 763 0000F3F8 dd 8f00000000 pushl $_load_regs ! 787: 764 0000F3FE fe 08 effffff9c7 callf $8,_fill_reg_buf ! 788: 765 0000F405 # index = 0; ! 789: 766 0000F405 4d effffff9c1 clrl _index ! 790: 767 0000F40B # sgl_ld_acc = mulf_1_data[0].op_1; /* get operand 1 */ ! 791: 768 0000F40B 0d effffff9bb effffff9b6 movl _mulf_1_data,_sgl_ld_acc ! 792: 769 0000F416 # sgl_value_1 = mulf_1_data[0].op_2; /* get operand 2 */ ! 793: 770 0000F416 0d effffff9b4 effffff9ab movl _mulf_1_data+4,_sgl_value_1 ! 794: 771 0000F421 # sgl_expected = mulf_1_data[0].exp; /* get expected result */ ! 795: 772 0000F421 0d effffff9ad effffff9a0 movl _mulf_1_data+8,_sgl_expected ! 796: 773 0000F42C # /* ! 797: 774 0000F42C # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 798: 775 0000F42C # * The force loop flag is set after the first error. ! 799: 776 0000F42C # */ ! 800: 777 0000F42C # asm("_mulf_6_lp1:"); ! 801: 778 0000F42C _mulf_6_lp1: ! 802: 779 0000F42C # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */ ! 803: 780 0000F42C 06 effffff99a ldf _sgl_ld_acc ! 804: 781 0000F432 # asm("nop"); ! 805: 782 0000F432 10 nop ! 806: 783 0000F433 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */ ! 807: 784 0000F433 ab 891fff effffff990 loadr $0x1fff,_load_regs ! 808: 785 0000F43C # asm("nop"); ! 809: 786 0000F43C 10 nop ! 810: 787 0000F43D # asm("mulf _sgl_value_1"); /* do the multiply */ ! 811: 788 0000F43D e6 effffff989 mulf _sgl_value_1 ! 812: 789 0000F443 # asm("nop"); ! 813: 790 0000F443 10 nop ! 814: 791 0000F444 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */ ! 815: 792 0000F444 bb 891fff effffff97f storer $0x1fff,_store_regs ! 816: 793 0000F44D # asm("stf _sgl_st_acc"); /* save the accumulator */ ! 817: 794 0000F44D 26 effffff979 stf _sgl_st_acc ! 818: 795 0000F453 # if( force_loop ) ! 819: 796 0000F453 5d effffff973 tstl _force_loop ! 820: 797 0000F459 31 02 jeql L319 ! 821: 798 0000F45B # asm("brb _mulf_6_lp1");; /* loop on the error */ ! 822: 799 0000F45B 11 cf brb _mulf_6_lp1 ! 823: 800 0000F45D L319: ! 824: 801 0000F45D # /* ! 825: 802 0000F45D # * Now compare the stored register values to those that were loaded ! 826: 803 0000F45D # */ ! 827: 804 0000F45D # index2 = 0; ! 828: 805 0000F45D 4d effffff969 clrl _index2 ! 829: 806 0000F463 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) ) ! 830: 807 0000F463 L320: ! 831: 808 0000F463 0d effffff963 50 movl _index2,r0 ! 832: 809 0000F46A 0d effffff95c 51 movl _index2,r1 ! 833: 810 0000F471 1d 40effffff954 cmpl _load_regs[r0],_store_regs[r1] ! 834: 41effffff94e ! 835: 811 0000F47E 21 11 jneq L321 ! 836: 812 0000F480 1d effffff946 0d cmpl _index2,$13 ! 837: 813 0000F487 81 08 jgeq L321 ! 838: 814 0000F489 # index2++; /* check reg values */ ! 839: 815 0000F489 6d effffff93d incl _index2 ! 840: 816 0000F48F 11 d2 jbr L320 ! 841: 817 0000F491 L321: ! 842: 818 0000F491 # if( index2 < 13 ) { /* error if index2 < 13 */ ! 843: 819 0000F491 1d effffff935 0d cmpl _index2,$13 ! 844: 820 0000F498 91 03 13 00f4 jgeq L322 ! 845: 821 0000F49D # errcnt++; /* bump the error count */ ! 846: 822 0000F49D 6d effffff929 incl _errcnt ! 847: 823 0000F4A3 # if( prt_error ) { ! 848: 824 0000F4A3 5d effffff923 tstl _prt_error ! 849: 825 0000F4A9 21 03 13 00c0 jeql L323 ! 850: 826 0000F4AE # writes(" \n"); /* start a new print line */ ! 851: 827 0000F4AE .data 1 ! 852: 828 00000e86 * L324: ! 853: 829 00000e86 * 200A00 .ascii " \12\0" ! 854: 830 00000e89 * .text ! 855: 831 0000F4AE dd 8f00000e86 pushl $L324 ! 856: 832 0000F4B4 fe 08 effffff911 callf $8,_writes ! 857: 833 0000F4BB # writes("cycle: "); ! 858: 834 0000F4BB .data 1 ! 859: 835 00000e89 * L325: ! 860: 836 00000e89 * 6379636C653A2000 .ascii "cycle: \0" ! 861: 837 00000e91 * .text ! 862: 838 0000F4BB dd 8f00000e89 pushl $L325 ! 863: 839 0000F4C1 fe 08 effffff904 callf $8,_writes ! 864: 840 0000F4C8 # writed( cycle ); ! 865: 841 0000F4C8 dd effffff8fe pushl _cycle ! 866: 842 0000F4CE fe 08 effffff8f7 callf $8,_writed ! 867: 843 0000F4D5 # writes(" MULF test "); ! 868: 844 0000F4D5 .data 1 ! 869: 845 00000e91 * L326: ! 870: 846 00000e91 * 20204D554C462074657374200 .ascii " MULF test \0" ! 871: 0 ! 872: 847 00000e9e * .text ! 873: 848 0000F4D5 dd 8f00000e91 pushl $L326 ! 874: 849 0000F4DB fe 08 effffff8ea callf $8,_writes ! 875: 850 0000F4E2 # writed( test_no ); ! 876: 851 0000F4E2 dd effffff8e4 pushl _test_no ! 877: 852 0000F4E8 fe 08 effffff8dd callf $8,_writed ! 878: 853 0000F4EF # writes(", subtest 6 - A REGISTER WAS MODIFIED\n"); ! 879: 854 0000F4EF .data 1 ! 880: 855 00000e9e * L327: ! 881: 856 00000e9e * 2C20737562746573742036202 .ascii ", subtest 6 - A REGISTER WAS MODIFIED\12\0" ! 882: D204120524547495354455220 ! 883: 574153204D4F4449464945440 ! 884: A00 ! 885: 857 00000ec5 * .text ! 886: 858 0000F4EF dd 8f00000e9e pushl $L327 ! 887: 859 0000F4F5 fe 08 effffff8d0 callf $8,_writes ! 888: 860 0000F4FC # print_mulf_data(); /* print the operands */ ! 889: 861 0000F4FC fe 04 ef0000048d callf $4,_print_mulf_data ! 890: 862 0000F503 # writes("register "); /* print the information */ ! 891: 863 0000F503 .data 1 ! 892: 864 00000ec5 * L328: ! 893: 865 00000ec5 * 72656769737465722000 .ascii "register \0" ! 894: 866 00000ecf * .text ! 895: 867 0000F503 dd 8f00000ec5 pushl $L328 ! 896: 868 0000F509 fe 08 effffff8bc callf $8,_writes ! 897: 869 0000F510 # writed( index2 ); /* about the corrupted */ ! 898: 870 0000F510 dd effffff8b6 pushl _index2 ! 899: 871 0000F516 fe 08 effffff8af callf $8,_writed ! 900: 872 0000F51D # writes(" = "); /* register */ ! 901: 873 0000F51D .data 1 ! 902: 874 00000ecf * L329: ! 903: 875 00000ecf * 203D2000 .ascii " = \0" ! 904: 876 00000ed3 * .text ! 905: 877 0000F51D dd 8f00000ecf pushl $L329 ! 906: 878 0000F523 fe 08 effffff8a2 callf $8,_writes ! 907: 879 0000F52A # write32h( store_regs[index2] ); ! 908: 880 0000F52A 0d effffff89c 50 movl _index2,r0 ! 909: 881 0000F531 dd 40effffff894 pushl _store_regs[r0] ! 910: 882 0000F538 fe 08 effffff88d callf $8,_write32h ! 911: 883 0000F53F # writes(", should be = "); ! 912: 884 0000F53F .data 1 ! 913: 885 00000ed3 * L331: ! 914: 886 00000ed3 * 2C202073686F756C642062652 .ascii ", should be = \0" ! 915: 03D2000 ! 916: 887 00000ee3 * .text ! 917: 888 0000F53F dd 8f00000ed3 pushl $L331 ! 918: 889 0000F545 fe 08 effffff880 callf $8,_writes ! 919: 890 0000F54C # write32h( load_regs[index2] ); ! 920: 891 0000F54C 0d effffff87a 50 movl _index2,r0 ! 921: 892 0000F553 dd 40effffff872 pushl _load_regs[r0] ! 922: 893 0000F55A fe 08 effffff86b callf $8,_write32h ! 923: 894 0000F561 # writes("\n"); ! 924: 895 0000F561 .data 1 ! 925: 896 00000ee3 * L332: ! 926: 897 00000ee3 * 0A00 .ascii "\12\0" ! 927: 898 00000ee5 * .text ! 928: 899 0000F561 dd 8f00000ee3 pushl $L332 ! 929: 900 0000F567 fe 08 effffff85e callf $8,_writes ! 930: 901 0000F56E # } ! 931: 902 0000F56E # if( halt_flg ) ! 932: 903 0000F56E L323: ! 933: 904 0000F56E 5d effffff858 tstl _halt_flg ! 934: 905 0000F574 31 09 jeql L333 ! 935: 906 0000F576 # mulf_er_halt( BAD_REG_HLT ); /* halt on the error */ ! 936: 907 0000F576 dd 02 pushl $2 ! 937: 908 0000F578 fe 08 ef000004af callf $8,_mulf_er_halt ! 938: 909 0000F57F # if( loop_on_err ) { ! 939: 910 0000F57F L333: ! 940: 911 0000F57F 5d effffff847 tstl _loop_on_err ! 941: 912 0000F585 31 0a jeql L334 ! 942: 913 0000F587 # force_loop = TRUE; /* set the force loop flag */ ! 943: 914 0000F587 0d 01 effffff83e movl $1,_force_loop ! 944: 915 0000F58E # asm("brw _mulf_6_lp1");; /* and loop on the error */ ! 945: 916 0000F58E 13 fe9b brw _mulf_6_lp1 ! 946: 917 0000F591 # } /* end of loop on error */ ! 947: 918 0000F591 # } /* end of register corruption error */ ! 948: 919 0000F591 L334: ! 949: 920 0000F591 # } /* end of subtest 6 */ ! 950: 921 0000F591 L322: ! 951: 922 0000F591 40 ret#2 ! 952: 923 0000F592 .set L314,0x0 ! 953: 924 0000F592 L316: ! 954: 925 0000F592 13 fe56 jbr L317 ! 955: 926 0000F595 .data ! 956: 927 00000d1c * .text ! 957: 928 0000F595 00 .align 1 ! 958: 929 0000F596 .globl _mulf_7 ! 959: 930 0000F596 _mulf_7: ! 960: 931 0000F596 0000 .word L335 ! 961: 932 0000F598 # ! 962: 933 0000F598 # ! 963: 934 0000F598 # ! 964: 935 0000F598 # /************************************************************************ ! 965: 936 0000F598 # * ! 966: 937 0000F598 # * SUBTEST 7 - Check for PSL corruption ! 967: 938 0000F598 # * ! 968: 939 0000F598 # ************************************************************************/ ! 969: 940 0000F598 # mulf_7() ! 970: 941 0000F598 # { ! 971: 942 0000F598 13 01a6 jbr L337 ! 972: 943 0000F59B L338: ! 973: 944 0000F59B # force_loop = FALSE; /* clear force_loop flg */ ! 974: 945 0000F59B 4d effffff82b clrl _force_loop ! 975: 946 0000F5A1 # subtest = 7; ! 976: 947 0000F5A1 0d 07 effffff824 movl $7,_subtest ! 977: 948 0000F5A8 # fill_reg_buf( load_regs ); /* get patterns for regs */ ! 978: 949 0000F5A8 dd 8f00000000 pushl $_load_regs ! 979: 950 0000F5AE fe 08 effffff817 callf $8,_fill_reg_buf ! 980: 951 0000F5B5 # for( index = 0; index < 3; index++ ) { ! 981: 952 0000F5B5 4d effffff811 clrl _index ! 982: 953 0000F5BB L341: ! 983: 954 0000F5BB 1d effffff80b 03 cmpl _index,$3 ! 984: 955 0000F5C2 91 03 13 0179 jgeq L340 ! 985: 956 0000F5C7 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 986: 957 0000F5C7 5c 0c effffff7fe 50 mull3 $12,_index,r0 ! 987: 958 0000F5CF 0d e000000000 effffff7f2 movl _mulf_1_data(r0),_sgl_ld_acc ! 988: 959 0000F5DA # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 989: 960 0000F5DA 5c 0c effffff7eb 50 mull3 $12,_index,r0 ! 990: 961 0000F5E2 0d e000000004 effffff7df movl _mulf_1_data+4(r0),_sgl_value_1 ! 991: 962 0000F5ED # sgl_expected = mulf_1_data[index].exp; /* get expected */ ! 992: 963 0000F5ED 5c 0c effffff7d8 50 mull3 $12,_index,r0 ! 993: 964 0000F5F5 0d e000000008 effffff7cc movl _mulf_1_data+8(r0),_sgl_expected ! 994: 965 0000F600 # sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */ ! 995: 966 0000F600 0d effffff7c6 50 movl _status_index,r0 ! 996: 967 0000F607 0d 40effffff7be movl _status_array[r0],_sgl_dummy1 ! 997: effffff7b9 ! 998: 968 0000F613 # /* ! 999: 969 0000F613 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 1000: 970 0000F613 # * The force loop flag is set after the first error. ! 1001: 971 0000F613 # */ ! 1002: 972 0000F613 # asm("_mulf_7_lp1:"); ! 1003: 973 0000F613 _mulf_7_lp1: ! 1004: 974 0000F613 # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */ ! 1005: 975 0000F613 06 effffff7b3 ldf _sgl_ld_acc ! 1006: 976 0000F619 # asm("nop"); ! 1007: 977 0000F619 10 nop ! 1008: 978 0000F61A # asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 1009: 979 0000F61A 5d effffff7ac tstl _sgl_dummy1 ! 1010: 980 0000F620 # asm("movpsl _init_psl"); /* save the initial PSL */ ! 1011: 981 0000F620 cd effffff7a6 movpsl _init_psl ! 1012: 982 0000F626 # asm("mulf _sgl_value_1"); /* do the multiply */ ! 1013: 983 0000F626 e6 effffff7a0 mulf _sgl_value_1 ! 1014: 984 0000F62C # asm("nop"); ! 1015: 985 0000F62C 10 nop ! 1016: 986 0000F62D # asm("movpsl _psl_val"); /* save the final PSL */ ! 1017: 987 0000F62D cd effffff799 movpsl _psl_val ! 1018: 988 0000F633 # asm("stf _sgl_st_acc"); /* save the accumulator */ ! 1019: 989 0000F633 26 effffff793 stf _sgl_st_acc ! 1020: 990 0000F639 # if( force_loop ) ! 1021: 991 0000F639 5d effffff78d tstl _force_loop ! 1022: 992 0000F63F 31 02 jeql L342 ! 1023: 993 0000F641 # asm("brb _mulf_7_lp1");; /* loop on the error */ ! 1024: 994 0000F641 11 d0 brb _mulf_7_lp1 ! 1025: 995 0000F643 L342: ! 1026: 996 0000F643 # /* ! 1027: 997 0000F643 # * Now compare the final PSL to the initial PSL -they should be the same ! 1028: 998 0000F643 # */ ! 1029: 999 0000F643 # if( psl_val != init_psl ) { ! 1030: 1000 0000F643 1d effffff783 effffff77e cmpl _psl_val,_init_psl ! 1031: 1001 0000F64E 21 03 13 00e4 jeql L343 ! 1032: 1002 0000F653 # errcnt++; /* bump the error count */ ! 1033: 1003 0000F653 6d effffff773 incl _errcnt ! 1034: 1004 0000F659 # if( prt_error ) { ! 1035: 1005 0000F659 5d effffff76d tstl _prt_error ! 1036: 1006 0000F65F 21 03 13 00b0 jeql L344 ! 1037: 1007 0000F664 # writes(" \n"); /* start a new print line */ ! 1038: 1008 0000F664 .data 1 ! 1039: 1009 00000ee5 * L345: ! 1040: 1010 00000ee5 * 200A00 .ascii " \12\0" ! 1041: 1011 00000ee8 * .text ! 1042: 1012 0000F664 dd 8f00000ee5 pushl $L345 ! 1043: 1013 0000F66A fe 08 effffff75b callf $8,_writes ! 1044: 1014 0000F671 # writes("cycle: "); ! 1045: 1015 0000F671 .data 1 ! 1046: 1016 00000ee8 * L346: ! 1047: 1017 00000ee8 * 6379636C653A2000 .ascii "cycle: \0" ! 1048: 1018 00000ef0 * .text ! 1049: 1019 0000F671 dd 8f00000ee8 pushl $L346 ! 1050: 1020 0000F677 fe 08 effffff74e callf $8,_writes ! 1051: 1021 0000F67E # writed( cycle ); ! 1052: 1022 0000F67E dd effffff748 pushl _cycle ! 1053: 1023 0000F684 fe 08 effffff741 callf $8,_writed ! 1054: 1024 0000F68B # writes(" MULF test "); ! 1055: 1025 0000F68B .data 1 ! 1056: 1026 00000ef0 * L347: ! 1057: 1027 00000ef0 * 20204D554C462074657374200 .ascii " MULF test \0" ! 1058: 0 ! 1059: 1028 00000efd * .text ! 1060: 1029 0000F68B dd 8f00000ef0 pushl $L347 ! 1061: 1030 0000F691 fe 08 effffff734 callf $8,_writes ! 1062: 1031 0000F698 # writed( test_no ); ! 1063: 1032 0000F698 dd effffff72e pushl _test_no ! 1064: 1033 0000F69E fe 08 effffff727 callf $8,_writed ! 1065: 1034 0000F6A5 # writes(", subtest 7 - INCORRECT FINAL PSL\n"); ! 1066: 1035 0000F6A5 .data 1 ! 1067: 1036 00000efd * L348: ! 1068: 1037 00000efd * 2C20737562746573742037202 .ascii ", subtest 7 - INCORRECT FINAL PSL\12\0" ! 1069: D20494E434F52524543542046 ! 1070: 494E414C2050534C0A00 ! 1071: 1038 00000f20 * .text ! 1072: 1039 0000F6A5 dd 8f00000efd pushl $L348 ! 1073: 1040 0000F6AB fe 08 effffff71a callf $8,_writes ! 1074: 1041 0000F6B2 # print_mulf_data(); /* print the operands */ ! 1075: 1042 0000F6B2 fe 04 ef000002d7 callf $4,_print_mulf_data ! 1076: 1043 0000F6B9 # writes("initial PSL = "); ! 1077: 1044 0000F6B9 .data 1 ! 1078: 1045 00000f20 * L349: ! 1079: 1046 00000f20 * 696E697469616C2050534C203 .ascii "initial PSL = \0" ! 1080: D2000 ! 1081: 1047 00000f2f * .text ! 1082: 1048 0000F6B9 dd 8f00000f20 pushl $L349 ! 1083: 1049 0000F6BF fe 08 effffff706 callf $8,_writes ! 1084: 1050 0000F6C6 # write32h( init_psl ); ! 1085: 1051 0000F6C6 dd effffff700 pushl _init_psl ! 1086: 1052 0000F6CC fe 08 effffff6f9 callf $8,_write32h ! 1087: 1053 0000F6D3 # writes(", final PSL = "); ! 1088: 1054 0000F6D3 .data 1 ! 1089: 1055 00000f2f * L350: ! 1090: 1056 00000f2f * 2C2066696E616C2050534C203 .ascii ", final PSL = \0" ! 1091: D2000 ! 1092: 1057 00000f3e * .text ! 1093: 1058 0000F6D3 dd 8f00000f2f pushl $L350 ! 1094: 1059 0000F6D9 fe 08 effffff6ec callf $8,_writes ! 1095: 1060 0000F6E0 # write32h( psl_val ); ! 1096: 1061 0000F6E0 dd effffff6e6 pushl _psl_val ! 1097: 1062 0000F6E6 fe 08 effffff6df callf $8,_write32h ! 1098: 1063 0000F6ED # writes(", expected PSL = "); ! 1099: 1064 0000F6ED .data 1 ! 1100: 1065 00000f3e * L351: ! 1101: 1066 00000f3e * 2C20657870656374656420505 .ascii ", expected PSL = \0" ! 1102: 34C203D2000 ! 1103: 1067 00000f50 * .text ! 1104: 1068 0000F6ED dd 8f00000f3e pushl $L351 ! 1105: 1069 0000F6F3 fe 08 effffff6d2 callf $8,_writes ! 1106: 1070 0000F6FA # write32h( exp_psl ); ! 1107: 1071 0000F6FA dd effffff6cc pushl _exp_psl ! 1108: 1072 0000F700 fe 08 effffff6c5 callf $8,_write32h ! 1109: 1073 0000F707 # writes("\n"); ! 1110: 1074 0000F707 .data 1 ! 1111: 1075 00000f50 * L352: ! 1112: 1076 00000f50 * 0A00 .ascii "\12\0" ! 1113: 1077 00000f52 * .text ! 1114: 1078 0000F707 dd 8f00000f50 pushl $L352 ! 1115: 1079 0000F70D fe 08 effffff6b8 callf $8,_writes ! 1116: 1080 0000F714 # } ! 1117: 1081 0000F714 # if( halt_flg ) ! 1118: 1082 0000F714 L344: ! 1119: 1083 0000F714 5d effffff6b2 tstl _halt_flg ! 1120: 1084 0000F71A 31 09 jeql L353 ! 1121: 1085 0000F71C # mulf_er_halt( BAD_PSL_HLT ); /* halt on the error */ ! 1122: 1086 0000F71C dd 03 pushl $3 ! 1123: 1087 0000F71E fe 08 ef00000309 callf $8,_mulf_er_halt ! 1124: 1088 0000F725 # if( loop_on_err ) { ! 1125: 1089 0000F725 L353: ! 1126: 1090 0000F725 5d effffff6a1 tstl _loop_on_err ! 1127: 1091 0000F72B 31 0a jeql L354 ! 1128: 1092 0000F72D # force_loop = TRUE; /* set the force loop flag */ ! 1129: 1093 0000F72D 0d 01 effffff698 movl $1,_force_loop ! 1130: 1094 0000F734 # asm("brw _mulf_7_lp1");; /* and loop on the error */ ! 1131: 1095 0000F734 13 fedc brw _mulf_7_lp1 ! 1132: 1096 0000F737 # } /* end of loop on error */ ! 1133: 1097 0000F737 # } /* end of PSL corruption error */ ! 1134: 1098 0000F737 L354: ! 1135: 1099 0000F737 # } /* end of WHILE loop */ ! 1136: 1100 0000F737 L343: ! 1137: 1101 0000F737 L339: ! 1138: 1102 0000F737 6d effffff68f incl _index ! 1139: 1103 0000F73D 13 fe7b jbr L341 ! 1140: 1104 0000F740 L340: ! 1141: 1105 0000F740 # } /* end of subtest 7 */ ! 1142: 1106 0000F740 40 ret#2 ! 1143: 1107 0000F741 .set L335,0x0 ! 1144: 1108 0000F741 L337: ! 1145: 1109 0000F741 13 fe57 jbr L338 ! 1146: 1110 0000F744 .data ! 1147: 1111 00000d1c * .text ! 1148: 1112 0000F744 .align 1 ! 1149: 1113 0000F744 .globl _mulf_8 ! 1150: 1114 0000F744 _mulf_8: ! 1151: 1115 0000F744 0000 .word L355 ! 1152: 1116 0000F746 # ! 1153: 1117 0000F746 # ! 1154: 1118 0000F746 # ! 1155: 1119 0000F746 # /************************************************************************ ! 1156: 1120 0000F746 # * ! 1157: 1121 0000F746 # * SUBTEST 8 - pipelined entry test ! 1158: 1122 0000F746 # * ! 1159: 1123 0000F746 # ************************************************************************/ ! 1160: 1124 0000F746 # mulf_8() ! 1161: 1125 0000F746 # { ! 1162: 1126 0000F746 13 011d jbr L357 ! 1163: 1127 0000F749 L358: ! 1164: 1128 0000F749 # force_loop = FALSE; ! 1165: 1129 0000F749 4d effffff67d clrl _force_loop ! 1166: 1130 0000F74F # subtest = 8; ! 1167: 1131 0000F74F 0d 08 effffff676 movl $8,_subtest ! 1168: 1132 0000F756 # for( index = 0; index < max_mulf_1_index; index++ ) { ! 1169: 1133 0000F756 4d effffff670 clrl _index ! 1170: 1134 0000F75C L361: ! 1171: 1135 0000F75C 1d effffff66a effffff665 cmpl _index,_max_mulf_1_index ! 1172: 1136 0000F767 91 03 13 00f9 jgeq L360 ! 1173: 1137 0000F76C # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 1174: 1138 0000F76C 5c 0c effffff659 50 mull3 $12,_index,r0 ! 1175: 1139 0000F774 0d e000000000 effffff64d movl _mulf_1_data(r0),_sgl_ld_acc ! 1176: 1140 0000F77F # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 1177: 1141 0000F77F 5c 0c effffff646 50 mull3 $12,_index,r0 ! 1178: 1142 0000F787 0d e000000004 effffff63a movl _mulf_1_data+4(r0),_sgl_value_1 ! 1179: 1143 0000F792 # sgl_expected = mulf_1_data[index].exp; /* get expected result */ ! 1180: 1144 0000F792 5c 0c effffff633 50 mull3 $12,_index,r0 ! 1181: 1145 0000F79A 0d e000000008 effffff627 movl _mulf_1_data+8(r0),_sgl_expected ! 1182: 1146 0000F7A5 # /* ! 1183: 1147 0000F7A5 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 1184: 1148 0000F7A5 # * The force loop flag is set after the first error. ! 1185: 1149 0000F7A5 # */ ! 1186: 1150 0000F7A5 # asm("_mulf_8_lp1:"); ! 1187: 1151 0000F7A5 _mulf_8_lp1: ! 1188: 1152 0000F7A5 # asm("movl $0,r0"); /* clear r0 */ ! 1189: 1153 0000F7A5 0d 00 50 movl $0,r0 ! 1190: 1154 0000F7A8 # asm("ldf r0"); /* load the Acc. with 0.0 */ ! 1191: 1155 0000F7A8 06 50 ldf r0 ! 1192: 1156 0000F7AA # asm("addf _sgl_ld_acc"); /* add the 1st operand */ ! 1193: 1157 0000F7AA c6 effffff61c addf _sgl_ld_acc ! 1194: 1158 0000F7B0 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */ ! 1195: 1159 0000F7B0 e6 effffff616 mulf _sgl_value_1 ! 1196: 1160 0000F7B6 # asm("stf _sgl_st_acc"); /* store the result */ ! 1197: 1161 0000F7B6 26 effffff610 stf _sgl_st_acc ! 1198: 1162 0000F7BC # if( force_loop ) ! 1199: 1163 0000F7BC 5d effffff60a tstl _force_loop ! 1200: 1164 0000F7C2 31 02 jeql L362 ! 1201: 1165 0000F7C4 # asm("brb _mulf_8_lp1");; /* loop on the error */ ! 1202: 1166 0000F7C4 11 df brb _mulf_8_lp1 ! 1203: 1167 0000F7C6 L362: ! 1204: 1168 0000F7C6 # /* ! 1205: 1169 0000F7C6 # * end error loop - test the results ! 1206: 1170 0000F7C6 # */ ! 1207: 1171 0000F7C6 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 1208: 1172 0000F7C6 1d effffff600 effffff5fb cmpl _sgl_st_acc,_sgl_expected ! 1209: 1173 0000F7D1 21 03 13 0086 jeql L363 ! 1210: 1174 0000F7D6 # errcnt++; /* bump the error count */ ! 1211: 1175 0000F7D6 6d effffff5f0 incl _errcnt ! 1212: 1176 0000F7DC # if( prt_error ) { ! 1213: 1177 0000F7DC 5d effffff5ea tstl _prt_error ! 1214: 1178 0000F7E2 31 55 jeql L364 ! 1215: 1179 0000F7E4 # writes(" \n"); /* start a new print line */ ! 1216: 1180 0000F7E4 .data 1 ! 1217: 1181 00000f52 * L365: ! 1218: 1182 00000f52 * 200A00 .ascii " \12\0" ! 1219: 1183 00000f55 * .text ! 1220: 1184 0000F7E4 dd 8f00000f52 pushl $L365 ! 1221: 1185 0000F7EA fe 08 effffff5db callf $8,_writes ! 1222: 1186 0000F7F1 # writes("cycle: "); ! 1223: 1187 0000F7F1 .data 1 ! 1224: 1188 00000f55 * L366: ! 1225: 1189 00000f55 * 6379636C653A2000 .ascii "cycle: \0" ! 1226: 1190 00000f5d * .text ! 1227: 1191 0000F7F1 dd 8f00000f55 pushl $L366 ! 1228: 1192 0000F7F7 fe 08 effffff5ce callf $8,_writes ! 1229: 1193 0000F7FE # writed( cycle ); ! 1230: 1194 0000F7FE dd effffff5c8 pushl _cycle ! 1231: 1195 0000F804 fe 08 effffff5c1 callf $8,_writed ! 1232: 1196 0000F80B # writes(" MULF test "); ! 1233: 1197 0000F80B .data 1 ! 1234: 1198 00000f5d * L367: ! 1235: 1199 00000f5d * 20204D554C462074657374200 .ascii " MULF test \0" ! 1236: 0 ! 1237: 1200 00000f6a * .text ! 1238: 1201 0000F80B dd 8f00000f5d pushl $L367 ! 1239: 1202 0000F811 fe 08 effffff5b4 callf $8,_writes ! 1240: 1203 0000F818 # writed( test_no ); ! 1241: 1204 0000F818 dd effffff5ae pushl _test_no ! 1242: 1205 0000F81E fe 08 effffff5a7 callf $8,_writed ! 1243: 1206 0000F825 # writes(", subtest 8 (Piped Entry) - BAD FINAL ACC\n"); ! 1244: 1207 0000F825 .data 1 ! 1245: 1208 00000f6a * L368: ! 1246: 1209 00000f6a * 2C20737562746573742038202 .ascii ", subtest 8 (Piped Entry) - BAD FINAL ACC\12\0" ! 1247: 8506970656420456E74727929 ! 1248: 202D204241442046494E414C2 ! 1249: 04143430A00 ! 1250: 1210 00000f95 * .text ! 1251: 1211 0000F825 dd 8f00000f6a pushl $L368 ! 1252: 1212 0000F82B fe 08 effffff59a callf $8,_writes ! 1253: 1213 0000F832 # print_mulf_data(); ! 1254: 1214 0000F832 fe 04 ef00000157 callf $4,_print_mulf_data ! 1255: 1215 0000F839 # } ! 1256: 1216 0000F839 # if( halt_flg ) ! 1257: 1217 0000F839 L364: ! 1258: 1218 0000F839 5d effffff58d tstl _halt_flg ! 1259: 1219 0000F83F 31 09 jeql L369 ! 1260: 1220 0000F841 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 1261: 1221 0000F841 dd 01 pushl $1 ! 1262: 1222 0000F843 fe 08 ef000001e4 callf $8,_mulf_er_halt ! 1263: 1223 0000F84A # if( loop_on_err ) { ! 1264: 1224 0000F84A L369: ! 1265: 1225 0000F84A 5d effffff57c tstl _loop_on_err ! 1266: 1226 0000F850 31 0a jeql L370 ! 1267: 1227 0000F852 # force_loop = TRUE; /* set the force loop flag */ ! 1268: 1228 0000F852 0d 01 effffff573 movl $1,_force_loop ! 1269: 1229 0000F859 # asm("brw _mulf_8_lp1");; /* and loop on the error */ ! 1270: 1230 0000F859 13 ff49 brw _mulf_8_lp1 ! 1271: 1231 0000F85C # } /* end of loop on error */ ! 1272: 1232 0000F85C # } /* end of compare error */ ! 1273: 1233 0000F85C L370: ! 1274: 1234 0000F85C # } /* end of WHILE loop */ ! 1275: 1235 0000F85C L363: ! 1276: 1236 0000F85C L359: ! 1277: 1237 0000F85C 6d effffff56a incl _index ! 1278: 1238 0000F862 13 fef7 jbr L361 ! 1279: 1239 0000F865 L360: ! 1280: 1240 0000F865 # } /* end of subtest 8 */ ! 1281: 1241 0000F865 40 ret#2 ! 1282: 1242 0000F866 .set L355,0x0 ! 1283: 1243 0000F866 L357: ! 1284: 1244 0000F866 13 fee0 jbr L358 ! 1285: 1245 0000F869 .data ! 1286: 1246 00000d1c * .text ! 1287: 1247 0000F869 00 .align 1 ! 1288: 1248 0000F86A .globl _mulf_9 ! 1289: 1249 0000F86A _mulf_9: ! 1290: 1250 0000F86A 0000 .word L371 ! 1291: 1251 0000F86C # ! 1292: 1252 0000F86C # ! 1293: 1253 0000F86C # ! 1294: 1254 0000F86C # /************************************************************************ ! 1295: 1255 0000F86C # * ! 1296: 1256 0000F86C # * SUBTEST 9 - pipelined exit test ! 1297: 1257 0000F86C # * ! 1298: 1258 0000F86C # ************************************************************************/ ! 1299: 1259 0000F86C # mulf_9() ! 1300: 1260 0000F86C # { ! 1301: 1261 0000F86C 13 011d jbr L373 ! 1302: 1262 0000F86F L374: ! 1303: 1263 0000F86F # force_loop = FALSE; ! 1304: 1264 0000F86F 4d effffff557 clrl _force_loop ! 1305: 1265 0000F875 # subtest = 9; ! 1306: 1266 0000F875 0d 09 effffff550 movl $9,_subtest ! 1307: 1267 0000F87C # for( index = 0; index < max_mulf_1_index; index++ ) { ! 1308: 1268 0000F87C 4d effffff54a clrl _index ! 1309: 1269 0000F882 L377: ! 1310: 1270 0000F882 1d effffff544 effffff53f cmpl _index,_max_mulf_1_index ! 1311: 1271 0000F88D 91 03 13 00f9 jgeq L376 ! 1312: 1272 0000F892 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */ ! 1313: 1273 0000F892 5c 0c effffff533 50 mull3 $12,_index,r0 ! 1314: 1274 0000F89A 0d e000000000 effffff527 movl _mulf_1_data(r0),_sgl_ld_acc ! 1315: 1275 0000F8A5 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */ ! 1316: 1276 0000F8A5 5c 0c effffff520 50 mull3 $12,_index,r0 ! 1317: 1277 0000F8AD 0d e000000004 effffff514 movl _mulf_1_data+4(r0),_sgl_value_1 ! 1318: 1278 0000F8B8 # sgl_expected = mulf_1_data[index].exp; /* get expected result */ ! 1319: 1279 0000F8B8 5c 0c effffff50d 50 mull3 $12,_index,r0 ! 1320: 1280 0000F8C0 0d e000000008 effffff501 movl _mulf_1_data+8(r0),_sgl_expected ! 1321: 1281 0000F8CB # /* ! 1322: 1282 0000F8CB # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 1323: 1283 0000F8CB # * The force loop flag is set after the first error. ! 1324: 1284 0000F8CB # */ ! 1325: 1285 0000F8CB # asm("_mulf_9_lp1:"); ! 1326: 1286 0000F8CB _mulf_9_lp1: ! 1327: 1287 0000F8CB # asm("movl $0,r0"); /* clear r0 */ ! 1328: 1288 0000F8CB 0d 00 50 movl $0,r0 ! 1329: 1289 0000F8CE # asm("ldf _sgl_ld_acc"); /* load the 1st operand */ ! 1330: 1290 0000F8CE 06 effffff4f8 ldf _sgl_ld_acc ! 1331: 1291 0000F8D4 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */ ! 1332: 1292 0000F8D4 e6 effffff4f2 mulf _sgl_value_1 ! 1333: 1293 0000F8DA # asm("addf r0"); /* add a 0.0 to the result */ ! 1334: 1294 0000F8DA c6 50 addf r0 ! 1335: 1295 0000F8DC # asm("stf _sgl_st_acc"); /* store the result */ ! 1336: 1296 0000F8DC 26 effffff4ea stf _sgl_st_acc ! 1337: 1297 0000F8E2 # if( force_loop ) ! 1338: 1298 0000F8E2 5d effffff4e4 tstl _force_loop ! 1339: 1299 0000F8E8 31 02 jeql L378 ! 1340: 1300 0000F8EA # asm("brb _mulf_9_lp1");; /* loop on the error */ ! 1341: 1301 0000F8EA 11 df brb _mulf_9_lp1 ! 1342: 1302 0000F8EC L378: ! 1343: 1303 0000F8EC # /* ! 1344: 1304 0000F8EC # * end error loop - test the results ! 1345: 1305 0000F8EC # */ ! 1346: 1306 0000F8EC # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 1347: 1307 0000F8EC 1d effffff4da effffff4d5 cmpl _sgl_st_acc,_sgl_expected ! 1348: 1308 0000F8F7 21 03 13 0086 jeql L379 ! 1349: 1309 0000F8FC # errcnt++; /* bump the error count */ ! 1350: 1310 0000F8FC 6d effffff4ca incl _errcnt ! 1351: 1311 0000F902 # if( prt_error ) { ! 1352: 1312 0000F902 5d effffff4c4 tstl _prt_error ! 1353: 1313 0000F908 31 55 jeql L380 ! 1354: 1314 0000F90A # writes(" \n"); /* start a new print line */ ! 1355: 1315 0000F90A .data 1 ! 1356: 1316 00000f95 * L381: ! 1357: 1317 00000f95 * 200A00 .ascii " \12\0" ! 1358: 1318 00000f98 * .text ! 1359: 1319 0000F90A dd 8f00000f95 pushl $L381 ! 1360: 1320 0000F910 fe 08 effffff4b5 callf $8,_writes ! 1361: 1321 0000F917 # writes("cycle: "); ! 1362: 1322 0000F917 .data 1 ! 1363: 1323 00000f98 * L382: ! 1364: 1324 00000f98 * 6379636C653A2000 .ascii "cycle: \0" ! 1365: 1325 00000fa0 * .text ! 1366: 1326 0000F917 dd 8f00000f98 pushl $L382 ! 1367: 1327 0000F91D fe 08 effffff4a8 callf $8,_writes ! 1368: 1328 0000F924 # writed( cycle ); ! 1369: 1329 0000F924 dd effffff4a2 pushl _cycle ! 1370: 1330 0000F92A fe 08 effffff49b callf $8,_writed ! 1371: 1331 0000F931 # writes(" MULF test "); ! 1372: 1332 0000F931 .data 1 ! 1373: 1333 00000fa0 * L383: ! 1374: 1334 00000fa0 * 20204D554C462074657374200 .ascii " MULF test \0" ! 1375: 0 ! 1376: 1335 00000fad * .text ! 1377: 1336 0000F931 dd 8f00000fa0 pushl $L383 ! 1378: 1337 0000F937 fe 08 effffff48e callf $8,_writes ! 1379: 1338 0000F93E # writed( test_no ); ! 1380: 1339 0000F93E dd effffff488 pushl _test_no ! 1381: 1340 0000F944 fe 08 effffff481 callf $8,_writed ! 1382: 1341 0000F94B # writes(", subtest 9 (Piped Exit) - BAD FINAL ACC\n"); ! 1383: 1342 0000F94B .data 1 ! 1384: 1343 00000fad * L384: ! 1385: 1344 00000fad * 2C20737562746573742039202 .ascii ", subtest 9 (Piped Exit) - BAD FINAL ACC\12\0" ! 1386: 8506970656420457869742920 ! 1387: 2D204241442046494E414C204 ! 1388: 143430A00 ! 1389: 1345 00000fd7 * .text ! 1390: 1346 0000F94B dd 8f00000fad pushl $L384 ! 1391: 1347 0000F951 fe 08 effffff474 callf $8,_writes ! 1392: 1348 0000F958 # print_mulf_data(); ! 1393: 1349 0000F958 fe 04 ef00000031 callf $4,_print_mulf_data ! 1394: 1350 0000F95F # } ! 1395: 1351 0000F95F # if( halt_flg ) ! 1396: 1352 0000F95F L380: ! 1397: 1353 0000F95F 5d effffff467 tstl _halt_flg ! 1398: 1354 0000F965 31 09 jeql L385 ! 1399: 1355 0000F967 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 1400: 1356 0000F967 dd 01 pushl $1 ! 1401: 1357 0000F969 fe 08 ef000000be callf $8,_mulf_er_halt ! 1402: 1358 0000F970 # if( loop_on_err ) { ! 1403: 1359 0000F970 L385: ! 1404: 1360 0000F970 5d effffff456 tstl _loop_on_err ! 1405: 1361 0000F976 31 0a jeql L386 ! 1406: 1362 0000F978 # force_loop = TRUE; /* set the force loop flag */ ! 1407: 1363 0000F978 0d 01 effffff44d movl $1,_force_loop ! 1408: 1364 0000F97F # asm("brw _mulf_9_lp1");; /* and loop on the error */ ! 1409: 1365 0000F97F 13 ff49 brw _mulf_9_lp1 ! 1410: 1366 0000F982 # } /* end of loop on error */ ! 1411: 1367 0000F982 # } /* end of compare error */ ! 1412: 1368 0000F982 L386: ! 1413: 1369 0000F982 # } /* end of WHILE loop */ ! 1414: 1370 0000F982 L379: ! 1415: 1371 0000F982 L375: ! 1416: 1372 0000F982 6d effffff444 incl _index ! 1417: 1373 0000F988 13 fef7 jbr L377 ! 1418: 1374 0000F98B L376: ! 1419: 1375 0000F98B # } /* end of subtest 9 */ ! 1420: 1376 0000F98B 40 ret#2 ! 1421: 1377 0000F98C .set L371,0x0 ! 1422: 1378 0000F98C L373: ! 1423: 1379 0000F98C 13 fee0 jbr L374 ! 1424: 1380 0000F98F .data ! 1425: 1381 00000d1c * .text ! 1426: 1382 0000F98F 00 .align 1 ! 1427: 1383 0000F990 .globl _print_mulf_data ! 1428: 1384 0000F990 _print_mulf_data: ! 1429: 1385 0000F990 0000 .word L387 ! 1430: 1386 0000F992 # ! 1431: 1387 0000F992 # ! 1432: 1388 0000F992 # ! 1433: 1389 0000F992 # /************************************************************************** ! 1434: 1390 0000F992 # * ! 1435: 1391 0000F992 # * PRINT THE DATA AND STORE RESULTS ! 1436: 1392 0000F992 # * ! 1437: 1393 0000F992 # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx ! 1438: 1394 0000F992 # * operand = xxxxxxxx, expected = xxxxxxxx ! 1439: 1395 0000F992 # **************************************************************************/ ! 1440: 1396 0000F992 # print_mulf_data() ! 1441: 1397 0000F992 # { ! 1442: 1398 0000F992 13 0095 jbr L389 ! 1443: 1399 0000F995 L390: ! 1444: 1400 0000F995 # writes("initial Acc = "); ! 1445: 1401 0000F995 .data 1 ! 1446: 1402 00000fd7 * L391: ! 1447: 1403 00000fd7 * 696E697469616C20416363203 .ascii "initial Acc = \0" ! 1448: D2000 ! 1449: 1404 00000fe6 * .text ! 1450: 1405 0000F995 dd 8f00000fd7 pushl $L391 ! 1451: 1406 0000F99B fe 08 effffff42a callf $8,_writes ! 1452: 1407 0000F9A2 # write32h( sgl_ld_acc ); ! 1453: 1408 0000F9A2 dd effffff424 pushl _sgl_ld_acc ! 1454: 1409 0000F9A8 fe 08 effffff41d callf $8,_write32h ! 1455: 1410 0000F9AF # writes(", stored = "); ! 1456: 1411 0000F9AF .data 1 ! 1457: 1412 00000fe6 * L392: ! 1458: 1413 00000fe6 * 2C2020202073746F726564203 .ascii ", stored = \0" ! 1459: D2000 ! 1460: 1414 00000ff5 * .text ! 1461: 1415 0000F9AF dd 8f00000fe6 pushl $L392 ! 1462: 1416 0000F9B5 fe 08 effffff410 callf $8,_writes ! 1463: 1417 0000F9BC # write32h( sgl_st_acc ); ! 1464: 1418 0000F9BC dd effffff40a pushl _sgl_st_acc ! 1465: 1419 0000F9C2 fe 08 effffff403 callf $8,_write32h ! 1466: 1420 0000F9C9 # writes(", data index = "); ! 1467: 1421 0000F9C9 .data 1 ! 1468: 1422 00000ff5 * L393: ! 1469: 1423 00000ff5 * 2C20206461746120696E64657 .ascii ", data index = \0" ! 1470: 8203D2000 ! 1471: 1424 00001006 * .text ! 1472: 1425 0000F9C9 dd 8f00000ff5 pushl $L393 ! 1473: 1426 0000F9CF fe 08 effffff3f6 callf $8,_writes ! 1474: 1427 0000F9D6 # writed( index ); ! 1475: 1428 0000F9D6 dd effffff3f0 pushl _index ! 1476: 1429 0000F9DC fe 08 effffff3e9 callf $8,_writed ! 1477: 1430 0000F9E3 # writec('\n'); ! 1478: 1431 0000F9E3 dd 0a pushl $10 ! 1479: 1432 0000F9E5 fe 08 effffff3e0 callf $8,_writec ! 1480: 1433 0000F9EC # writes(" operand = "); ! 1481: 1434 0000F9EC .data 1 ! 1482: 1435 00001006 * L395: ! 1483: 1436 00001006 * 202020206F706572616E64203 .ascii " operand = \0" ! 1484: D2000 ! 1485: 1437 00001015 * .text ! 1486: 1438 0000F9EC dd 8f00001006 pushl $L395 ! 1487: 1439 0000F9F2 fe 08 effffff3d3 callf $8,_writes ! 1488: 1440 0000F9F9 # write32h( sgl_value_1 ); ! 1489: 1441 0000F9F9 dd effffff3cd pushl _sgl_value_1 ! 1490: 1442 0000F9FF fe 08 effffff3c6 callf $8,_write32h ! 1491: 1443 0000FA06 # writes(", expected = "); ! 1492: 1444 0000FA06 .data 1 ! 1493: 1445 00001015 * L396: ! 1494: 1446 00001015 * 2C20206578706563746564203 .ascii ", expected = \0" ! 1495: D2000 ! 1496: 1447 00001024 * .text ! 1497: 1448 0000FA06 dd 8f00001015 pushl $L396 ! 1498: 1449 0000FA0C fe 08 effffff3b9 callf $8,_writes ! 1499: 1450 0000FA13 # write32h( sgl_expected ); ! 1500: 1451 0000FA13 dd effffff3b3 pushl _sgl_expected ! 1501: 1452 0000FA19 fe 08 effffff3ac callf $8,_write32h ! 1502: 1453 0000FA20 # writec('\n'); ! 1503: 1454 0000FA20 dd 0a pushl $10 ! 1504: 1455 0000FA22 fe 08 effffff3a3 callf $8,_writec ! 1505: 1456 0000FA29 # } ! 1506: 1457 0000FA29 40 ret#2 ! 1507: 1458 0000FA2A .set L387,0x0 ! 1508: 1459 0000FA2A L389: ! 1509: 1460 0000FA2A 13 ff68 jbr L390 ! 1510: 1461 0000FA2D .data ! 1511: 1462 00000d1c * .text ! 1512: 1463 0000FA2D 00 .align 1 ! 1513: 1464 0000FA2E .globl _mulf_er_halt ! 1514: 1465 0000FA2E _mulf_er_halt: ! 1515: 1466 0000FA2E 0000 .word L397 ! 1516: 1467 0000FA30 # ! 1517: 1468 0000FA30 # ! 1518: 1469 0000FA30 # ! 1519: 1470 0000FA30 # /************************************************************************** ! 1520: 1471 0000FA30 # * ! 1521: 1472 0000FA30 # * HALT ON ERROR ROUTINE ! 1522: 1473 0000FA30 # * ! 1523: 1474 0000FA30 # **************************************************************************/ ! 1524: 1475 0000FA30 # mulf_er_halt( halt_code ) ! 1525: 1476 0000FA30 # int halt_code; ! 1526: 1477 0000FA30 # { ! 1527: 1478 0000FA30 13 00af jbr L399 ! 1528: 1479 0000FA33 L400: ! 1529: 1480 0000FA33 # sgl_dummy1 = halt_code; /* get the error type */ ! 1530: 1481 0000FA33 0d ad04 effffff391 movl 4(fp),_sgl_dummy1 ! 1531: 1482 0000FA3B # asm("movl _test_no,r0"); /* r0 = test number */ ! 1532: 1483 0000FA3B 0d effffff38b 50 movl _test_no,r0 ! 1533: 1484 0000FA42 # asm("movl _subtest,r1"); /* r1 = subtest number */ ! 1534: 1485 0000FA42 0d effffff384 51 movl _subtest,r1 ! 1535: 1486 0000FA49 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */ ! 1536: 1487 0000FA49 0d effffff37d 52 movl _sgl_dummy1,r2 ! 1537: 1488 0000FA50 # asm("movl _cycle,r3"); /* r3 = cycle count */ ! 1538: 1489 0000FA50 0d effffff376 53 movl _cycle,r3 ! 1539: 1490 0000FA57 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */ ! 1540: 1491 0000FA57 0d effffff36f 54 movl _sgl_ld_acc,r4 ! 1541: 1492 0000FA5E # asm("movl _sgl_value_1,r5"); /* r5 = data multiplied */ ! 1542: 1493 0000FA5E 0d effffff368 55 movl _sgl_value_1,r5 ! 1543: 1494 0000FA65 # asm("movl _sgl_st_acc,r6"); /* r6 = data stored */ ! 1544: 1495 0000FA65 0d effffff361 56 movl _sgl_st_acc,r6 ! 1545: 1496 0000FA6C # if( halt_code == BAD_ACC_HLT ) { ! 1546: 1497 0000FA6C 1d ad04 01 cmpl 4(fp),$1 ! 1547: 1498 0000FA70 21 10 jneq L401 ! 1548: 1499 0000FA72 # asm("movl _sgl_expected,r7"); /* r7 = data expected */ ! 1549: 1500 0000FA72 0d effffff354 57 movl _sgl_expected,r7 ! 1550: 1501 0000FA79 # asm("movl _index,r8"); /* r8 = data index */ ! 1551: 1502 0000FA79 0d effffff34d 58 movl _index,r8 ! 1552: 1503 0000FA80 # } else ! 1553: 1504 0000FA80 11 5e jbr L402 ! 1554: 1505 0000FA82 L401: ! 1555: 1506 0000FA82 # if( halt_code == BAD_REG_HLT ) { ! 1556: 1507 0000FA82 1d ad04 02 cmpl 4(fp),$2 ! 1557: 1508 0000FA86 21 3d jneq L403 ! 1558: 1509 0000FA88 # sgl_dummy1 = load_regs[index2]; ! 1559: 1510 0000FA88 0d effffff33e 50 movl _index2,r0 ! 1560: 1511 0000FA8F 0d 40effffff336 movl _load_regs[r0],_sgl_dummy1 ! 1561: effffff331 ! 1562: 1512 0000FA9B # sgl_dummy2 = store_regs[index2]; ! 1563: 1513 0000FA9B 0d effffff32b 50 movl _index2,r0 ! 1564: 1514 0000FAA2 0d 40effffff323 movl _store_regs[r0],_sgl_dummy2 ! 1565: effffff31e ! 1566: 1515 0000FAAE # asm("movl _index2,r7"); /* r7 = bad register # */ ! 1567: 1516 0000FAAE 0d effffff318 57 movl _index2,r7 ! 1568: 1517 0000FAB5 # asm("movl _sgl_dummy2,r8"); /* r8 = actual value */ ! 1569: 1518 0000FAB5 0d effffff311 58 movl _sgl_dummy2,r8 ! 1570: 1519 0000FABC # asm("movl _sgl_dummy1,r9"); /* r9 = expected value */ ! 1571: 1520 0000FABC 0d effffff30a 59 movl _sgl_dummy1,r9 ! 1572: 1521 0000FAC3 # } else ! 1573: 1522 0000FAC3 11 1b jbr L404 ! 1574: 1523 0000FAC5 L403: ! 1575: 1524 0000FAC5 # if( halt_code == BAD_PSL_HLT ) { ! 1576: 1525 0000FAC5 1d ad04 03 cmpl 4(fp),$3 ! 1577: 1526 0000FAC9 21 15 jneq L405 ! 1578: 1527 0000FACB # asm("movl _init_psl,r7"); /* r7 = initial PSL */ ! 1579: 1528 0000FACB 0d effffff2fb 57 movl _init_psl,r7 ! 1580: 1529 0000FAD2 # asm("movl _psl_val,r8"); /* r8 = final PSL */ ! 1581: 1530 0000FAD2 0d effffff2f4 58 movl _psl_val,r8 ! 1582: 1531 0000FAD9 # asm("movl _exp_psl,r9"); /* r9 = expected PSL */ ! 1583: 1532 0000FAD9 0d effffff2ed 59 movl _exp_psl,r9 ! 1584: 1533 0000FAE0 # }; ! 1585: 1534 0000FAE0 L405: ! 1586: 1535 0000FAE0 L404: ! 1587: 1536 0000FAE0 L402: ! 1588: 1537 0000FAE0 # asm("halt"); /* HALT ... */ ! 1589: 1538 0000FAE0 00 halt ! 1590: 1539 0000FAE1 # } ! 1591: 1540 0000FAE1 40 ret#2 ! 1592: 1541 0000FAE2 .set L397,0x0 ! 1593: 1542 0000FAE2 L399: ! 1594: 1543 0000FAE2 13 ff4e jbr L400 ! 1595: 1544 0000FAE5 .data ! 1596: 1544 0001E8B1 .data
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.