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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
Return to mulf.lst CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 |
Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000d1c * .text
4 00000000 .align 1
5 00000000 .globl _mulf
6 00000000 _mulf:
7 0000EDCC 0000 .word L215
8 0000EDCE #
9 0000EDCE # #include "fpp_defs.h"
10 0000EDCE #
11 0000EDCE #
12 0000EDCE # /*****************************************************************************
13 0000EDCE # *
14 0000EDCE # * MULF - SINGLE PRECISION FLOATING POINT ADD TEST
15 0000EDCE # *
16 0000EDCE # *****************************************************************************/
17 0000EDCE # mulf()
18 0000EDCE # {
19 0000EDCE 11 64 jbr L217
20 0000EDD0 L218:
21 0000EDD0 # asm(".globl _mulf_t");
22 0000EDD0 .globl _mulf_t
23 0000EDD0 # asm("_mulf_t:"); /* entry address */
24 0000EDD0 _mulf_t:
25 0000EDD0 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
26 0000EDD0 1d effffffff6 01 cmpl _cycle,$1
27 0000EDD7 21 15 jneq L219
28 0000EDD9 5d efffffffed tstl _prt_hdrs
29 0000EDDF 31 0d jeql L219
30 0000EDE1 # writes(" MULF");
31 0000EDE1 .data 1
32 00000d1c * L221:
33 00000d1c * 204D554C4600 .ascii " MULF\0"
34 00000d22 * .text
35 0000EDE1 dd 8f00000d1c pushl $L221
36 0000EDE7 fe 08 efffffffde callf $8,_writes
37 0000EDEE # mulf_1(); /* multiply through a register*/
38 0000EDEE L219:
39 0000EDEE fe 04 ef00000041 callf $4,_mulf_1
40 0000EDF5 # mulf_2(); /* multiply through the cache */
41 0000EDF5 fe 04 ef00000160 callf $4,_mulf_2
42 0000EDFC # mulf_3(); /* wait 3 NOPs */
43 0000EDFC fe 04 ef00000279 callf $4,_mulf_3
44 0000EE03 # mulf_4(); /* wait 2 NOPs */
45 0000EE03 fe 04 ef00000396 callf $4,_mulf_4
46 0000EE0A # mulf_5(); /* wait 1 NOP before storing */
47 0000EE0A fe 04 ef000004b3 callf $4,_mulf_5
48 0000EE11 # mulf_6(); /* register stability test */
49 0000EE11 fe 04 ef000005ce callf $4,_mulf_6
50 0000EE18 # mulf_7(); /* PSL stability test */
51 0000EE18 fe 04 ef00000777 callf $4,_mulf_7
52 0000EE1F # mulf_8(); /* pipelined entry test */
53 0000EE1F fe 04 ef0000091e callf $4,_mulf_8
54 0000EE26 # mulf_9(); /* pipelined exit test */
55 0000EE26 fe 04 ef00000a3d callf $4,_mulf_9
56 0000EE2D # asm("jmp *return"); /* return to the test monitor */
57 0000EE2D 71 ffffffff99 jmp *return
58 0000EE33 # }
59 0000EE33 40 ret#2
60 0000EE34 .set L215,0x0
61 0000EE34 L217:
62 0000EE34 11 9a jbr L218
63 0000EE36 .data
64 00000d1c * .text
65 0000EE36 .align 1
66 0000EE36 .globl _mulf_1
67 0000EE36 _mulf_1:
68 0000EE36 0000 .word L231
69 0000EE38 #
70 0000EE38 #
71 0000EE38 #
72 0000EE38 # /************************************************************************
73 0000EE38 # *
74 0000EE38 # * SUBTEST 1 - multiply through a register
75 0000EE38 # *
76 0000EE38 # ************************************************************************/
77 0000EE38 # mulf_1()
78 0000EE38 # {
79 0000EE38 13 011e jbr L233
80 0000EE3B L234:
81 0000EE3B # force_loop = FALSE;
82 0000EE3B 4d efffffff8b clrl _force_loop
83 0000EE41 # subtest = 1;
84 0000EE41 0d 01 efffffff84 movl $1,_subtest
85 0000EE48 # for( index = 0; index < max_mulf_1_index; index++ ) {
86 0000EE48 4d efffffff7e clrl _index
87 0000EE4E L237:
88 0000EE4E 1d efffffff78 efffffff73 cmpl _index,_max_mulf_1_index
89 0000EE59 91 03 13 00fa jgeq L236
90 0000EE5E # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
91 0000EE5E 5c 0c efffffff67 50 mull3 $12,_index,r0
92 0000EE66 0d e000000000 efffffff5b movl _mulf_1_data(r0),_sgl_ld_acc
93 0000EE71 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
94 0000EE71 5c 0c efffffff54 50 mull3 $12,_index,r0
95 0000EE79 0d e000000004 efffffff48 movl _mulf_1_data+4(r0),_sgl_value_1
96 0000EE84 # sgl_expected = mulf_1_data[index].exp; /* get expected result */
97 0000EE84 5c 0c efffffff41 50 mull3 $12,_index,r0
98 0000EE8C 0d e000000008 efffffff35 movl _mulf_1_data+8(r0),_sgl_expected
99 0000EE97 # /*
100 0000EE97 # * If LOOP ON ERROR is set, this is the loop for this subtest.
101 0000EE97 # * The force loop flag is set after the first error.
102 0000EE97 # */
103 0000EE97 # asm("_mulf_1_lp1:");
104 0000EE97 _mulf_1_lp1:
105 0000EE97 # asm("movl _sgl_ld_acc,r3"); /* move the 1st data to r3 */
106 0000EE97 0d efffffff2f 53 movl _sgl_ld_acc,r3
107 0000EE9E # asm("movl _sgl_value_1,r4"); /* move the 2nd data to r4 */
108 0000EE9E 0d efffffff28 54 movl _sgl_value_1,r4
109 0000EEA5 # asm("ldf r3"); /* load the 1st operand */
110 0000EEA5 06 53 ldf r3
111 0000EEA7 # asm("mulf r4"); /* mul the 2nd operand */
112 0000EEA7 e6 54 mulf r4
113 0000EEA9 # asm("stf _sgl_st_acc"); /* store the result */
114 0000EEA9 26 efffffff1d stf _sgl_st_acc
115 0000EEAF # if( force_loop )
116 0000EEAF 5d efffffff17 tstl _force_loop
117 0000EEB5 31 02 jeql L238
118 0000EEB7 # asm("brb _mulf_1_lp1");; /* loop on the error */
119 0000EEB7 11 de brb _mulf_1_lp1
120 0000EEB9 L238:
121 0000EEB9 # /*
122 0000EEB9 # * end error loop - test the results
123 0000EEB9 # */
124 0000EEB9 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
125 0000EEB9 1d efffffff0d efffffff08 cmpl _sgl_st_acc,_sgl_expected
126 0000EEC4 21 03 13 0086 jeql L239
127 0000EEC9 # errcnt++; /* bump the error count */
128 0000EEC9 6d effffffefd incl _errcnt
129 0000EECF # if( prt_error ) {
130 0000EECF 5d effffffef7 tstl _prt_error
131 0000EED5 31 55 jeql L240
132 0000EED7 # writes(" \n"); /* start a new print line */
133 0000EED7 .data 1
134 00000d22 * L241:
135 00000d22 * 200A00 .ascii " \12\0"
136 00000d25 * .text
137 0000EED7 dd 8f00000d22 pushl $L241
138 0000EEDD fe 08 effffffee8 callf $8,_writes
139 0000EEE4 # writes("cycle: ");
140 0000EEE4 .data 1
141 00000d25 * L242:
142 00000d25 * 6379636C653A2000 .ascii "cycle: \0"
143 00000d2d * .text
144 0000EEE4 dd 8f00000d25 pushl $L242
145 0000EEEA fe 08 effffffedb callf $8,_writes
146 0000EEF1 # writed( cycle );
147 0000EEF1 dd effffffed5 pushl _cycle
148 0000EEF7 fe 08 effffffece callf $8,_writed
149 0000EEFE # writes(" MULF test ");
150 0000EEFE .data 1
151 00000d2d * L244:
152 00000d2d * 20204D554C462074657374200 .ascii " MULF test \0"
0
153 00000d3a * .text
154 0000EEFE dd 8f00000d2d pushl $L244
155 0000EF04 fe 08 effffffec1 callf $8,_writes
156 0000EF0B # writed( test_no );
157 0000EF0B dd effffffebb pushl _test_no
158 0000EF11 fe 08 effffffeb4 callf $8,_writed
159 0000EF18 # writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n");
160 0000EF18 .data 1
161 00000d3a * L245:
162 00000d3a * 2C20737562746573742031202 .ascii ", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0"
85265672E204461746129202D
204241442046494E414C20414
3430A00
163 00000d63 * .text
164 0000EF18 dd 8f00000d3a pushl $L245
165 0000EF1E fe 08 effffffea7 callf $8,_writes
166 0000EF25 # print_mulf_data();
167 0000EF25 fe 04 ef00000a64 callf $4,_print_mulf_data
168 0000EF2C # }
169 0000EF2C # if( halt_flg )
170 0000EF2C L240:
171 0000EF2C 5d effffffe9a tstl _halt_flg
172 0000EF32 31 09 jeql L247
173 0000EF34 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */
174 0000EF34 dd 01 pushl $1
175 0000EF36 fe 08 ef00000af1 callf $8,_mulf_er_halt
176 0000EF3D # if( loop_on_err ) {
177 0000EF3D L247:
178 0000EF3D 5d effffffe89 tstl _loop_on_err
179 0000EF43 31 0a jeql L249
180 0000EF45 # force_loop = TRUE; /* set the force loop flag */
181 0000EF45 0d 01 effffffe80 movl $1,_force_loop
182 0000EF4C # asm("brw _mulf_1_lp1");; /* and loop on the error */
183 0000EF4C 13 ff48 brw _mulf_1_lp1
184 0000EF4F # } /* end of loop on error */
185 0000EF4F # } /* end of compare error */
186 0000EF4F L249:
187 0000EF4F # } /* end of WHILE loop */
188 0000EF4F L239:
189 0000EF4F L235:
190 0000EF4F 6d effffffe77 incl _index
191 0000EF55 13 fef6 jbr L237
192 0000EF58 L236:
193 0000EF58 # } /* end of subtest 1 */
194 0000EF58 40 ret#2
195 0000EF59 .set L231,0x0
196 0000EF59 L233:
197 0000EF59 13 fedf jbr L234
198 0000EF5C .data
199 00000d1c * .text
200 0000EF5C .align 1
201 0000EF5C .globl _mulf_2
202 0000EF5C _mulf_2:
203 0000EF5C 0000 .word L250
204 0000EF5E #
205 0000EF5E #
206 0000EF5E #
207 0000EF5E # /************************************************************************
208 0000EF5E # *
209 0000EF5E # * SUBTEST 2 - multiply through memory
210 0000EF5E # *
211 0000EF5E # ************************************************************************/
212 0000EF5E # mulf_2()
213 0000EF5E # {
214 0000EF5E 13 0118 jbr L252
215 0000EF61 L253:
216 0000EF61 # force_loop = FALSE;
217 0000EF61 4d effffffe65 clrl _force_loop
218 0000EF67 # subtest = 2;
219 0000EF67 0d 02 effffffe5e movl $2,_subtest
220 0000EF6E # for( index = 0; index < max_mulf_1_index; index++ ) {
221 0000EF6E 4d effffffe58 clrl _index
222 0000EF74 L256:
223 0000EF74 1d effffffe52 effffffe4d cmpl _index,_max_mulf_1_index
224 0000EF7F 91 03 13 00f4 jgeq L255
225 0000EF84 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
226 0000EF84 5c 0c effffffe41 50 mull3 $12,_index,r0
227 0000EF8C 0d e000000000 effffffe35 movl _mulf_1_data(r0),_sgl_ld_acc
228 0000EF97 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
229 0000EF97 5c 0c effffffe2e 50 mull3 $12,_index,r0
230 0000EF9F 0d e000000004 effffffe22 movl _mulf_1_data+4(r0),_sgl_value_1
231 0000EFAA # sgl_expected = mulf_1_data[index].exp; /* get expected result */
232 0000EFAA 5c 0c effffffe1b 50 mull3 $12,_index,r0
233 0000EFB2 0d e000000008 effffffe0f movl _mulf_1_data+8(r0),_sgl_expected
234 0000EFBD # /*
235 0000EFBD # * If LOOP ON ERROR is set, this is the loop for this subtest.
236 0000EFBD # * The force loop flag is set after the first error.
237 0000EFBD # */
238 0000EFBD # asm("_mulf_2_lp1:");
239 0000EFBD _mulf_2_lp1:
240 0000EFBD # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
241 0000EFBD 06 effffffe09 ldf _sgl_ld_acc
242 0000EFC3 # asm("mulf _sgl_value_1"); /* mul the 2nd operand */
243 0000EFC3 e6 effffffe03 mulf _sgl_value_1
244 0000EFC9 # asm("stf _sgl_st_acc"); /* store the result */
245 0000EFC9 26 effffffdfd stf _sgl_st_acc
246 0000EFCF # if( force_loop )
247 0000EFCF 5d effffffdf7 tstl _force_loop
248 0000EFD5 31 02 jeql L257
249 0000EFD7 # asm("brb _mulf_2_lp1");; /* loop on the error */
250 0000EFD7 11 e4 brb _mulf_2_lp1
251 0000EFD9 L257:
252 0000EFD9 # /*
253 0000EFD9 # * end error loop - test the results
254 0000EFD9 # */
255 0000EFD9 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
256 0000EFD9 1d effffffded effffffde8 cmpl _sgl_st_acc,_sgl_expected
257 0000EFE4 21 03 13 0086 jeql L258
258 0000EFE9 # errcnt++; /* bump the error count */
259 0000EFE9 6d effffffddd incl _errcnt
260 0000EFEF # if( prt_error ) {
261 0000EFEF 5d effffffdd7 tstl _prt_error
262 0000EFF5 31 55 jeql L259
263 0000EFF7 # writes(" \n"); /* start a new print line */
264 0000EFF7 .data 1
265 00000d63 * L260:
266 00000d63 * 200A00 .ascii " \12\0"
267 00000d66 * .text
268 0000EFF7 dd 8f00000d63 pushl $L260
269 0000EFFD fe 08 effffffdc8 callf $8,_writes
270 0000F004 # writes("cycle: ");
271 0000F004 .data 1
272 00000d66 * L261:
273 00000d66 * 6379636C653A2000 .ascii "cycle: \0"
274 00000d6e * .text
275 0000F004 dd 8f00000d66 pushl $L261
276 0000F00A fe 08 effffffdbb callf $8,_writes
277 0000F011 # writed( cycle );
278 0000F011 dd effffffdb5 pushl _cycle
279 0000F017 fe 08 effffffdae callf $8,_writed
280 0000F01E # writes(" MULF test ");
281 0000F01E .data 1
282 00000d6e * L262:
283 00000d6e * 20204D554C462074657374200 .ascii " MULF test \0"
0
284 00000d7b * .text
285 0000F01E dd 8f00000d6e pushl $L262
286 0000F024 fe 08 effffffda1 callf $8,_writes
287 0000F02B # writed( test_no );
288 0000F02B dd effffffd9b pushl _test_no
289 0000F031 fe 08 effffffd94 callf $8,_writed
290 0000F038 # writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n");
291 0000F038 .data 1
292 00000d7b * L263:
293 00000d7b * 2C20737562746573742032202 .ascii ", subtest 2 (Cache Data) - BAD FINAL ACC\12\0"
8436163686520446174612920
2D204241442046494E414C204
143430A00
294 00000da5 * .text
295 0000F038 dd 8f00000d7b pushl $L263
296 0000F03E fe 08 effffffd87 callf $8,_writes
297 0000F045 # print_mulf_data();
298 0000F045 fe 04 ef00000944 callf $4,_print_mulf_data
299 0000F04C # }
300 0000F04C # if( halt_flg )
301 0000F04C L259:
302 0000F04C 5d effffffd7a tstl _halt_flg
303 0000F052 31 09 jeql L264
304 0000F054 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */
305 0000F054 dd 01 pushl $1
306 0000F056 fe 08 ef000009d1 callf $8,_mulf_er_halt
307 0000F05D # if( loop_on_err ) {
308 0000F05D L264:
309 0000F05D 5d effffffd69 tstl _loop_on_err
310 0000F063 31 0a jeql L265
311 0000F065 # force_loop = TRUE; /* set the force loop flag */
312 0000F065 0d 01 effffffd60 movl $1,_force_loop
313 0000F06C # asm("brw _mulf_2_lp1");; /* and loop on the error */
314 0000F06C 13 ff4e brw _mulf_2_lp1
315 0000F06F # } /* end of loop on error */
316 0000F06F # } /* end of compare error */
317 0000F06F L265:
318 0000F06F # } /* end of WHILE loop */
319 0000F06F L258:
320 0000F06F L254:
321 0000F06F 6d effffffd57 incl _index
322 0000F075 13 fefc jbr L256
323 0000F078 L255:
324 0000F078 # } /* end of subtest 2 */
325 0000F078 40 ret#2
326 0000F079 .set L250,0x0
327 0000F079 L252:
328 0000F079 13 fee5 jbr L253
329 0000F07C .data
330 00000d1c * .text
331 0000F07C .align 1
332 0000F07C .globl _mulf_3
333 0000F07C _mulf_3:
334 0000F07C 0000 .word L266
335 0000F07E #
336 0000F07E #
337 0000F07E #
338 0000F07E # /************************************************************************
339 0000F07E # *
340 0000F07E # * SUBTEST 3 - Wait 3 NOPs before storing the results
341 0000F07E # *
342 0000F07E # ************************************************************************/
343 0000F07E # mulf_3()
344 0000F07E # {
345 0000F07E 13 011c jbr L268
346 0000F081 L269:
347 0000F081 # force_loop = FALSE;
348 0000F081 4d effffffd45 clrl _force_loop
349 0000F087 # subtest = 3;
350 0000F087 0d 03 effffffd3e movl $3,_subtest
351 0000F08E # for( index = 0; index < max_mulf_1_index; index++ ) {
352 0000F08E 4d effffffd38 clrl _index
353 0000F094 L272:
354 0000F094 1d effffffd32 effffffd2d cmpl _index,_max_mulf_1_index
355 0000F09F 91 03 13 00f8 jgeq L271
356 0000F0A4 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
357 0000F0A4 5c 0c effffffd21 50 mull3 $12,_index,r0
358 0000F0AC 0d e000000000 effffffd15 movl _mulf_1_data(r0),_sgl_ld_acc
359 0000F0B7 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
360 0000F0B7 5c 0c effffffd0e 50 mull3 $12,_index,r0
361 0000F0BF 0d e000000004 effffffd02 movl _mulf_1_data+4(r0),_sgl_value_1
362 0000F0CA # sgl_expected = mulf_1_data[index].exp; /* get expected result */
363 0000F0CA 5c 0c effffffcfb 50 mull3 $12,_index,r0
364 0000F0D2 0d e000000008 effffffcef movl _mulf_1_data+8(r0),_sgl_expected
365 0000F0DD # /*
366 0000F0DD # * If LOOP ON ERROR is set, this is the loop for this subtest.
367 0000F0DD # * The force loop flag is set after the first error.
368 0000F0DD # */
369 0000F0DD # asm("_mulf_3_lp1:");
370 0000F0DD _mulf_3_lp1:
371 0000F0DD # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
372 0000F0DD 06 effffffce9 ldf _sgl_ld_acc
373 0000F0E3 # asm("nop"); /* delay */
374 0000F0E3 10 nop
375 0000F0E4 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */
376 0000F0E4 e6 effffffce2 mulf _sgl_value_1
377 0000F0EA # asm("nop"); /* delay before ... */
378 0000F0EA 10 nop
379 0000F0EB # asm("nop");
380 0000F0EB 10 nop
381 0000F0EC # asm("nop"); /* ... storing the result */
382 0000F0EC 10 nop
383 0000F0ED # asm("stf _sgl_st_acc"); /* store the result */
384 0000F0ED 26 effffffcd9 stf _sgl_st_acc
385 0000F0F3 # if( force_loop )
386 0000F0F3 5d effffffcd3 tstl _force_loop
387 0000F0F9 31 02 jeql L273
388 0000F0FB # asm("brb _mulf_3_lp1");; /* loop on the error */
389 0000F0FB 11 e0 brb _mulf_3_lp1
390 0000F0FD L273:
391 0000F0FD # /*
392 0000F0FD # * end error loop - test the results
393 0000F0FD # */
394 0000F0FD # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
395 0000F0FD 1d effffffcc9 effffffcc4 cmpl _sgl_st_acc,_sgl_expected
396 0000F108 21 03 13 0086 jeql L274
397 0000F10D # errcnt++; /* bump the error count */
398 0000F10D 6d effffffcb9 incl _errcnt
399 0000F113 # if( prt_error ) {
400 0000F113 5d effffffcb3 tstl _prt_error
401 0000F119 31 55 jeql L275
402 0000F11B # writes(" \n"); /* start a new print line */
403 0000F11B .data 1
404 00000da5 * L276:
405 00000da5 * 200A00 .ascii " \12\0"
406 00000da8 * .text
407 0000F11B dd 8f00000da5 pushl $L276
408 0000F121 fe 08 effffffca4 callf $8,_writes
409 0000F128 # writes("cycle: ");
410 0000F128 .data 1
411 00000da8 * L277:
412 00000da8 * 6379636C653A2000 .ascii "cycle: \0"
413 00000db0 * .text
414 0000F128 dd 8f00000da8 pushl $L277
415 0000F12E fe 08 effffffc97 callf $8,_writes
416 0000F135 # writed( cycle );
417 0000F135 dd effffffc91 pushl _cycle
418 0000F13B fe 08 effffffc8a callf $8,_writed
419 0000F142 # writes(" MULF test ");
420 0000F142 .data 1
421 00000db0 * L278:
422 00000db0 * 20204D554C462074657374200 .ascii " MULF test \0"
0
423 00000dbd * .text
424 0000F142 dd 8f00000db0 pushl $L278
425 0000F148 fe 08 effffffc7d callf $8,_writes
426 0000F14F # writed( test_no );
427 0000F14F dd effffffc77 pushl _test_no
428 0000F155 fe 08 effffffc70 callf $8,_writed
429 0000F15C # writes(", subtest 3 (Cache Data - 3 NOPs) - BAD FINAL ACC\n");
430 0000F15C .data 1
431 00000dbd * L279:
432 00000dbd * 2C20737562746573742033202 .ascii ", subtest 3 (Cache Data - 3 NOPs) - BAD FINAL ACC\12\0"
843616368652044617461202D
2033204E4F507329202D20424
1442046494E414C204143430A
00
433 00000df0 * .text
434 0000F15C dd 8f00000dbd pushl $L279
435 0000F162 fe 08 effffffc63 callf $8,_writes
436 0000F169 # print_mulf_data();
437 0000F169 fe 04 ef00000820 callf $4,_print_mulf_data
438 0000F170 # }
439 0000F170 # if( halt_flg )
440 0000F170 L275:
441 0000F170 5d effffffc56 tstl _halt_flg
442 0000F176 31 09 jeql L280
443 0000F178 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */
444 0000F178 dd 01 pushl $1
445 0000F17A fe 08 ef000008ad callf $8,_mulf_er_halt
446 0000F181 # if( loop_on_err ) {
447 0000F181 L280:
448 0000F181 5d effffffc45 tstl _loop_on_err
449 0000F187 31 0a jeql L281
450 0000F189 # force_loop = TRUE; /* set the force loop flag */
451 0000F189 0d 01 effffffc3c movl $1,_force_loop
452 0000F190 # asm("brw _mulf_3_lp1");; /* and loop on the error */
453 0000F190 13 ff4a brw _mulf_3_lp1
454 0000F193 # } /* end of loop on error */
455 0000F193 # } /* end of compare error */
456 0000F193 L281:
457 0000F193 # } /* end of WHILE loop */
458 0000F193 L274:
459 0000F193 L270:
460 0000F193 6d effffffc33 incl _index
461 0000F199 13 fef8 jbr L272
462 0000F19C L271:
463 0000F19C # } /* end of subtest 3 */
464 0000F19C 40 ret#2
465 0000F19D .set L266,0x0
466 0000F19D L268:
467 0000F19D 13 fee1 jbr L269
468 0000F1A0 .data
469 00000d1c * .text
470 0000F1A0 .align 1
471 0000F1A0 .globl _mulf_4
472 0000F1A0 _mulf_4:
473 0000F1A0 0000 .word L282
474 0000F1A2 #
475 0000F1A2 #
476 0000F1A2 #
477 0000F1A2 # /************************************************************************
478 0000F1A2 # *
479 0000F1A2 # * SUBTEST 4 - Wait 2 NOPs before storing the results
480 0000F1A2 # *
481 0000F1A2 # ************************************************************************/
482 0000F1A2 # mulf_4()
483 0000F1A2 # {
484 0000F1A2 13 011b jbr L284
485 0000F1A5 L285:
486 0000F1A5 # force_loop = FALSE;
487 0000F1A5 4d effffffc21 clrl _force_loop
488 0000F1AB # subtest = 4;
489 0000F1AB 0d 04 effffffc1a movl $4,_subtest
490 0000F1B2 # for( index = 0; index < max_mulf_1_index; index++ ) {
491 0000F1B2 4d effffffc14 clrl _index
492 0000F1B8 L288:
493 0000F1B8 1d effffffc0e effffffc09 cmpl _index,_max_mulf_1_index
494 0000F1C3 91 03 13 00f7 jgeq L287
495 0000F1C8 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
496 0000F1C8 5c 0c effffffbfd 50 mull3 $12,_index,r0
497 0000F1D0 0d e000000000 effffffbf1 movl _mulf_1_data(r0),_sgl_ld_acc
498 0000F1DB # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
499 0000F1DB 5c 0c effffffbea 50 mull3 $12,_index,r0
500 0000F1E3 0d e000000004 effffffbde movl _mulf_1_data+4(r0),_sgl_value_1
501 0000F1EE # sgl_expected = mulf_1_data[index].exp; /* get expected result */
502 0000F1EE 5c 0c effffffbd7 50 mull3 $12,_index,r0
503 0000F1F6 0d e000000008 effffffbcb movl _mulf_1_data+8(r0),_sgl_expected
504 0000F201 # /*
505 0000F201 # * If LOOP ON ERROR is set, this is the loop for this subtest.
506 0000F201 # * The force loop flag is set after the first error.
507 0000F201 # */
508 0000F201 # asm("_mulf_4_lp1:");
509 0000F201 _mulf_4_lp1:
510 0000F201 # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
511 0000F201 06 effffffbc5 ldf _sgl_ld_acc
512 0000F207 # asm("nop"); /* delay */
513 0000F207 10 nop
514 0000F208 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */
515 0000F208 e6 effffffbbe mulf _sgl_value_1
516 0000F20E # asm("nop"); /* delay before ... */
517 0000F20E 10 nop
518 0000F20F # asm("nop"); /* ... storing the result */
519 0000F20F 10 nop
520 0000F210 # asm("stf _sgl_st_acc"); /* store the result */
521 0000F210 26 effffffbb6 stf _sgl_st_acc
522 0000F216 # if( force_loop )
523 0000F216 5d effffffbb0 tstl _force_loop
524 0000F21C 31 02 jeql L289
525 0000F21E # asm("brb _mulf_4_lp1");; /* loop on the error */
526 0000F21E 11 e1 brb _mulf_4_lp1
527 0000F220 L289:
528 0000F220 # /*
529 0000F220 # * end error loop - test the results
530 0000F220 # */
531 0000F220 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
532 0000F220 1d effffffba6 effffffba1 cmpl _sgl_st_acc,_sgl_expected
533 0000F22B 21 03 13 0086 jeql L290
534 0000F230 # errcnt++; /* bump the error count */
535 0000F230 6d effffffb96 incl _errcnt
536 0000F236 # if( prt_error ) {
537 0000F236 5d effffffb90 tstl _prt_error
538 0000F23C 31 55 jeql L291
539 0000F23E # writes(" \n"); /* start a new print line */
540 0000F23E .data 1
541 00000df0 * L292:
542 00000df0 * 200A00 .ascii " \12\0"
543 00000df3 * .text
544 0000F23E dd 8f00000df0 pushl $L292
545 0000F244 fe 08 effffffb81 callf $8,_writes
546 0000F24B # writes("cycle: ");
547 0000F24B .data 1
548 00000df3 * L293:
549 00000df3 * 6379636C653A2000 .ascii "cycle: \0"
550 00000dfb * .text
551 0000F24B dd 8f00000df3 pushl $L293
552 0000F251 fe 08 effffffb74 callf $8,_writes
553 0000F258 # writed( cycle );
554 0000F258 dd effffffb6e pushl _cycle
555 0000F25E fe 08 effffffb67 callf $8,_writed
556 0000F265 # writes(" MULF test ");
557 0000F265 .data 1
558 00000dfb * L294:
559 00000dfb * 20204D554C462074657374200 .ascii " MULF test \0"
0
560 00000e08 * .text
561 0000F265 dd 8f00000dfb pushl $L294
562 0000F26B fe 08 effffffb5a callf $8,_writes
563 0000F272 # writed( test_no );
564 0000F272 dd effffffb54 pushl _test_no
565 0000F278 fe 08 effffffb4d callf $8,_writed
566 0000F27F # writes(", subtest 4 (Cache Data - 2 NOPs) - BAD FINAL ACC\n");
567 0000F27F .data 1
568 00000e08 * L295:
569 00000e08 * 2C20737562746573742034202 .ascii ", subtest 4 (Cache Data - 2 NOPs) - BAD FINAL ACC\12\0"
843616368652044617461202D
2032204E4F507329202D20424
1442046494E414C204143430A
00
570 00000e3b * .text
571 0000F27F dd 8f00000e08 pushl $L295
572 0000F285 fe 08 effffffb40 callf $8,_writes
573 0000F28C # print_mulf_data();
574 0000F28C fe 04 ef000006fd callf $4,_print_mulf_data
575 0000F293 # }
576 0000F293 # if( halt_flg )
577 0000F293 L291:
578 0000F293 5d effffffb33 tstl _halt_flg
579 0000F299 31 09 jeql L296
580 0000F29B # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */
581 0000F29B dd 01 pushl $1
582 0000F29D fe 08 ef0000078a callf $8,_mulf_er_halt
583 0000F2A4 # if( loop_on_err ) {
584 0000F2A4 L296:
585 0000F2A4 5d effffffb22 tstl _loop_on_err
586 0000F2AA 31 0a jeql L297
587 0000F2AC # force_loop = TRUE; /* set the force loop flag */
588 0000F2AC 0d 01 effffffb19 movl $1,_force_loop
589 0000F2B3 # asm("brw _mulf_4_lp1");; /* and loop on the error */
590 0000F2B3 13 ff4b brw _mulf_4_lp1
591 0000F2B6 # } /* end of loop on error */
592 0000F2B6 # } /* end of compare error */
593 0000F2B6 L297:
594 0000F2B6 # } /* end of WHILE loop */
595 0000F2B6 L290:
596 0000F2B6 L286:
597 0000F2B6 6d effffffb10 incl _index
598 0000F2BC 13 fef9 jbr L288
599 0000F2BF L287:
600 0000F2BF # } /* end of subtest 4 */
601 0000F2BF 40 ret#2
602 0000F2C0 .set L282,0x0
603 0000F2C0 L284:
604 0000F2C0 13 fee2 jbr L285
605 0000F2C3 .data
606 00000d1c * .text
607 0000F2C3 00 .align 1
608 0000F2C4 .globl _mulf_5
609 0000F2C4 _mulf_5:
610 0000F2C4 0000 .word L298
611 0000F2C6 #
612 0000F2C6 #
613 0000F2C6 #
614 0000F2C6 # /************************************************************************
615 0000F2C6 # *
616 0000F2C6 # * SUBTEST 5 - Wait 1 NOP before storing the results
617 0000F2C6 # *
618 0000F2C6 # ************************************************************************/
619 0000F2C6 # mulf_5()
620 0000F2C6 # {
621 0000F2C6 13 011a jbr L300
622 0000F2C9 L301:
623 0000F2C9 # force_loop = FALSE;
624 0000F2C9 4d effffffafd clrl _force_loop
625 0000F2CF # subtest = 5;
626 0000F2CF 0d 05 effffffaf6 movl $5,_subtest
627 0000F2D6 # for( index = 0; index < max_mulf_1_index; index++ ) {
628 0000F2D6 4d effffffaf0 clrl _index
629 0000F2DC L304:
630 0000F2DC 1d effffffaea effffffae5 cmpl _index,_max_mulf_1_index
631 0000F2E7 91 03 13 00f6 jgeq L303
632 0000F2EC # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
633 0000F2EC 5c 0c effffffad9 50 mull3 $12,_index,r0
634 0000F2F4 0d e000000000 effffffacd movl _mulf_1_data(r0),_sgl_ld_acc
635 0000F2FF # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
636 0000F2FF 5c 0c effffffac6 50 mull3 $12,_index,r0
637 0000F307 0d e000000004 effffffaba movl _mulf_1_data+4(r0),_sgl_value_1
638 0000F312 # sgl_expected = mulf_1_data[index].exp; /* get expected result */
639 0000F312 5c 0c effffffab3 50 mull3 $12,_index,r0
640 0000F31A 0d e000000008 effffffaa7 movl _mulf_1_data+8(r0),_sgl_expected
641 0000F325 # /*
642 0000F325 # * If LOOP ON ERROR is set, this is the loop for this subtest.
643 0000F325 # * The force loop flag is set after the first error.
644 0000F325 # */
645 0000F325 # asm("_mulf_5_lp1:");
646 0000F325 _mulf_5_lp1:
647 0000F325 # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
648 0000F325 06 effffffaa1 ldf _sgl_ld_acc
649 0000F32B # asm("nop"); /* delay */
650 0000F32B 10 nop
651 0000F32C # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */
652 0000F32C e6 effffffa9a mulf _sgl_value_1
653 0000F332 # asm("nop"); /* delay before storing */
654 0000F332 10 nop
655 0000F333 # asm("stf _sgl_st_acc"); /* store the result */
656 0000F333 26 effffffa93 stf _sgl_st_acc
657 0000F339 # if( force_loop )
658 0000F339 5d effffffa8d tstl _force_loop
659 0000F33F 31 02 jeql L305
660 0000F341 # asm("brb _mulf_5_lp1");; /* loop on the error */
661 0000F341 11 e2 brb _mulf_5_lp1
662 0000F343 L305:
663 0000F343 # /*
664 0000F343 # * end error loop - test the results
665 0000F343 # */
666 0000F343 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
667 0000F343 1d effffffa83 effffffa7e cmpl _sgl_st_acc,_sgl_expected
668 0000F34E 21 03 13 0086 jeql L306
669 0000F353 # errcnt++; /* bump the error count */
670 0000F353 6d effffffa73 incl _errcnt
671 0000F359 # if( prt_error ) {
672 0000F359 5d effffffa6d tstl _prt_error
673 0000F35F 31 55 jeql L307
674 0000F361 # writes(" \n"); /* start a new print line */
675 0000F361 .data 1
676 00000e3b * L308:
677 00000e3b * 200A00 .ascii " \12\0"
678 00000e3e * .text
679 0000F361 dd 8f00000e3b pushl $L308
680 0000F367 fe 08 effffffa5e callf $8,_writes
681 0000F36E # writes("cycle: ");
682 0000F36E .data 1
683 00000e3e * L309:
684 00000e3e * 6379636C653A2000 .ascii "cycle: \0"
685 00000e46 * .text
686 0000F36E dd 8f00000e3e pushl $L309
687 0000F374 fe 08 effffffa51 callf $8,_writes
688 0000F37B # writed( cycle );
689 0000F37B dd effffffa4b pushl _cycle
690 0000F381 fe 08 effffffa44 callf $8,_writed
691 0000F388 # writes(" MULF test ");
692 0000F388 .data 1
693 00000e46 * L310:
694 00000e46 * 20204D554C462074657374200 .ascii " MULF test \0"
0
695 00000e53 * .text
696 0000F388 dd 8f00000e46 pushl $L310
697 0000F38E fe 08 effffffa37 callf $8,_writes
698 0000F395 # writed( test_no );
699 0000F395 dd effffffa31 pushl _test_no
700 0000F39B fe 08 effffffa2a callf $8,_writed
701 0000F3A2 # writes(", subtest 5 (Cache Data - 1 NOPs) - BAD FINAL ACC\n");
702 0000F3A2 .data 1
703 00000e53 * L311:
704 00000e53 * 2C20737562746573742035202 .ascii ", subtest 5 (Cache Data - 1 NOPs) - BAD FINAL ACC\12\0"
843616368652044617461202D
2031204E4F507329202D20424
1442046494E414C204143430A
00
705 00000e86 * .text
706 0000F3A2 dd 8f00000e53 pushl $L311
707 0000F3A8 fe 08 effffffa1d callf $8,_writes
708 0000F3AF # print_mulf_data();
709 0000F3AF fe 04 ef000005da callf $4,_print_mulf_data
710 0000F3B6 # }
711 0000F3B6 # if( halt_flg )
712 0000F3B6 L307:
713 0000F3B6 5d effffffa10 tstl _halt_flg
714 0000F3BC 31 09 jeql L312
715 0000F3BE # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */
716 0000F3BE dd 01 pushl $1
717 0000F3C0 fe 08 ef00000667 callf $8,_mulf_er_halt
718 0000F3C7 # if( loop_on_err ) {
719 0000F3C7 L312:
720 0000F3C7 5d effffff9ff tstl _loop_on_err
721 0000F3CD 31 0a jeql L313
722 0000F3CF # force_loop = TRUE; /* set the force loop flag */
723 0000F3CF 0d 01 effffff9f6 movl $1,_force_loop
724 0000F3D6 # asm("brw _mulf_5_lp1");; /* and loop on the error */
725 0000F3D6 13 ff4c brw _mulf_5_lp1
726 0000F3D9 # } /* end of loop on error */
727 0000F3D9 # } /* end of compare error */
728 0000F3D9 L313:
729 0000F3D9 # } /* end of WHILE loop */
730 0000F3D9 L306:
731 0000F3D9 L302:
732 0000F3D9 6d effffff9ed incl _index
733 0000F3DF 13 fefa jbr L304
734 0000F3E2 L303:
735 0000F3E2 # } /* end of subtest 5 */
736 0000F3E2 40 ret#2
737 0000F3E3 .set L298,0x0
738 0000F3E3 L300:
739 0000F3E3 13 fee3 jbr L301
740 0000F3E6 .data
741 00000d1c * .text
742 0000F3E6 .align 1
743 0000F3E6 .globl _mulf_6
744 0000F3E6 _mulf_6:
745 0000F3E6 0000 .word L314
746 0000F3E8 #
747 0000F3E8 #
748 0000F3E8 #
749 0000F3E8 # /************************************************************************
750 0000F3E8 # *
751 0000F3E8 # * SUBTEST 6 - Check for register corruption
752 0000F3E8 # *
753 0000F3E8 # ************************************************************************/
754 0000F3E8 # mulf_6()
755 0000F3E8 # {
756 0000F3E8 13 01a7 jbr L316
757 0000F3EB L317:
758 0000F3EB # force_loop = FALSE; /* clear force_loop flg */
759 0000F3EB 4d effffff9db clrl _force_loop
760 0000F3F1 # subtest = 6;
761 0000F3F1 0d 06 effffff9d4 movl $6,_subtest
762 0000F3F8 # fill_reg_buf( load_regs ); /* get patterns for regs */
763 0000F3F8 dd 8f00000000 pushl $_load_regs
764 0000F3FE fe 08 effffff9c7 callf $8,_fill_reg_buf
765 0000F405 # index = 0;
766 0000F405 4d effffff9c1 clrl _index
767 0000F40B # sgl_ld_acc = mulf_1_data[0].op_1; /* get operand 1 */
768 0000F40B 0d effffff9bb effffff9b6 movl _mulf_1_data,_sgl_ld_acc
769 0000F416 # sgl_value_1 = mulf_1_data[0].op_2; /* get operand 2 */
770 0000F416 0d effffff9b4 effffff9ab movl _mulf_1_data+4,_sgl_value_1
771 0000F421 # sgl_expected = mulf_1_data[0].exp; /* get expected result */
772 0000F421 0d effffff9ad effffff9a0 movl _mulf_1_data+8,_sgl_expected
773 0000F42C # /*
774 0000F42C # * If LOOP ON ERROR is set, this is the loop for this subtest.
775 0000F42C # * The force loop flag is set after the first error.
776 0000F42C # */
777 0000F42C # asm("_mulf_6_lp1:");
778 0000F42C _mulf_6_lp1:
779 0000F42C # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
780 0000F42C 06 effffff99a ldf _sgl_ld_acc
781 0000F432 # asm("nop");
782 0000F432 10 nop
783 0000F433 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
784 0000F433 ab 891fff effffff990 loadr $0x1fff,_load_regs
785 0000F43C # asm("nop");
786 0000F43C 10 nop
787 0000F43D # asm("mulf _sgl_value_1"); /* do the multiply */
788 0000F43D e6 effffff989 mulf _sgl_value_1
789 0000F443 # asm("nop");
790 0000F443 10 nop
791 0000F444 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
792 0000F444 bb 891fff effffff97f storer $0x1fff,_store_regs
793 0000F44D # asm("stf _sgl_st_acc"); /* save the accumulator */
794 0000F44D 26 effffff979 stf _sgl_st_acc
795 0000F453 # if( force_loop )
796 0000F453 5d effffff973 tstl _force_loop
797 0000F459 31 02 jeql L319
798 0000F45B # asm("brb _mulf_6_lp1");; /* loop on the error */
799 0000F45B 11 cf brb _mulf_6_lp1
800 0000F45D L319:
801 0000F45D # /*
802 0000F45D # * Now compare the stored register values to those that were loaded
803 0000F45D # */
804 0000F45D # index2 = 0;
805 0000F45D 4d effffff969 clrl _index2
806 0000F463 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
807 0000F463 L320:
808 0000F463 0d effffff963 50 movl _index2,r0
809 0000F46A 0d effffff95c 51 movl _index2,r1
810 0000F471 1d 40effffff954 cmpl _load_regs[r0],_store_regs[r1]
41effffff94e
811 0000F47E 21 11 jneq L321
812 0000F480 1d effffff946 0d cmpl _index2,$13
813 0000F487 81 08 jgeq L321
814 0000F489 # index2++; /* check reg values */
815 0000F489 6d effffff93d incl _index2
816 0000F48F 11 d2 jbr L320
817 0000F491 L321:
818 0000F491 # if( index2 < 13 ) { /* error if index2 < 13 */
819 0000F491 1d effffff935 0d cmpl _index2,$13
820 0000F498 91 03 13 00f4 jgeq L322
821 0000F49D # errcnt++; /* bump the error count */
822 0000F49D 6d effffff929 incl _errcnt
823 0000F4A3 # if( prt_error ) {
824 0000F4A3 5d effffff923 tstl _prt_error
825 0000F4A9 21 03 13 00c0 jeql L323
826 0000F4AE # writes(" \n"); /* start a new print line */
827 0000F4AE .data 1
828 00000e86 * L324:
829 00000e86 * 200A00 .ascii " \12\0"
830 00000e89 * .text
831 0000F4AE dd 8f00000e86 pushl $L324
832 0000F4B4 fe 08 effffff911 callf $8,_writes
833 0000F4BB # writes("cycle: ");
834 0000F4BB .data 1
835 00000e89 * L325:
836 00000e89 * 6379636C653A2000 .ascii "cycle: \0"
837 00000e91 * .text
838 0000F4BB dd 8f00000e89 pushl $L325
839 0000F4C1 fe 08 effffff904 callf $8,_writes
840 0000F4C8 # writed( cycle );
841 0000F4C8 dd effffff8fe pushl _cycle
842 0000F4CE fe 08 effffff8f7 callf $8,_writed
843 0000F4D5 # writes(" MULF test ");
844 0000F4D5 .data 1
845 00000e91 * L326:
846 00000e91 * 20204D554C462074657374200 .ascii " MULF test \0"
0
847 00000e9e * .text
848 0000F4D5 dd 8f00000e91 pushl $L326
849 0000F4DB fe 08 effffff8ea callf $8,_writes
850 0000F4E2 # writed( test_no );
851 0000F4E2 dd effffff8e4 pushl _test_no
852 0000F4E8 fe 08 effffff8dd callf $8,_writed
853 0000F4EF # writes(", subtest 6 - A REGISTER WAS MODIFIED\n");
854 0000F4EF .data 1
855 00000e9e * L327:
856 00000e9e * 2C20737562746573742036202 .ascii ", subtest 6 - A REGISTER WAS MODIFIED\12\0"
D204120524547495354455220
574153204D4F4449464945440
A00
857 00000ec5 * .text
858 0000F4EF dd 8f00000e9e pushl $L327
859 0000F4F5 fe 08 effffff8d0 callf $8,_writes
860 0000F4FC # print_mulf_data(); /* print the operands */
861 0000F4FC fe 04 ef0000048d callf $4,_print_mulf_data
862 0000F503 # writes("register "); /* print the information */
863 0000F503 .data 1
864 00000ec5 * L328:
865 00000ec5 * 72656769737465722000 .ascii "register \0"
866 00000ecf * .text
867 0000F503 dd 8f00000ec5 pushl $L328
868 0000F509 fe 08 effffff8bc callf $8,_writes
869 0000F510 # writed( index2 ); /* about the corrupted */
870 0000F510 dd effffff8b6 pushl _index2
871 0000F516 fe 08 effffff8af callf $8,_writed
872 0000F51D # writes(" = "); /* register */
873 0000F51D .data 1
874 00000ecf * L329:
875 00000ecf * 203D2000 .ascii " = \0"
876 00000ed3 * .text
877 0000F51D dd 8f00000ecf pushl $L329
878 0000F523 fe 08 effffff8a2 callf $8,_writes
879 0000F52A # write32h( store_regs[index2] );
880 0000F52A 0d effffff89c 50 movl _index2,r0
881 0000F531 dd 40effffff894 pushl _store_regs[r0]
882 0000F538 fe 08 effffff88d callf $8,_write32h
883 0000F53F # writes(", should be = ");
884 0000F53F .data 1
885 00000ed3 * L331:
886 00000ed3 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
887 00000ee3 * .text
888 0000F53F dd 8f00000ed3 pushl $L331
889 0000F545 fe 08 effffff880 callf $8,_writes
890 0000F54C # write32h( load_regs[index2] );
891 0000F54C 0d effffff87a 50 movl _index2,r0
892 0000F553 dd 40effffff872 pushl _load_regs[r0]
893 0000F55A fe 08 effffff86b callf $8,_write32h
894 0000F561 # writes("\n");
895 0000F561 .data 1
896 00000ee3 * L332:
897 00000ee3 * 0A00 .ascii "\12\0"
898 00000ee5 * .text
899 0000F561 dd 8f00000ee3 pushl $L332
900 0000F567 fe 08 effffff85e callf $8,_writes
901 0000F56E # }
902 0000F56E # if( halt_flg )
903 0000F56E L323:
904 0000F56E 5d effffff858 tstl _halt_flg
905 0000F574 31 09 jeql L333
906 0000F576 # mulf_er_halt( BAD_REG_HLT ); /* halt on the error */
907 0000F576 dd 02 pushl $2
908 0000F578 fe 08 ef000004af callf $8,_mulf_er_halt
909 0000F57F # if( loop_on_err ) {
910 0000F57F L333:
911 0000F57F 5d effffff847 tstl _loop_on_err
912 0000F585 31 0a jeql L334
913 0000F587 # force_loop = TRUE; /* set the force loop flag */
914 0000F587 0d 01 effffff83e movl $1,_force_loop
915 0000F58E # asm("brw _mulf_6_lp1");; /* and loop on the error */
916 0000F58E 13 fe9b brw _mulf_6_lp1
917 0000F591 # } /* end of loop on error */
918 0000F591 # } /* end of register corruption error */
919 0000F591 L334:
920 0000F591 # } /* end of subtest 6 */
921 0000F591 L322:
922 0000F591 40 ret#2
923 0000F592 .set L314,0x0
924 0000F592 L316:
925 0000F592 13 fe56 jbr L317
926 0000F595 .data
927 00000d1c * .text
928 0000F595 00 .align 1
929 0000F596 .globl _mulf_7
930 0000F596 _mulf_7:
931 0000F596 0000 .word L335
932 0000F598 #
933 0000F598 #
934 0000F598 #
935 0000F598 # /************************************************************************
936 0000F598 # *
937 0000F598 # * SUBTEST 7 - Check for PSL corruption
938 0000F598 # *
939 0000F598 # ************************************************************************/
940 0000F598 # mulf_7()
941 0000F598 # {
942 0000F598 13 01a6 jbr L337
943 0000F59B L338:
944 0000F59B # force_loop = FALSE; /* clear force_loop flg */
945 0000F59B 4d effffff82b clrl _force_loop
946 0000F5A1 # subtest = 7;
947 0000F5A1 0d 07 effffff824 movl $7,_subtest
948 0000F5A8 # fill_reg_buf( load_regs ); /* get patterns for regs */
949 0000F5A8 dd 8f00000000 pushl $_load_regs
950 0000F5AE fe 08 effffff817 callf $8,_fill_reg_buf
951 0000F5B5 # for( index = 0; index < 3; index++ ) {
952 0000F5B5 4d effffff811 clrl _index
953 0000F5BB L341:
954 0000F5BB 1d effffff80b 03 cmpl _index,$3
955 0000F5C2 91 03 13 0179 jgeq L340
956 0000F5C7 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
957 0000F5C7 5c 0c effffff7fe 50 mull3 $12,_index,r0
958 0000F5CF 0d e000000000 effffff7f2 movl _mulf_1_data(r0),_sgl_ld_acc
959 0000F5DA # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
960 0000F5DA 5c 0c effffff7eb 50 mull3 $12,_index,r0
961 0000F5E2 0d e000000004 effffff7df movl _mulf_1_data+4(r0),_sgl_value_1
962 0000F5ED # sgl_expected = mulf_1_data[index].exp; /* get expected */
963 0000F5ED 5c 0c effffff7d8 50 mull3 $12,_index,r0
964 0000F5F5 0d e000000008 effffff7cc movl _mulf_1_data+8(r0),_sgl_expected
965 0000F600 # sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */
966 0000F600 0d effffff7c6 50 movl _status_index,r0
967 0000F607 0d 40effffff7be movl _status_array[r0],_sgl_dummy1
effffff7b9
968 0000F613 # /*
969 0000F613 # * If LOOP ON ERROR is set, this is the loop for this subtest.
970 0000F613 # * The force loop flag is set after the first error.
971 0000F613 # */
972 0000F613 # asm("_mulf_7_lp1:");
973 0000F613 _mulf_7_lp1:
974 0000F613 # asm("ldf _sgl_ld_acc"); /* LOAD the accumulator */
975 0000F613 06 effffff7b3 ldf _sgl_ld_acc
976 0000F619 # asm("nop");
977 0000F619 10 nop
978 0000F61A # asm("tstl _sgl_dummy1"); /* set the PSL status */
979 0000F61A 5d effffff7ac tstl _sgl_dummy1
980 0000F620 # asm("movpsl _init_psl"); /* save the initial PSL */
981 0000F620 cd effffff7a6 movpsl _init_psl
982 0000F626 # asm("mulf _sgl_value_1"); /* do the multiply */
983 0000F626 e6 effffff7a0 mulf _sgl_value_1
984 0000F62C # asm("nop");
985 0000F62C 10 nop
986 0000F62D # asm("movpsl _psl_val"); /* save the final PSL */
987 0000F62D cd effffff799 movpsl _psl_val
988 0000F633 # asm("stf _sgl_st_acc"); /* save the accumulator */
989 0000F633 26 effffff793 stf _sgl_st_acc
990 0000F639 # if( force_loop )
991 0000F639 5d effffff78d tstl _force_loop
992 0000F63F 31 02 jeql L342
993 0000F641 # asm("brb _mulf_7_lp1");; /* loop on the error */
994 0000F641 11 d0 brb _mulf_7_lp1
995 0000F643 L342:
996 0000F643 # /*
997 0000F643 # * Now compare the final PSL to the initial PSL -they should be the same
998 0000F643 # */
999 0000F643 # if( psl_val != init_psl ) {
1000 0000F643 1d effffff783 effffff77e cmpl _psl_val,_init_psl
1001 0000F64E 21 03 13 00e4 jeql L343
1002 0000F653 # errcnt++; /* bump the error count */
1003 0000F653 6d effffff773 incl _errcnt
1004 0000F659 # if( prt_error ) {
1005 0000F659 5d effffff76d tstl _prt_error
1006 0000F65F 21 03 13 00b0 jeql L344
1007 0000F664 # writes(" \n"); /* start a new print line */
1008 0000F664 .data 1
1009 00000ee5 * L345:
1010 00000ee5 * 200A00 .ascii " \12\0"
1011 00000ee8 * .text
1012 0000F664 dd 8f00000ee5 pushl $L345
1013 0000F66A fe 08 effffff75b callf $8,_writes
1014 0000F671 # writes("cycle: ");
1015 0000F671 .data 1
1016 00000ee8 * L346:
1017 00000ee8 * 6379636C653A2000 .ascii "cycle: \0"
1018 00000ef0 * .text
1019 0000F671 dd 8f00000ee8 pushl $L346
1020 0000F677 fe 08 effffff74e callf $8,_writes
1021 0000F67E # writed( cycle );
1022 0000F67E dd effffff748 pushl _cycle
1023 0000F684 fe 08 effffff741 callf $8,_writed
1024 0000F68B # writes(" MULF test ");
1025 0000F68B .data 1
1026 00000ef0 * L347:
1027 00000ef0 * 20204D554C462074657374200 .ascii " MULF test \0"
0
1028 00000efd * .text
1029 0000F68B dd 8f00000ef0 pushl $L347
1030 0000F691 fe 08 effffff734 callf $8,_writes
1031 0000F698 # writed( test_no );
1032 0000F698 dd effffff72e pushl _test_no
1033 0000F69E fe 08 effffff727 callf $8,_writed
1034 0000F6A5 # writes(", subtest 7 - INCORRECT FINAL PSL\n");
1035 0000F6A5 .data 1
1036 00000efd * L348:
1037 00000efd * 2C20737562746573742037202 .ascii ", subtest 7 - INCORRECT FINAL PSL\12\0"
D20494E434F52524543542046
494E414C2050534C0A00
1038 00000f20 * .text
1039 0000F6A5 dd 8f00000efd pushl $L348
1040 0000F6AB fe 08 effffff71a callf $8,_writes
1041 0000F6B2 # print_mulf_data(); /* print the operands */
1042 0000F6B2 fe 04 ef000002d7 callf $4,_print_mulf_data
1043 0000F6B9 # writes("initial PSL = ");
1044 0000F6B9 .data 1
1045 00000f20 * L349:
1046 00000f20 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
1047 00000f2f * .text
1048 0000F6B9 dd 8f00000f20 pushl $L349
1049 0000F6BF fe 08 effffff706 callf $8,_writes
1050 0000F6C6 # write32h( init_psl );
1051 0000F6C6 dd effffff700 pushl _init_psl
1052 0000F6CC fe 08 effffff6f9 callf $8,_write32h
1053 0000F6D3 # writes(", final PSL = ");
1054 0000F6D3 .data 1
1055 00000f2f * L350:
1056 00000f2f * 2C2066696E616C2050534C203 .ascii ", final PSL = \0"
D2000
1057 00000f3e * .text
1058 0000F6D3 dd 8f00000f2f pushl $L350
1059 0000F6D9 fe 08 effffff6ec callf $8,_writes
1060 0000F6E0 # write32h( psl_val );
1061 0000F6E0 dd effffff6e6 pushl _psl_val
1062 0000F6E6 fe 08 effffff6df callf $8,_write32h
1063 0000F6ED # writes(", expected PSL = ");
1064 0000F6ED .data 1
1065 00000f3e * L351:
1066 00000f3e * 2C20657870656374656420505 .ascii ", expected PSL = \0"
34C203D2000
1067 00000f50 * .text
1068 0000F6ED dd 8f00000f3e pushl $L351
1069 0000F6F3 fe 08 effffff6d2 callf $8,_writes
1070 0000F6FA # write32h( exp_psl );
1071 0000F6FA dd effffff6cc pushl _exp_psl
1072 0000F700 fe 08 effffff6c5 callf $8,_write32h
1073 0000F707 # writes("\n");
1074 0000F707 .data 1
1075 00000f50 * L352:
1076 00000f50 * 0A00 .ascii "\12\0"
1077 00000f52 * .text
1078 0000F707 dd 8f00000f50 pushl $L352
1079 0000F70D fe 08 effffff6b8 callf $8,_writes
1080 0000F714 # }
1081 0000F714 # if( halt_flg )
1082 0000F714 L344:
1083 0000F714 5d effffff6b2 tstl _halt_flg
1084 0000F71A 31 09 jeql L353
1085 0000F71C # mulf_er_halt( BAD_PSL_HLT ); /* halt on the error */
1086 0000F71C dd 03 pushl $3
1087 0000F71E fe 08 ef00000309 callf $8,_mulf_er_halt
1088 0000F725 # if( loop_on_err ) {
1089 0000F725 L353:
1090 0000F725 5d effffff6a1 tstl _loop_on_err
1091 0000F72B 31 0a jeql L354
1092 0000F72D # force_loop = TRUE; /* set the force loop flag */
1093 0000F72D 0d 01 effffff698 movl $1,_force_loop
1094 0000F734 # asm("brw _mulf_7_lp1");; /* and loop on the error */
1095 0000F734 13 fedc brw _mulf_7_lp1
1096 0000F737 # } /* end of loop on error */
1097 0000F737 # } /* end of PSL corruption error */
1098 0000F737 L354:
1099 0000F737 # } /* end of WHILE loop */
1100 0000F737 L343:
1101 0000F737 L339:
1102 0000F737 6d effffff68f incl _index
1103 0000F73D 13 fe7b jbr L341
1104 0000F740 L340:
1105 0000F740 # } /* end of subtest 7 */
1106 0000F740 40 ret#2
1107 0000F741 .set L335,0x0
1108 0000F741 L337:
1109 0000F741 13 fe57 jbr L338
1110 0000F744 .data
1111 00000d1c * .text
1112 0000F744 .align 1
1113 0000F744 .globl _mulf_8
1114 0000F744 _mulf_8:
1115 0000F744 0000 .word L355
1116 0000F746 #
1117 0000F746 #
1118 0000F746 #
1119 0000F746 # /************************************************************************
1120 0000F746 # *
1121 0000F746 # * SUBTEST 8 - pipelined entry test
1122 0000F746 # *
1123 0000F746 # ************************************************************************/
1124 0000F746 # mulf_8()
1125 0000F746 # {
1126 0000F746 13 011d jbr L357
1127 0000F749 L358:
1128 0000F749 # force_loop = FALSE;
1129 0000F749 4d effffff67d clrl _force_loop
1130 0000F74F # subtest = 8;
1131 0000F74F 0d 08 effffff676 movl $8,_subtest
1132 0000F756 # for( index = 0; index < max_mulf_1_index; index++ ) {
1133 0000F756 4d effffff670 clrl _index
1134 0000F75C L361:
1135 0000F75C 1d effffff66a effffff665 cmpl _index,_max_mulf_1_index
1136 0000F767 91 03 13 00f9 jgeq L360
1137 0000F76C # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
1138 0000F76C 5c 0c effffff659 50 mull3 $12,_index,r0
1139 0000F774 0d e000000000 effffff64d movl _mulf_1_data(r0),_sgl_ld_acc
1140 0000F77F # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
1141 0000F77F 5c 0c effffff646 50 mull3 $12,_index,r0
1142 0000F787 0d e000000004 effffff63a movl _mulf_1_data+4(r0),_sgl_value_1
1143 0000F792 # sgl_expected = mulf_1_data[index].exp; /* get expected result */
1144 0000F792 5c 0c effffff633 50 mull3 $12,_index,r0
1145 0000F79A 0d e000000008 effffff627 movl _mulf_1_data+8(r0),_sgl_expected
1146 0000F7A5 # /*
1147 0000F7A5 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1148 0000F7A5 # * The force loop flag is set after the first error.
1149 0000F7A5 # */
1150 0000F7A5 # asm("_mulf_8_lp1:");
1151 0000F7A5 _mulf_8_lp1:
1152 0000F7A5 # asm("movl $0,r0"); /* clear r0 */
1153 0000F7A5 0d 00 50 movl $0,r0
1154 0000F7A8 # asm("ldf r0"); /* load the Acc. with 0.0 */
1155 0000F7A8 06 50 ldf r0
1156 0000F7AA # asm("addf _sgl_ld_acc"); /* add the 1st operand */
1157 0000F7AA c6 effffff61c addf _sgl_ld_acc
1158 0000F7B0 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */
1159 0000F7B0 e6 effffff616 mulf _sgl_value_1
1160 0000F7B6 # asm("stf _sgl_st_acc"); /* store the result */
1161 0000F7B6 26 effffff610 stf _sgl_st_acc
1162 0000F7BC # if( force_loop )
1163 0000F7BC 5d effffff60a tstl _force_loop
1164 0000F7C2 31 02 jeql L362
1165 0000F7C4 # asm("brb _mulf_8_lp1");; /* loop on the error */
1166 0000F7C4 11 df brb _mulf_8_lp1
1167 0000F7C6 L362:
1168 0000F7C6 # /*
1169 0000F7C6 # * end error loop - test the results
1170 0000F7C6 # */
1171 0000F7C6 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1172 0000F7C6 1d effffff600 effffff5fb cmpl _sgl_st_acc,_sgl_expected
1173 0000F7D1 21 03 13 0086 jeql L363
1174 0000F7D6 # errcnt++; /* bump the error count */
1175 0000F7D6 6d effffff5f0 incl _errcnt
1176 0000F7DC # if( prt_error ) {
1177 0000F7DC 5d effffff5ea tstl _prt_error
1178 0000F7E2 31 55 jeql L364
1179 0000F7E4 # writes(" \n"); /* start a new print line */
1180 0000F7E4 .data 1
1181 00000f52 * L365:
1182 00000f52 * 200A00 .ascii " \12\0"
1183 00000f55 * .text
1184 0000F7E4 dd 8f00000f52 pushl $L365
1185 0000F7EA fe 08 effffff5db callf $8,_writes
1186 0000F7F1 # writes("cycle: ");
1187 0000F7F1 .data 1
1188 00000f55 * L366:
1189 00000f55 * 6379636C653A2000 .ascii "cycle: \0"
1190 00000f5d * .text
1191 0000F7F1 dd 8f00000f55 pushl $L366
1192 0000F7F7 fe 08 effffff5ce callf $8,_writes
1193 0000F7FE # writed( cycle );
1194 0000F7FE dd effffff5c8 pushl _cycle
1195 0000F804 fe 08 effffff5c1 callf $8,_writed
1196 0000F80B # writes(" MULF test ");
1197 0000F80B .data 1
1198 00000f5d * L367:
1199 00000f5d * 20204D554C462074657374200 .ascii " MULF test \0"
0
1200 00000f6a * .text
1201 0000F80B dd 8f00000f5d pushl $L367
1202 0000F811 fe 08 effffff5b4 callf $8,_writes
1203 0000F818 # writed( test_no );
1204 0000F818 dd effffff5ae pushl _test_no
1205 0000F81E fe 08 effffff5a7 callf $8,_writed
1206 0000F825 # writes(", subtest 8 (Piped Entry) - BAD FINAL ACC\n");
1207 0000F825 .data 1
1208 00000f6a * L368:
1209 00000f6a * 2C20737562746573742038202 .ascii ", subtest 8 (Piped Entry) - BAD FINAL ACC\12\0"
8506970656420456E74727929
202D204241442046494E414C2
04143430A00
1210 00000f95 * .text
1211 0000F825 dd 8f00000f6a pushl $L368
1212 0000F82B fe 08 effffff59a callf $8,_writes
1213 0000F832 # print_mulf_data();
1214 0000F832 fe 04 ef00000157 callf $4,_print_mulf_data
1215 0000F839 # }
1216 0000F839 # if( halt_flg )
1217 0000F839 L364:
1218 0000F839 5d effffff58d tstl _halt_flg
1219 0000F83F 31 09 jeql L369
1220 0000F841 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1221 0000F841 dd 01 pushl $1
1222 0000F843 fe 08 ef000001e4 callf $8,_mulf_er_halt
1223 0000F84A # if( loop_on_err ) {
1224 0000F84A L369:
1225 0000F84A 5d effffff57c tstl _loop_on_err
1226 0000F850 31 0a jeql L370
1227 0000F852 # force_loop = TRUE; /* set the force loop flag */
1228 0000F852 0d 01 effffff573 movl $1,_force_loop
1229 0000F859 # asm("brw _mulf_8_lp1");; /* and loop on the error */
1230 0000F859 13 ff49 brw _mulf_8_lp1
1231 0000F85C # } /* end of loop on error */
1232 0000F85C # } /* end of compare error */
1233 0000F85C L370:
1234 0000F85C # } /* end of WHILE loop */
1235 0000F85C L363:
1236 0000F85C L359:
1237 0000F85C 6d effffff56a incl _index
1238 0000F862 13 fef7 jbr L361
1239 0000F865 L360:
1240 0000F865 # } /* end of subtest 8 */
1241 0000F865 40 ret#2
1242 0000F866 .set L355,0x0
1243 0000F866 L357:
1244 0000F866 13 fee0 jbr L358
1245 0000F869 .data
1246 00000d1c * .text
1247 0000F869 00 .align 1
1248 0000F86A .globl _mulf_9
1249 0000F86A _mulf_9:
1250 0000F86A 0000 .word L371
1251 0000F86C #
1252 0000F86C #
1253 0000F86C #
1254 0000F86C # /************************************************************************
1255 0000F86C # *
1256 0000F86C # * SUBTEST 9 - pipelined exit test
1257 0000F86C # *
1258 0000F86C # ************************************************************************/
1259 0000F86C # mulf_9()
1260 0000F86C # {
1261 0000F86C 13 011d jbr L373
1262 0000F86F L374:
1263 0000F86F # force_loop = FALSE;
1264 0000F86F 4d effffff557 clrl _force_loop
1265 0000F875 # subtest = 9;
1266 0000F875 0d 09 effffff550 movl $9,_subtest
1267 0000F87C # for( index = 0; index < max_mulf_1_index; index++ ) {
1268 0000F87C 4d effffff54a clrl _index
1269 0000F882 L377:
1270 0000F882 1d effffff544 effffff53f cmpl _index,_max_mulf_1_index
1271 0000F88D 91 03 13 00f9 jgeq L376
1272 0000F892 # sgl_ld_acc = mulf_1_data[index].op_1; /* get operand 1 */
1273 0000F892 5c 0c effffff533 50 mull3 $12,_index,r0
1274 0000F89A 0d e000000000 effffff527 movl _mulf_1_data(r0),_sgl_ld_acc
1275 0000F8A5 # sgl_value_1 = mulf_1_data[index].op_2; /* get operand 2 */
1276 0000F8A5 5c 0c effffff520 50 mull3 $12,_index,r0
1277 0000F8AD 0d e000000004 effffff514 movl _mulf_1_data+4(r0),_sgl_value_1
1278 0000F8B8 # sgl_expected = mulf_1_data[index].exp; /* get expected result */
1279 0000F8B8 5c 0c effffff50d 50 mull3 $12,_index,r0
1280 0000F8C0 0d e000000008 effffff501 movl _mulf_1_data+8(r0),_sgl_expected
1281 0000F8CB # /*
1282 0000F8CB # * If LOOP ON ERROR is set, this is the loop for this subtest.
1283 0000F8CB # * The force loop flag is set after the first error.
1284 0000F8CB # */
1285 0000F8CB # asm("_mulf_9_lp1:");
1286 0000F8CB _mulf_9_lp1:
1287 0000F8CB # asm("movl $0,r0"); /* clear r0 */
1288 0000F8CB 0d 00 50 movl $0,r0
1289 0000F8CE # asm("ldf _sgl_ld_acc"); /* load the 1st operand */
1290 0000F8CE 06 effffff4f8 ldf _sgl_ld_acc
1291 0000F8D4 # asm("mulf _sgl_value_1"); /* multiply the 2nd operand */
1292 0000F8D4 e6 effffff4f2 mulf _sgl_value_1
1293 0000F8DA # asm("addf r0"); /* add a 0.0 to the result */
1294 0000F8DA c6 50 addf r0
1295 0000F8DC # asm("stf _sgl_st_acc"); /* store the result */
1296 0000F8DC 26 effffff4ea stf _sgl_st_acc
1297 0000F8E2 # if( force_loop )
1298 0000F8E2 5d effffff4e4 tstl _force_loop
1299 0000F8E8 31 02 jeql L378
1300 0000F8EA # asm("brb _mulf_9_lp1");; /* loop on the error */
1301 0000F8EA 11 df brb _mulf_9_lp1
1302 0000F8EC L378:
1303 0000F8EC # /*
1304 0000F8EC # * end error loop - test the results
1305 0000F8EC # */
1306 0000F8EC # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
1307 0000F8EC 1d effffff4da effffff4d5 cmpl _sgl_st_acc,_sgl_expected
1308 0000F8F7 21 03 13 0086 jeql L379
1309 0000F8FC # errcnt++; /* bump the error count */
1310 0000F8FC 6d effffff4ca incl _errcnt
1311 0000F902 # if( prt_error ) {
1312 0000F902 5d effffff4c4 tstl _prt_error
1313 0000F908 31 55 jeql L380
1314 0000F90A # writes(" \n"); /* start a new print line */
1315 0000F90A .data 1
1316 00000f95 * L381:
1317 00000f95 * 200A00 .ascii " \12\0"
1318 00000f98 * .text
1319 0000F90A dd 8f00000f95 pushl $L381
1320 0000F910 fe 08 effffff4b5 callf $8,_writes
1321 0000F917 # writes("cycle: ");
1322 0000F917 .data 1
1323 00000f98 * L382:
1324 00000f98 * 6379636C653A2000 .ascii "cycle: \0"
1325 00000fa0 * .text
1326 0000F917 dd 8f00000f98 pushl $L382
1327 0000F91D fe 08 effffff4a8 callf $8,_writes
1328 0000F924 # writed( cycle );
1329 0000F924 dd effffff4a2 pushl _cycle
1330 0000F92A fe 08 effffff49b callf $8,_writed
1331 0000F931 # writes(" MULF test ");
1332 0000F931 .data 1
1333 00000fa0 * L383:
1334 00000fa0 * 20204D554C462074657374200 .ascii " MULF test \0"
0
1335 00000fad * .text
1336 0000F931 dd 8f00000fa0 pushl $L383
1337 0000F937 fe 08 effffff48e callf $8,_writes
1338 0000F93E # writed( test_no );
1339 0000F93E dd effffff488 pushl _test_no
1340 0000F944 fe 08 effffff481 callf $8,_writed
1341 0000F94B # writes(", subtest 9 (Piped Exit) - BAD FINAL ACC\n");
1342 0000F94B .data 1
1343 00000fad * L384:
1344 00000fad * 2C20737562746573742039202 .ascii ", subtest 9 (Piped Exit) - BAD FINAL ACC\12\0"
8506970656420457869742920
2D204241442046494E414C204
143430A00
1345 00000fd7 * .text
1346 0000F94B dd 8f00000fad pushl $L384
1347 0000F951 fe 08 effffff474 callf $8,_writes
1348 0000F958 # print_mulf_data();
1349 0000F958 fe 04 ef00000031 callf $4,_print_mulf_data
1350 0000F95F # }
1351 0000F95F # if( halt_flg )
1352 0000F95F L380:
1353 0000F95F 5d effffff467 tstl _halt_flg
1354 0000F965 31 09 jeql L385
1355 0000F967 # mulf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1356 0000F967 dd 01 pushl $1
1357 0000F969 fe 08 ef000000be callf $8,_mulf_er_halt
1358 0000F970 # if( loop_on_err ) {
1359 0000F970 L385:
1360 0000F970 5d effffff456 tstl _loop_on_err
1361 0000F976 31 0a jeql L386
1362 0000F978 # force_loop = TRUE; /* set the force loop flag */
1363 0000F978 0d 01 effffff44d movl $1,_force_loop
1364 0000F97F # asm("brw _mulf_9_lp1");; /* and loop on the error */
1365 0000F97F 13 ff49 brw _mulf_9_lp1
1366 0000F982 # } /* end of loop on error */
1367 0000F982 # } /* end of compare error */
1368 0000F982 L386:
1369 0000F982 # } /* end of WHILE loop */
1370 0000F982 L379:
1371 0000F982 L375:
1372 0000F982 6d effffff444 incl _index
1373 0000F988 13 fef7 jbr L377
1374 0000F98B L376:
1375 0000F98B # } /* end of subtest 9 */
1376 0000F98B 40 ret#2
1377 0000F98C .set L371,0x0
1378 0000F98C L373:
1379 0000F98C 13 fee0 jbr L374
1380 0000F98F .data
1381 00000d1c * .text
1382 0000F98F 00 .align 1
1383 0000F990 .globl _print_mulf_data
1384 0000F990 _print_mulf_data:
1385 0000F990 0000 .word L387
1386 0000F992 #
1387 0000F992 #
1388 0000F992 #
1389 0000F992 # /**************************************************************************
1390 0000F992 # *
1391 0000F992 # * PRINT THE DATA AND STORE RESULTS
1392 0000F992 # *
1393 0000F992 # * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx
1394 0000F992 # * operand = xxxxxxxx, expected = xxxxxxxx
1395 0000F992 # **************************************************************************/
1396 0000F992 # print_mulf_data()
1397 0000F992 # {
1398 0000F992 13 0095 jbr L389
1399 0000F995 L390:
1400 0000F995 # writes("initial Acc = ");
1401 0000F995 .data 1
1402 00000fd7 * L391:
1403 00000fd7 * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
1404 00000fe6 * .text
1405 0000F995 dd 8f00000fd7 pushl $L391
1406 0000F99B fe 08 effffff42a callf $8,_writes
1407 0000F9A2 # write32h( sgl_ld_acc );
1408 0000F9A2 dd effffff424 pushl _sgl_ld_acc
1409 0000F9A8 fe 08 effffff41d callf $8,_write32h
1410 0000F9AF # writes(", stored = ");
1411 0000F9AF .data 1
1412 00000fe6 * L392:
1413 00000fe6 * 2C2020202073746F726564203 .ascii ", stored = \0"
D2000
1414 00000ff5 * .text
1415 0000F9AF dd 8f00000fe6 pushl $L392
1416 0000F9B5 fe 08 effffff410 callf $8,_writes
1417 0000F9BC # write32h( sgl_st_acc );
1418 0000F9BC dd effffff40a pushl _sgl_st_acc
1419 0000F9C2 fe 08 effffff403 callf $8,_write32h
1420 0000F9C9 # writes(", data index = ");
1421 0000F9C9 .data 1
1422 00000ff5 * L393:
1423 00000ff5 * 2C20206461746120696E64657 .ascii ", data index = \0"
8203D2000
1424 00001006 * .text
1425 0000F9C9 dd 8f00000ff5 pushl $L393
1426 0000F9CF fe 08 effffff3f6 callf $8,_writes
1427 0000F9D6 # writed( index );
1428 0000F9D6 dd effffff3f0 pushl _index
1429 0000F9DC fe 08 effffff3e9 callf $8,_writed
1430 0000F9E3 # writec('\n');
1431 0000F9E3 dd 0a pushl $10
1432 0000F9E5 fe 08 effffff3e0 callf $8,_writec
1433 0000F9EC # writes(" operand = ");
1434 0000F9EC .data 1
1435 00001006 * L395:
1436 00001006 * 202020206F706572616E64203 .ascii " operand = \0"
D2000
1437 00001015 * .text
1438 0000F9EC dd 8f00001006 pushl $L395
1439 0000F9F2 fe 08 effffff3d3 callf $8,_writes
1440 0000F9F9 # write32h( sgl_value_1 );
1441 0000F9F9 dd effffff3cd pushl _sgl_value_1
1442 0000F9FF fe 08 effffff3c6 callf $8,_write32h
1443 0000FA06 # writes(", expected = ");
1444 0000FA06 .data 1
1445 00001015 * L396:
1446 00001015 * 2C20206578706563746564203 .ascii ", expected = \0"
D2000
1447 00001024 * .text
1448 0000FA06 dd 8f00001015 pushl $L396
1449 0000FA0C fe 08 effffff3b9 callf $8,_writes
1450 0000FA13 # write32h( sgl_expected );
1451 0000FA13 dd effffff3b3 pushl _sgl_expected
1452 0000FA19 fe 08 effffff3ac callf $8,_write32h
1453 0000FA20 # writec('\n');
1454 0000FA20 dd 0a pushl $10
1455 0000FA22 fe 08 effffff3a3 callf $8,_writec
1456 0000FA29 # }
1457 0000FA29 40 ret#2
1458 0000FA2A .set L387,0x0
1459 0000FA2A L389:
1460 0000FA2A 13 ff68 jbr L390
1461 0000FA2D .data
1462 00000d1c * .text
1463 0000FA2D 00 .align 1
1464 0000FA2E .globl _mulf_er_halt
1465 0000FA2E _mulf_er_halt:
1466 0000FA2E 0000 .word L397
1467 0000FA30 #
1468 0000FA30 #
1469 0000FA30 #
1470 0000FA30 # /**************************************************************************
1471 0000FA30 # *
1472 0000FA30 # * HALT ON ERROR ROUTINE
1473 0000FA30 # *
1474 0000FA30 # **************************************************************************/
1475 0000FA30 # mulf_er_halt( halt_code )
1476 0000FA30 # int halt_code;
1477 0000FA30 # {
1478 0000FA30 13 00af jbr L399
1479 0000FA33 L400:
1480 0000FA33 # sgl_dummy1 = halt_code; /* get the error type */
1481 0000FA33 0d ad04 effffff391 movl 4(fp),_sgl_dummy1
1482 0000FA3B # asm("movl _test_no,r0"); /* r0 = test number */
1483 0000FA3B 0d effffff38b 50 movl _test_no,r0
1484 0000FA42 # asm("movl _subtest,r1"); /* r1 = subtest number */
1485 0000FA42 0d effffff384 51 movl _subtest,r1
1486 0000FA49 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1487 0000FA49 0d effffff37d 52 movl _sgl_dummy1,r2
1488 0000FA50 # asm("movl _cycle,r3"); /* r3 = cycle count */
1489 0000FA50 0d effffff376 53 movl _cycle,r3
1490 0000FA57 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1491 0000FA57 0d effffff36f 54 movl _sgl_ld_acc,r4
1492 0000FA5E # asm("movl _sgl_value_1,r5"); /* r5 = data multiplied */
1493 0000FA5E 0d effffff368 55 movl _sgl_value_1,r5
1494 0000FA65 # asm("movl _sgl_st_acc,r6"); /* r6 = data stored */
1495 0000FA65 0d effffff361 56 movl _sgl_st_acc,r6
1496 0000FA6C # if( halt_code == BAD_ACC_HLT ) {
1497 0000FA6C 1d ad04 01 cmpl 4(fp),$1
1498 0000FA70 21 10 jneq L401
1499 0000FA72 # asm("movl _sgl_expected,r7"); /* r7 = data expected */
1500 0000FA72 0d effffff354 57 movl _sgl_expected,r7
1501 0000FA79 # asm("movl _index,r8"); /* r8 = data index */
1502 0000FA79 0d effffff34d 58 movl _index,r8
1503 0000FA80 # } else
1504 0000FA80 11 5e jbr L402
1505 0000FA82 L401:
1506 0000FA82 # if( halt_code == BAD_REG_HLT ) {
1507 0000FA82 1d ad04 02 cmpl 4(fp),$2
1508 0000FA86 21 3d jneq L403
1509 0000FA88 # sgl_dummy1 = load_regs[index2];
1510 0000FA88 0d effffff33e 50 movl _index2,r0
1511 0000FA8F 0d 40effffff336 movl _load_regs[r0],_sgl_dummy1
effffff331
1512 0000FA9B # sgl_dummy2 = store_regs[index2];
1513 0000FA9B 0d effffff32b 50 movl _index2,r0
1514 0000FAA2 0d 40effffff323 movl _store_regs[r0],_sgl_dummy2
effffff31e
1515 0000FAAE # asm("movl _index2,r7"); /* r7 = bad register # */
1516 0000FAAE 0d effffff318 57 movl _index2,r7
1517 0000FAB5 # asm("movl _sgl_dummy2,r8"); /* r8 = actual value */
1518 0000FAB5 0d effffff311 58 movl _sgl_dummy2,r8
1519 0000FABC # asm("movl _sgl_dummy1,r9"); /* r9 = expected value */
1520 0000FABC 0d effffff30a 59 movl _sgl_dummy1,r9
1521 0000FAC3 # } else
1522 0000FAC3 11 1b jbr L404
1523 0000FAC5 L403:
1524 0000FAC5 # if( halt_code == BAD_PSL_HLT ) {
1525 0000FAC5 1d ad04 03 cmpl 4(fp),$3
1526 0000FAC9 21 15 jneq L405
1527 0000FACB # asm("movl _init_psl,r7"); /* r7 = initial PSL */
1528 0000FACB 0d effffff2fb 57 movl _init_psl,r7
1529 0000FAD2 # asm("movl _psl_val,r8"); /* r8 = final PSL */
1530 0000FAD2 0d effffff2f4 58 movl _psl_val,r8
1531 0000FAD9 # asm("movl _exp_psl,r9"); /* r9 = expected PSL */
1532 0000FAD9 0d effffff2ed 59 movl _exp_psl,r9
1533 0000FAE0 # };
1534 0000FAE0 L405:
1535 0000FAE0 L404:
1536 0000FAE0 L402:
1537 0000FAE0 # asm("halt"); /* HALT ... */
1538 0000FAE0 00 halt
1539 0000FAE1 # }
1540 0000FAE1 40 ret#2
1541 0000FAE2 .set L397,0x0
1542 0000FAE2 L399:
1543 0000FAE2 13 ff4e jbr L400
1544 0000FAE5 .data
1544 0001E8B1 .data
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