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1.1 ! root 1: ! 2: #include "fpp_defs.h" ! 3: ! 4: ! 5: /***************************************************************************** ! 6: * ! 7: * NEGF - SINGLE PRECISION FLOATING POINT LOAD_NEGATE TEST ! 8: * ! 9: *****************************************************************************/ ! 10: negf() ! 11: { ! 12: asm(".globl _negf_t"); ! 13: asm("_negf_t:"); /* entry address */ ! 14: if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */ ! 15: writes(" NEGF"); ! 16: negf_1(); /* negate through the cache */ ! 17: negf_2(); /* register stability */ ! 18: negf_3(); /* PSL stability test */ ! 19: if( !no_fpp_wcs ) { ! 20: negf_4(); /* pipelined entry test */ ! 21: negf_5(); /* pipelined exit test */ ! 22: }; ! 23: asm("jmp *return"); /* return to the test monitor */ ! 24: } ! 25: ! 26: ! 27: ! 28: /************************************************************************ ! 29: * ! 30: * SUBTEST 1 - negate through memory ! 31: * ! 32: ************************************************************************/ ! 33: negf_1() ! 34: { ! 35: force_loop = FALSE; ! 36: subtest = 1; ! 37: for( index = 0; index < max_lnf_1_index; index++ ) { ! 38: sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */ ! 39: sgl_expected = lnf_1_data[index].exp; /* get expected result */ ! 40: /* ! 41: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 42: * The force loop flag is set after the first error. ! 43: */ ! 44: asm("_negf_1_lp1:"); ! 45: asm("ldf _sgl_ld_acc"); /* load the value */ ! 46: asm("negf"); /* negate the value */ ! 47: asm("stf _sgl_st_acc"); /* store the result */ ! 48: if( force_loop ) ! 49: asm("brb _negf_1_lp1");; /* loop on the error */ ! 50: /* ! 51: * end error loop - test the results ! 52: */ ! 53: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 54: errcnt++; /* bump the error count */ ! 55: if( prt_error ) { ! 56: writes(" \n"); /* start a new print line */ ! 57: writes("cycle: "); ! 58: writed( cycle ); ! 59: writes(" NEGF test "); ! 60: writed( test_no ); ! 61: writes(", subtest 1 (Cache Data) - BAD FINAL ACC\n"); ! 62: print_negf_data(); ! 63: writes(", data index = "); ! 64: writed( index ); ! 65: writec('\n'); ! 66: writes(" "); ! 67: writes("Acc expected = "); ! 68: write32h( sgl_expected ); ! 69: writec('\n'); ! 70: } ! 71: if( halt_flg ) ! 72: negf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 73: if( loop_on_err ) { ! 74: force_loop = TRUE; /* set the force loop flag */ ! 75: asm("brw _negf_1_lp1");; /* and loop on the error */ ! 76: } /* end of loop on error */ ! 77: } /* end of compare error */ ! 78: } /* end of WHILE loop */ ! 79: } /* end of subtest 1 */ ! 80: ! 81: ! 82: ! 83: /************************************************************************ ! 84: * ! 85: * SUBTEST 2 - Check for register corruption ! 86: * ! 87: ************************************************************************/ ! 88: negf_2() ! 89: { ! 90: force_loop = FALSE; /* clear force_loop flg */ ! 91: subtest = 2; ! 92: fill_reg_buf( load_regs ); /* get patterns for regs */ ! 93: index = 0; ! 94: sgl_ld_acc = lnf_1_data[0].ld; /* get value to negate */ ! 95: sgl_expected = lnf_1_data[0].exp; /* get expected result */ ! 96: /* ! 97: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 98: * The force loop flag is set after the first error. ! 99: */ ! 100: asm("_negf_2_lp1:"); ! 101: asm("ldf _sgl_ld_acc"); /* load the initial value */ ! 102: asm("nop"); ! 103: asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */ ! 104: asm("nop"); ! 105: asm("negf"); /* negate the value */ ! 106: asm("nop"); ! 107: asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */ ! 108: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 109: if( force_loop ) ! 110: asm("brb _negf_2_lp1");; /* loop on the error */ ! 111: /* ! 112: * Now compare the stored register values to those that were loaded ! 113: */ ! 114: index2 = 0; ! 115: while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) ) ! 116: index2++; /* check reg values */ ! 117: if( index2 < 13 ) { /* error if index2 < 13 */ ! 118: errcnt++; /* bump the error count */ ! 119: if( prt_error ) { ! 120: writes(" \n"); /* start a new print line */ ! 121: writes("cycle: "); ! 122: writed( cycle ); ! 123: writes(" NEGF test "); ! 124: writed( test_no ); ! 125: writes(", subtest 2 (Reg. Corr.) - A REGISTER WAS MODIFIED\n"); ! 126: print_negf_data(); /* print the operands */ ! 127: writes("\nregister "); /* print the information */ ! 128: writed( index2 ); /* about the corrupted */ ! 129: writes(" = "); /* register */ ! 130: write32h( store_regs[index2] ); ! 131: writes(", should be = "); ! 132: write32h( load_regs[index2] ); ! 133: writes("\n"); ! 134: } ! 135: if( halt_flg ) ! 136: negf_er_halt( BAD_REG_HLT ); /* halt on the error */ ! 137: if( loop_on_err ) { ! 138: force_loop = TRUE; /* set the force loop flag */ ! 139: asm("brw _negf_2_lp1");; /* and loop on the error */ ! 140: } /* end of loop on error */ ! 141: } /* end of register corruption error */ ! 142: } /* end of subtest 2 */ ! 143: ! 144: ! 145: ! 146: /************************************************************************ ! 147: * ! 148: * SUBTEST 3 - Check for PSL corruption ! 149: * ! 150: ************************************************************************/ ! 151: negf_3() ! 152: { ! 153: force_loop = FALSE; /* clear force_loop flg */ ! 154: subtest = 3; ! 155: fill_reg_buf( load_regs ); /* get patterns for regs */ ! 156: for( index = 0; index < 3; index++ ) { ! 157: sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */ ! 158: sgl_expected = lnf_1_data[index].exp; /* get expected */ ! 159: sgl_dummy1 = status_array[status_index]; /* status = +, -, 0 */ ! 160: /* ! 161: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 162: * The force loop flag is set after the first error. ! 163: */ ! 164: asm("_negf_3_lp1:"); ! 165: asm("ldf _sgl_ld_acc"); /* load the initial value */ ! 166: asm("nop"); ! 167: asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 168: asm("movpsl _init_psl"); /* save the initial PSL */ ! 169: asm("negf"); /* negate the value */ ! 170: asm("nop"); ! 171: asm("movpsl _psl_val"); /* save the final PSL */ ! 172: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 173: if( force_loop ) ! 174: asm("brb _negf_3_lp1");; /* loop on the error */ ! 175: /* ! 176: * Now compare the final PSL to the initial PSL -they should be the same ! 177: */ ! 178: exp_psl = init_psl; ! 179: if( psl_val != init_psl ) { ! 180: errcnt++; /* bump the error count */ ! 181: if( prt_error ) { ! 182: writes(" \n"); /* start a new print line */ ! 183: writes("cycle: "); ! 184: writed( cycle ); ! 185: writes(" NEGF test "); ! 186: writed( test_no ); ! 187: writes(", subtest 3 (PSL Corr.) - INCORRECT FINAL PSL\n"); ! 188: print_negf_data(); /* print the operands */ ! 189: writec('\n'); ! 190: writes("initial PSL = "); ! 191: write32h( init_psl ); ! 192: writes(", final PSL = "); ! 193: write32h( psl_val ); ! 194: writes(", expected PSL = "); ! 195: write32h( exp_psl ); ! 196: writec('\n'); ! 197: } ! 198: if( halt_flg ) ! 199: negf_er_halt( BAD_PSL_HLT ); /* halt on the error */ ! 200: if( loop_on_err ) { ! 201: force_loop = TRUE; /* set the force loop flag */ ! 202: asm("brw _negf_3_lp1");; /* and loop on the error */ ! 203: } /* end of loop on error */ ! 204: } /* end of PSL corruption error */ ! 205: } /* end of WHILE loop */ ! 206: } /* end of subtest 3 */ ! 207: ! 208: ! 209: ! 210: /************************************************************************ ! 211: * ! 212: * SUBTEST 4 - pipelined entry test ! 213: * ! 214: ************************************************************************/ ! 215: negf_4() ! 216: { ! 217: force_loop = FALSE; ! 218: subtest = 4; ! 219: for( index = 0; index < max_lnf_1_index; index++ ) { ! 220: sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */ ! 221: sgl_expected = lnf_1_data[index].exp; /* get expected result */ ! 222: /* ! 223: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 224: * The force loop flag is set after the first error. ! 225: */ ! 226: asm("_negf_4_lp1:"); ! 227: asm("movl $0,r0"); /* clear r0 */ ! 228: asm("ldf r0"); /* load the Acc. with 0.0 */ ! 229: asm("addf _sgl_ld_acc"); /* add the value to negate */ ! 230: asm("negf"); /* negate the value */ ! 231: asm("stf _sgl_st_acc"); /* store the result */ ! 232: if( force_loop ) ! 233: asm("brb _negf_4_lp1");; /* loop on the error */ ! 234: /* ! 235: * end error loop - test the results ! 236: */ ! 237: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 238: errcnt++; /* bump the error count */ ! 239: if( prt_error ) { ! 240: writes(" \n"); /* start a new print line */ ! 241: writes("cycle: "); ! 242: writed( cycle ); ! 243: writes(" NEGF test "); ! 244: writed( test_no ); ! 245: writes(", subtest 4 (Piped Entry) - BAD FINAL ACC\n"); ! 246: print_negf_data(); ! 247: writes(", data index = "); ! 248: writed( index ); ! 249: writec('\n'); ! 250: writes(" "); ! 251: writes("Acc expected = "); ! 252: write32h( sgl_expected ); ! 253: writec('\n'); ! 254: } ! 255: if( halt_flg ) ! 256: negf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 257: if( loop_on_err ) { ! 258: force_loop = TRUE; /* set the force loop flag */ ! 259: asm("brw _negf_4_lp1");; /* and loop on the error */ ! 260: } /* end of loop on error */ ! 261: } /* end of compare error */ ! 262: } /* end of WHILE loop */ ! 263: } /* end of subtest 4 */ ! 264: ! 265: ! 266: ! 267: /************************************************************************ ! 268: * ! 269: * SUBTEST 5 - pipelined exit test ! 270: * ! 271: ************************************************************************/ ! 272: negf_5() ! 273: { ! 274: force_loop = FALSE; ! 275: subtest = 5; ! 276: for( index = 0; index < max_lnf_1_index; index++ ) { ! 277: sgl_ld_acc = lnf_1_data[index].ld; /* get value to negate */ ! 278: sgl_expected = lnf_1_data[index].exp; /* get expected result */ ! 279: /* ! 280: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 281: * The force loop flag is set after the first error. ! 282: */ ! 283: asm("_negf_5_lp1:"); ! 284: asm("movl $0,r0"); /* clear r0 */ ! 285: asm("ldf _sgl_ld_acc"); /* load the value */ ! 286: asm("negf"); /* negate the value */ ! 287: asm("addf r0"); /* add a zero to the acc */ ! 288: asm("stf _sgl_st_acc"); /* store the result */ ! 289: if( force_loop ) ! 290: asm("brb _negf_5_lp1");; /* loop on the error */ ! 291: /* ! 292: * end error loop - test the results ! 293: */ ! 294: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 295: errcnt++; /* bump the error count */ ! 296: if( prt_error ) { ! 297: writes(" \n"); /* start a new print line */ ! 298: writes("cycle: "); ! 299: writed( cycle ); ! 300: writes(" NEGF test "); ! 301: writed( test_no ); ! 302: writes(", subtest 5 (Piped Exit) - BAD FINAL ACC\n"); ! 303: print_negf_data(); ! 304: writes(", data index = "); ! 305: writed( index ); ! 306: writec('\n'); ! 307: writes(" "); ! 308: writes("Acc expected = "); ! 309: write32h( sgl_expected ); ! 310: writec('\n'); ! 311: } ! 312: if( halt_flg ) ! 313: negf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 314: if( loop_on_err ) { ! 315: force_loop = TRUE; /* set the force loop flag */ ! 316: asm("brw _negf_5_lp1");; /* and loop on the error */ ! 317: } /* end of loop on error */ ! 318: } /* end of compare error */ ! 319: } /* end of WHILE loop */ ! 320: } /* end of subtest 5 */ ! 321: ! 322: ! 323: ! 324: /************************************************************************** ! 325: * ! 326: * PRINT THE DATA AND STORE RESULTS ! 327: * ! 328: * initial Acc = xxxxxxxx, stored = xxxxxxxx, data index = xx ! 329: * expected = xxxxxxxx ! 330: **************************************************************************/ ! 331: print_negf_data() ! 332: { ! 333: writes("initial Acc = "); ! 334: write32h( sgl_ld_acc ); ! 335: writes(", final Acc = "); ! 336: write32h( sgl_st_acc ); ! 337: } ! 338: ! 339: ! 340: ! 341: /************************************************************************** ! 342: * ! 343: * HALT ON ERROR ROUTINE ! 344: * ! 345: **************************************************************************/ ! 346: negf_er_halt( halt_code ) ! 347: int halt_code; ! 348: { ! 349: sgl_dummy1 = halt_code; /* get the error type */ ! 350: asm("movl _test_no,r0"); /* r0 = test number */ ! 351: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 352: asm("movl _sgl_dummy1,r2"); /* r2 = error code */ ! 353: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 354: asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */ ! 355: asm("movl _sgl_value_1,r5"); /* r5 = data loaded */ ! 356: if( halt_code == BAD_ACC_HLT ) { ! 357: asm("movl _sgl_st_acc,r6"); /* r6 = data stored */ ! 358: asm("movl _sgl_expected,r7"); /* r7 = data expected */ ! 359: } else ! 360: if( halt_code == BAD_REG_HLT ) { ! 361: sgl_dummy1 = load_regs[index2]; ! 362: sgl_dummy2 = store_regs[index2]; ! 363: asm("movl _index2,r6"); /* r6 = bad register # */ ! 364: asm("movl _sgl_dummy1,r7"); /* r7 = actual value */ ! 365: asm("movl _sgl_dummy2,r8"); /* r8 = expected value */ ! 366: } else ! 367: if( halt_code == BAD_PSL_HLT ) { ! 368: asm("movl _init_psl,r6"); /* r6 = initial PSL */ ! 369: asm("movl _psl_val,r7"); /* r7 = final PSL */ ! 370: asm("movl _exp_psl,r8"); /* r8 = expected PSL */ ! 371: }; ! 372: asm("halt"); /* HALT ... */ ! 373: }
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