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Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000d8c * .text
4 00000000 .align 1
5 00000000 .globl _pipe_12
6 00000000 _pipe_12:
7 0002D4FC 0000 .word L215
8 0002D4FE # #include "fpp_defs.h"
9 0002D4FE #
10 0002D4FE #
11 0002D4FE # /*****************************************************************************
12 0002D4FE # *
13 0002D4FE # * DBL PIPELINE TEST #12 MONITOR
14 0002D4FE # *
15 0002D4FE # * This test will do:
16 0002D4FE # *
17 0002D4FE # * LDD(x) SUBD(x) ADDD(0) SUBD(x) ADDD(x) SUBD(0) ADDD(x) STD
18 0002D4FE # *
19 0002D4FE # * where the x's are the LDD data patterns.
20 0002D4FE # *****************************************************************************/
21 0002D4FE # pipe_12()
22 0002D4FE # {
23 0002D4FE 13 00b0 jbr L217
24 0002D501 L218:
25 0002D501 # asm(".globl _pipeline_12_t");
26 0002D501 .globl _pipeline_12_t
27 0002D501 # asm("_pipeline_12_t:"); /* entry address */
28 0002D501 _pipeline_12_t:
29 0002D501 # if( (cycle == 1) && (prt_hdrs) ) /* print headers on 1st cycle */
30 0002D501 1d effffffff5 01 cmpl _cycle,$1
31 0002D508 21 2a jneq L219
32 0002D50A 5d efffffffec tstl _prt_hdrs
33 0002D510 31 22 jeql L219
34 0002D512 # {
35 0002D512 # if( run_all )
36 0002D512 5d efffffffe4 tstl _run_all
37 0002D518 31 0d jeql L220
38 0002D51A # writes("\n");
39 0002D51A .data 1
40 00000d8c * L222:
41 00000d8c * 0A00 .ascii "\12\0"
42 00000d8e * .text
43 0002D51A dd 8f00000d8c pushl $L222
44 0002D520 fe 08 efffffffd5 callf $8,_writes
45 0002D527 # writes(" PIPE_12");
46 0002D527 L220:
47 0002D527 .data 1
48 00000d8e * L223:
49 00000d8e * 20504950455F313200 .ascii " PIPE_12\0"
50 00000d97 * .text
51 0002D527 dd 8f00000d8e pushl $L223
52 0002D52D fe 08 efffffffc8 callf $8,_writes
53 0002D534 # }
54 0002D534 # subtest = 1;
55 0002D534 L219:
56 0002D534 0d 01 efffffffc1 movl $1,_subtest
57 0002D53B # pipe12_1(); /* data in REGs, no NOPs */
58 0002D53B fe 04 ef00000072 callf $4,_pipe12_1
59 0002D542 # subtest++; /* increment subtest num */
60 0002D542 6d efffffffb4 incl _subtest
61 0002D548 # pipe12_2(); /* data in REGs, 1 NOP */
62 0002D548 fe 04 ef00000189 callf $4,_pipe12_2
63 0002D54F # subtest++; /* increment subtest num */
64 0002D54F 6d efffffffa7 incl _subtest
65 0002D555 # pipe12_3(); /* data in REGs, 2 NOPs */
66 0002D555 fe 04 ef000002a8 callf $4,_pipe12_3
67 0002D55C # subtest++; /* increment subtest num */
68 0002D55C 6d efffffff9a incl _subtest
69 0002D562 # pipe12_4(); /* data in REGs, 3 NOPs */
70 0002D562 fe 04 ef000003cd callf $4,_pipe12_4
71 0002D569 # subtest++; /* increment subtest num */
72 0002D569 6d efffffff8d incl _subtest
73 0002D56F # pipe12_5(); /* data in CACHE, no NOPs */
74 0002D56F fe 04 ef000004fa callf $4,_pipe12_5
75 0002D576 # subtest++; /* increment subtest num */
76 0002D576 6d efffffff80 incl _subtest
77 0002D57C # pipe12_6(); /* data in CACHE, 1 NOP */
78 0002D57C fe 04 ef000005f9 callf $4,_pipe12_6
79 0002D583 # subtest++; /* increment subtest num */
80 0002D583 6d efffffff73 incl _subtest
81 0002D589 # pipe12_7(); /* data in CACHE, 2 NOPs */
82 0002D589 fe 04 ef00000700 callf $4,_pipe12_7
83 0002D590 # subtest++; /* increment subtest num */
84 0002D590 6d efffffff66 incl _subtest
85 0002D596 # pipe12_8(); /* data in CACHE, 3 NOPs */
86 0002D596 fe 04 ef0000080d callf $4,_pipe12_8
87 0002D59D # subtest++; /* increment subtest num */
88 0002D59D 6d efffffff59 incl _subtest
89 0002D5A3 # pipe12_9(); /* data via F.P. 0 NOPs */
90 0002D5A3 fe 04 ef00000922 callf $4,_pipe12_9
91 0002D5AA # asm("jmp *return"); /* return to the test monitor */
92 0002D5AA 71 ffffffff4c jmp *return
93 0002D5B0 # }
94 0002D5B0 40 ret#2
95 0002D5B1 .set L215,0x0
96 0002D5B1 L217:
97 0002D5B1 13 ff4d jbr L218
98 0002D5B4 .data
99 00000d8c * .text
100 0002D5B4 .align 1
101 0002D5B4 .globl _pipe12_1
102 0002D5B4 _pipe12_1:
103 0002D5B4 0000 .word L233
104 0002D5B6 #
105 0002D5B6 #
106 0002D5B6 #
107 0002D5B6 #
108 0002D5B6 #
109 0002D5B6 # /************************************************************************
110 0002D5B6 # *
111 0002D5B6 # * SUBTEST 1
112 0002D5B6 # * data in registers, no NO-OPs
113 0002D5B6 # *
114 0002D5B6 # ************************************************************************/
115 0002D5B6 # pipe12_1()
116 0002D5B6 # {
117 0002D5B6 13 011c jbr L235
118 0002D5B9 L236:
119 0002D5B9 # force_loop = FALSE; /* clear the force_loop flg */
120 0002D5B9 4d efffffff3d clrl _force_loop
121 0002D5BF # index = 0;
122 0002D5BF 4d efffffff37 clrl _index
123 0002D5C5 # do
124 0002D5C5 L239:
125 0002D5C5 # {
126 0002D5C5 # sgl_value_1 = ldd_1_data[index].ld.m; /* get the operand's MSW */
127 0002D5C5 0d efffffff31 50 movl _index,r0
128 0002D5CC 48 04 50 50 shll $4,r0,r0
129 0002D5D0 0d e000000000 efffffff21 movl _ldd_1_data(r0),_sgl_value_1
130 0002D5DB # sgl_value_2 = ldd_1_data[index].ld.l; /* get the operand's MSW */
131 0002D5DB 0d efffffff1b 50 movl _index,r0
132 0002D5E2 48 04 50 50 shll $4,r0,r0
133 0002D5E6 0d e000000004 efffffff0b movl _ldd_1_data+4(r0),_sgl_value_2
134 0002D5F1 # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
135 0002D5F1 48 04 efffffff04 50 shll $4,_index,r0
136 0002D5F9 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
137 0002D600 0d a004 effffffef8 movl 4(r0),_dbl_expected+4
138 0002D608 0d 60 effffffeed movl (r0),_dbl_expected
139 0002D60F # /*
140 0002D60F # * If LOOP ON ERROR is set, this is the loop for this subtest.
141 0002D60F # * The force loop flag is set after the first error.
142 0002D60F # */
143 0002D60F # asm("_pipe12_1_lp1:");
144 0002D60F _pipe12_1_lp1:
145 0002D60F # asm("movl _sgl_value_1,r4"); /* move the data to r4/r5 */
146 0002D60F 0d effffffee7 54 movl _sgl_value_1,r4
147 0002D616 # asm("movl _sgl_value_2,r5");
148 0002D616 0d effffffee0 55 movl _sgl_value_2,r5
149 0002D61D # asm("clrl r2"); /* clear r2 / r3 */
150 0002D61D 4d 52 clrl r2
151 0002D61F # asm("clrl r3");
152 0002D61F 4d 53 clrl r3
153 0002D621 # asm("ldd r4"); /* load the op. ( op ) */
154 0002D621 07 54 ldd r4
155 0002D623 # asm("subd r4"); /* subtract the op. ( 0 ) */
156 0002D623 d7 54 subd r4
157 0002D625 # asm("addd r2"); /* add a '0' ( 0 ) */
158 0002D625 c7 52 addd r2
159 0002D627 # asm("subd r4"); /* subtract the op. (-op ) */
160 0002D627 d7 54 subd r4
161 0002D629 # asm("addd r4"); /* add the op. ( 0 ) */
162 0002D629 c7 54 addd r4
163 0002D62B # asm("subd r2"); /* subtract a '0' ( 0 ) */
164 0002D62B d7 52 subd r2
165 0002D62D # asm("addd r4"); /* add the op. ( op ) */
166 0002D62D c7 54 addd r4
167 0002D62F # asm("std r6"); /* store the result ( op ) */
168 0002D62F 27 56 std r6
169 0002D631 # if( force_loop )
170 0002D631 5d effffffec5 tstl _force_loop
171 0002D637 31 02 jeql L240
172 0002D639 # asm("brb _pipe12_1_lp1");; /* run the loop again */
173 0002D639 11 d4 brb _pipe12_1_lp1
174 0002D63B L240:
175 0002D63B # /*
176 0002D63B # * verify the results
177 0002D63B # */
178 0002D63B # asm("movl r6,_sgl_value_3"); /* get the result */
179 0002D63B 0d 56 effffffeba movl r6,_sgl_value_3
180 0002D642 # asm("movl r7,_sgl_value_4");
181 0002D642 0d 57 effffffeb3 movl r7,_sgl_value_4
182 0002D649 # dbl_st_acc.m = sgl_value_3;
183 0002D649 0d effffffead effffffea8 movl _sgl_value_3,_dbl_st_acc
184 0002D654 # dbl_st_acc.l = sgl_value_4;
185 0002D654 0d effffffea2 effffffea1 movl _sgl_value_4,_dbl_st_acc+4
186 0002D65F # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
187 0002D65F # (dbl_st_acc.l != dbl_expected.l) )
188 0002D65F 1d effffffe97 effffffe92 cmpl _dbl_st_acc,_dbl_expected
189 0002D66A 21 0d jneq L9999
190 0002D66C 1d effffffe8e effffffe89 cmpl _dbl_st_acc+4,_dbl_expected+4
191 0002D677 31 42 jeql L241
192 0002D679 L9999:
193 0002D679 # {
194 0002D679 # errcnt++; /* bump the error count */
195 0002D679 6d effffffe7d incl _errcnt
196 0002D67F # if ( prt_error )
197 0002D67F 5d effffffe77 tstl _prt_error
198 0002D685 31 0d jeql L242
199 0002D687 # print_pipe12_er("Reg. Data, 0 NO-OPs");
200 0002D687 .data 1
201 00000d97 * L244:
202 00000d97 * 5265672E20446174612C20302 .ascii "Reg. Data, 0 NO-OPs\0"
04E4F2D4F507300
203 00000dab * .text
204 0002D687 dd 8f00000d97 pushl $L244
205 0002D68D fe 08 ef00000a28 callf $8,_print_pipe12_er
206 0002D694 # if ( halt_flg ) /* halt on error? */
207 0002D694 L242:
208 0002D694 5d effffffe62 tstl _halt_flg
209 0002D69A 31 0d jeql L245
210 0002D69C # pipe12_er_hlt( subtest );
211 0002D69C dd effffffe5a pushl _subtest
212 0002D6A2 fe 08 ef00000b61 callf $8,_pipe12_er_hlt
213 0002D6A9 # if ( loop_on_err ) {
214 0002D6A9 L245:
215 0002D6A9 5d effffffe4d tstl _loop_on_err
216 0002D6AF 31 0a jeql L247
217 0002D6B1 # force_loop = TRUE; /* set the force loop flag */
218 0002D6B1 0d 01 effffffe44 movl $1,_force_loop
219 0002D6B8 # asm("brw _pipe12_1_lp1"); /* and loop */
220 0002D6B8 13 ff54 brw _pipe12_1_lp1
221 0002D6BB # }
222 0002D6BB # } /* end of compare error */
223 0002D6BB L247:
224 0002D6BB # } while( index++ < max_ldd_1_index );
225 0002D6BB L241:
226 0002D6BB L238:
227 0002D6BB 0d effffffe3b 50 movl _index,r0
228 0002D6C2 6d effffffe34 incl _index
229 0002D6C8 1d 50 effffffe2d cmpl r0,_max_ldd_1_index
230 0002D6CF 81 03 13 fef1 jlss L239
231 0002D6D4 L237:
232 0002D6D4 # } /* end of subtest 1 */
233 0002D6D4 40 ret#2
234 0002D6D5 .set L233,0x0
235 0002D6D5 L235:
236 0002D6D5 13 fee1 jbr L236
237 0002D6D8 .data
238 00000d8c * .text
239 0002D6D8 .align 1
240 0002D6D8 .globl _pipe12_2
241 0002D6D8 _pipe12_2:
242 0002D6D8 0000 .word L248
243 0002D6DA #
244 0002D6DA #
245 0002D6DA #
246 0002D6DA #
247 0002D6DA #
248 0002D6DA #
249 0002D6DA # /************************************************************************
250 0002D6DA # *
251 0002D6DA # * SUBTEST 2
252 0002D6DA # * data in registers, 1 NO-OP
253 0002D6DA # *
254 0002D6DA # ************************************************************************/
255 0002D6DA # pipe12_2()
256 0002D6DA # {
257 0002D6DA 13 0123 jbr L250
258 0002D6DD L251:
259 0002D6DD # force_loop = FALSE; /* clear the force_loop flg */
260 0002D6DD 4d effffffe19 clrl _force_loop
261 0002D6E3 # index = 0;
262 0002D6E3 4d effffffe13 clrl _index
263 0002D6E9 # do
264 0002D6E9 L254:
265 0002D6E9 # {
266 0002D6E9 # sgl_value_1 = ldd_1_data[index].ld.m; /* get the operand's MSW */
267 0002D6E9 0d effffffe0d 50 movl _index,r0
268 0002D6F0 48 04 50 50 shll $4,r0,r0
269 0002D6F4 0d e000000000 effffffdfd movl _ldd_1_data(r0),_sgl_value_1
270 0002D6FF # sgl_value_2 = ldd_1_data[index].ld.l; /* get the operand's MSW */
271 0002D6FF 0d effffffdf7 50 movl _index,r0
272 0002D706 48 04 50 50 shll $4,r0,r0
273 0002D70A 0d e000000004 effffffde7 movl _ldd_1_data+4(r0),_sgl_value_2
274 0002D715 # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
275 0002D715 48 04 effffffde0 50 shll $4,_index,r0
276 0002D71D 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
277 0002D724 0d a004 effffffdd4 movl 4(r0),_dbl_expected+4
278 0002D72C 0d 60 effffffdc9 movl (r0),_dbl_expected
279 0002D733 # /*
280 0002D733 # * If LOOP ON ERROR is set, this is the loop for this subtest.
281 0002D733 # * The force loop flag is set after the first error.
282 0002D733 # */
283 0002D733 # asm("_pipe12_2_lp1:");
284 0002D733 _pipe12_2_lp1:
285 0002D733 # asm("movl _sgl_value_1,r4"); /* move the data to r4/r5 */
286 0002D733 0d effffffdc3 54 movl _sgl_value_1,r4
287 0002D73A # asm("movl _sgl_value_2,r5");
288 0002D73A 0d effffffdbc 55 movl _sgl_value_2,r5
289 0002D741 # asm("clrl r2"); /* clear r2 / r3 */
290 0002D741 4d 52 clrl r2
291 0002D743 # asm("clrl r3");
292 0002D743 4d 53 clrl r3
293 0002D745 # asm("ldd r4"); /* load the op. ( op ) */
294 0002D745 07 54 ldd r4
295 0002D747 # asm("nop");
296 0002D747 10 nop
297 0002D748 # asm("subd r4"); /* subtract the op. ( 0 ) */
298 0002D748 d7 54 subd r4
299 0002D74A # asm("nop");
300 0002D74A 10 nop
301 0002D74B # asm("addd r2"); /* add a '0' ( 0 ) */
302 0002D74B c7 52 addd r2
303 0002D74D # asm("nop");
304 0002D74D 10 nop
305 0002D74E # asm("subd r4"); /* subtract the op. (-op ) */
306 0002D74E d7 54 subd r4
307 0002D750 # asm("nop");
308 0002D750 10 nop
309 0002D751 # asm("addd r4"); /* add the op. ( 0 ) */
310 0002D751 c7 54 addd r4
311 0002D753 # asm("nop");
312 0002D753 10 nop
313 0002D754 # asm("subd r2"); /* subtract a '0' ( 0 ) */
314 0002D754 d7 52 subd r2
315 0002D756 # asm("nop");
316 0002D756 10 nop
317 0002D757 # asm("addd r4"); /* add the op. ( op ) */
318 0002D757 c7 54 addd r4
319 0002D759 # asm("nop");
320 0002D759 10 nop
321 0002D75A # asm("std r6"); /* store the result ( op ) */
322 0002D75A 27 56 std r6
323 0002D75C # if( force_loop )
324 0002D75C 5d effffffd9a tstl _force_loop
325 0002D762 31 02 jeql L255
326 0002D764 # asm("brb _pipe12_2_lp1");; /* run the loop again */
327 0002D764 11 cd brb _pipe12_2_lp1
328 0002D766 L255:
329 0002D766 # /*
330 0002D766 # * verify the results
331 0002D766 # */
332 0002D766 # asm("movl r6,_sgl_value_3"); /* get the result */
333 0002D766 0d 56 effffffd8f movl r6,_sgl_value_3
334 0002D76D # asm("movl r7,_sgl_value_4");
335 0002D76D 0d 57 effffffd88 movl r7,_sgl_value_4
336 0002D774 # dbl_st_acc.m = sgl_value_3;
337 0002D774 0d effffffd82 effffffd7d movl _sgl_value_3,_dbl_st_acc
338 0002D77F # dbl_st_acc.l = sgl_value_4;
339 0002D77F 0d effffffd77 effffffd76 movl _sgl_value_4,_dbl_st_acc+4
340 0002D78A # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
341 0002D78A # (dbl_st_acc.l != dbl_expected.l) )
342 0002D78A 1d effffffd6c effffffd67 cmpl _dbl_st_acc,_dbl_expected
343 0002D795 21 0d jneq L9998
344 0002D797 1d effffffd63 effffffd5e cmpl _dbl_st_acc+4,_dbl_expected+4
345 0002D7A2 31 42 jeql L256
346 0002D7A4 L9998:
347 0002D7A4 # {
348 0002D7A4 # errcnt++; /* bump the error count */
349 0002D7A4 6d effffffd52 incl _errcnt
350 0002D7AA # if ( prt_error )
351 0002D7AA 5d effffffd4c tstl _prt_error
352 0002D7B0 31 0d jeql L257
353 0002D7B2 # print_pipe12_er("Reg. Data, 1 NO-OP");
354 0002D7B2 .data 1
355 00000dab * L258:
356 00000dab * 5265672E20446174612C20312 .ascii "Reg. Data, 1 NO-OP\0"
04E4F2D4F5000
357 00000dbe * .text
358 0002D7B2 dd 8f00000dab pushl $L258
359 0002D7B8 fe 08 ef000008fd callf $8,_print_pipe12_er
360 0002D7BF # if ( halt_flg ) /* halt on error? */
361 0002D7BF L257:
362 0002D7BF 5d effffffd37 tstl _halt_flg
363 0002D7C5 31 0d jeql L259
364 0002D7C7 # pipe12_er_hlt( subtest );
365 0002D7C7 dd effffffd2f pushl _subtest
366 0002D7CD fe 08 ef00000a36 callf $8,_pipe12_er_hlt
367 0002D7D4 # if ( loop_on_err ) {
368 0002D7D4 L259:
369 0002D7D4 5d effffffd22 tstl _loop_on_err
370 0002D7DA 31 0a jeql L260
371 0002D7DC # force_loop = TRUE; /* set the force loop flag */
372 0002D7DC 0d 01 effffffd19 movl $1,_force_loop
373 0002D7E3 # asm("brw _pipe12_2_lp1"); /* and loop */
374 0002D7E3 13 ff4d brw _pipe12_2_lp1
375 0002D7E6 # }
376 0002D7E6 # } /* end of compare error */
377 0002D7E6 L260:
378 0002D7E6 # } while( index++ < max_ldd_1_index );
379 0002D7E6 L256:
380 0002D7E6 L253:
381 0002D7E6 0d effffffd10 50 movl _index,r0
382 0002D7ED 6d effffffd09 incl _index
383 0002D7F3 1d 50 effffffd02 cmpl r0,_max_ldd_1_index
384 0002D7FA 81 03 13 feea jlss L254
385 0002D7FF L252:
386 0002D7FF # } /* end of subtest 2 */
387 0002D7FF 40 ret#2
388 0002D800 .set L248,0x0
389 0002D800 L250:
390 0002D800 13 feda jbr L251
391 0002D803 .data
392 00000d8c * .text
393 0002D803 00 .align 1
394 0002D804 .globl _pipe12_3
395 0002D804 _pipe12_3:
396 0002D804 0000 .word L261
397 0002D806 #
398 0002D806 #
399 0002D806 #
400 0002D806 #
401 0002D806 #
402 0002D806 # /************************************************************************
403 0002D806 # *
404 0002D806 # * SUBTEST 3
405 0002D806 # * data in registers, 2 NO-OPs
406 0002D806 # *
407 0002D806 # ************************************************************************/
408 0002D806 # pipe12_3()
409 0002D806 # {
410 0002D806 13 012a jbr L263
411 0002D809 L264:
412 0002D809 # force_loop = FALSE; /* clear the force_loop flg */
413 0002D809 4d effffffced clrl _force_loop
414 0002D80F # index = 0;
415 0002D80F 4d effffffce7 clrl _index
416 0002D815 # do
417 0002D815 L267:
418 0002D815 # {
419 0002D815 # sgl_value_1 = ldd_1_data[index].ld.m; /* get the operand's MSW */
420 0002D815 0d effffffce1 50 movl _index,r0
421 0002D81C 48 04 50 50 shll $4,r0,r0
422 0002D820 0d e000000000 effffffcd1 movl _ldd_1_data(r0),_sgl_value_1
423 0002D82B # sgl_value_2 = ldd_1_data[index].ld.l; /* get the operand's MSW */
424 0002D82B 0d effffffccb 50 movl _index,r0
425 0002D832 48 04 50 50 shll $4,r0,r0
426 0002D836 0d e000000004 effffffcbb movl _ldd_1_data+4(r0),_sgl_value_2
427 0002D841 # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
428 0002D841 48 04 effffffcb4 50 shll $4,_index,r0
429 0002D849 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
430 0002D850 0d a004 effffffca8 movl 4(r0),_dbl_expected+4
431 0002D858 0d 60 effffffc9d movl (r0),_dbl_expected
432 0002D85F # /*
433 0002D85F # * If LOOP ON ERROR is set, this is the loop for this subtest.
434 0002D85F # * The force loop flag is set after the first error.
435 0002D85F # */
436 0002D85F # asm("_pipe12_3_lp1:");
437 0002D85F _pipe12_3_lp1:
438 0002D85F # asm("movl _sgl_value_1,r4"); /* move the data to r4/r5 */
439 0002D85F 0d effffffc97 54 movl _sgl_value_1,r4
440 0002D866 # asm("movl _sgl_value_2,r5");
441 0002D866 0d effffffc90 55 movl _sgl_value_2,r5
442 0002D86D # asm("clrl r2"); /* clear r2 / r3 */
443 0002D86D 4d 52 clrl r2
444 0002D86F # asm("clrl r3");
445 0002D86F 4d 53 clrl r3
446 0002D871 # asm("ldd r4"); /* load the op. ( op ) */
447 0002D871 07 54 ldd r4
448 0002D873 # asm("nop");
449 0002D873 10 nop
450 0002D874 # asm("nop");
451 0002D874 10 nop
452 0002D875 # asm("subd r4"); /* subtract the op. ( 0 ) */
453 0002D875 d7 54 subd r4
454 0002D877 # asm("nop");
455 0002D877 10 nop
456 0002D878 # asm("nop");
457 0002D878 10 nop
458 0002D879 # asm("addd r2"); /* add a '0' ( 0 ) */
459 0002D879 c7 52 addd r2
460 0002D87B # asm("nop");
461 0002D87B 10 nop
462 0002D87C # asm("nop");
463 0002D87C 10 nop
464 0002D87D # asm("subd r4"); /* subtract the op. (-op ) */
465 0002D87D d7 54 subd r4
466 0002D87F # asm("nop");
467 0002D87F 10 nop
468 0002D880 # asm("nop");
469 0002D880 10 nop
470 0002D881 # asm("addd r4"); /* add the op. ( 0 ) */
471 0002D881 c7 54 addd r4
472 0002D883 # asm("nop");
473 0002D883 10 nop
474 0002D884 # asm("nop");
475 0002D884 10 nop
476 0002D885 # asm("subd r2"); /* subtract a '0' ( 0 ) */
477 0002D885 d7 52 subd r2
478 0002D887 # asm("nop");
479 0002D887 10 nop
480 0002D888 # asm("nop");
481 0002D888 10 nop
482 0002D889 # asm("addd r4"); /* add the op. ( op ) */
483 0002D889 c7 54 addd r4
484 0002D88B # asm("nop");
485 0002D88B 10 nop
486 0002D88C # asm("nop");
487 0002D88C 10 nop
488 0002D88D # asm("std r6"); /* store the result ( op ) */
489 0002D88D 27 56 std r6
490 0002D88F # if( force_loop )
491 0002D88F 5d effffffc67 tstl _force_loop
492 0002D895 31 02 jeql L268
493 0002D897 # asm("brb _pipe12_3_lp1");; /* run the loop again */
494 0002D897 11 c6 brb _pipe12_3_lp1
495 0002D899 L268:
496 0002D899 # /*
497 0002D899 # * verify the results
498 0002D899 # */
499 0002D899 # asm("movl r6,_sgl_value_3"); /* get the result */
500 0002D899 0d 56 effffffc5c movl r6,_sgl_value_3
501 0002D8A0 # asm("movl r7,_sgl_value_4");
502 0002D8A0 0d 57 effffffc55 movl r7,_sgl_value_4
503 0002D8A7 # dbl_st_acc.m = sgl_value_3;
504 0002D8A7 0d effffffc4f effffffc4a movl _sgl_value_3,_dbl_st_acc
505 0002D8B2 # dbl_st_acc.l = sgl_value_4;
506 0002D8B2 0d effffffc44 effffffc43 movl _sgl_value_4,_dbl_st_acc+4
507 0002D8BD # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
508 0002D8BD # (dbl_st_acc.l != dbl_expected.l) )
509 0002D8BD 1d effffffc39 effffffc34 cmpl _dbl_st_acc,_dbl_expected
510 0002D8C8 21 0d jneq L9997
511 0002D8CA 1d effffffc30 effffffc2b cmpl _dbl_st_acc+4,_dbl_expected+4
512 0002D8D5 31 42 jeql L269
513 0002D8D7 L9997:
514 0002D8D7 # {
515 0002D8D7 # errcnt++; /* bump the error count */
516 0002D8D7 6d effffffc1f incl _errcnt
517 0002D8DD # if ( prt_error )
518 0002D8DD 5d effffffc19 tstl _prt_error
519 0002D8E3 31 0d jeql L270
520 0002D8E5 # print_pipe12_er("Reg. Data, 2 NO-OPs");
521 0002D8E5 .data 1
522 00000dbe * L271:
523 00000dbe * 5265672E20446174612C20322 .ascii "Reg. Data, 2 NO-OPs\0"
04E4F2D4F507300
524 00000dd2 * .text
525 0002D8E5 dd 8f00000dbe pushl $L271
526 0002D8EB fe 08 ef000007ca callf $8,_print_pipe12_er
527 0002D8F2 # if ( halt_flg ) /* halt on error? */
528 0002D8F2 L270:
529 0002D8F2 5d effffffc04 tstl _halt_flg
530 0002D8F8 31 0d jeql L272
531 0002D8FA # pipe12_er_hlt( subtest );
532 0002D8FA dd effffffbfc pushl _subtest
533 0002D900 fe 08 ef00000903 callf $8,_pipe12_er_hlt
534 0002D907 # if ( loop_on_err ) {
535 0002D907 L272:
536 0002D907 5d effffffbef tstl _loop_on_err
537 0002D90D 31 0a jeql L273
538 0002D90F # force_loop = TRUE; /* set the force loop flag */
539 0002D90F 0d 01 effffffbe6 movl $1,_force_loop
540 0002D916 # asm("brw _pipe12_3_lp1"); /* and loop */
541 0002D916 13 ff46 brw _pipe12_3_lp1
542 0002D919 # }
543 0002D919 # } /* end of compare error */
544 0002D919 L273:
545 0002D919 # } while( index++ < max_ldd_1_index );
546 0002D919 L269:
547 0002D919 L266:
548 0002D919 0d effffffbdd 50 movl _index,r0
549 0002D920 6d effffffbd6 incl _index
550 0002D926 1d 50 effffffbcf cmpl r0,_max_ldd_1_index
551 0002D92D 81 03 13 fee3 jlss L267
552 0002D932 L265:
553 0002D932 # } /* end of subtest 3 */
554 0002D932 40 ret#2
555 0002D933 .set L261,0x0
556 0002D933 L263:
557 0002D933 13 fed3 jbr L264
558 0002D936 .data
559 00000d8c * .text
560 0002D936 .align 1
561 0002D936 .globl _pipe12_4
562 0002D936 _pipe12_4:
563 0002D936 0000 .word L274
564 0002D938 #
565 0002D938 #
566 0002D938 #
567 0002D938 #
568 0002D938 #
569 0002D938 # /************************************************************************
570 0002D938 # *
571 0002D938 # * SUBTEST 4
572 0002D938 # * data in registers, 3 NO-OPs
573 0002D938 # *
574 0002D938 # ************************************************************************/
575 0002D938 # pipe12_4()
576 0002D938 # {
577 0002D938 13 0131 jbr L276
578 0002D93B L277:
579 0002D93B # force_loop = FALSE; /* clear the force_loop flg */
580 0002D93B 4d effffffbbb clrl _force_loop
581 0002D941 # index = 0;
582 0002D941 4d effffffbb5 clrl _index
583 0002D947 # do
584 0002D947 L280:
585 0002D947 # {
586 0002D947 # sgl_value_1 = ldd_1_data[index].ld.m; /* get the operand's MSW */
587 0002D947 0d effffffbaf 50 movl _index,r0
588 0002D94E 48 04 50 50 shll $4,r0,r0
589 0002D952 0d e000000000 effffffb9f movl _ldd_1_data(r0),_sgl_value_1
590 0002D95D # sgl_value_2 = ldd_1_data[index].ld.l; /* get the operand's MSW */
591 0002D95D 0d effffffb99 50 movl _index,r0
592 0002D964 48 04 50 50 shll $4,r0,r0
593 0002D968 0d e000000004 effffffb89 movl _ldd_1_data+4(r0),_sgl_value_2
594 0002D973 # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
595 0002D973 48 04 effffffb82 50 shll $4,_index,r0
596 0002D97B 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
597 0002D982 0d a004 effffffb76 movl 4(r0),_dbl_expected+4
598 0002D98A 0d 60 effffffb6b movl (r0),_dbl_expected
599 0002D991 # /*
600 0002D991 # * If LOOP ON ERROR is set, this is the loop for this subtest.
601 0002D991 # * The force loop flag is set after the first error.
602 0002D991 # */
603 0002D991 # asm("_pipe12_4_lp1:");
604 0002D991 _pipe12_4_lp1:
605 0002D991 # asm("movl _sgl_value_1,r4"); /* move the data to r4/r5 */
606 0002D991 0d effffffb65 54 movl _sgl_value_1,r4
607 0002D998 # asm("movl _sgl_value_2,r5");
608 0002D998 0d effffffb5e 55 movl _sgl_value_2,r5
609 0002D99F # asm("clrl r2"); /* clear r2 / r3 */
610 0002D99F 4d 52 clrl r2
611 0002D9A1 # asm("clrl r3");
612 0002D9A1 4d 53 clrl r3
613 0002D9A3 # asm("ldd r4"); /* load the op. ( op ) */
614 0002D9A3 07 54 ldd r4
615 0002D9A5 # asm("nop");
616 0002D9A5 10 nop
617 0002D9A6 # asm("nop");
618 0002D9A6 10 nop
619 0002D9A7 # asm("nop");
620 0002D9A7 10 nop
621 0002D9A8 # asm("subd r4"); /* subtract the op. ( 0 ) */
622 0002D9A8 d7 54 subd r4
623 0002D9AA # asm("nop");
624 0002D9AA 10 nop
625 0002D9AB # asm("nop");
626 0002D9AB 10 nop
627 0002D9AC # asm("nop");
628 0002D9AC 10 nop
629 0002D9AD # asm("addd r2"); /* add a '0' ( 0 ) */
630 0002D9AD c7 52 addd r2
631 0002D9AF # asm("nop");
632 0002D9AF 10 nop
633 0002D9B0 # asm("nop");
634 0002D9B0 10 nop
635 0002D9B1 # asm("nop");
636 0002D9B1 10 nop
637 0002D9B2 # asm("subd r4"); /* subtract the op. (-op ) */
638 0002D9B2 d7 54 subd r4
639 0002D9B4 # asm("nop");
640 0002D9B4 10 nop
641 0002D9B5 # asm("nop");
642 0002D9B5 10 nop
643 0002D9B6 # asm("nop");
644 0002D9B6 10 nop
645 0002D9B7 # asm("addd r4"); /* add the op. ( 0 ) */
646 0002D9B7 c7 54 addd r4
647 0002D9B9 # asm("nop");
648 0002D9B9 10 nop
649 0002D9BA # asm("nop");
650 0002D9BA 10 nop
651 0002D9BB # asm("nop");
652 0002D9BB 10 nop
653 0002D9BC # asm("subd r2"); /* subtract a '0' ( 0 ) */
654 0002D9BC d7 52 subd r2
655 0002D9BE # asm("nop");
656 0002D9BE 10 nop
657 0002D9BF # asm("nop");
658 0002D9BF 10 nop
659 0002D9C0 # asm("nop");
660 0002D9C0 10 nop
661 0002D9C1 # asm("addd r4"); /* add the op. ( op ) */
662 0002D9C1 c7 54 addd r4
663 0002D9C3 # asm("nop");
664 0002D9C3 10 nop
665 0002D9C4 # asm("nop");
666 0002D9C4 10 nop
667 0002D9C5 # asm("nop");
668 0002D9C5 10 nop
669 0002D9C6 # asm("std r6"); /* store the result ( op ) */
670 0002D9C6 27 56 std r6
671 0002D9C8 # if( force_loop )
672 0002D9C8 5d effffffb2e tstl _force_loop
673 0002D9CE 31 02 jeql L281
674 0002D9D0 # asm("brb _pipe12_4_lp1");; /* run the loop again */
675 0002D9D0 11 bf brb _pipe12_4_lp1
676 0002D9D2 L281:
677 0002D9D2 # /*
678 0002D9D2 # * verify the results
679 0002D9D2 # */
680 0002D9D2 # asm("movl r6,_sgl_value_3"); /* get the result */
681 0002D9D2 0d 56 effffffb23 movl r6,_sgl_value_3
682 0002D9D9 # asm("movl r7,_sgl_value_4");
683 0002D9D9 0d 57 effffffb1c movl r7,_sgl_value_4
684 0002D9E0 # dbl_st_acc.m = sgl_value_3;
685 0002D9E0 0d effffffb16 effffffb11 movl _sgl_value_3,_dbl_st_acc
686 0002D9EB # dbl_st_acc.l = sgl_value_4;
687 0002D9EB 0d effffffb0b effffffb0a movl _sgl_value_4,_dbl_st_acc+4
688 0002D9F6 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
689 0002D9F6 # (dbl_st_acc.l != dbl_expected.l) )
690 0002D9F6 1d effffffb00 effffffafb cmpl _dbl_st_acc,_dbl_expected
691 0002DA01 21 0d jneq L9996
692 0002DA03 1d effffffaf7 effffffaf2 cmpl _dbl_st_acc+4,_dbl_expected+4
693 0002DA0E 31 42 jeql L282
694 0002DA10 L9996:
695 0002DA10 # {
696 0002DA10 # errcnt++; /* bump the error count */
697 0002DA10 6d effffffae6 incl _errcnt
698 0002DA16 # if ( prt_error )
699 0002DA16 5d effffffae0 tstl _prt_error
700 0002DA1C 31 0d jeql L283
701 0002DA1E # print_pipe12_er("Reg. Data, 3 NO-OPs");
702 0002DA1E .data 1
703 00000dd2 * L284:
704 00000dd2 * 5265672E20446174612C20332 .ascii "Reg. Data, 3 NO-OPs\0"
04E4F2D4F507300
705 00000de6 * .text
706 0002DA1E dd 8f00000dd2 pushl $L284
707 0002DA24 fe 08 ef00000691 callf $8,_print_pipe12_er
708 0002DA2B # if ( halt_flg ) /* halt on error? */
709 0002DA2B L283:
710 0002DA2B 5d effffffacb tstl _halt_flg
711 0002DA31 31 0d jeql L285
712 0002DA33 # pipe12_er_hlt( subtest );
713 0002DA33 dd effffffac3 pushl _subtest
714 0002DA39 fe 08 ef000007ca callf $8,_pipe12_er_hlt
715 0002DA40 # if ( loop_on_err ) {
716 0002DA40 L285:
717 0002DA40 5d effffffab6 tstl _loop_on_err
718 0002DA46 31 0a jeql L286
719 0002DA48 # force_loop = TRUE; /* set the force loop flag */
720 0002DA48 0d 01 effffffaad movl $1,_force_loop
721 0002DA4F # asm("brw _pipe12_4_lp1"); /* and loop */
722 0002DA4F 13 ff3f brw _pipe12_4_lp1
723 0002DA52 # }
724 0002DA52 # } /* end of compare error */
725 0002DA52 L286:
726 0002DA52 # } while( index++ < max_ldd_1_index );
727 0002DA52 L282:
728 0002DA52 L279:
729 0002DA52 0d effffffaa4 50 movl _index,r0
730 0002DA59 6d effffffa9d incl _index
731 0002DA5F 1d 50 effffffa96 cmpl r0,_max_ldd_1_index
732 0002DA66 81 03 13 fedc jlss L280
733 0002DA6B L278:
734 0002DA6B # } /* end of subtest 4 */
735 0002DA6B 40 ret#2
736 0002DA6C .set L274,0x0
737 0002DA6C L276:
738 0002DA6C 13 fecc jbr L277
739 0002DA6F .data
740 00000d8c * .text
741 0002DA6F 00 .align 1
742 0002DA70 .globl _pipe12_5
743 0002DA70 _pipe12_5:
744 0002DA70 0000 .word L287
745 0002DA72 #
746 0002DA72 #
747 0002DA72 #
748 0002DA72 #
749 0002DA72 #
750 0002DA72 #
751 0002DA72 # /************************************************************************
752 0002DA72 # *
753 0002DA72 # * SUBTEST 5
754 0002DA72 # * data in cache, no NO-OPs
755 0002DA72 # *
756 0002DA72 # ************************************************************************/
757 0002DA72 # pipe12_5()
758 0002DA72 # {
759 0002DA72 13 0104 jbr L289
760 0002DA75 L290:
761 0002DA75 # force_loop = FALSE; /* clear the force_loop flg */
762 0002DA75 4d effffffa81 clrl _force_loop
763 0002DA7B # index = 0;
764 0002DA7B 4d effffffa7b clrl _index
765 0002DA81 # do
766 0002DA81 L293:
767 0002DA81 # {
768 0002DA81 # dbl_value_1 = ldd_1_data[index].ld; /* get the operand's MSW */
769 0002DA81 48 04 effffffa74 50 shll $4,_index,r0
770 0002DA89 0c 8f00000000 50 addl2 $_ldd_1_data,r0
771 0002DA90 0d a004 effffffa68 movl 4(r0),_dbl_value_1+4
772 0002DA98 0d 60 effffffa5d movl (r0),_dbl_value_1
773 0002DA9F # dbl_value_2.m = 0; /* clear the '0.0' operand */
774 0002DA9F 4d effffffa57 clrl _dbl_value_2
775 0002DAA5 # dbl_value_2.l = 0;
776 0002DAA5 4d effffffa55 clrl _dbl_value_2+4
777 0002DAAB # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
778 0002DAAB 48 04 effffffa4a 50 shll $4,_index,r0
779 0002DAB3 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
780 0002DABA 0d a004 effffffa3e movl 4(r0),_dbl_expected+4
781 0002DAC2 0d 60 effffffa33 movl (r0),_dbl_expected
782 0002DAC9 # /*
783 0002DAC9 # * If LOOP ON ERROR is set, this is the loop for this subtest.
784 0002DAC9 # * The force loop flag is set after the first error.
785 0002DAC9 # */
786 0002DAC9 # asm("_pipe12_5_lp1:");
787 0002DAC9 _pipe12_5_lp1:
788 0002DAC9 # asm("ldd _dbl_value_1"); /* load the op. ( op ) */
789 0002DAC9 07 effffffa2d ldd _dbl_value_1
790 0002DACF # asm("subd _dbl_value_1"); /* subtract the op. ( 0 ) */
791 0002DACF d7 effffffa27 subd _dbl_value_1
792 0002DAD5 # asm("addd _dbl_value_2"); /* add a '0' ( 0 ) */
793 0002DAD5 c7 effffffa21 addd _dbl_value_2
794 0002DADB # asm("subd _dbl_value_1"); /* subtract the op. (-op ) */
795 0002DADB d7 effffffa1b subd _dbl_value_1
796 0002DAE1 # asm("addd _dbl_value_1"); /* add the op. ( 0 ) */
797 0002DAE1 c7 effffffa15 addd _dbl_value_1
798 0002DAE7 # asm("subd _dbl_value_2"); /* subtract a '0' ( 0 ) */
799 0002DAE7 d7 effffffa0f subd _dbl_value_2
800 0002DAED # asm("addd _dbl_value_1"); /* add the op. ( op ) */
801 0002DAED c7 effffffa09 addd _dbl_value_1
802 0002DAF3 # asm("std _dbl_st_acc"); /* store the result ( op ) */
803 0002DAF3 27 effffffa03 std _dbl_st_acc
804 0002DAF9 # if( force_loop )
805 0002DAF9 5d effffff9fd tstl _force_loop
806 0002DAFF 31 02 jeql L294
807 0002DB01 # asm("brb _pipe12_5_lp1");; /* run the loop again */
808 0002DB01 11 c6 brb _pipe12_5_lp1
809 0002DB03 L294:
810 0002DB03 # /*
811 0002DB03 # * verify the results
812 0002DB03 # */
813 0002DB03 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
814 0002DB03 # (dbl_st_acc.l != dbl_expected.l) )
815 0002DB03 1d effffff9f3 effffff9ee cmpl _dbl_st_acc,_dbl_expected
816 0002DB0E 21 0d jneq L9995
817 0002DB10 1d effffff9ea effffff9e5 cmpl _dbl_st_acc+4,_dbl_expected+4
818 0002DB1B 31 42 jeql L295
819 0002DB1D L9995:
820 0002DB1D # {
821 0002DB1D # errcnt++; /* bump the error count */
822 0002DB1D 6d effffff9d9 incl _errcnt
823 0002DB23 # if ( prt_error )
824 0002DB23 5d effffff9d3 tstl _prt_error
825 0002DB29 31 0d jeql L296
826 0002DB2B # print_pipe12_er("Cache Data, 0 NO-OPs");
827 0002DB2B .data 1
828 00000de6 * L297:
829 00000de6 * 436163686520446174612C203 .ascii "Cache Data, 0 NO-OPs\0"
0204E4F2D4F507300
830 00000dfb * .text
831 0002DB2B dd 8f00000de6 pushl $L297
832 0002DB31 fe 08 ef00000584 callf $8,_print_pipe12_er
833 0002DB38 # if ( halt_flg ) /* halt on error? */
834 0002DB38 L296:
835 0002DB38 5d effffff9be tstl _halt_flg
836 0002DB3E 31 0d jeql L298
837 0002DB40 # pipe12_er_hlt( subtest );
838 0002DB40 dd effffff9b6 pushl _subtest
839 0002DB46 fe 08 ef000006bd callf $8,_pipe12_er_hlt
840 0002DB4D # if ( loop_on_err ) {
841 0002DB4D L298:
842 0002DB4D 5d effffff9a9 tstl _loop_on_err
843 0002DB53 31 0a jeql L299
844 0002DB55 # force_loop = TRUE; /* set the force loop flag */
845 0002DB55 0d 01 effffff9a0 movl $1,_force_loop
846 0002DB5C # asm("brw _pipe12_5_lp1"); /* and loop */
847 0002DB5C 13 ff6a brw _pipe12_5_lp1
848 0002DB5F # }
849 0002DB5F # } /* end of compare error */
850 0002DB5F L299:
851 0002DB5F # } while( index++ < max_ldd_1_index );
852 0002DB5F L295:
853 0002DB5F L292:
854 0002DB5F 0d effffff997 50 movl _index,r0
855 0002DB66 6d effffff990 incl _index
856 0002DB6C 1d 50 effffff989 cmpl r0,_max_ldd_1_index
857 0002DB73 81 03 13 ff09 jlss L293
858 0002DB78 L291:
859 0002DB78 # } /* end of subtest 5 */
860 0002DB78 40 ret#2
861 0002DB79 .set L287,0x0
862 0002DB79 L289:
863 0002DB79 13 fef9 jbr L290
864 0002DB7C .data
865 00000d8c * .text
866 0002DB7C .align 1
867 0002DB7C .globl _pipe12_6
868 0002DB7C _pipe12_6:
869 0002DB7C 0000 .word L300
870 0002DB7E #
871 0002DB7E #
872 0002DB7E #
873 0002DB7E #
874 0002DB7E #
875 0002DB7E #
876 0002DB7E #
877 0002DB7E # /************************************************************************
878 0002DB7E # *
879 0002DB7E # * SUBTEST 6
880 0002DB7E # * data in cache, 1 NO-OP
881 0002DB7E # *
882 0002DB7E # ************************************************************************/
883 0002DB7E # pipe12_6()
884 0002DB7E # {
885 0002DB7E 13 010b jbr L302
886 0002DB81 L303:
887 0002DB81 # force_loop = FALSE; /* clear the force_loop flg */
888 0002DB81 4d effffff975 clrl _force_loop
889 0002DB87 # index = 0;
890 0002DB87 4d effffff96f clrl _index
891 0002DB8D # do
892 0002DB8D L306:
893 0002DB8D # {
894 0002DB8D # dbl_value_1 = ldd_1_data[index].ld; /* get the operand's MSW */
895 0002DB8D 48 04 effffff968 50 shll $4,_index,r0
896 0002DB95 0c 8f00000000 50 addl2 $_ldd_1_data,r0
897 0002DB9C 0d a004 effffff95c movl 4(r0),_dbl_value_1+4
898 0002DBA4 0d 60 effffff951 movl (r0),_dbl_value_1
899 0002DBAB # dbl_value_2.m = 0; /* clear the '0.0' operand */
900 0002DBAB 4d effffff94b clrl _dbl_value_2
901 0002DBB1 # dbl_value_2.l = 0;
902 0002DBB1 4d effffff949 clrl _dbl_value_2+4
903 0002DBB7 # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
904 0002DBB7 48 04 effffff93e 50 shll $4,_index,r0
905 0002DBBF 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
906 0002DBC6 0d a004 effffff932 movl 4(r0),_dbl_expected+4
907 0002DBCE 0d 60 effffff927 movl (r0),_dbl_expected
908 0002DBD5 # /*
909 0002DBD5 # * If LOOP ON ERROR is set, this is the loop for this subtest.
910 0002DBD5 # * The force loop flag is set after the first error.
911 0002DBD5 # */
912 0002DBD5 # asm("_pipe12_6_lp1:");
913 0002DBD5 _pipe12_6_lp1:
914 0002DBD5 # asm("ldd _dbl_value_1"); /* load the op. ( op ) */
915 0002DBD5 07 effffff921 ldd _dbl_value_1
916 0002DBDB # asm("nop");
917 0002DBDB 10 nop
918 0002DBDC # asm("subd _dbl_value_1"); /* subtract the op. ( 0 ) */
919 0002DBDC d7 effffff91a subd _dbl_value_1
920 0002DBE2 # asm("nop");
921 0002DBE2 10 nop
922 0002DBE3 # asm("addd _dbl_value_2"); /* add a '0' ( 0 ) */
923 0002DBE3 c7 effffff913 addd _dbl_value_2
924 0002DBE9 # asm("nop");
925 0002DBE9 10 nop
926 0002DBEA # asm("subd _dbl_value_1"); /* subtract the op. (-op ) */
927 0002DBEA d7 effffff90c subd _dbl_value_1
928 0002DBF0 # asm("nop");
929 0002DBF0 10 nop
930 0002DBF1 # asm("addd _dbl_value_1"); /* add the op. ( 0 ) */
931 0002DBF1 c7 effffff905 addd _dbl_value_1
932 0002DBF7 # asm("nop");
933 0002DBF7 10 nop
934 0002DBF8 # asm("subd _dbl_value_2"); /* subtract a '0' ( 0 ) */
935 0002DBF8 d7 effffff8fe subd _dbl_value_2
936 0002DBFE # asm("nop");
937 0002DBFE 10 nop
938 0002DBFF # asm("addd _dbl_value_1"); /* add the op. ( op ) */
939 0002DBFF c7 effffff8f7 addd _dbl_value_1
940 0002DC05 # asm("nop");
941 0002DC05 10 nop
942 0002DC06 # asm("std _dbl_st_acc"); /* store the result ( op ) */
943 0002DC06 27 effffff8f0 std _dbl_st_acc
944 0002DC0C # if( force_loop )
945 0002DC0C 5d effffff8ea tstl _force_loop
946 0002DC12 31 02 jeql L307
947 0002DC14 # asm("brb _pipe12_6_lp1");; /* run the loop again */
948 0002DC14 11 bf brb _pipe12_6_lp1
949 0002DC16 L307:
950 0002DC16 # /*
951 0002DC16 # * verify the results
952 0002DC16 # */
953 0002DC16 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
954 0002DC16 # (dbl_st_acc.l != dbl_expected.l) )
955 0002DC16 1d effffff8e0 effffff8db cmpl _dbl_st_acc,_dbl_expected
956 0002DC21 21 0d jneq L9994
957 0002DC23 1d effffff8d7 effffff8d2 cmpl _dbl_st_acc+4,_dbl_expected+4
958 0002DC2E 31 42 jeql L308
959 0002DC30 L9994:
960 0002DC30 # {
961 0002DC30 # errcnt++; /* bump the error count */
962 0002DC30 6d effffff8c6 incl _errcnt
963 0002DC36 # if ( prt_error )
964 0002DC36 5d effffff8c0 tstl _prt_error
965 0002DC3C 31 0d jeql L309
966 0002DC3E # print_pipe12_er("Cache Data, 1 NO-OP");
967 0002DC3E .data 1
968 00000dfb * L310:
969 00000dfb * 436163686520446174612C203 .ascii "Cache Data, 1 NO-OP\0"
1204E4F2D4F5000
970 00000e0f * .text
971 0002DC3E dd 8f00000dfb pushl $L310
972 0002DC44 fe 08 ef00000471 callf $8,_print_pipe12_er
973 0002DC4B # if ( halt_flg ) /* halt on error? */
974 0002DC4B L309:
975 0002DC4B 5d effffff8ab tstl _halt_flg
976 0002DC51 31 0d jeql L311
977 0002DC53 # pipe12_er_hlt( subtest );
978 0002DC53 dd effffff8a3 pushl _subtest
979 0002DC59 fe 08 ef000005aa callf $8,_pipe12_er_hlt
980 0002DC60 # if ( loop_on_err ) {
981 0002DC60 L311:
982 0002DC60 5d effffff896 tstl _loop_on_err
983 0002DC66 31 0a jeql L312
984 0002DC68 # force_loop = TRUE; /* set the force loop flag */
985 0002DC68 0d 01 effffff88d movl $1,_force_loop
986 0002DC6F # asm("brw _pipe12_6_lp1"); /* and loop */
987 0002DC6F 13 ff63 brw _pipe12_6_lp1
988 0002DC72 # }
989 0002DC72 # } /* end of compare error */
990 0002DC72 L312:
991 0002DC72 # } while( index++ < max_ldd_1_index );
992 0002DC72 L308:
993 0002DC72 L305:
994 0002DC72 0d effffff884 50 movl _index,r0
995 0002DC79 6d effffff87d incl _index
996 0002DC7F 1d 50 effffff876 cmpl r0,_max_ldd_1_index
997 0002DC86 81 03 13 ff02 jlss L306
998 0002DC8B L304:
999 0002DC8B # } /* end of subtest 6 */
1000 0002DC8B 40 ret#2
1001 0002DC8C .set L300,0x0
1002 0002DC8C L302:
1003 0002DC8C 13 fef2 jbr L303
1004 0002DC8F .data
1005 00000d8c * .text
1006 0002DC8F 00 .align 1
1007 0002DC90 .globl _pipe12_7
1008 0002DC90 _pipe12_7:
1009 0002DC90 0000 .word L313
1010 0002DC92 #
1011 0002DC92 #
1012 0002DC92 #
1013 0002DC92 #
1014 0002DC92 #
1015 0002DC92 #
1016 0002DC92 #
1017 0002DC92 # /************************************************************************
1018 0002DC92 # *
1019 0002DC92 # * SUBTEST 7
1020 0002DC92 # * data in cache, 2 NO-OPs
1021 0002DC92 # *
1022 0002DC92 # ************************************************************************/
1023 0002DC92 # pipe12_7()
1024 0002DC92 # {
1025 0002DC92 13 0112 jbr L315
1026 0002DC95 L316:
1027 0002DC95 # force_loop = FALSE; /* clear the force_loop flg */
1028 0002DC95 4d effffff861 clrl _force_loop
1029 0002DC9B # index = 0;
1030 0002DC9B 4d effffff85b clrl _index
1031 0002DCA1 # do
1032 0002DCA1 L319:
1033 0002DCA1 # {
1034 0002DCA1 # dbl_value_1 = ldd_1_data[index].ld; /* get the operand's MSW */
1035 0002DCA1 48 04 effffff854 50 shll $4,_index,r0
1036 0002DCA9 0c 8f00000000 50 addl2 $_ldd_1_data,r0
1037 0002DCB0 0d a004 effffff848 movl 4(r0),_dbl_value_1+4
1038 0002DCB8 0d 60 effffff83d movl (r0),_dbl_value_1
1039 0002DCBF # dbl_value_2.m = 0; /* clear the '0.0' operand */
1040 0002DCBF 4d effffff837 clrl _dbl_value_2
1041 0002DCC5 # dbl_value_2.l = 0;
1042 0002DCC5 4d effffff835 clrl _dbl_value_2+4
1043 0002DCCB # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
1044 0002DCCB 48 04 effffff82a 50 shll $4,_index,r0
1045 0002DCD3 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
1046 0002DCDA 0d a004 effffff81e movl 4(r0),_dbl_expected+4
1047 0002DCE2 0d 60 effffff813 movl (r0),_dbl_expected
1048 0002DCE9 # /*
1049 0002DCE9 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1050 0002DCE9 # * The force loop flag is set after the first error.
1051 0002DCE9 # */
1052 0002DCE9 # asm("_pipe12_7_lp1:");
1053 0002DCE9 _pipe12_7_lp1:
1054 0002DCE9 # asm("ldd _dbl_value_1"); /* load the op. ( op ) */
1055 0002DCE9 07 effffff80d ldd _dbl_value_1
1056 0002DCEF # asm("nop");
1057 0002DCEF 10 nop
1058 0002DCF0 # asm("nop");
1059 0002DCF0 10 nop
1060 0002DCF1 # asm("subd _dbl_value_1"); /* subtract the op. ( 0 ) */
1061 0002DCF1 d7 effffff805 subd _dbl_value_1
1062 0002DCF7 # asm("nop");
1063 0002DCF7 10 nop
1064 0002DCF8 # asm("nop");
1065 0002DCF8 10 nop
1066 0002DCF9 # asm("addd _dbl_value_2"); /* add a '0' ( 0 ) */
1067 0002DCF9 c7 effffff7fd addd _dbl_value_2
1068 0002DCFF # asm("nop");
1069 0002DCFF 10 nop
1070 0002DD00 # asm("nop");
1071 0002DD00 10 nop
1072 0002DD01 # asm("subd _dbl_value_1"); /* subtract the op. (-op ) */
1073 0002DD01 d7 effffff7f5 subd _dbl_value_1
1074 0002DD07 # asm("nop");
1075 0002DD07 10 nop
1076 0002DD08 # asm("nop");
1077 0002DD08 10 nop
1078 0002DD09 # asm("addd _dbl_value_1"); /* add the op. ( 0 ) */
1079 0002DD09 c7 effffff7ed addd _dbl_value_1
1080 0002DD0F # asm("nop");
1081 0002DD0F 10 nop
1082 0002DD10 # asm("nop");
1083 0002DD10 10 nop
1084 0002DD11 # asm("subd _dbl_value_2"); /* subtract a '0' ( 0 ) */
1085 0002DD11 d7 effffff7e5 subd _dbl_value_2
1086 0002DD17 # asm("nop");
1087 0002DD17 10 nop
1088 0002DD18 # asm("nop");
1089 0002DD18 10 nop
1090 0002DD19 # asm("addd _dbl_value_1"); /* add the op. ( op ) */
1091 0002DD19 c7 effffff7dd addd _dbl_value_1
1092 0002DD1F # asm("nop");
1093 0002DD1F 10 nop
1094 0002DD20 # asm("nop");
1095 0002DD20 10 nop
1096 0002DD21 # asm("std _dbl_st_acc"); /* store the result ( op ) */
1097 0002DD21 27 effffff7d5 std _dbl_st_acc
1098 0002DD27 # if( force_loop )
1099 0002DD27 5d effffff7cf tstl _force_loop
1100 0002DD2D 31 02 jeql L320
1101 0002DD2F # asm("brb _pipe12_7_lp1");; /* run the loop again */
1102 0002DD2F 11 b8 brb _pipe12_7_lp1
1103 0002DD31 L320:
1104 0002DD31 # /*
1105 0002DD31 # * verify the results
1106 0002DD31 # */
1107 0002DD31 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
1108 0002DD31 # (dbl_st_acc.l != dbl_expected.l) )
1109 0002DD31 1d effffff7c5 effffff7c0 cmpl _dbl_st_acc,_dbl_expected
1110 0002DD3C 21 0d jneq L9993
1111 0002DD3E 1d effffff7bc effffff7b7 cmpl _dbl_st_acc+4,_dbl_expected+4
1112 0002DD49 31 42 jeql L321
1113 0002DD4B L9993:
1114 0002DD4B # {
1115 0002DD4B # errcnt++; /* bump the error count */
1116 0002DD4B 6d effffff7ab incl _errcnt
1117 0002DD51 # if ( prt_error )
1118 0002DD51 5d effffff7a5 tstl _prt_error
1119 0002DD57 31 0d jeql L322
1120 0002DD59 # print_pipe12_er("Cache Data, 2 NO-OPs");
1121 0002DD59 .data 1
1122 00000e0f * L323:
1123 00000e0f * 436163686520446174612C203 .ascii "Cache Data, 2 NO-OPs\0"
2204E4F2D4F507300
1124 00000e24 * .text
1125 0002DD59 dd 8f00000e0f pushl $L323
1126 0002DD5F fe 08 ef00000356 callf $8,_print_pipe12_er
1127 0002DD66 # if ( halt_flg ) /* halt on error? */
1128 0002DD66 L322:
1129 0002DD66 5d effffff790 tstl _halt_flg
1130 0002DD6C 31 0d jeql L324
1131 0002DD6E # pipe12_er_hlt( subtest );
1132 0002DD6E dd effffff788 pushl _subtest
1133 0002DD74 fe 08 ef0000048f callf $8,_pipe12_er_hlt
1134 0002DD7B # if ( loop_on_err ) {
1135 0002DD7B L324:
1136 0002DD7B 5d effffff77b tstl _loop_on_err
1137 0002DD81 31 0a jeql L325
1138 0002DD83 # force_loop = TRUE; /* set the force loop flag */
1139 0002DD83 0d 01 effffff772 movl $1,_force_loop
1140 0002DD8A # asm("brw _pipe12_7_lp1"); /* and loop */
1141 0002DD8A 13 ff5c brw _pipe12_7_lp1
1142 0002DD8D # }
1143 0002DD8D # } /* end of compare error */
1144 0002DD8D L325:
1145 0002DD8D # } while( index++ < max_ldd_1_index );
1146 0002DD8D L321:
1147 0002DD8D L318:
1148 0002DD8D 0d effffff769 50 movl _index,r0
1149 0002DD94 6d effffff762 incl _index
1150 0002DD9A 1d 50 effffff75b cmpl r0,_max_ldd_1_index
1151 0002DDA1 81 03 13 fefb jlss L319
1152 0002DDA6 L317:
1153 0002DDA6 # } /* end of subtest 7 */
1154 0002DDA6 40 ret#2
1155 0002DDA7 .set L313,0x0
1156 0002DDA7 L315:
1157 0002DDA7 13 feeb jbr L316
1158 0002DDAA .data
1159 00000d8c * .text
1160 0002DDAA .align 1
1161 0002DDAA .globl _pipe12_8
1162 0002DDAA _pipe12_8:
1163 0002DDAA 0000 .word L326
1164 0002DDAC #
1165 0002DDAC #
1166 0002DDAC #
1167 0002DDAC #
1168 0002DDAC #
1169 0002DDAC #
1170 0002DDAC #
1171 0002DDAC # /************************************************************************
1172 0002DDAC # *
1173 0002DDAC # * SUBTEST 8
1174 0002DDAC # * data in cache, 3 NO-OPs
1175 0002DDAC # *
1176 0002DDAC # ************************************************************************/
1177 0002DDAC # pipe12_8()
1178 0002DDAC # {
1179 0002DDAC 13 0119 jbr L328
1180 0002DDAF L329:
1181 0002DDAF # force_loop = FALSE; /* clear the force_loop flg */
1182 0002DDAF 4d effffff747 clrl _force_loop
1183 0002DDB5 # index = 0;
1184 0002DDB5 4d effffff741 clrl _index
1185 0002DDBB # do
1186 0002DDBB L332:
1187 0002DDBB # {
1188 0002DDBB # dbl_value_1 = ldd_1_data[index].ld; /* get the operand's MSW */
1189 0002DDBB 48 04 effffff73a 50 shll $4,_index,r0
1190 0002DDC3 0c 8f00000000 50 addl2 $_ldd_1_data,r0
1191 0002DDCA 0d a004 effffff72e movl 4(r0),_dbl_value_1+4
1192 0002DDD2 0d 60 effffff723 movl (r0),_dbl_value_1
1193 0002DDD9 # dbl_value_2.m = 0; /* clear the '0.0' operand */
1194 0002DDD9 4d effffff71d clrl _dbl_value_2
1195 0002DDDF # dbl_value_2.l = 0;
1196 0002DDDF 4d effffff71b clrl _dbl_value_2+4
1197 0002DDE5 # dbl_expected = ldd_1_data[index].exp; /* get the expected results */
1198 0002DDE5 48 04 effffff710 50 shll $4,_index,r0
1199 0002DDED 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
1200 0002DDF4 0d a004 effffff704 movl 4(r0),_dbl_expected+4
1201 0002DDFC 0d 60 effffff6f9 movl (r0),_dbl_expected
1202 0002DE03 # /*
1203 0002DE03 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1204 0002DE03 # * The force loop flag is set after the first error.
1205 0002DE03 # */
1206 0002DE03 # asm("_pipe12_8_lp1:");
1207 0002DE03 _pipe12_8_lp1:
1208 0002DE03 # asm("ldd _dbl_value_1"); /* load the op. ( op ) */
1209 0002DE03 07 effffff6f3 ldd _dbl_value_1
1210 0002DE09 # asm("nop");
1211 0002DE09 10 nop
1212 0002DE0A # asm("nop");
1213 0002DE0A 10 nop
1214 0002DE0B # asm("nop");
1215 0002DE0B 10 nop
1216 0002DE0C # asm("subd _dbl_value_1"); /* subtract the op. ( 0 ) */
1217 0002DE0C d7 effffff6ea subd _dbl_value_1
1218 0002DE12 # asm("nop");
1219 0002DE12 10 nop
1220 0002DE13 # asm("nop");
1221 0002DE13 10 nop
1222 0002DE14 # asm("nop");
1223 0002DE14 10 nop
1224 0002DE15 # asm("addd _dbl_value_2"); /* add a '0' ( 0 ) */
1225 0002DE15 c7 effffff6e1 addd _dbl_value_2
1226 0002DE1B # asm("nop");
1227 0002DE1B 10 nop
1228 0002DE1C # asm("nop");
1229 0002DE1C 10 nop
1230 0002DE1D # asm("nop");
1231 0002DE1D 10 nop
1232 0002DE1E # asm("subd _dbl_value_1"); /* subtract the op. (-op ) */
1233 0002DE1E d7 effffff6d8 subd _dbl_value_1
1234 0002DE24 # asm("nop");
1235 0002DE24 10 nop
1236 0002DE25 # asm("nop");
1237 0002DE25 10 nop
1238 0002DE26 # asm("nop");
1239 0002DE26 10 nop
1240 0002DE27 # asm("addd _dbl_value_1"); /* add the op. ( 0 ) */
1241 0002DE27 c7 effffff6cf addd _dbl_value_1
1242 0002DE2D # asm("nop");
1243 0002DE2D 10 nop
1244 0002DE2E # asm("nop");
1245 0002DE2E 10 nop
1246 0002DE2F # asm("nop");
1247 0002DE2F 10 nop
1248 0002DE30 # asm("subd _dbl_value_2"); /* subtract a '0' ( 0 ) */
1249 0002DE30 d7 effffff6c6 subd _dbl_value_2
1250 0002DE36 # asm("nop");
1251 0002DE36 10 nop
1252 0002DE37 # asm("nop");
1253 0002DE37 10 nop
1254 0002DE38 # asm("nop");
1255 0002DE38 10 nop
1256 0002DE39 # asm("addd _dbl_value_1"); /* add the op. ( op ) */
1257 0002DE39 c7 effffff6bd addd _dbl_value_1
1258 0002DE3F # asm("nop");
1259 0002DE3F 10 nop
1260 0002DE40 # asm("nop");
1261 0002DE40 10 nop
1262 0002DE41 # asm("nop");
1263 0002DE41 10 nop
1264 0002DE42 # asm("std _dbl_st_acc"); /* store the result ( op ) */
1265 0002DE42 27 effffff6b4 std _dbl_st_acc
1266 0002DE48 # if( force_loop )
1267 0002DE48 5d effffff6ae tstl _force_loop
1268 0002DE4E 31 02 jeql L333
1269 0002DE50 # asm("brb _pipe12_8_lp1");; /* run the loop again */
1270 0002DE50 11 b1 brb _pipe12_8_lp1
1271 0002DE52 L333:
1272 0002DE52 # /*
1273 0002DE52 # * verify the results
1274 0002DE52 # */
1275 0002DE52 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
1276 0002DE52 # (dbl_st_acc.l != dbl_expected.l) )
1277 0002DE52 1d effffff6a4 effffff69f cmpl _dbl_st_acc,_dbl_expected
1278 0002DE5D 21 0d jneq L9992
1279 0002DE5F 1d effffff69b effffff696 cmpl _dbl_st_acc+4,_dbl_expected+4
1280 0002DE6A 31 42 jeql L334
1281 0002DE6C L9992:
1282 0002DE6C # {
1283 0002DE6C # errcnt++; /* bump the error count */
1284 0002DE6C 6d effffff68a incl _errcnt
1285 0002DE72 # if ( prt_error )
1286 0002DE72 5d effffff684 tstl _prt_error
1287 0002DE78 31 0d jeql L335
1288 0002DE7A # print_pipe12_er("Cache Data, 3 NO-OPs");
1289 0002DE7A .data 1
1290 00000e24 * L336:
1291 00000e24 * 436163686520446174612C203 .ascii "Cache Data, 3 NO-OPs\0"
3204E4F2D4F507300
1292 00000e39 * .text
1293 0002DE7A dd 8f00000e24 pushl $L336
1294 0002DE80 fe 08 ef00000235 callf $8,_print_pipe12_er
1295 0002DE87 # if ( halt_flg ) /* halt on error? */
1296 0002DE87 L335:
1297 0002DE87 5d effffff66f tstl _halt_flg
1298 0002DE8D 31 0d jeql L337
1299 0002DE8F # pipe12_er_hlt( subtest );
1300 0002DE8F dd effffff667 pushl _subtest
1301 0002DE95 fe 08 ef0000036e callf $8,_pipe12_er_hlt
1302 0002DE9C # if ( loop_on_err ) {
1303 0002DE9C L337:
1304 0002DE9C 5d effffff65a tstl _loop_on_err
1305 0002DEA2 31 0a jeql L338
1306 0002DEA4 # force_loop = TRUE; /* set the force loop flag */
1307 0002DEA4 0d 01 effffff651 movl $1,_force_loop
1308 0002DEAB # asm("brw _pipe12_8_lp1"); /* and loop */
1309 0002DEAB 13 ff55 brw _pipe12_8_lp1
1310 0002DEAE # }
1311 0002DEAE # } /* end of compare error */
1312 0002DEAE L338:
1313 0002DEAE # } while( index++ < max_ldd_1_index );
1314 0002DEAE L334:
1315 0002DEAE L331:
1316 0002DEAE 0d effffff648 50 movl _index,r0
1317 0002DEB5 6d effffff641 incl _index
1318 0002DEBB 1d 50 effffff63a cmpl r0,_max_ldd_1_index
1319 0002DEC2 81 03 13 fef4 jlss L332
1320 0002DEC7 L330:
1321 0002DEC7 # } /* end of subtest 8 */
1322 0002DEC7 40 ret#2
1323 0002DEC8 .set L326,0x0
1324 0002DEC8 L328:
1325 0002DEC8 13 fee4 jbr L329
1326 0002DECB .data
1327 00000d8c * .text
1328 0002DECB 00 .align 1
1329 0002DECC .globl _pipe12_9
1330 0002DECC _pipe12_9:
1331 0002DECC 0000 .word L339
1332 0002DECE #
1333 0002DECE #
1334 0002DECE #
1335 0002DECE #
1336 0002DECE #
1337 0002DECE #
1338 0002DECE #
1339 0002DECE #
1340 0002DECE # /******************************************************************************
1341 0002DECE # *
1342 0002DECE # * SUBTEST 9
1343 0002DECE # *
1344 0002DECE # * Get the data via the FRAME POINTER ( quad word indexed )
1345 0002DECE # *
1346 0002DECE # * ADDRESSES OF DATA OPERANDS INDEX DATA
1347 0002DECE # * pointer_data,-4 ( FP+24 ) 3 the STF result goes here
1348 0002DECE # * pointer_data-8,-12 ( FP+16 ) 2 <operand data>
1349 0002DECE # * pointer_data-16,-20 ( FP+8 ) 1 < '0.0' data>
1350 0002DECE # * pointer_data-24,-28 ( FP ) 0 point the frame pointer here
1351 0002DECE # *
1352 0002DECE # * NOTE: The double precision instructions are using Quad Word indexing.
1353 0002DECE # ******************************************************************************/
1354 0002DECE # pipe12_9()
1355 0002DECE # {
1356 0002DECE 13 01e7 jbr L341
1357 0002DED1 L342:
1358 0002DED1 # asm("moval (r13),_pre_event_fp"); /* save the frame pointer */
1359 0002DED1 ed 6d effffff624 moval (r13),_pre_event_fp
1360 0002DED8 # asm("moval (r14),_pre_event_sp"); /* save the stack pointer */
1361 0002DED8 ed 6e effffff61d moval (r14),_pre_event_sp
1362 0002DEDF # force_loop = FALSE; /* clear force_loop flag */
1363 0002DEDF 4d effffff617 clrl _force_loop
1364 0002DEE5 # index = 0;
1365 0002DEE5 4d effffff611 clrl _index
1366 0002DEEB # do
1367 0002DEEB L345:
1368 0002DEEB # {
1369 0002DEEB # sgl_value_1 = ldd_1_data[index].ld.m; /* get operand 1's MSW */
1370 0002DEEB 0d effffff60b 50 movl _index,r0
1371 0002DEF2 48 04 50 50 shll $4,r0,r0
1372 0002DEF6 0d e000000000 effffff5fb movl _ldd_1_data(r0),_sgl_value_1
1373 0002DF01 # sgl_value_2 = ldd_1_data[index].ld.l; /* get operand 1's LSW */
1374 0002DF01 0d effffff5f5 50 movl _index,r0
1375 0002DF08 48 04 50 50 shll $4,r0,r0
1376 0002DF0C 0d e000000004 effffff5e5 movl _ldd_1_data+4(r0),_sgl_value_2
1377 0002DF17 # dbl_expected = ldd_1_data[index].exp; /* get expected results */
1378 0002DF17 48 04 effffff5de 50 shll $4,_index,r0
1379 0002DF1F 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
1380 0002DF26 0d a004 effffff5d2 movl 4(r0),_dbl_expected+4
1381 0002DF2E 0d 60 effffff5c7 movl (r0),_dbl_expected
1382 0002DF35 # /*
1383 0002DF35 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1384 0002DF35 # * The force loop flag is set after the first error.
1385 0002DF35 # */
1386 0002DF35 # asm("_pipe12_9_lp1:");
1387 0002DF35 _pipe12_9_lp1:
1388 0002DF35 # asm("moval _pointer_data,_sgl_value_9");/* get store data's addr */
1389 0002DF35 ed effffff5c1 effffff5bc moval _pointer_data,_sgl_value_9
1390 0002DF40 # sgl_value_9 -= 8;
1391 0002DF40 2c 08 effffff5b5 subl2 $8,_sgl_value_9
1392 0002DF47 # asm("movl _sgl_value_2,*_sgl_value_9");/* set the operand's LSW */
1393 0002DF47 0d effffff5af fffffff5aa movl _sgl_value_2,*_sgl_value_9
1394 0002DF52 # sgl_value_9 -= 4;
1395 0002DF52 2c 04 effffff5a3 subl2 $4,_sgl_value_9
1396 0002DF59 # asm("movl _sgl_value_1,*_sgl_value_9");/* set the operand's MSW */
1397 0002DF59 0d effffff59d fffffff598 movl _sgl_value_1,*_sgl_value_9
1398 0002DF64 # sgl_value_9 -= 4;
1399 0002DF64 2c 04 effffff591 subl2 $4,_sgl_value_9
1400 0002DF6B # asm("clrl *_sgl_value_9"); /* set the '0' data's LSW */
1401 0002DF6B 4d fffffff58b clrl *_sgl_value_9
1402 0002DF71 # sgl_value_9 -= 4;
1403 0002DF71 2c 04 effffff584 subl2 $4,_sgl_value_9
1404 0002DF78 # asm("clrl *_sgl_value_9"); /* set the '0' data's MSW */
1405 0002DF78 4d fffffff57e clrl *_sgl_value_9
1406 0002DF7E # sgl_value_9 -= 8; /* get the FP addr to use */
1407 0002DF7E 2c 08 effffff577 subl2 $8,_sgl_value_9
1408 0002DF85 # asm("movl _sgl_value_9,r13"); /* set the FRAME POINTER */
1409 0002DF85 0d effffff571 5d movl _sgl_value_9,r13
1410 0002DF8C # asm("movl $1,r5"); /* r5 index = 1 quadwords */
1411 0002DF8C 0d 01 55 movl $1,r5
1412 0002DF8F # asm("movl $2,r6"); /* r6 index = 2 quadwords */
1413 0002DF8F 0d 02 56 movl $2,r6
1414 0002DF92 # asm("movl $3,r7"); /* r7 index = 3 quadwords */
1415 0002DF92 0d 03 57 movl $3,r7
1416 0002DF95 # asm("ldd (r13)[r6]"); /* load the operand ( op ) */
1417 0002DF95 07 466d ldd (r13)[r6]
1418 0002DF98 # asm("subd (r13)[r6]"); /* subtract the op. ( 0 ) */
1419 0002DF98 d7 466d subd (r13)[r6]
1420 0002DF9B # asm("addd (r13)[r5]"); /* add a '0' ( 0 ) */
1421 0002DF9B c7 456d addd (r13)[r5]
1422 0002DF9E # asm("subd (r13)[r6]"); /* subtract the op. (-op ) */
1423 0002DF9E d7 466d subd (r13)[r6]
1424 0002DFA1 # asm("addd (r13)[r6]"); /* add the op. ( 0 ) */
1425 0002DFA1 c7 466d addd (r13)[r6]
1426 0002DFA4 # asm("subd (r13)[r5]"); /* subtract a '0' ( 0 ) */
1427 0002DFA4 d7 456d subd (r13)[r5]
1428 0002DFA7 # asm("addd (r13)[r6]"); /* add the op. ( op ) */
1429 0002DFA7 c7 466d addd (r13)[r6]
1430 0002DFAA # asm("std (r13)[r7]"); /* store the result ( op ) */
1431 0002DFAA 27 476d std (r13)[r7]
1432 0002DFAD # if( force_loop )
1433 0002DFAD 5d effffff549 tstl _force_loop
1434 0002DFB3 31 03 jeql L346
1435 0002DFB5 # asm("brw _pipe12_9_lp1");; /* run the loop again */
1436 0002DFB5 13 ff7d brw _pipe12_9_lp1
1437 0002DFB8 L346:
1438 0002DFB8 # /*
1439 0002DFB8 # * verify the results
1440 0002DFB8 # */
1441 0002DFB8 # asm("moval (r13),_sgl_value_10"); /* save the frame pointer */
1442 0002DFB8 ed 6d effffff53d moval (r13),_sgl_value_10
1443 0002DFBF # asm("movl _pointer_data,_sgl_value_4"); /* save the LSW stored */
1444 0002DFBF 0d effffff537 effffff532 movl _pointer_data,_sgl_value_4
1445 0002DFCA # asm("movl _pointer_data-4,_sgl_value_3"); /* and the MSW */
1446 0002DFCA 0d effffff528 effffff527 movl _pointer_data-4,_sgl_value_3
1447 0002DFD5 # if( (sgl_value_3 != dbl_expected.m) || /* verify the result... */
1448 0002DFD5 # (sgl_value_4 != dbl_expected.l) || /* verify the result... */
1449 0002DFD5 # (sgl_value_10 != sgl_value_9) ) /* ... and the final FP */
1450 0002DFD5 1d effffff521 effffff51c cmpl _sgl_value_3,_dbl_expected
1451 0002DFE0 21 1d jneq L9991
1452 0002DFE2 1d effffff514 effffff513 cmpl _sgl_value_4,_dbl_expected+4
1453 0002DFED 21 10 jneq L9991
1454 0002DFEF 1d effffff507 effffff502 cmpl _sgl_value_10,_sgl_value_9
1455 0002DFFA 21 03 13 0091 jeql L347
1456 0002DFFF L9991:
1457 0002DFFF # {
1458 0002DFFF # asm("movl _pre_event_fp,r13"); /* restore frame pointer */
1459 0002DFFF 0d effffff4f7 5d movl _pre_event_fp,r13
1460 0002E006 # asm("movl _pre_event_sp,r14"); /* restore stack pointer */
1461 0002E006 0d effffff4f0 5e movl _pre_event_sp,r14
1462 0002E00D # errcnt++; /* bump the error count */
1463 0002E00D 6d effffff4e9 incl _errcnt
1464 0002E013 # if ( prt_error ) {
1465 0002E013 5d effffff4e3 tstl _prt_error
1466 0002E019 31 4e jeql L348
1467 0002E01B # print_pipe12_er("indexed FP addressing");
1468 0002E01B .data 1
1469 00000e39 * L349:
1470 00000e39 * 696E646578656420465020616 .ascii "indexed FP addressing\0"
46472657373696E6700
1471 00000e4f * .text
1472 0002E01B dd 8f00000e39 pushl $L349
1473 0002E021 fe 08 ef00000094 callf $8,_print_pipe12_er
1474 0002E028 # writes("final Frame Pointer = ");
1475 0002E028 .data 1
1476 00000e4f * L350:
1477 00000e4f * 66696E616C204672616D65205 .ascii "final Frame Pointer = \0"
06F696E746572203D2000
1478 00000e66 * .text
1479 0002E028 dd 8f00000e4f pushl $L350
1480 0002E02E fe 08 effffff4c7 callf $8,_writes
1481 0002E035 # write32h( sgl_value_10 );
1482 0002E035 dd effffff4c1 pushl _sgl_value_10
1483 0002E03B fe 08 effffff4ba callf $8,_write32h
1484 0002E042 # writes(", expected FP = ");
1485 0002E042 .data 1
1486 00000e66 * L352:
1487 00000e66 * 2C20206578706563746564204 .ascii ", expected FP = \0"
650203D2000
1488 00000e78 * .text
1489 0002E042 dd 8f00000e66 pushl $L352
1490 0002E048 fe 08 effffff4ad callf $8,_writes
1491 0002E04F # write32h( sgl_value_9 );
1492 0002E04F dd effffff4a7 pushl _sgl_value_9
1493 0002E055 fe 08 effffff4a0 callf $8,_write32h
1494 0002E05C # writes(" \n");
1495 0002E05C .data 1
1496 00000e78 * L353:
1497 00000e78 * 200A00 .ascii " \12\0"
1498 00000e7b * .text
1499 0002E05C dd 8f00000e78 pushl $L353
1500 0002E062 fe 08 effffff493 callf $8,_writes
1501 0002E069 # }
1502 0002E069 # if ( halt_flg ) /* halt on error? */
1503 0002E069 L348:
1504 0002E069 5d effffff48d tstl _halt_flg
1505 0002E06F 31 0d jeql L354
1506 0002E071 # pipe12_er_hlt( subtest );
1507 0002E071 dd effffff485 pushl _subtest
1508 0002E077 fe 08 ef0000018c callf $8,_pipe12_er_hlt
1509 0002E07E # if ( loop_on_err ) {
1510 0002E07E L354:
1511 0002E07E 5d effffff478 tstl _loop_on_err
1512 0002E084 31 0a jeql L355
1513 0002E086 # force_loop = TRUE; /* set the force loop flag */
1514 0002E086 0d 01 effffff46f movl $1,_force_loop
1515 0002E08D # asm("brw _pipe12_9_lp1"); /* and loop */
1516 0002E08D 13 fea5 brw _pipe12_9_lp1
1517 0002E090 # }
1518 0002E090 # } /* end of compare error */
1519 0002E090 L355:
1520 0002E090 # } while( index++ < max_ldd_1_index );
1521 0002E090 L347:
1522 0002E090 L344:
1523 0002E090 0d effffff466 50 movl _index,r0
1524 0002E097 6d effffff45f incl _index
1525 0002E09D 1d 50 effffff458 cmpl r0,_max_ldd_1_index
1526 0002E0A4 81 03 13 fe42 jlss L345
1527 0002E0A9 L343:
1528 0002E0A9 # asm("movl _pre_event_fp,r13"); /* restore the frame pointer */
1529 0002E0A9 0d effffff44d 5d movl _pre_event_fp,r13
1530 0002E0B0 # asm("movl _pre_event_sp,r14"); /* restore the stack pointer */
1531 0002E0B0 0d effffff446 5e movl _pre_event_sp,r14
1532 0002E0B7 # } /* end of subtest 9 */
1533 0002E0B7 40 ret#2
1534 0002E0B8 .set L339,0x0
1535 0002E0B8 L341:
1536 0002E0B8 13 fe16 jbr L342
1537 0002E0BB .data
1538 00000d8c * .text
1539 0002E0BB 00 .align 1
1540 0002E0BC .globl _print_pipe12_er
1541 0002E0BC _print_pipe12_er:
1542 0002E0BC 0000 .word L356
1543 0002E0BE #
1544 0002E0BE #
1545 0002E0BE # /******************************************************************************
1546 0002E0BE # *
1547 0002E0BE # * ERROR ROUTINE
1548 0002E0BE # *
1549 0002E0BE # * print an error in the following form
1550 0002E0BE # *
1551 0002E0BE # *operand = xxxxxxxx xxxxxxxx, final Acc = xxxxxxxx xxxxxxxx, data index = dd
1552 0002E0BE # * expected Acc = xxxxxxxx xxxxxxxx
1553 0002E0BE # *
1554 0002E0BE # ******************************************************************************/
1555 0002E0BE # print_pipe12_er(msg)
1556 0002E0BE # char *msg;
1557 0002E0BE # {
1558 0002E0BE 13 0145 jbr L358
1559 0002E0C1 L359:
1560 0002E0C1 # writes(" \n"); /* start a new print line */
1561 0002E0C1 .data 1
1562 00000e7b * L360:
1563 00000e7b * 200A00 .ascii " \12\0"
1564 00000e7e * .text
1565 0002E0C1 dd 8f00000e7b pushl $L360
1566 0002E0C7 fe 08 effffff42e callf $8,_writes
1567 0002E0CE # writes("cycle: ");
1568 0002E0CE .data 1
1569 00000e7e * L361:
1570 00000e7e * 6379636C653A2000 .ascii "cycle: \0"
1571 00000e86 * .text
1572 0002E0CE dd 8f00000e7e pushl $L361
1573 0002E0D4 fe 08 effffff421 callf $8,_writes
1574 0002E0DB # writed( cycle );
1575 0002E0DB dd effffff41b pushl _cycle
1576 0002E0E1 fe 08 effffff414 callf $8,_writed
1577 0002E0E8 # writes(" test ");
1578 0002E0E8 .data 1
1579 00000e86 * L363:
1580 00000e86 * 20746573742000 .ascii " test \0"
1581 00000e8d * .text
1582 0002E0E8 dd 8f00000e86 pushl $L363
1583 0002E0EE fe 08 effffff407 callf $8,_writes
1584 0002E0F5 # writed( test_no );
1585 0002E0F5 dd effffff401 pushl _test_no
1586 0002E0FB fe 08 effffff3fa callf $8,_writed
1587 0002E102 # writes(" (Pipe 12), subtest ");
1588 0002E102 .data 1
1589 00000e8d * L364:
1590 00000e8d * 20202850697065203132292C2 .ascii " (Pipe 12), subtest \0"
0737562746573742000
1591 00000ea3 * .text
1592 0002E102 dd 8f00000e8d pushl $L364
1593 0002E108 fe 08 effffff3ed callf $8,_writes
1594 0002E10F # writed( subtest );
1595 0002E10F dd effffff3e7 pushl _subtest
1596 0002E115 fe 08 effffff3e0 callf $8,_writed
1597 0002E11C # writes(" error - ");
1598 0002E11C .data 1
1599 00000ea3 * L365:
1600 00000ea3 * 206572726F72202D2000 .ascii " error - \0"
1601 00000ead * .text
1602 0002E11C dd 8f00000ea3 pushl $L365
1603 0002E122 fe 08 effffff3d3 callf $8,_writes
1604 0002E129 # writes( msg );
1605 0002E129 dd ad04 pushl 4(fp)
1606 0002E12C fe 08 effffff3c9 callf $8,_writes
1607 0002E133 # writec('\n');
1608 0002E133 dd 0a pushl $10
1609 0002E135 fe 08 effffff3c0 callf $8,_writec
1610 0002E13C # writes(
1611 0002E13C # " LDD(op), SUBD(op), ADDD(0.0), SUBD(op), ADDD(op), SUBD(0.0), ADD(op), STD\n");
1612 0002E13C .data 1
1613 00000ead * L367:
1614 00000ead * 204C4444286F70292C2053554 .ascii " LDD(op), SUBD(op), ADDD(0.0), SUBD(op), ADDD(op), SUBD(0.0), AD"
244286F70292C204144444428
302E30292C2053554244286F7
0292C2041444444286F70292C
205355424428302E30292C204
144
1615 00000eed * 44286F70292C205354440A00 .ascii "D(op), STD\12\0"
1616 00000ef9 * .text
1617 0002E13C dd 8f00000ead pushl $L367
1618 0002E142 fe 08 effffff3b3 callf $8,_writes
1619 0002E149 # writes("operand = ");
1620 0002E149 .data 1
1621 00000ef9 * L368:
1622 00000ef9 * 6F706572616E64203D2000 .ascii "operand = \0"
1623 00000f04 * .text
1624 0002E149 dd 8f00000ef9 pushl $L368
1625 0002E14F fe 08 effffff3a6 callf $8,_writes
1626 0002E156 # write32h( dbl_ld_acc.m );
1627 0002E156 dd effffff3a0 pushl _dbl_ld_acc
1628 0002E15C fe 08 effffff399 callf $8,_write32h
1629 0002E163 # writec(' ');
1630 0002E163 dd 20 pushl $32
1631 0002E165 fe 08 effffff390 callf $8,_writec
1632 0002E16C # write32h( dbl_ld_acc.l );
1633 0002E16C dd effffff38e pushl _dbl_ld_acc+4
1634 0002E172 fe 08 effffff383 callf $8,_write32h
1635 0002E179 # writes(", final Acc = ");
1636 0002E179 .data 1
1637 00000f04 * L369:
1638 00000f04 * 2C20202066696E616C2041636 .ascii ", final Acc = \0"
3203D2000
1639 00000f15 * .text
1640 0002E179 dd 8f00000f04 pushl $L369
1641 0002E17F fe 08 effffff376 callf $8,_writes
1642 0002E186 # write32h( dbl_st_acc.m );
1643 0002E186 dd effffff370 pushl _dbl_st_acc
1644 0002E18C fe 08 effffff369 callf $8,_write32h
1645 0002E193 # writec(' ');
1646 0002E193 dd 20 pushl $32
1647 0002E195 fe 08 effffff360 callf $8,_writec
1648 0002E19C # write32h( dbl_st_acc.l );
1649 0002E19C dd effffff35e pushl _dbl_st_acc+4
1650 0002E1A2 fe 08 effffff353 callf $8,_write32h
1651 0002E1A9 # writes(", data index = ");
1652 0002E1A9 .data 1
1653 00000f15 * L370:
1654 00000f15 * 2C2020206461746120696E646 .ascii ", data index = \0"
578203D2000
1655 00000f27 * .text
1656 0002E1A9 dd 8f00000f15 pushl $L370
1657 0002E1AF fe 08 effffff346 callf $8,_writes
1658 0002E1B6 # writed( index );
1659 0002E1B6 dd effffff340 pushl _index
1660 0002E1BC fe 08 effffff339 callf $8,_writed
1661 0002E1C3 # writec('\n');
1662 0002E1C3 dd 0a pushl $10
1663 0002E1C5 fe 08 effffff330 callf $8,_writec
1664 0002E1CC # writes(" expected Acc = ");
1665 0002E1CC .data 1
1666 00000f27 * L371:
1667 00000f27 * 2020202020202020202020202 .ascii " expected Acc = \0"
0202020202020202020202020
2020206578706563746564204
16363203D2000
1668 00000f53 * .text
1669 0002E1CC dd 8f00000f27 pushl $L371
1670 0002E1D2 fe 08 effffff323 callf $8,_writes
1671 0002E1D9 # write32h( dbl_expected.m );
1672 0002E1D9 dd effffff31d pushl _dbl_expected
1673 0002E1DF fe 08 effffff316 callf $8,_write32h
1674 0002E1E6 # writec(' ');
1675 0002E1E6 dd 20 pushl $32
1676 0002E1E8 fe 08 effffff30d callf $8,_writec
1677 0002E1EF # write32h( dbl_expected.l );
1678 0002E1EF dd effffff30b pushl _dbl_expected+4
1679 0002E1F5 fe 08 effffff300 callf $8,_write32h
1680 0002E1FC # writec('\n');
1681 0002E1FC dd 0a pushl $10
1682 0002E1FE fe 08 effffff2f7 callf $8,_writec
1683 0002E205 # }
1684 0002E205 40 ret#2
1685 0002E206 .set L356,0x0
1686 0002E206 L358:
1687 0002E206 13 feb8 jbr L359
1688 0002E209 .data
1689 00000d8c * .text
1690 0002E209 00 .align 1
1691 0002E20A .globl _pipe12_er_hlt
1692 0002E20A _pipe12_er_hlt:
1693 0002E20A 0000 .word L372
1694 0002E20C #
1695 0002E20C #
1696 0002E20C #
1697 0002E20C #
1698 0002E20C #
1699 0002E20C # /******************************************************************************
1700 0002E20C # *
1701 0002E20C # * HALT ON ERROR ROUTINE
1702 0002E20C # *
1703 0002E20C # * halt with the necessary information saved in the registers
1704 0002E20C # *
1705 0002E20C # ******************************************************************************/
1706 0002E20C # pipe12_er_hlt( subtest )
1707 0002E20C # int subtest;
1708 0002E20C # {
1709 0002E20C 11 75 jbr L374
1710 0002E20E L375:
1711 0002E20E # sgl_value_3 = dbl_st_acc.m;
1712 0002E20E 0d effffff2e8 effffff2e3 movl _dbl_st_acc,_sgl_value_3
1713 0002E219 # sgl_value_4 = dbl_st_acc.l;
1714 0002E219 0d effffff2e1 effffff2d8 movl _dbl_st_acc+4,_sgl_value_4
1715 0002E224 # asm("movl _test_no,r0"); /* r0 = test number */
1716 0002E224 0d effffff2d2 50 movl _test_no,r0
1717 0002E22B # asm("movl _subtest,r1"); /* r1 = subtest number */
1718 0002E22B 0d effffff2cb 51 movl _subtest,r1
1719 0002E232 # asm("movl $1,r2"); /* r2 = error code */
1720 0002E232 0d 01 52 movl $1,r2
1721 0002E235 # asm("movl _cycle,r3"); /* r3 = cycle count */
1722 0002E235 0d effffff2c1 53 movl _cycle,r3
1723 0002E23C # asm("movl _sgl_value_1,r4"); /* r4 = MSW operand loaded */
1724 0002E23C 0d effffff2ba 54 movl _sgl_value_1,r4
1725 0002E243 # asm("movl _sgl_value_2,r5"); /* r5 = LSW operand loaded */
1726 0002E243 0d effffff2b3 55 movl _sgl_value_2,r5
1727 0002E24A # asm("movl _sgl_value_3,r6"); /* r6 = MSW operand stored */
1728 0002E24A 0d effffff2ac 56 movl _sgl_value_3,r6
1729 0002E251 # asm("movl _sgl_value_4,r7"); /* r7 = LSW operand stored */
1730 0002E251 0d effffff2a5 57 movl _sgl_value_4,r7
1731 0002E258 # asm("movl _sgl_value_5,r8"); /* r8 = MSW operand expect */
1732 0002E258 0d effffff29e 58 movl _sgl_value_5,r8
1733 0002E25F # asm("movl _sgl_value_6,r9"); /* r9 = LSW operand expect */
1734 0002E25F 0d effffff297 59 movl _sgl_value_6,r9
1735 0002E266 # asm("movl _index,r10"); /* r10 = data index */
1736 0002E266 0d effffff290 5a movl _index,r10
1737 0002E26D # if( subtest == 9 ) {
1738 0002E26D 1d ad04 09 cmpl 4(fp),$9
1739 0002E271 21 0e jneq L376
1740 0002E273 # asm("movl _sgl_value_10,r11"); /* r11 = final FP value */
1741 0002E273 0d effffff283 5b movl _sgl_value_10,r11
1742 0002E27A # asm("movl _sgl_value_9,r12"); /* r12 = expected FP value */
1743 0002E27A 0d effffff27c 5c movl _sgl_value_9,r12
1744 0002E281 # };
1745 0002E281 L376:
1746 0002E281 # asm(".globl _pipe12_1_hlt");
1747 0002E281 .globl _pipe12_1_hlt
1748 0002E281 # asm("_pipe12_1_hlt:"); /* PC after the halt */
1749 0002E281 _pipe12_1_hlt:
1750 0002E281 # asm("halt"); /* HALT ... */
1751 0002E281 00 halt
1752 0002E282 # } /* end of halt on error */
1753 0002E282 40 ret#2
1754 0002E283 .set L372,0x0
1755 0002E283 L374:
1756 0002E283 11 89 jbr L375
1757 0002E285 .data
1757 0005B781 .data
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