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1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 00000fe4 * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _pipe_14
6: 6 00000000 _pipe_14:
7: 7 0002F03C 0000 .word L215
8: 8 0002F03E # #include "fpp_defs.h"
9: 9 0002F03E #
10: 10 0002F03E #
11: 11 0002F03E # /*****************************************************************************
12: 12 0002F03E # *
13: 13 0002F03E # * DBL PIPELINE TEST #14 MONITOR
14: 14 0002F03E # *
15: 15 0002F03E # * This test will do:
16: 16 0002F03E # *
17: 17 0002F03E # * LDD(0) ADDD(op1) DIVD(op2) MULD(1) STD
18: 18 0002F03E # *
19: 19 0002F03E # * where 'op1' and 'op2' are the DIVD data patterns.
20: 20 0002F03E # *****************************************************************************/
21: 21 0002F03E # pipe_14()
22: 22 0002F03E # {
23: 23 0002F03E 13 009b jbr L217
24: 24 0002F041 L218:
25: 25 0002F041 # asm(".globl _pipeline_14_t");
26: 26 0002F041 .globl _pipeline_14_t
27: 27 0002F041 # asm("_pipeline_14_t:"); /* entry address */
28: 28 0002F041 _pipeline_14_t:
29: 29 0002F041 # if( (cycle == 1) && (prt_hdrs) ) /* print headers on 1st cycle */
30: 30 0002F041 1d effffffff5 01 cmpl _cycle,$1
31: 31 0002F048 21 15 jneq L219
32: 32 0002F04A 5d efffffffec tstl _prt_hdrs
33: 33 0002F050 31 0d jeql L219
34: 34 0002F052 # {
35: 35 0002F052 # writes(" PIPE_14");
36: 36 0002F052 .data 1
37: 37 00000fe4 * L221:
38: 38 00000fe4 * 20504950455F313400 .ascii " PIPE_14\0"
39: 39 00000fed * .text
40: 40 0002F052 dd 8f00000fe4 pushl $L221
41: 41 0002F058 fe 08 efffffffdd callf $8,_writes
42: 42 0002F05F # }
43: 43 0002F05F # subtest = 1;
44: 44 0002F05F L219:
45: 45 0002F05F 0d 01 efffffffd6 movl $1,_subtest
46: 46 0002F066 # pipe14_1(); /* data in REGs, no NOPs */
47: 47 0002F066 fe 04 ef00000073 callf $4,_pipe14_1
48: 48 0002F06D # subtest++; /* increment subtest num */
49: 49 0002F06D 6d efffffffc9 incl _subtest
50: 50 0002F073 # pipe14_2(); /* data in REGs, 1 NOP */
51: 51 0002F073 fe 04 ef000001dc callf $4,_pipe14_2
52: 52 0002F07A # subtest++; /* increment subtest num */
53: 53 0002F07A 6d efffffffbc incl _subtest
54: 54 0002F080 # pipe14_3(); /* data in REGs, 2 NOPs */
55: 55 0002F080 fe 04 ef00000349 callf $4,_pipe14_3
56: 56 0002F087 # subtest++; /* increment subtest num */
57: 57 0002F087 6d efffffffaf incl _subtest
58: 58 0002F08D # pipe14_4(); /* data in REGs, 3 NOPs */
59: 59 0002F08D fe 04 ef000004ba callf $4,_pipe14_4
60: 60 0002F094 # subtest++; /* increment subtest num */
61: 61 0002F094 6d efffffffa2 incl _subtest
62: 62 0002F09A # pipe14_5(); /* data in CACHE, no NOPs */
63: 63 0002F09A fe 04 ef0000062f callf $4,_pipe14_5
64: 64 0002F0A1 # subtest++; /* increment subtest num */
65: 65 0002F0A1 6d efffffff95 incl _subtest
66: 66 0002F0A7 # pipe14_6(); /* data in CACHE, 1 NOP */
67: 67 0002F0A7 fe 04 ef0000074c callf $4,_pipe14_6
68: 68 0002F0AE # subtest++; /* increment subtest num */
69: 69 0002F0AE 6d efffffff88 incl _subtest
70: 70 0002F0B4 # pipe14_7(); /* data in CACHE, 2 NOPs */
71: 71 0002F0B4 fe 04 ef0000086d callf $4,_pipe14_7
72: 72 0002F0BB # subtest++; /* increment subtest num */
73: 73 0002F0BB 6d efffffff7b incl _subtest
74: 74 0002F0C1 # pipe14_8(); /* data in CACHE, 3 NOPs */
75: 75 0002F0C1 fe 04 ef00000992 callf $4,_pipe14_8
76: 76 0002F0C8 # subtest++; /* increment subtest num */
77: 77 0002F0C8 6d efffffff6e incl _subtest
78: 78 0002F0CE # pipe14_9(); /* data via F.P. 0 NOPs */
79: 79 0002F0CE fe 04 ef00000abb callf $4,_pipe14_9
80: 80 0002F0D5 # asm("jmp *return"); /* return to the test monitor */
81: 81 0002F0D5 71 ffffffff61 jmp *return
82: 82 0002F0DB # }
83: 83 0002F0DB 40 ret#2
84: 84 0002F0DC .set L215,0x0
85: 85 0002F0DC L217:
86: 86 0002F0DC 13 ff62 jbr L218
87: 87 0002F0DF .data
88: 88 00000fe4 * .text
89: 89 0002F0DF 00 .align 1
90: 90 0002F0E0 .globl _pipe14_1
91: 91 0002F0E0 _pipe14_1:
92: 92 0002F0E0 0000 .word L231
93: 93 0002F0E2 #
94: 94 0002F0E2 #
95: 95 0002F0E2 #
96: 96 0002F0E2 #
97: 97 0002F0E2 #
98: 98 0002F0E2 #
99: 99 0002F0E2 #
100: 100 0002F0E2 # /************************************************************************
101: 101 0002F0E2 # *
102: 102 0002F0E2 # * SUBTEST 1
103: 103 0002F0E2 # * data in registers, no NO-OPs
104: 104 0002F0E2 # *
105: 105 0002F0E2 # ************************************************************************/
106: 106 0002F0E2 # pipe14_1()
107: 107 0002F0E2 # {
108: 108 0002F0E2 13 016d jbr L233
109: 109 0002F0E5 L234:
110: 110 0002F0E5 # force_loop = FALSE; /* clear the force_loop flg */
111: 111 0002F0E5 4d efffffff51 clrl _force_loop
112: 112 0002F0EB # index = 0;
113: 113 0002F0EB 4d efffffff4b clrl _index
114: 114 0002F0F1 # do
115: 115 0002F0F1 L237:
116: 116 0002F0F1 # {
117: 117 0002F0F1 # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */
118: 118 0002F0F1 5c 18 efffffff44 50 mull3 $24,_index,r0
119: 119 0002F0F9 0d e000000000 efffffff38 movl _divd_1_data(r0),_sgl_value_1
120: 120 0002F104 # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */
121: 121 0002F104 5c 18 efffffff31 50 mull3 $24,_index,r0
122: 122 0002F10C 0d e000000004 efffffff25 movl _divd_1_data+4(r0),_sgl_value_2
123: 123 0002F117 # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */
124: 124 0002F117 5c 18 efffffff1e 50 mull3 $24,_index,r0
125: 125 0002F11F 0d e000000008 efffffff12 movl _divd_1_data+8(r0),_sgl_value_3
126: 126 0002F12A # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */
127: 127 0002F12A 5c 18 efffffff0b 50 mull3 $24,_index,r0
128: 128 0002F132 0d e00000000c effffffeff movl _divd_1_data+12(r0),_sgl_value_4
129: 129 0002F13D # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */
130: 130 0002F13D 0d 8f40800000 effffffef4 movl $1082130432,_sgl_value_7
131: 131 0002F148 # sgl_value_8 = 0;
132: 132 0002F148 4d effffffeee clrl _sgl_value_8
133: 133 0002F14E # dbl_expected = divd_1_data[index].exp; /* get expected results */
134: 134 0002F14E 5c 18 effffffee7 50 mull3 $24,_index,r0
135: 135 0002F156 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
136: 136 0002F15D 0d a004 effffffedb movl 4(r0),_dbl_expected+4
137: 137 0002F165 0d 60 effffffed0 movl (r0),_dbl_expected
138: 138 0002F16C # /*
139: 139 0002F16C # * If LOOP ON ERROR is set, this is the loop for this subtest.
140: 140 0002F16C # * The force loop flag is set after the first error.
141: 141 0002F16C # */
142: 142 0002F16C # asm("_pipe14_1_lp1:");
143: 143 0002F16C _pipe14_1_lp1:
144: 144 0002F16C # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */
145: 145 0002F16C 0d effffffeca 50 movl _sgl_value_1,r0
146: 146 0002F173 # asm("movl _sgl_value_2,r1");
147: 147 0002F173 0d effffffec3 51 movl _sgl_value_2,r1
148: 148 0002F17A # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */
149: 149 0002F17A 0d effffffebc 52 movl _sgl_value_3,r2
150: 150 0002F181 # asm("movl _sgl_value_4,r3");
151: 151 0002F181 0d effffffeb5 53 movl _sgl_value_4,r3
152: 152 0002F188 # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */
153: 153 0002F188 0d effffffeae 54 movl _sgl_value_7,r4
154: 154 0002F18F # asm("movl _sgl_value_8,r5");
155: 155 0002F18F 0d effffffea7 55 movl _sgl_value_8,r5
156: 156 0002F196 # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */
157: 157 0002F196 0d effffffea0 58 movl _sgl_value_8,r8
158: 158 0002F19D # asm("movl _sgl_value_8,r9");
159: 159 0002F19D 0d effffffe99 59 movl _sgl_value_8,r9
160: 160 0002F1A4 # asm("ldd r8"); /* load a '0.0' ( 0 ) */
161: 161 0002F1A4 07 58 ldd r8
162: 162 0002F1A6 # asm("addd r0"); /* add operand 1 ( op1 ) */
163: 163 0002F1A6 c7 50 addd r0
164: 164 0002F1A8 # asm("divd r2"); /* div by operand 2 ( exp ) */
165: 165 0002F1A8 f7 52 divd r2
166: 166 0002F1AA # asm("muld r4"); /* multiply by 1.0 ( exp ) */
167: 167 0002F1AA e7 54 muld r4
168: 168 0002F1AC # asm("std r6"); /* store the result ( exp ) */
169: 169 0002F1AC 27 56 std r6
170: 170 0002F1AE # if( force_loop )
171: 171 0002F1AE 5d effffffe88 tstl _force_loop
172: 172 0002F1B4 31 02 jeql L238
173: 173 0002F1B6 # asm("brb _pipe14_1_lp1");; /* run the loop again */
174: 174 0002F1B6 11 b4 brb _pipe14_1_lp1
175: 175 0002F1B8 L238:
176: 176 0002F1B8 # /*
177: 177 0002F1B8 # * verify the results
178: 178 0002F1B8 # */
179: 179 0002F1B8 # asm("movl r6,_sgl_value_5"); /* get the result */
180: 180 0002F1B8 0d 56 effffffe7d movl r6,_sgl_value_5
181: 181 0002F1BF # asm("movl r7,_sgl_value_6");
182: 182 0002F1BF 0d 57 effffffe76 movl r7,_sgl_value_6
183: 183 0002F1C6 # dbl_st_acc.m = sgl_value_5;
184: 184 0002F1C6 0d effffffe70 effffffe6b movl _sgl_value_5,_dbl_st_acc
185: 185 0002F1D1 # dbl_st_acc.l = sgl_value_6;
186: 186 0002F1D1 0d effffffe65 effffffe64 movl _sgl_value_6,_dbl_st_acc+4
187: 187 0002F1DC # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
188: 188 0002F1DC # (dbl_st_acc.l != dbl_expected.l) )
189: 189 0002F1DC 1d effffffe5a effffffe55 cmpl _dbl_st_acc,_dbl_expected
190: 190 0002F1E7 21 0d jneq L9999
191: 191 0002F1E9 1d effffffe51 effffffe4c cmpl _dbl_st_acc+4,_dbl_expected+4
192: 192 0002F1F4 31 42 jeql L239
193: 193 0002F1F6 L9999:
194: 194 0002F1F6 # {
195: 195 0002F1F6 # errcnt++; /* bump the error count */
196: 196 0002F1F6 6d effffffe40 incl _errcnt
197: 197 0002F1FC # if ( prt_error )
198: 198 0002F1FC 5d effffffe3a tstl _prt_error
199: 199 0002F202 31 0d jeql L240
200: 200 0002F204 # print_pipe14_er("Reg. Data, no NOPs");
201: 201 0002F204 .data 1
202: 202 00000fed * L242:
203: 203 00000fed * 5265672E20446174612C206E6 .ascii "Reg. Data, no NOPs\0"
204: F204E4F507300
205: 204 00001000 * .text
206: 205 0002F204 dd 8f00000fed pushl $L242
207: 206 0002F20A fe 08 ef00000bef callf $8,_print_pipe14_er
208: 207 0002F211 # if ( halt_flg ) /* halt on error? */
209: 208 0002F211 L240:
210: 209 0002F211 5d effffffe25 tstl _halt_flg
211: 210 0002F217 31 0d jeql L243
212: 211 0002F219 # pipe14_er_hlt( subtest );
213: 212 0002F219 dd effffffe1d pushl _subtest
214: 213 0002F21F fe 08 ef00000d58 callf $8,_pipe14_er_hlt
215: 214 0002F226 # if ( loop_on_err ) {
216: 215 0002F226 L243:
217: 216 0002F226 5d effffffe10 tstl _loop_on_err
218: 217 0002F22C 31 0a jeql L245
219: 218 0002F22E # force_loop = TRUE; /* set the force loop flag */
220: 219 0002F22E 0d 01 effffffe07 movl $1,_force_loop
221: 220 0002F235 # asm("brw _pipe14_1_lp1"); /* and loop */
222: 221 0002F235 13 ff34 brw _pipe14_1_lp1
223: 222 0002F238 # }
224: 223 0002F238 # } /* end of compare error */
225: 224 0002F238 L245:
226: 225 0002F238 # } while( index++ < max_divd_1_index );
227: 226 0002F238 L239:
228: 227 0002F238 L236:
229: 228 0002F238 0d effffffdfe 50 movl _index,r0
230: 229 0002F23F 6d effffffdf7 incl _index
231: 230 0002F245 1d 50 effffffdf0 cmpl r0,_max_divd_1_index
232: 231 0002F24C 81 03 13 fea0 jlss L237
233: 232 0002F251 L235:
234: 233 0002F251 # } /* end of subtest 1 */
235: 234 0002F251 40 ret#2
236: 235 0002F252 .set L231,0x0
237: 236 0002F252 L233:
238: 237 0002F252 13 fe90 jbr L234
239: 238 0002F255 .data
240: 239 00000fe4 * .text
241: 240 0002F255 00 .align 1
242: 241 0002F256 .globl _pipe14_2
243: 242 0002F256 _pipe14_2:
244: 243 0002F256 0000 .word L246
245: 244 0002F258 #
246: 245 0002F258 #
247: 246 0002F258 #
248: 247 0002F258 #
249: 248 0002F258 #
250: 249 0002F258 #
251: 250 0002F258 #
252: 251 0002F258 #
253: 252 0002F258 #
254: 253 0002F258 # /************************************************************************
255: 254 0002F258 # *
256: 255 0002F258 # * SUBTEST 2
257: 256 0002F258 # * data in registers, no NO-OPs
258: 257 0002F258 # *
259: 258 0002F258 # ************************************************************************/
260: 259 0002F258 # pipe14_2()
261: 260 0002F258 # {
262: 261 0002F258 13 0171 jbr L248
263: 262 0002F25B L249:
264: 263 0002F25B # force_loop = FALSE; /* clear the force_loop flg */
265: 264 0002F25B 4d effffffddb clrl _force_loop
266: 265 0002F261 # index = 0;
267: 266 0002F261 4d effffffdd5 clrl _index
268: 267 0002F267 # do
269: 268 0002F267 L252:
270: 269 0002F267 # {
271: 270 0002F267 # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */
272: 271 0002F267 5c 18 effffffdce 50 mull3 $24,_index,r0
273: 272 0002F26F 0d e000000000 effffffdc2 movl _divd_1_data(r0),_sgl_value_1
274: 273 0002F27A # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */
275: 274 0002F27A 5c 18 effffffdbb 50 mull3 $24,_index,r0
276: 275 0002F282 0d e000000004 effffffdaf movl _divd_1_data+4(r0),_sgl_value_2
277: 276 0002F28D # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */
278: 277 0002F28D 5c 18 effffffda8 50 mull3 $24,_index,r0
279: 278 0002F295 0d e000000008 effffffd9c movl _divd_1_data+8(r0),_sgl_value_3
280: 279 0002F2A0 # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */
281: 280 0002F2A0 5c 18 effffffd95 50 mull3 $24,_index,r0
282: 281 0002F2A8 0d e00000000c effffffd89 movl _divd_1_data+12(r0),_sgl_value_4
283: 282 0002F2B3 # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */
284: 283 0002F2B3 0d 8f40800000 effffffd7e movl $1082130432,_sgl_value_7
285: 284 0002F2BE # sgl_value_8 = 0;
286: 285 0002F2BE 4d effffffd78 clrl _sgl_value_8
287: 286 0002F2C4 # dbl_expected = divd_1_data[index].exp; /* get expected results */
288: 287 0002F2C4 5c 18 effffffd71 50 mull3 $24,_index,r0
289: 288 0002F2CC 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
290: 289 0002F2D3 0d a004 effffffd65 movl 4(r0),_dbl_expected+4
291: 290 0002F2DB 0d 60 effffffd5a movl (r0),_dbl_expected
292: 291 0002F2E2 # /*
293: 292 0002F2E2 # * If LOOP ON ERROR is set, this is the loop for this subtest.
294: 293 0002F2E2 # * The force loop flag is set after the first error.
295: 294 0002F2E2 # */
296: 295 0002F2E2 # asm("_pipe14_2_lp1:");
297: 296 0002F2E2 _pipe14_2_lp1:
298: 297 0002F2E2 # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */
299: 298 0002F2E2 0d effffffd54 50 movl _sgl_value_1,r0
300: 299 0002F2E9 # asm("movl _sgl_value_2,r1");
301: 300 0002F2E9 0d effffffd4d 51 movl _sgl_value_2,r1
302: 301 0002F2F0 # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */
303: 302 0002F2F0 0d effffffd46 52 movl _sgl_value_3,r2
304: 303 0002F2F7 # asm("movl _sgl_value_4,r3");
305: 304 0002F2F7 0d effffffd3f 53 movl _sgl_value_4,r3
306: 305 0002F2FE # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */
307: 306 0002F2FE 0d effffffd38 54 movl _sgl_value_7,r4
308: 307 0002F305 # asm("movl _sgl_value_8,r5");
309: 308 0002F305 0d effffffd31 55 movl _sgl_value_8,r5
310: 309 0002F30C # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */
311: 310 0002F30C 0d effffffd2a 58 movl _sgl_value_8,r8
312: 311 0002F313 # asm("movl _sgl_value_8,r9");
313: 312 0002F313 0d effffffd23 59 movl _sgl_value_8,r9
314: 313 0002F31A # asm("ldd r8"); /* load a '0.0' ( 0 ) */
315: 314 0002F31A 07 58 ldd r8
316: 315 0002F31C # asm("nop");
317: 316 0002F31C 10 nop
318: 317 0002F31D # asm("addd r0"); /* add operand 1 ( op1 ) */
319: 318 0002F31D c7 50 addd r0
320: 319 0002F31F # asm("nop");
321: 320 0002F31F 10 nop
322: 321 0002F320 # asm("divd r2"); /* div by operand 2 ( exp ) */
323: 322 0002F320 f7 52 divd r2
324: 323 0002F322 # asm("nop");
325: 324 0002F322 10 nop
326: 325 0002F323 # asm("muld r4"); /* multiply by 1.0 ( exp ) */
327: 326 0002F323 e7 54 muld r4
328: 327 0002F325 # asm("nop");
329: 328 0002F325 10 nop
330: 329 0002F326 # asm("std r6"); /* store the result ( exp ) */
331: 330 0002F326 27 56 std r6
332: 331 0002F328 # if( force_loop )
333: 332 0002F328 5d effffffd0e tstl _force_loop
334: 333 0002F32E 31 02 jeql L253
335: 334 0002F330 # asm("brb _pipe14_2_lp1");; /* run the loop again */
336: 335 0002F330 11 b0 brb _pipe14_2_lp1
337: 336 0002F332 L253:
338: 337 0002F332 # /*
339: 338 0002F332 # * verify the results
340: 339 0002F332 # */
341: 340 0002F332 # asm("movl r6,_sgl_value_5"); /* get the result */
342: 341 0002F332 0d 56 effffffd03 movl r6,_sgl_value_5
343: 342 0002F339 # asm("movl r7,_sgl_value_6");
344: 343 0002F339 0d 57 effffffcfc movl r7,_sgl_value_6
345: 344 0002F340 # dbl_st_acc.m = sgl_value_5;
346: 345 0002F340 0d effffffcf6 effffffcf1 movl _sgl_value_5,_dbl_st_acc
347: 346 0002F34B # dbl_st_acc.l = sgl_value_6;
348: 347 0002F34B 0d effffffceb effffffcea movl _sgl_value_6,_dbl_st_acc+4
349: 348 0002F356 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
350: 349 0002F356 # (dbl_st_acc.l != dbl_expected.l) )
351: 350 0002F356 1d effffffce0 effffffcdb cmpl _dbl_st_acc,_dbl_expected
352: 351 0002F361 21 0d jneq L9998
353: 352 0002F363 1d effffffcd7 effffffcd2 cmpl _dbl_st_acc+4,_dbl_expected+4
354: 353 0002F36E 31 42 jeql L254
355: 354 0002F370 L9998:
356: 355 0002F370 # {
357: 356 0002F370 # errcnt++; /* bump the error count */
358: 357 0002F370 6d effffffcc6 incl _errcnt
359: 358 0002F376 # if ( prt_error )
360: 359 0002F376 5d effffffcc0 tstl _prt_error
361: 360 0002F37C 31 0d jeql L255
362: 361 0002F37E # print_pipe14_er("Reg. Data, 1 NOP");
363: 362 0002F37E .data 1
364: 363 00001000 * L256:
365: 364 00001000 * 5265672E20446174612C20312 .ascii "Reg. Data, 1 NOP\0"
366: 04E4F5000
367: 365 00001011 * .text
368: 366 0002F37E dd 8f00001000 pushl $L256
369: 367 0002F384 fe 08 ef00000a75 callf $8,_print_pipe14_er
370: 368 0002F38B # if ( halt_flg ) /* halt on error? */
371: 369 0002F38B L255:
372: 370 0002F38B 5d effffffcab tstl _halt_flg
373: 371 0002F391 31 0d jeql L257
374: 372 0002F393 # pipe14_er_hlt( subtest );
375: 373 0002F393 dd effffffca3 pushl _subtest
376: 374 0002F399 fe 08 ef00000bde callf $8,_pipe14_er_hlt
377: 375 0002F3A0 # if ( loop_on_err ) {
378: 376 0002F3A0 L257:
379: 377 0002F3A0 5d effffffc96 tstl _loop_on_err
380: 378 0002F3A6 31 0a jeql L258
381: 379 0002F3A8 # force_loop = TRUE; /* set the force loop flag */
382: 380 0002F3A8 0d 01 effffffc8d movl $1,_force_loop
383: 381 0002F3AF # asm("brw _pipe14_2_lp1"); /* and loop */
384: 382 0002F3AF 13 ff30 brw _pipe14_2_lp1
385: 383 0002F3B2 # }
386: 384 0002F3B2 # } /* end of compare error */
387: 385 0002F3B2 L258:
388: 386 0002F3B2 # } while( index++ < max_divd_1_index );
389: 387 0002F3B2 L254:
390: 388 0002F3B2 L251:
391: 389 0002F3B2 0d effffffc84 50 movl _index,r0
392: 390 0002F3B9 6d effffffc7d incl _index
393: 391 0002F3BF 1d 50 effffffc76 cmpl r0,_max_divd_1_index
394: 392 0002F3C6 81 03 13 fe9c jlss L252
395: 393 0002F3CB L250:
396: 394 0002F3CB # } /* end of subtest 2 */
397: 395 0002F3CB 40 ret#2
398: 396 0002F3CC .set L246,0x0
399: 397 0002F3CC L248:
400: 398 0002F3CC 13 fe8c jbr L249
401: 399 0002F3CF .data
402: 400 00000fe4 * .text
403: 401 0002F3CF 00 .align 1
404: 402 0002F3D0 .globl _pipe14_3
405: 403 0002F3D0 _pipe14_3:
406: 404 0002F3D0 0000 .word L259
407: 405 0002F3D2 #
408: 406 0002F3D2 #
409: 407 0002F3D2 #
410: 408 0002F3D2 #
411: 409 0002F3D2 #
412: 410 0002F3D2 #
413: 411 0002F3D2 #
414: 412 0002F3D2 # /************************************************************************
415: 413 0002F3D2 # *
416: 414 0002F3D2 # * SUBTEST 3
417: 415 0002F3D2 # * data in registers, 2 NO-OPs
418: 416 0002F3D2 # *
419: 417 0002F3D2 # ************************************************************************/
420: 418 0002F3D2 # pipe14_3()
421: 419 0002F3D2 # {
422: 420 0002F3D2 13 0175 jbr L261
423: 421 0002F3D5 L262:
424: 422 0002F3D5 # force_loop = FALSE; /* clear the force_loop flg */
425: 423 0002F3D5 4d effffffc61 clrl _force_loop
426: 424 0002F3DB # index = 0;
427: 425 0002F3DB 4d effffffc5b clrl _index
428: 426 0002F3E1 # do
429: 427 0002F3E1 L265:
430: 428 0002F3E1 # {
431: 429 0002F3E1 # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */
432: 430 0002F3E1 5c 18 effffffc54 50 mull3 $24,_index,r0
433: 431 0002F3E9 0d e000000000 effffffc48 movl _divd_1_data(r0),_sgl_value_1
434: 432 0002F3F4 # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */
435: 433 0002F3F4 5c 18 effffffc41 50 mull3 $24,_index,r0
436: 434 0002F3FC 0d e000000004 effffffc35 movl _divd_1_data+4(r0),_sgl_value_2
437: 435 0002F407 # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */
438: 436 0002F407 5c 18 effffffc2e 50 mull3 $24,_index,r0
439: 437 0002F40F 0d e000000008 effffffc22 movl _divd_1_data+8(r0),_sgl_value_3
440: 438 0002F41A # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */
441: 439 0002F41A 5c 18 effffffc1b 50 mull3 $24,_index,r0
442: 440 0002F422 0d e00000000c effffffc0f movl _divd_1_data+12(r0),_sgl_value_4
443: 441 0002F42D # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */
444: 442 0002F42D 0d 8f40800000 effffffc04 movl $1082130432,_sgl_value_7
445: 443 0002F438 # sgl_value_8 = 0;
446: 444 0002F438 4d effffffbfe clrl _sgl_value_8
447: 445 0002F43E # dbl_expected = divd_1_data[index].exp; /* get expected results */
448: 446 0002F43E 5c 18 effffffbf7 50 mull3 $24,_index,r0
449: 447 0002F446 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
450: 448 0002F44D 0d a004 effffffbeb movl 4(r0),_dbl_expected+4
451: 449 0002F455 0d 60 effffffbe0 movl (r0),_dbl_expected
452: 450 0002F45C # /*
453: 451 0002F45C # * If LOOP ON ERROR is set, this is the loop for this subtest.
454: 452 0002F45C # * The force loop flag is set after the first error.
455: 453 0002F45C # */
456: 454 0002F45C # asm("_pipe14_3_lp1:");
457: 455 0002F45C _pipe14_3_lp1:
458: 456 0002F45C # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */
459: 457 0002F45C 0d effffffbda 50 movl _sgl_value_1,r0
460: 458 0002F463 # asm("movl _sgl_value_2,r1");
461: 459 0002F463 0d effffffbd3 51 movl _sgl_value_2,r1
462: 460 0002F46A # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */
463: 461 0002F46A 0d effffffbcc 52 movl _sgl_value_3,r2
464: 462 0002F471 # asm("movl _sgl_value_4,r3");
465: 463 0002F471 0d effffffbc5 53 movl _sgl_value_4,r3
466: 464 0002F478 # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */
467: 465 0002F478 0d effffffbbe 54 movl _sgl_value_7,r4
468: 466 0002F47F # asm("movl _sgl_value_8,r5");
469: 467 0002F47F 0d effffffbb7 55 movl _sgl_value_8,r5
470: 468 0002F486 # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */
471: 469 0002F486 0d effffffbb0 58 movl _sgl_value_8,r8
472: 470 0002F48D # asm("movl _sgl_value_8,r9");
473: 471 0002F48D 0d effffffba9 59 movl _sgl_value_8,r9
474: 472 0002F494 # asm("ldd r8"); /* load a '0.0' ( 0 ) */
475: 473 0002F494 07 58 ldd r8
476: 474 0002F496 # asm("nop");
477: 475 0002F496 10 nop
478: 476 0002F497 # asm("nop");
479: 477 0002F497 10 nop
480: 478 0002F498 # asm("addd r0"); /* add operand 1 ( op1 ) */
481: 479 0002F498 c7 50 addd r0
482: 480 0002F49A # asm("nop");
483: 481 0002F49A 10 nop
484: 482 0002F49B # asm("nop");
485: 483 0002F49B 10 nop
486: 484 0002F49C # asm("divd r2"); /* div by operand 2 ( exp ) */
487: 485 0002F49C f7 52 divd r2
488: 486 0002F49E # asm("nop");
489: 487 0002F49E 10 nop
490: 488 0002F49F # asm("nop");
491: 489 0002F49F 10 nop
492: 490 0002F4A0 # asm("muld r4"); /* multiply by 1.0 ( exp ) */
493: 491 0002F4A0 e7 54 muld r4
494: 492 0002F4A2 # asm("nop");
495: 493 0002F4A2 10 nop
496: 494 0002F4A3 # asm("nop");
497: 495 0002F4A3 10 nop
498: 496 0002F4A4 # asm("std r6"); /* store the result ( exp ) */
499: 497 0002F4A4 27 56 std r6
500: 498 0002F4A6 # if( force_loop )
501: 499 0002F4A6 5d effffffb90 tstl _force_loop
502: 500 0002F4AC 31 02 jeql L266
503: 501 0002F4AE # asm("brb _pipe14_3_lp1");; /* run the loop again */
504: 502 0002F4AE 11 ac brb _pipe14_3_lp1
505: 503 0002F4B0 L266:
506: 504 0002F4B0 # /*
507: 505 0002F4B0 # * verify the results
508: 506 0002F4B0 # */
509: 507 0002F4B0 # asm("movl r6,_sgl_value_5"); /* get the result */
510: 508 0002F4B0 0d 56 effffffb85 movl r6,_sgl_value_5
511: 509 0002F4B7 # asm("movl r7,_sgl_value_6");
512: 510 0002F4B7 0d 57 effffffb7e movl r7,_sgl_value_6
513: 511 0002F4BE # dbl_st_acc.m = sgl_value_5;
514: 512 0002F4BE 0d effffffb78 effffffb73 movl _sgl_value_5,_dbl_st_acc
515: 513 0002F4C9 # dbl_st_acc.l = sgl_value_6;
516: 514 0002F4C9 0d effffffb6d effffffb6c movl _sgl_value_6,_dbl_st_acc+4
517: 515 0002F4D4 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
518: 516 0002F4D4 # (dbl_st_acc.l != dbl_expected.l) )
519: 517 0002F4D4 1d effffffb62 effffffb5d cmpl _dbl_st_acc,_dbl_expected
520: 518 0002F4DF 21 0d jneq L9997
521: 519 0002F4E1 1d effffffb59 effffffb54 cmpl _dbl_st_acc+4,_dbl_expected+4
522: 520 0002F4EC 31 42 jeql L267
523: 521 0002F4EE L9997:
524: 522 0002F4EE # {
525: 523 0002F4EE # errcnt++; /* bump the error count */
526: 524 0002F4EE 6d effffffb48 incl _errcnt
527: 525 0002F4F4 # if ( prt_error )
528: 526 0002F4F4 5d effffffb42 tstl _prt_error
529: 527 0002F4FA 31 0d jeql L268
530: 528 0002F4FC # print_pipe14_er("Reg. Data, 2 NOPs");
531: 529 0002F4FC .data 1
532: 530 00001011 * L269:
533: 531 00001011 * 5265672E20446174612C20322 .ascii "Reg. Data, 2 NOPs\0"
534: 04E4F507300
535: 532 00001023 * .text
536: 533 0002F4FC dd 8f00001011 pushl $L269
537: 534 0002F502 fe 08 ef000008f7 callf $8,_print_pipe14_er
538: 535 0002F509 # if ( halt_flg ) /* halt on error? */
539: 536 0002F509 L268:
540: 537 0002F509 5d effffffb2d tstl _halt_flg
541: 538 0002F50F 31 0d jeql L270
542: 539 0002F511 # pipe14_er_hlt( subtest );
543: 540 0002F511 dd effffffb25 pushl _subtest
544: 541 0002F517 fe 08 ef00000a60 callf $8,_pipe14_er_hlt
545: 542 0002F51E # if ( loop_on_err ) {
546: 543 0002F51E L270:
547: 544 0002F51E 5d effffffb18 tstl _loop_on_err
548: 545 0002F524 31 0a jeql L271
549: 546 0002F526 # force_loop = TRUE; /* set the force loop flag */
550: 547 0002F526 0d 01 effffffb0f movl $1,_force_loop
551: 548 0002F52D # asm("brw _pipe14_3_lp1"); /* and loop */
552: 549 0002F52D 13 ff2c brw _pipe14_3_lp1
553: 550 0002F530 # }
554: 551 0002F530 # } /* end of compare error */
555: 552 0002F530 L271:
556: 553 0002F530 # } while( index++ < max_divd_1_index );
557: 554 0002F530 L267:
558: 555 0002F530 L264:
559: 556 0002F530 0d effffffb06 50 movl _index,r0
560: 557 0002F537 6d effffffaff incl _index
561: 558 0002F53D 1d 50 effffffaf8 cmpl r0,_max_divd_1_index
562: 559 0002F544 81 03 13 fe98 jlss L265
563: 560 0002F549 L263:
564: 561 0002F549 # } /* end of subtest 3 */
565: 562 0002F549 40 ret#2
566: 563 0002F54A .set L259,0x0
567: 564 0002F54A L261:
568: 565 0002F54A 13 fe88 jbr L262
569: 566 0002F54D .data
570: 567 00000fe4 * .text
571: 568 0002F54D 00 .align 1
572: 569 0002F54E .globl _pipe14_4
573: 570 0002F54E _pipe14_4:
574: 571 0002F54E 0000 .word L272
575: 572 0002F550 #
576: 573 0002F550 #
577: 574 0002F550 #
578: 575 0002F550 #
579: 576 0002F550 #
580: 577 0002F550 #
581: 578 0002F550 #
582: 579 0002F550 # /************************************************************************
583: 580 0002F550 # *
584: 581 0002F550 # * SUBTEST 4
585: 582 0002F550 # * data in registers, 3 NO-OPs
586: 583 0002F550 # *
587: 584 0002F550 # ************************************************************************/
588: 585 0002F550 # pipe14_4()
589: 586 0002F550 # {
590: 587 0002F550 13 0179 jbr L274
591: 588 0002F553 L275:
592: 589 0002F553 # force_loop = FALSE; /* clear the force_loop flg */
593: 590 0002F553 4d effffffae3 clrl _force_loop
594: 591 0002F559 # index = 0;
595: 592 0002F559 4d effffffadd clrl _index
596: 593 0002F55F # do
597: 594 0002F55F L278:
598: 595 0002F55F # {
599: 596 0002F55F # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */
600: 597 0002F55F 5c 18 effffffad6 50 mull3 $24,_index,r0
601: 598 0002F567 0d e000000000 effffffaca movl _divd_1_data(r0),_sgl_value_1
602: 599 0002F572 # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */
603: 600 0002F572 5c 18 effffffac3 50 mull3 $24,_index,r0
604: 601 0002F57A 0d e000000004 effffffab7 movl _divd_1_data+4(r0),_sgl_value_2
605: 602 0002F585 # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */
606: 603 0002F585 5c 18 effffffab0 50 mull3 $24,_index,r0
607: 604 0002F58D 0d e000000008 effffffaa4 movl _divd_1_data+8(r0),_sgl_value_3
608: 605 0002F598 # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */
609: 606 0002F598 5c 18 effffffa9d 50 mull3 $24,_index,r0
610: 607 0002F5A0 0d e00000000c effffffa91 movl _divd_1_data+12(r0),_sgl_value_4
611: 608 0002F5AB # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */
612: 609 0002F5AB 0d 8f40800000 effffffa86 movl $1082130432,_sgl_value_7
613: 610 0002F5B6 # sgl_value_8 = 0;
614: 611 0002F5B6 4d effffffa80 clrl _sgl_value_8
615: 612 0002F5BC # dbl_expected = divd_1_data[index].exp; /* get expected results */
616: 613 0002F5BC 5c 18 effffffa79 50 mull3 $24,_index,r0
617: 614 0002F5C4 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
618: 615 0002F5CB 0d a004 effffffa6d movl 4(r0),_dbl_expected+4
619: 616 0002F5D3 0d 60 effffffa62 movl (r0),_dbl_expected
620: 617 0002F5DA # /*
621: 618 0002F5DA # * If LOOP ON ERROR is set, this is the loop for this subtest.
622: 619 0002F5DA # * The force loop flag is set after the first error.
623: 620 0002F5DA # */
624: 621 0002F5DA # asm("_pipe14_4_lp1:");
625: 622 0002F5DA _pipe14_4_lp1:
626: 623 0002F5DA # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */
627: 624 0002F5DA 0d effffffa5c 50 movl _sgl_value_1,r0
628: 625 0002F5E1 # asm("movl _sgl_value_2,r1");
629: 626 0002F5E1 0d effffffa55 51 movl _sgl_value_2,r1
630: 627 0002F5E8 # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */
631: 628 0002F5E8 0d effffffa4e 52 movl _sgl_value_3,r2
632: 629 0002F5EF # asm("movl _sgl_value_4,r3");
633: 630 0002F5EF 0d effffffa47 53 movl _sgl_value_4,r3
634: 631 0002F5F6 # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */
635: 632 0002F5F6 0d effffffa40 54 movl _sgl_value_7,r4
636: 633 0002F5FD # asm("movl _sgl_value_8,r5");
637: 634 0002F5FD 0d effffffa39 55 movl _sgl_value_8,r5
638: 635 0002F604 # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */
639: 636 0002F604 0d effffffa32 58 movl _sgl_value_8,r8
640: 637 0002F60B # asm("movl _sgl_value_8,r9");
641: 638 0002F60B 0d effffffa2b 59 movl _sgl_value_8,r9
642: 639 0002F612 # asm("ldd r8"); /* load a '0.0' ( 0 ) */
643: 640 0002F612 07 58 ldd r8
644: 641 0002F614 # asm("nop");
645: 642 0002F614 10 nop
646: 643 0002F615 # asm("nop");
647: 644 0002F615 10 nop
648: 645 0002F616 # asm("nop");
649: 646 0002F616 10 nop
650: 647 0002F617 # asm("addd r0"); /* add operand 1 ( op1 ) */
651: 648 0002F617 c7 50 addd r0
652: 649 0002F619 # asm("nop");
653: 650 0002F619 10 nop
654: 651 0002F61A # asm("nop");
655: 652 0002F61A 10 nop
656: 653 0002F61B # asm("nop");
657: 654 0002F61B 10 nop
658: 655 0002F61C # asm("divd r2"); /* div by operand 2 ( exp ) */
659: 656 0002F61C f7 52 divd r2
660: 657 0002F61E # asm("nop");
661: 658 0002F61E 10 nop
662: 659 0002F61F # asm("nop");
663: 660 0002F61F 10 nop
664: 661 0002F620 # asm("nop");
665: 662 0002F620 10 nop
666: 663 0002F621 # asm("muld r4"); /* multiply by 1.0 ( exp ) */
667: 664 0002F621 e7 54 muld r4
668: 665 0002F623 # asm("nop");
669: 666 0002F623 10 nop
670: 667 0002F624 # asm("nop");
671: 668 0002F624 10 nop
672: 669 0002F625 # asm("nop");
673: 670 0002F625 10 nop
674: 671 0002F626 # asm("std r6"); /* store the result ( exp ) */
675: 672 0002F626 27 56 std r6
676: 673 0002F628 # if( force_loop )
677: 674 0002F628 5d effffffa0e tstl _force_loop
678: 675 0002F62E 31 02 jeql L279
679: 676 0002F630 # asm("brb _pipe14_4_lp1");; /* run the loop again */
680: 677 0002F630 11 a8 brb _pipe14_4_lp1
681: 678 0002F632 L279:
682: 679 0002F632 # /*
683: 680 0002F632 # * verify the results
684: 681 0002F632 # */
685: 682 0002F632 # asm("movl r6,_sgl_value_5"); /* get the result */
686: 683 0002F632 0d 56 effffffa03 movl r6,_sgl_value_5
687: 684 0002F639 # asm("movl r7,_sgl_value_6");
688: 685 0002F639 0d 57 effffff9fc movl r7,_sgl_value_6
689: 686 0002F640 # dbl_st_acc.m = sgl_value_5;
690: 687 0002F640 0d effffff9f6 effffff9f1 movl _sgl_value_5,_dbl_st_acc
691: 688 0002F64B # dbl_st_acc.l = sgl_value_6;
692: 689 0002F64B 0d effffff9eb effffff9ea movl _sgl_value_6,_dbl_st_acc+4
693: 690 0002F656 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
694: 691 0002F656 # (dbl_st_acc.l != dbl_expected.l) )
695: 692 0002F656 1d effffff9e0 effffff9db cmpl _dbl_st_acc,_dbl_expected
696: 693 0002F661 21 0d jneq L9996
697: 694 0002F663 1d effffff9d7 effffff9d2 cmpl _dbl_st_acc+4,_dbl_expected+4
698: 695 0002F66E 31 42 jeql L280
699: 696 0002F670 L9996:
700: 697 0002F670 # {
701: 698 0002F670 # errcnt++; /* bump the error count */
702: 699 0002F670 6d effffff9c6 incl _errcnt
703: 700 0002F676 # if ( prt_error )
704: 701 0002F676 5d effffff9c0 tstl _prt_error
705: 702 0002F67C 31 0d jeql L281
706: 703 0002F67E # print_pipe14_er("Reg. Data, 3 NOPs");
707: 704 0002F67E .data 1
708: 705 00001023 * L282:
709: 706 00001023 * 5265672E20446174612C20332 .ascii "Reg. Data, 3 NOPs\0"
710: 04E4F507300
711: 707 00001035 * .text
712: 708 0002F67E dd 8f00001023 pushl $L282
713: 709 0002F684 fe 08 ef00000775 callf $8,_print_pipe14_er
714: 710 0002F68B # if ( halt_flg ) /* halt on error? */
715: 711 0002F68B L281:
716: 712 0002F68B 5d effffff9ab tstl _halt_flg
717: 713 0002F691 31 0d jeql L283
718: 714 0002F693 # pipe14_er_hlt( subtest );
719: 715 0002F693 dd effffff9a3 pushl _subtest
720: 716 0002F699 fe 08 ef000008de callf $8,_pipe14_er_hlt
721: 717 0002F6A0 # if ( loop_on_err ) {
722: 718 0002F6A0 L283:
723: 719 0002F6A0 5d effffff996 tstl _loop_on_err
724: 720 0002F6A6 31 0a jeql L284
725: 721 0002F6A8 # force_loop = TRUE; /* set the force loop flag */
726: 722 0002F6A8 0d 01 effffff98d movl $1,_force_loop
727: 723 0002F6AF # asm("brw _pipe14_4_lp1"); /* and loop */
728: 724 0002F6AF 13 ff28 brw _pipe14_4_lp1
729: 725 0002F6B2 # }
730: 726 0002F6B2 # } /* end of compare error */
731: 727 0002F6B2 L284:
732: 728 0002F6B2 # } while( index++ < max_divd_1_index );
733: 729 0002F6B2 L280:
734: 730 0002F6B2 L277:
735: 731 0002F6B2 0d effffff984 50 movl _index,r0
736: 732 0002F6B9 6d effffff97d incl _index
737: 733 0002F6BF 1d 50 effffff976 cmpl r0,_max_divd_1_index
738: 734 0002F6C6 81 03 13 fe94 jlss L278
739: 735 0002F6CB L276:
740: 736 0002F6CB # } /* end of subtest 4 */
741: 737 0002F6CB 40 ret#2
742: 738 0002F6CC .set L272,0x0
743: 739 0002F6CC L274:
744: 740 0002F6CC 13 fe84 jbr L275
745: 741 0002F6CF .data
746: 742 00000fe4 * .text
747: 743 0002F6CF 00 .align 1
748: 744 0002F6D0 .globl _pipe14_5
749: 745 0002F6D0 _pipe14_5:
750: 746 0002F6D0 0000 .word L285
751: 747 0002F6D2 #
752: 748 0002F6D2 #
753: 749 0002F6D2 #
754: 750 0002F6D2 #
755: 751 0002F6D2 #
756: 752 0002F6D2 #
757: 753 0002F6D2 #
758: 754 0002F6D2 # /************************************************************************
759: 755 0002F6D2 # *
760: 756 0002F6D2 # * SUBTEST 5
761: 757 0002F6D2 # * data in cache, no NO-OPs
762: 758 0002F6D2 # *
763: 759 0002F6D2 # ************************************************************************/
764: 760 0002F6D2 # pipe14_5()
765: 761 0002F6D2 # {
766: 762 0002F6D2 13 0121 jbr L287
767: 763 0002F6D5 L288:
768: 764 0002F6D5 # force_loop = FALSE; /* clear the force_loop flg */
769: 765 0002F6D5 4d effffff961 clrl _force_loop
770: 766 0002F6DB # index = 0;
771: 767 0002F6DB 4d effffff95b clrl _index
772: 768 0002F6E1 # do
773: 769 0002F6E1 L291:
774: 770 0002F6E1 # {
775: 771 0002F6E1 # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */
776: 772 0002F6E1 5c 18 effffff954 50 mull3 $24,_index,r0
777: 773 0002F6E9 0c 8f00000000 50 addl2 $_divd_1_data,r0
778: 774 0002F6F0 0d a004 effffff948 movl 4(r0),_dbl_value_1+4
779: 775 0002F6F8 0d 60 effffff93d movl (r0),_dbl_value_1
780: 776 0002F6FF # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */
781: 777 0002F6FF 5c 18 effffff936 50 mull3 $24,_index,r0
782: 778 0002F707 0c 8f00000008 50 addl2 $_divd_1_data+8,r0
783: 779 0002F70E 0d a004 effffff92a movl 4(r0),_dbl_value_2+4
784: 780 0002F716 0d 60 effffff91f movl (r0),_dbl_value_2
785: 781 0002F71D # dbl_expected = divd_1_data[index].exp; /* get expected results */
786: 782 0002F71D 5c 18 effffff918 50 mull3 $24,_index,r0
787: 783 0002F725 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
788: 784 0002F72C 0d a004 effffff90c movl 4(r0),_dbl_expected+4
789: 785 0002F734 0d 60 effffff901 movl (r0),_dbl_expected
790: 786 0002F73B # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */
791: 787 0002F73B 0d 8f40800000 effffff8f6 movl $1082130432,_dbl_dummy1
792: 788 0002F746 # dbl_dummy1.l = 0;
793: 789 0002F746 4d effffff8f4 clrl _dbl_dummy1+4
794: 790 0002F74C # dbl_dummy2.m = 0; /* get dbl precision 0.0 */
795: 791 0002F74C 4d effffff8ea clrl _dbl_dummy2
796: 792 0002F752 # dbl_dummy2.l = 0;
797: 793 0002F752 4d effffff8e8 clrl _dbl_dummy2+4
798: 794 0002F758 # /*
799: 795 0002F758 # * If LOOP ON ERROR is set, this is the loop for this subtest.
800: 796 0002F758 # * The force loop flag is set after the first error.
801: 797 0002F758 # */
802: 798 0002F758 # asm("_pipe14_5_lp1:");
803: 799 0002F758 _pipe14_5_lp1:
804: 800 0002F758 # asm("ldd _dbl_dummy2"); /* load a '0.0' ( 0 ) */
805: 801 0002F758 07 effffff8de ldd _dbl_dummy2
806: 802 0002F75E # asm("addd _dbl_value_1"); /* add operand 1 ( op1 ) */
807: 803 0002F75E c7 effffff8d8 addd _dbl_value_1
808: 804 0002F764 # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */
809: 805 0002F764 f7 effffff8d2 divd _dbl_value_2
810: 806 0002F76A # asm("muld _dbl_dummy1"); /* multiply by 1.0 ( exp ) */
811: 807 0002F76A e7 effffff8cc muld _dbl_dummy1
812: 808 0002F770 # asm("std _dbl_st_acc"); /* store the result ( exp ) */
813: 809 0002F770 27 effffff8c6 std _dbl_st_acc
814: 810 0002F776 # if( force_loop )
815: 811 0002F776 5d effffff8c0 tstl _force_loop
816: 812 0002F77C 31 02 jeql L292
817: 813 0002F77E # asm("brb _pipe14_5_lp1");; /* run the loop again */
818: 814 0002F77E 11 d8 brb _pipe14_5_lp1
819: 815 0002F780 L292:
820: 816 0002F780 # /*
821: 817 0002F780 # * verify the results
822: 818 0002F780 # */
823: 819 0002F780 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
824: 820 0002F780 # (dbl_st_acc.l != dbl_expected.l) )
825: 821 0002F780 1d effffff8b6 effffff8b1 cmpl _dbl_st_acc,_dbl_expected
826: 822 0002F78B 21 0d jneq L9995
827: 823 0002F78D 1d effffff8ad effffff8a8 cmpl _dbl_st_acc+4,_dbl_expected+4
828: 824 0002F798 31 42 jeql L293
829: 825 0002F79A L9995:
830: 826 0002F79A # {
831: 827 0002F79A # errcnt++; /* bump the error count */
832: 828 0002F79A 6d effffff89c incl _errcnt
833: 829 0002F7A0 # if ( prt_error )
834: 830 0002F7A0 5d effffff896 tstl _prt_error
835: 831 0002F7A6 31 0d jeql L294
836: 832 0002F7A8 # print_pipe14_er("Cache Data, no NOPs");
837: 833 0002F7A8 .data 1
838: 834 00001035 * L295:
839: 835 00001035 * 436163686520446174612C206 .ascii "Cache Data, no NOPs\0"
840: E6F204E4F507300
841: 836 00001049 * .text
842: 837 0002F7A8 dd 8f00001035 pushl $L295
843: 838 0002F7AE fe 08 ef0000064b callf $8,_print_pipe14_er
844: 839 0002F7B5 # if ( halt_flg ) /* halt on error? */
845: 840 0002F7B5 L294:
846: 841 0002F7B5 5d effffff881 tstl _halt_flg
847: 842 0002F7BB 31 0d jeql L296
848: 843 0002F7BD # pipe14_er_hlt( subtest );
849: 844 0002F7BD dd effffff879 pushl _subtest
850: 845 0002F7C3 fe 08 ef000007b4 callf $8,_pipe14_er_hlt
851: 846 0002F7CA # if ( loop_on_err ) {
852: 847 0002F7CA L296:
853: 848 0002F7CA 5d effffff86c tstl _loop_on_err
854: 849 0002F7D0 31 0a jeql L297
855: 850 0002F7D2 # force_loop = TRUE; /* set the force loop flag */
856: 851 0002F7D2 0d 01 effffff863 movl $1,_force_loop
857: 852 0002F7D9 # asm("brw _pipe14_5_lp1"); /* and loop */
858: 853 0002F7D9 13 ff7c brw _pipe14_5_lp1
859: 854 0002F7DC # }
860: 855 0002F7DC # } /* end of compare error */
861: 856 0002F7DC L297:
862: 857 0002F7DC # } while( index++ < max_divd_1_index );
863: 858 0002F7DC L293:
864: 859 0002F7DC L290:
865: 860 0002F7DC 0d effffff85a 50 movl _index,r0
866: 861 0002F7E3 6d effffff853 incl _index
867: 862 0002F7E9 1d 50 effffff84c cmpl r0,_max_divd_1_index
868: 863 0002F7F0 81 03 13 feec jlss L291
869: 864 0002F7F5 L289:
870: 865 0002F7F5 # } /* end of subtest 5 */
871: 866 0002F7F5 40 ret#2
872: 867 0002F7F6 .set L285,0x0
873: 868 0002F7F6 L287:
874: 869 0002F7F6 13 fedc jbr L288
875: 870 0002F7F9 .data
876: 871 00000fe4 * .text
877: 872 0002F7F9 00 .align 1
878: 873 0002F7FA .globl _pipe14_6
879: 874 0002F7FA _pipe14_6:
880: 875 0002F7FA 0000 .word L298
881: 876 0002F7FC #
882: 877 0002F7FC #
883: 878 0002F7FC #
884: 879 0002F7FC #
885: 880 0002F7FC #
886: 881 0002F7FC #
887: 882 0002F7FC #
888: 883 0002F7FC # /************************************************************************
889: 884 0002F7FC # *
890: 885 0002F7FC # * SUBTEST 6
891: 886 0002F7FC # * data in cache, 1 NO-OP
892: 887 0002F7FC # *
893: 888 0002F7FC # ************************************************************************/
894: 889 0002F7FC # pipe14_6()
895: 890 0002F7FC # {
896: 891 0002F7FC 13 0125 jbr L300
897: 892 0002F7FF L301:
898: 893 0002F7FF # force_loop = FALSE; /* clear the force_loop flg */
899: 894 0002F7FF 4d effffff837 clrl _force_loop
900: 895 0002F805 # index = 0;
901: 896 0002F805 4d effffff831 clrl _index
902: 897 0002F80B # do
903: 898 0002F80B L304:
904: 899 0002F80B # {
905: 900 0002F80B # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */
906: 901 0002F80B 5c 18 effffff82a 50 mull3 $24,_index,r0
907: 902 0002F813 0c 8f00000000 50 addl2 $_divd_1_data,r0
908: 903 0002F81A 0d a004 effffff81e movl 4(r0),_dbl_value_1+4
909: 904 0002F822 0d 60 effffff813 movl (r0),_dbl_value_1
910: 905 0002F829 # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */
911: 906 0002F829 5c 18 effffff80c 50 mull3 $24,_index,r0
912: 907 0002F831 0c 8f00000008 50 addl2 $_divd_1_data+8,r0
913: 908 0002F838 0d a004 effffff800 movl 4(r0),_dbl_value_2+4
914: 909 0002F840 0d 60 effffff7f5 movl (r0),_dbl_value_2
915: 910 0002F847 # dbl_expected = divd_1_data[index].exp; /* get expected results */
916: 911 0002F847 5c 18 effffff7ee 50 mull3 $24,_index,r0
917: 912 0002F84F 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
918: 913 0002F856 0d a004 effffff7e2 movl 4(r0),_dbl_expected+4
919: 914 0002F85E 0d 60 effffff7d7 movl (r0),_dbl_expected
920: 915 0002F865 # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */
921: 916 0002F865 0d 8f40800000 effffff7cc movl $1082130432,_dbl_dummy1
922: 917 0002F870 # dbl_dummy1.l = 0;
923: 918 0002F870 4d effffff7ca clrl _dbl_dummy1+4
924: 919 0002F876 # dbl_dummy2.m = 0; /* get dbl precision 0.0 */
925: 920 0002F876 4d effffff7c0 clrl _dbl_dummy2
926: 921 0002F87C # dbl_dummy2.l = 0;
927: 922 0002F87C 4d effffff7be clrl _dbl_dummy2+4
928: 923 0002F882 # /*
929: 924 0002F882 # * If LOOP ON ERROR is set, this is the loop for this subtest.
930: 925 0002F882 # * The force loop flag is set after the first error.
931: 926 0002F882 # */
932: 927 0002F882 # asm("_pipe14_6_lp1:");
933: 928 0002F882 _pipe14_6_lp1:
934: 929 0002F882 # asm("ldd _dbl_dummy2"); /* load a '0.0' ( 0 ) */
935: 930 0002F882 07 effffff7b4 ldd _dbl_dummy2
936: 931 0002F888 # asm("nop");
937: 932 0002F888 10 nop
938: 933 0002F889 # asm("addd _dbl_value_1"); /* add operand 1 ( op1 ) */
939: 934 0002F889 c7 effffff7ad addd _dbl_value_1
940: 935 0002F88F # asm("nop");
941: 936 0002F88F 10 nop
942: 937 0002F890 # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */
943: 938 0002F890 f7 effffff7a6 divd _dbl_value_2
944: 939 0002F896 # asm("nop");
945: 940 0002F896 10 nop
946: 941 0002F897 # asm("muld _dbl_dummy1"); /* multiply by 1.0 ( exp ) */
947: 942 0002F897 e7 effffff79f muld _dbl_dummy1
948: 943 0002F89D # asm("nop");
949: 944 0002F89D 10 nop
950: 945 0002F89E # asm("std _dbl_st_acc"); /* store the result ( exp ) */
951: 946 0002F89E 27 effffff798 std _dbl_st_acc
952: 947 0002F8A4 # if( force_loop )
953: 948 0002F8A4 5d effffff792 tstl _force_loop
954: 949 0002F8AA 31 02 jeql L305
955: 950 0002F8AC # asm("brb _pipe14_6_lp1");; /* run the loop again */
956: 951 0002F8AC 11 d4 brb _pipe14_6_lp1
957: 952 0002F8AE L305:
958: 953 0002F8AE # /*
959: 954 0002F8AE # * verify the results
960: 955 0002F8AE # */
961: 956 0002F8AE # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
962: 957 0002F8AE # (dbl_st_acc.l != dbl_expected.l) )
963: 958 0002F8AE 1d effffff788 effffff783 cmpl _dbl_st_acc,_dbl_expected
964: 959 0002F8B9 21 0d jneq L9994
965: 960 0002F8BB 1d effffff77f effffff77a cmpl _dbl_st_acc+4,_dbl_expected+4
966: 961 0002F8C6 31 42 jeql L306
967: 962 0002F8C8 L9994:
968: 963 0002F8C8 # {
969: 964 0002F8C8 # errcnt++; /* bump the error count */
970: 965 0002F8C8 6d effffff76e incl _errcnt
971: 966 0002F8CE # if ( prt_error )
972: 967 0002F8CE 5d effffff768 tstl _prt_error
973: 968 0002F8D4 31 0d jeql L307
974: 969 0002F8D6 # print_pipe14_er("Cache Data, 1 NOP");
975: 970 0002F8D6 .data 1
976: 971 00001049 * L308:
977: 972 00001049 * 436163686520446174612C203 .ascii "Cache Data, 1 NOP\0"
978: 1204E4F5000
979: 973 0000105b * .text
980: 974 0002F8D6 dd 8f00001049 pushl $L308
981: 975 0002F8DC fe 08 ef0000051d callf $8,_print_pipe14_er
982: 976 0002F8E3 # if ( halt_flg ) /* halt on error? */
983: 977 0002F8E3 L307:
984: 978 0002F8E3 5d effffff753 tstl _halt_flg
985: 979 0002F8E9 31 0d jeql L309
986: 980 0002F8EB # pipe14_er_hlt( subtest );
987: 981 0002F8EB dd effffff74b pushl _subtest
988: 982 0002F8F1 fe 08 ef00000686 callf $8,_pipe14_er_hlt
989: 983 0002F8F8 # if ( loop_on_err ) {
990: 984 0002F8F8 L309:
991: 985 0002F8F8 5d effffff73e tstl _loop_on_err
992: 986 0002F8FE 31 0a jeql L310
993: 987 0002F900 # force_loop = TRUE; /* set the force loop flag */
994: 988 0002F900 0d 01 effffff735 movl $1,_force_loop
995: 989 0002F907 # asm("brw _pipe14_6_lp1"); /* and loop */
996: 990 0002F907 13 ff78 brw _pipe14_6_lp1
997: 991 0002F90A # }
998: 992 0002F90A # } /* end of compare error */
999: 993 0002F90A L310:
1000: 994 0002F90A # } while( index++ < max_divd_1_index );
1001: 995 0002F90A L306:
1002: 996 0002F90A L303:
1003: 997 0002F90A 0d effffff72c 50 movl _index,r0
1004: 998 0002F911 6d effffff725 incl _index
1005: 999 0002F917 1d 50 effffff71e cmpl r0,_max_divd_1_index
1006: 1000 0002F91E 81 03 13 fee8 jlss L304
1007: 1001 0002F923 L302:
1008: 1002 0002F923 # } /* end of subtest 6 */
1009: 1003 0002F923 40 ret#2
1010: 1004 0002F924 .set L298,0x0
1011: 1005 0002F924 L300:
1012: 1006 0002F924 13 fed8 jbr L301
1013: 1007 0002F927 .data
1014: 1008 00000fe4 * .text
1015: 1009 0002F927 00 .align 1
1016: 1010 0002F928 .globl _pipe14_7
1017: 1011 0002F928 _pipe14_7:
1018: 1012 0002F928 0000 .word L311
1019: 1013 0002F92A #
1020: 1014 0002F92A #
1021: 1015 0002F92A #
1022: 1016 0002F92A #
1023: 1017 0002F92A #
1024: 1018 0002F92A #
1025: 1019 0002F92A #
1026: 1020 0002F92A #
1027: 1021 0002F92A # /************************************************************************
1028: 1022 0002F92A # *
1029: 1023 0002F92A # * SUBTEST 7
1030: 1024 0002F92A # * data in cache, 2 NO-OPs
1031: 1025 0002F92A # *
1032: 1026 0002F92A # ************************************************************************/
1033: 1027 0002F92A # pipe14_7()
1034: 1028 0002F92A # {
1035: 1029 0002F92A 13 0129 jbr L313
1036: 1030 0002F92D L314:
1037: 1031 0002F92D # force_loop = FALSE; /* clear the force_loop flg */
1038: 1032 0002F92D 4d effffff709 clrl _force_loop
1039: 1033 0002F933 # index = 0;
1040: 1034 0002F933 4d effffff703 clrl _index
1041: 1035 0002F939 # do
1042: 1036 0002F939 L317:
1043: 1037 0002F939 # {
1044: 1038 0002F939 # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */
1045: 1039 0002F939 5c 18 effffff6fc 50 mull3 $24,_index,r0
1046: 1040 0002F941 0c 8f00000000 50 addl2 $_divd_1_data,r0
1047: 1041 0002F948 0d a004 effffff6f0 movl 4(r0),_dbl_value_1+4
1048: 1042 0002F950 0d 60 effffff6e5 movl (r0),_dbl_value_1
1049: 1043 0002F957 # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */
1050: 1044 0002F957 5c 18 effffff6de 50 mull3 $24,_index,r0
1051: 1045 0002F95F 0c 8f00000008 50 addl2 $_divd_1_data+8,r0
1052: 1046 0002F966 0d a004 effffff6d2 movl 4(r0),_dbl_value_2+4
1053: 1047 0002F96E 0d 60 effffff6c7 movl (r0),_dbl_value_2
1054: 1048 0002F975 # dbl_expected = divd_1_data[index].exp; /* get expected results */
1055: 1049 0002F975 5c 18 effffff6c0 50 mull3 $24,_index,r0
1056: 1050 0002F97D 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
1057: 1051 0002F984 0d a004 effffff6b4 movl 4(r0),_dbl_expected+4
1058: 1052 0002F98C 0d 60 effffff6a9 movl (r0),_dbl_expected
1059: 1053 0002F993 # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */
1060: 1054 0002F993 0d 8f40800000 effffff69e movl $1082130432,_dbl_dummy1
1061: 1055 0002F99E # dbl_dummy1.l = 0;
1062: 1056 0002F99E 4d effffff69c clrl _dbl_dummy1+4
1063: 1057 0002F9A4 # dbl_dummy2.m = 0; /* get dbl precision 0.0 */
1064: 1058 0002F9A4 4d effffff692 clrl _dbl_dummy2
1065: 1059 0002F9AA # dbl_dummy2.l = 0;
1066: 1060 0002F9AA 4d effffff690 clrl _dbl_dummy2+4
1067: 1061 0002F9B0 # /*
1068: 1062 0002F9B0 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1069: 1063 0002F9B0 # * The force loop flag is set after the first error.
1070: 1064 0002F9B0 # */
1071: 1065 0002F9B0 # asm("_pipe14_7_lp1:");
1072: 1066 0002F9B0 _pipe14_7_lp1:
1073: 1067 0002F9B0 # asm("ldd _dbl_dummy2"); /* load a '0.0' ( 0 ) */
1074: 1068 0002F9B0 07 effffff686 ldd _dbl_dummy2
1075: 1069 0002F9B6 # asm("nop");
1076: 1070 0002F9B6 10 nop
1077: 1071 0002F9B7 # asm("nop");
1078: 1072 0002F9B7 10 nop
1079: 1073 0002F9B8 # asm("addd _dbl_value_1"); /* add operand 1 ( op1 ) */
1080: 1074 0002F9B8 c7 effffff67e addd _dbl_value_1
1081: 1075 0002F9BE # asm("nop");
1082: 1076 0002F9BE 10 nop
1083: 1077 0002F9BF # asm("nop");
1084: 1078 0002F9BF 10 nop
1085: 1079 0002F9C0 # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */
1086: 1080 0002F9C0 f7 effffff676 divd _dbl_value_2
1087: 1081 0002F9C6 # asm("nop");
1088: 1082 0002F9C6 10 nop
1089: 1083 0002F9C7 # asm("nop");
1090: 1084 0002F9C7 10 nop
1091: 1085 0002F9C8 # asm("muld _dbl_dummy1"); /* multiply by 1.0 ( exp ) */
1092: 1086 0002F9C8 e7 effffff66e muld _dbl_dummy1
1093: 1087 0002F9CE # asm("nop");
1094: 1088 0002F9CE 10 nop
1095: 1089 0002F9CF # asm("nop");
1096: 1090 0002F9CF 10 nop
1097: 1091 0002F9D0 # asm("std _dbl_st_acc"); /* store the result ( exp ) */
1098: 1092 0002F9D0 27 effffff666 std _dbl_st_acc
1099: 1093 0002F9D6 # if( force_loop )
1100: 1094 0002F9D6 5d effffff660 tstl _force_loop
1101: 1095 0002F9DC 31 02 jeql L318
1102: 1096 0002F9DE # asm("brb _pipe14_7_lp1");; /* run the loop again */
1103: 1097 0002F9DE 11 d0 brb _pipe14_7_lp1
1104: 1098 0002F9E0 L318:
1105: 1099 0002F9E0 # /*
1106: 1100 0002F9E0 # * verify the results
1107: 1101 0002F9E0 # */
1108: 1102 0002F9E0 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
1109: 1103 0002F9E0 # (dbl_st_acc.l != dbl_expected.l) )
1110: 1104 0002F9E0 1d effffff656 effffff651 cmpl _dbl_st_acc,_dbl_expected
1111: 1105 0002F9EB 21 0d jneq L9993
1112: 1106 0002F9ED 1d effffff64d effffff648 cmpl _dbl_st_acc+4,_dbl_expected+4
1113: 1107 0002F9F8 31 42 jeql L319
1114: 1108 0002F9FA L9993:
1115: 1109 0002F9FA # {
1116: 1110 0002F9FA # errcnt++; /* bump the error count */
1117: 1111 0002F9FA 6d effffff63c incl _errcnt
1118: 1112 0002FA00 # if ( prt_error )
1119: 1113 0002FA00 5d effffff636 tstl _prt_error
1120: 1114 0002FA06 31 0d jeql L320
1121: 1115 0002FA08 # print_pipe14_er("Cache Data, 2 NOPs");
1122: 1116 0002FA08 .data 1
1123: 1117 0000105b * L321:
1124: 1118 0000105b * 436163686520446174612C203 .ascii "Cache Data, 2 NOPs\0"
1125: 2204E4F507300
1126: 1119 0000106e * .text
1127: 1120 0002FA08 dd 8f0000105b pushl $L321
1128: 1121 0002FA0E fe 08 ef000003eb callf $8,_print_pipe14_er
1129: 1122 0002FA15 # if ( halt_flg ) /* halt on error? */
1130: 1123 0002FA15 L320:
1131: 1124 0002FA15 5d effffff621 tstl _halt_flg
1132: 1125 0002FA1B 31 0d jeql L322
1133: 1126 0002FA1D # pipe14_er_hlt( subtest );
1134: 1127 0002FA1D dd effffff619 pushl _subtest
1135: 1128 0002FA23 fe 08 ef00000554 callf $8,_pipe14_er_hlt
1136: 1129 0002FA2A # if ( loop_on_err ) {
1137: 1130 0002FA2A L322:
1138: 1131 0002FA2A 5d effffff60c tstl _loop_on_err
1139: 1132 0002FA30 31 0a jeql L323
1140: 1133 0002FA32 # force_loop = TRUE; /* set the force loop flag */
1141: 1134 0002FA32 0d 01 effffff603 movl $1,_force_loop
1142: 1135 0002FA39 # asm("brw _pipe14_7_lp1"); /* and loop */
1143: 1136 0002FA39 13 ff74 brw _pipe14_7_lp1
1144: 1137 0002FA3C # }
1145: 1138 0002FA3C # } /* end of compare error */
1146: 1139 0002FA3C L323:
1147: 1140 0002FA3C # } while( index++ < max_divd_1_index );
1148: 1141 0002FA3C L319:
1149: 1142 0002FA3C L316:
1150: 1143 0002FA3C 0d effffff5fa 50 movl _index,r0
1151: 1144 0002FA43 6d effffff5f3 incl _index
1152: 1145 0002FA49 1d 50 effffff5ec cmpl r0,_max_divd_1_index
1153: 1146 0002FA50 81 03 13 fee4 jlss L317
1154: 1147 0002FA55 L315:
1155: 1148 0002FA55 # } /* end of subtest 7 */
1156: 1149 0002FA55 40 ret#2
1157: 1150 0002FA56 .set L311,0x0
1158: 1151 0002FA56 L313:
1159: 1152 0002FA56 13 fed4 jbr L314
1160: 1153 0002FA59 .data
1161: 1154 00000fe4 * .text
1162: 1155 0002FA59 00 .align 1
1163: 1156 0002FA5A .globl _pipe14_8
1164: 1157 0002FA5A _pipe14_8:
1165: 1158 0002FA5A 0000 .word L324
1166: 1159 0002FA5C #
1167: 1160 0002FA5C #
1168: 1161 0002FA5C #
1169: 1162 0002FA5C #
1170: 1163 0002FA5C #
1171: 1164 0002FA5C #
1172: 1165 0002FA5C # /************************************************************************
1173: 1166 0002FA5C # *
1174: 1167 0002FA5C # * SUBTEST 8
1175: 1168 0002FA5C # * data in cache, 3 NO-OPs
1176: 1169 0002FA5C # *
1177: 1170 0002FA5C # ************************************************************************/
1178: 1171 0002FA5C # pipe14_8()
1179: 1172 0002FA5C # {
1180: 1173 0002FA5C 13 012d jbr L326
1181: 1174 0002FA5F L327:
1182: 1175 0002FA5F # force_loop = FALSE; /* clear the force_loop flg */
1183: 1176 0002FA5F 4d effffff5d7 clrl _force_loop
1184: 1177 0002FA65 # index = 0;
1185: 1178 0002FA65 4d effffff5d1 clrl _index
1186: 1179 0002FA6B # do
1187: 1180 0002FA6B L330:
1188: 1181 0002FA6B # {
1189: 1182 0002FA6B # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */
1190: 1183 0002FA6B 5c 18 effffff5ca 50 mull3 $24,_index,r0
1191: 1184 0002FA73 0c 8f00000000 50 addl2 $_divd_1_data,r0
1192: 1185 0002FA7A 0d a004 effffff5be movl 4(r0),_dbl_value_1+4
1193: 1186 0002FA82 0d 60 effffff5b3 movl (r0),_dbl_value_1
1194: 1187 0002FA89 # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */
1195: 1188 0002FA89 5c 18 effffff5ac 50 mull3 $24,_index,r0
1196: 1189 0002FA91 0c 8f00000008 50 addl2 $_divd_1_data+8,r0
1197: 1190 0002FA98 0d a004 effffff5a0 movl 4(r0),_dbl_value_2+4
1198: 1191 0002FAA0 0d 60 effffff595 movl (r0),_dbl_value_2
1199: 1192 0002FAA7 # dbl_expected = divd_1_data[index].exp; /* get expected results */
1200: 1193 0002FAA7 5c 18 effffff58e 50 mull3 $24,_index,r0
1201: 1194 0002FAAF 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
1202: 1195 0002FAB6 0d a004 effffff582 movl 4(r0),_dbl_expected+4
1203: 1196 0002FABE 0d 60 effffff577 movl (r0),_dbl_expected
1204: 1197 0002FAC5 # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */
1205: 1198 0002FAC5 0d 8f40800000 effffff56c movl $1082130432,_dbl_dummy1
1206: 1199 0002FAD0 # dbl_dummy1.l = 0;
1207: 1200 0002FAD0 4d effffff56a clrl _dbl_dummy1+4
1208: 1201 0002FAD6 # dbl_dummy2.m = 0; /* get dbl precision 0.0 */
1209: 1202 0002FAD6 4d effffff560 clrl _dbl_dummy2
1210: 1203 0002FADC # dbl_dummy2.l = 0;
1211: 1204 0002FADC 4d effffff55e clrl _dbl_dummy2+4
1212: 1205 0002FAE2 # /*
1213: 1206 0002FAE2 # * If LOOP ON ERROR is set, this is the loop for this subtest.
1214: 1207 0002FAE2 # * The force loop flag is set after the first error.
1215: 1208 0002FAE2 # */
1216: 1209 0002FAE2 # asm("_pipe14_8_lp1:");
1217: 1210 0002FAE2 _pipe14_8_lp1:
1218: 1211 0002FAE2 # asm("ldd _dbl_dummy2"); /* load a '0.0' ( 0 ) */
1219: 1212 0002FAE2 07 effffff554 ldd _dbl_dummy2
1220: 1213 0002FAE8 # asm("nop");
1221: 1214 0002FAE8 10 nop
1222: 1215 0002FAE9 # asm("nop");
1223: 1216 0002FAE9 10 nop
1224: 1217 0002FAEA # asm("nop");
1225: 1218 0002FAEA 10 nop
1226: 1219 0002FAEB # asm("addd _dbl_value_1"); /* add operand 1 ( op1 ) */
1227: 1220 0002FAEB c7 effffff54b addd _dbl_value_1
1228: 1221 0002FAF1 # asm("nop");
1229: 1222 0002FAF1 10 nop
1230: 1223 0002FAF2 # asm("nop");
1231: 1224 0002FAF2 10 nop
1232: 1225 0002FAF3 # asm("nop");
1233: 1226 0002FAF3 10 nop
1234: 1227 0002FAF4 # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */
1235: 1228 0002FAF4 f7 effffff542 divd _dbl_value_2
1236: 1229 0002FAFA # asm("nop");
1237: 1230 0002FAFA 10 nop
1238: 1231 0002FAFB # asm("nop");
1239: 1232 0002FAFB 10 nop
1240: 1233 0002FAFC # asm("nop");
1241: 1234 0002FAFC 10 nop
1242: 1235 0002FAFD # asm("muld _dbl_dummy1"); /* multiply by 1.0 ( exp ) */
1243: 1236 0002FAFD e7 effffff539 muld _dbl_dummy1
1244: 1237 0002FB03 # asm("nop");
1245: 1238 0002FB03 10 nop
1246: 1239 0002FB04 # asm("nop");
1247: 1240 0002FB04 10 nop
1248: 1241 0002FB05 # asm("nop");
1249: 1242 0002FB05 10 nop
1250: 1243 0002FB06 # asm("std _dbl_st_acc"); /* store the result ( exp ) */
1251: 1244 0002FB06 27 effffff530 std _dbl_st_acc
1252: 1245 0002FB0C # if( force_loop )
1253: 1246 0002FB0C 5d effffff52a tstl _force_loop
1254: 1247 0002FB12 31 02 jeql L331
1255: 1248 0002FB14 # asm("brb _pipe14_8_lp1");; /* run the loop again */
1256: 1249 0002FB14 11 cc brb _pipe14_8_lp1
1257: 1250 0002FB16 L331:
1258: 1251 0002FB16 # /*
1259: 1252 0002FB16 # * verify the results
1260: 1253 0002FB16 # */
1261: 1254 0002FB16 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */
1262: 1255 0002FB16 # (dbl_st_acc.l != dbl_expected.l) )
1263: 1256 0002FB16 1d effffff520 effffff51b cmpl _dbl_st_acc,_dbl_expected
1264: 1257 0002FB21 21 0d jneq L9992
1265: 1258 0002FB23 1d effffff517 effffff512 cmpl _dbl_st_acc+4,_dbl_expected+4
1266: 1259 0002FB2E 31 42 jeql L332
1267: 1260 0002FB30 L9992:
1268: 1261 0002FB30 # {
1269: 1262 0002FB30 # errcnt++; /* bump the error count */
1270: 1263 0002FB30 6d effffff506 incl _errcnt
1271: 1264 0002FB36 # if ( prt_error )
1272: 1265 0002FB36 5d effffff500 tstl _prt_error
1273: 1266 0002FB3C 31 0d jeql L333
1274: 1267 0002FB3E # print_pipe14_er("Cache Data, 3 NOPs");
1275: 1268 0002FB3E .data 1
1276: 1269 0000106e * L334:
1277: 1270 0000106e * 436163686520446174612C203 .ascii "Cache Data, 3 NOPs\0"
1278: 3204E4F507300
1279: 1271 00001081 * .text
1280: 1272 0002FB3E dd 8f0000106e pushl $L334
1281: 1273 0002FB44 fe 08 ef000002b5 callf $8,_print_pipe14_er
1282: 1274 0002FB4B # if ( halt_flg ) /* halt on error? */
1283: 1275 0002FB4B L333:
1284: 1276 0002FB4B 5d effffff4eb tstl _halt_flg
1285: 1277 0002FB51 31 0d jeql L335
1286: 1278 0002FB53 # pipe14_er_hlt( subtest );
1287: 1279 0002FB53 dd effffff4e3 pushl _subtest
1288: 1280 0002FB59 fe 08 ef0000041e callf $8,_pipe14_er_hlt
1289: 1281 0002FB60 # if ( loop_on_err ) {
1290: 1282 0002FB60 L335:
1291: 1283 0002FB60 5d effffff4d6 tstl _loop_on_err
1292: 1284 0002FB66 31 0a jeql L336
1293: 1285 0002FB68 # force_loop = TRUE; /* set the force loop flag */
1294: 1286 0002FB68 0d 01 effffff4cd movl $1,_force_loop
1295: 1287 0002FB6F # asm("brw _pipe14_8_lp1"); /* and loop */
1296: 1288 0002FB6F 13 ff70 brw _pipe14_8_lp1
1297: 1289 0002FB72 # }
1298: 1290 0002FB72 # } /* end of compare error */
1299: 1291 0002FB72 L336:
1300: 1292 0002FB72 # } while( index++ < max_divd_1_index );
1301: 1293 0002FB72 L332:
1302: 1294 0002FB72 L329:
1303: 1295 0002FB72 0d effffff4c4 50 movl _index,r0
1304: 1296 0002FB79 6d effffff4bd incl _index
1305: 1297 0002FB7F 1d 50 effffff4b6 cmpl r0,_max_divd_1_index
1306: 1298 0002FB86 81 03 13 fee0 jlss L330
1307: 1299 0002FB8B L328:
1308: 1300 0002FB8B # } /* end of subtest 8 */
1309: 1301 0002FB8B 40 ret#2
1310: 1302 0002FB8C .set L324,0x0
1311: 1303 0002FB8C L326:
1312: 1304 0002FB8C 13 fed0 jbr L327
1313: 1305 0002FB8F .data
1314: 1306 00000fe4 * .text
1315: 1307 0002FB8F 00 .align 1
1316: 1308 0002FB90 .globl _pipe14_9
1317: 1309 0002FB90 _pipe14_9:
1318: 1310 0002FB90 0000 .word L337
1319: 1311 0002FB92 #
1320: 1312 0002FB92 #
1321: 1313 0002FB92 #
1322: 1314 0002FB92 #
1323: 1315 0002FB92 #
1324: 1316 0002FB92 #
1325: 1317 0002FB92 #
1326: 1318 0002FB92 #
1327: 1319 0002FB92 #
1328: 1320 0002FB92 # /******************************************************************************
1329: 1321 0002FB92 # *
1330: 1322 0002FB92 # * SUBTEST 9
1331: 1323 0002FB92 # *
1332: 1324 0002FB92 # * Get the data via the FRAME POINTER ( quad word indexed )
1333: 1325 0002FB92 # *
1334: 1326 0002FB92 # * ADDRESSES OF DATA OPERANDS INDEX DATA
1335: 1327 0002FB92 # * pointer_data,-4 ( FP+40 ) 5 the STF result goes here
1336: 1328 0002FB92 # * pointer_data-8,-12 ( FP+32 ) 4 <operand #1 data>
1337: 1329 0002FB92 # * pointer_data-16,-20 ( FP+24 ) 3 <operand #2 data>
1338: 1330 0002FB92 # * pointer_data-24,-28 ( FP+16 ) 2 < '1.0' data>
1339: 1331 0002FB92 # * pointer_data-32,-36 ( FP+8 ) 1 < '0.0' data>
1340: 1332 0002FB92 # * pointer_data-40,-44 ( FP ) 0 point the frame pointer here
1341: 1333 0002FB92 # *
1342: 1334 0002FB92 # * NOTE: The double precision instructions are using Quad Word indexing.
1343: 1335 0002FB92 # ******************************************************************************/
1344: 1336 0002FB92 # pipe14_9()
1345: 1337 0002FB92 # {
1346: 1338 0002FB92 13 0267 jbr L339
1347: 1339 0002FB95 L340:
1348: 1340 0002FB95 # asm("moval (r13),_pre_event_fp"); /* save the frame pointer */
1349: 1341 0002FB95 ed 6d effffff4a0 moval (r13),_pre_event_fp
1350: 1342 0002FB9C # asm("moval (r14),_pre_event_sp"); /* save the stack pointer */
1351: 1343 0002FB9C ed 6e effffff499 moval (r14),_pre_event_sp
1352: 1344 0002FBA3 # force_loop = FALSE; /* clear force_loop flag */
1353: 1345 0002FBA3 4d effffff493 clrl _force_loop
1354: 1346 0002FBA9 # index = 0;
1355: 1347 0002FBA9 4d effffff48d clrl _index
1356: 1348 0002FBAF # do
1357: 1349 0002FBAF L343:
1358: 1350 0002FBAF # {
1359: 1351 0002FBAF # sgl_value_1 = divd_1_data[index].op_1.m; /* get op. #1's MSW */
1360: 1352 0002FBAF 5c 18 effffff486 50 mull3 $24,_index,r0
1361: 1353 0002FBB7 0d e000000000 effffff47a movl _divd_1_data(r0),_sgl_value_1
1362: 1354 0002FBC2 # sgl_value_2 = divd_1_data[index].op_1.l; /* get op. #1's LSW */
1363: 1355 0002FBC2 5c 18 effffff473 50 mull3 $24,_index,r0
1364: 1356 0002FBCA 0d e000000004 effffff467 movl _divd_1_data+4(r0),_sgl_value_2
1365: 1357 0002FBD5 # sgl_value_3 = divd_1_data[index].op_2.m; /* get op. #2's MSW */
1366: 1358 0002FBD5 5c 18 effffff460 50 mull3 $24,_index,r0
1367: 1359 0002FBDD 0d e000000008 effffff454 movl _divd_1_data+8(r0),_sgl_value_3
1368: 1360 0002FBE8 # sgl_value_4 = divd_1_data[index].op_2.l; /* get op. #2's LSW */
1369: 1361 0002FBE8 5c 18 effffff44d 50 mull3 $24,_index,r0
1370: 1362 0002FBF0 0d e00000000c effffff441 movl _divd_1_data+12(r0),_sgl_value_4
1371: 1363 0002FBFB # sgl_value_7 = 0x40800000; /* get the '1.0' data */
1372: 1364 0002FBFB 0d 8f40800000 effffff436 movl $1082130432,_sgl_value_7
1373: 1365 0002FC06 # sgl_value_8 = 0;
1374: 1366 0002FC06 4d effffff430 clrl _sgl_value_8
1375: 1367 0002FC0C # dbl_expected = divd_1_data[index].exp; /* get expected results */
1376: 1368 0002FC0C 5c 18 effffff429 50 mull3 $24,_index,r0
1377: 1369 0002FC14 0c 8f00000010 50 addl2 $_divd_1_data+16,r0
1378: 1370 0002FC1B 0d a004 effffff41d movl 4(r0),_dbl_expected+4
1379: 1371 0002FC23 0d 60 effffff412 movl (r0),_dbl_expected
1380: 1372 0002FC2A # /*
1381: 1373 0002FC2A # * If LOOP ON ERROR is set, this is the loop for this subtest.
1382: 1374 0002FC2A # * The force loop flag is set after the first error.
1383: 1375 0002FC2A # */
1384: 1376 0002FC2A # asm("_pipe14_9_lp1:");
1385: 1377 0002FC2A _pipe14_9_lp1:
1386: 1378 0002FC2A # asm("moval _pointer_data,_sgl_value_9");/* get store data's addr */
1387: 1379 0002FC2A ed effffff40c effffff407 moval _pointer_data,_sgl_value_9
1388: 1380 0002FC35 # sgl_value_9 -= 8;
1389: 1381 0002FC35 2c 08 effffff400 subl2 $8,_sgl_value_9
1390: 1382 0002FC3C # asm("movl _sgl_value_2,*_sgl_value_9"); /* set operand #1's LSW */
1391: 1383 0002FC3C 0d effffff3fa fffffff3f5 movl _sgl_value_2,*_sgl_value_9
1392: 1384 0002FC47 # sgl_value_9 -= 4;
1393: 1385 0002FC47 2c 04 effffff3ee subl2 $4,_sgl_value_9
1394: 1386 0002FC4E # asm("movl _sgl_value_1,*_sgl_value_9"); /* set operand #1's MSW */
1395: 1387 0002FC4E 0d effffff3e8 fffffff3e3 movl _sgl_value_1,*_sgl_value_9
1396: 1388 0002FC59 # sgl_value_9 -= 4;
1397: 1389 0002FC59 2c 04 effffff3dc subl2 $4,_sgl_value_9
1398: 1390 0002FC60 # asm("movl _sgl_value_4,*_sgl_value_9"); /* set operand #2's LSW */
1399: 1391 0002FC60 0d effffff3d6 fffffff3d1 movl _sgl_value_4,*_sgl_value_9
1400: 1392 0002FC6B # sgl_value_9 -= 4;
1401: 1393 0002FC6B 2c 04 effffff3ca subl2 $4,_sgl_value_9
1402: 1394 0002FC72 # asm("movl _sgl_value_3,*_sgl_value_9"); /* set operand #2's MSW */
1403: 1395 0002FC72 0d effffff3c4 fffffff3bf movl _sgl_value_3,*_sgl_value_9
1404: 1396 0002FC7D # sgl_value_9 -= 4;
1405: 1397 0002FC7D 2c 04 effffff3b8 subl2 $4,_sgl_value_9
1406: 1398 0002FC84 # asm("movl _sgl_value_8,*_sgl_value_9"); /* set '1.0' data's LSW */
1407: 1399 0002FC84 0d effffff3b2 fffffff3ad movl _sgl_value_8,*_sgl_value_9
1408: 1400 0002FC8F # sgl_value_9 -= 4;
1409: 1401 0002FC8F 2c 04 effffff3a6 subl2 $4,_sgl_value_9
1410: 1402 0002FC96 # asm("movl _sgl_value_7,*_sgl_value_9"); /* set '1.0' data's MSW */
1411: 1403 0002FC96 0d effffff3a0 fffffff39b movl _sgl_value_7,*_sgl_value_9
1412: 1404 0002FCA1 # sgl_value_9 -= 4;
1413: 1405 0002FCA1 2c 04 effffff394 subl2 $4,_sgl_value_9
1414: 1406 0002FCA8 # asm("movl _sgl_value_8,*_sgl_value_9"); /* set '0.0' data's LSW */
1415: 1407 0002FCA8 0d effffff38e fffffff389 movl _sgl_value_8,*_sgl_value_9
1416: 1408 0002FCB3 # sgl_value_9 -= 4;
1417: 1409 0002FCB3 2c 04 effffff382 subl2 $4,_sgl_value_9
1418: 1410 0002FCBA # asm("movl _sgl_value_8,*_sgl_value_9"); /* set '0.0' data's MSW */
1419: 1411 0002FCBA 0d effffff37c fffffff377 movl _sgl_value_8,*_sgl_value_9
1420: 1412 0002FCC5 # sgl_value_9 -= 8; /* get FRAME PTR's value */
1421: 1413 0002FCC5 2c 08 effffff370 subl2 $8,_sgl_value_9
1422: 1414 0002FCCC # asm("movl _sgl_value_9,r13"); /* set the FRAME POINTER */
1423: 1415 0002FCCC 0d effffff36a 5d movl _sgl_value_9,r13
1424: 1416 0002FCD3 # asm("movl $1,r2"); /* r2 index = 1 quadwords */
1425: 1417 0002FCD3 0d 01 52 movl $1,r2
1426: 1418 0002FCD6 # asm("movl $2,r3"); /* r3 index = 2 quadwords */
1427: 1419 0002FCD6 0d 02 53 movl $2,r3
1428: 1420 0002FCD9 # asm("movl $3,r4"); /* r4 index = 3 quadwords */
1429: 1421 0002FCD9 0d 03 54 movl $3,r4
1430: 1422 0002FCDC # asm("movl $4,r5"); /* r5 index = 4 quadwords */
1431: 1423 0002FCDC 0d 04 55 movl $4,r5
1432: 1424 0002FCDF # asm("movl $5,r6"); /* r6 index = 5 quadwords */
1433: 1425 0002FCDF 0d 05 56 movl $5,r6
1434: 1426 0002FCE2 # asm("ldd (r13)[r2]"); /* load a '0.0' ( 0 ) */
1435: 1427 0002FCE2 07 426d ldd (r13)[r2]
1436: 1428 0002FCE5 # asm("addd (r13)[r5]"); /* add op. #1 ( op1 ) */
1437: 1429 0002FCE5 c7 456d addd (r13)[r5]
1438: 1430 0002FCE8 # asm("divd (r13)[r4]"); /* divide by op. #2 ( exp ) */
1439: 1431 0002FCE8 f7 446d divd (r13)[r4]
1440: 1432 0002FCEB # asm("muld (r13)[r3]"); /* multiply by '1.0' ( exp ) */
1441: 1433 0002FCEB e7 436d muld (r13)[r3]
1442: 1434 0002FCEE # asm("std (r13)[r6]"); /* store the result ( exp ) */
1443: 1435 0002FCEE 27 466d std (r13)[r6]
1444: 1436 0002FCF1 # if( force_loop )
1445: 1437 0002FCF1 5d effffff345 tstl _force_loop
1446: 1438 0002FCF7 31 03 jeql L344
1447: 1439 0002FCF9 # asm("brw _pipe14_9_lp1");; /* run the loop again */
1448: 1440 0002FCF9 13 ff2e brw _pipe14_9_lp1
1449: 1441 0002FCFC L344:
1450: 1442 0002FCFC # /*
1451: 1443 0002FCFC # * verify the results
1452: 1444 0002FCFC # */
1453: 1445 0002FCFC # asm("moval (r13),_sgl_value_10"); /* save the frame pointer */
1454: 1446 0002FCFC ed 6d effffff339 moval (r13),_sgl_value_10
1455: 1447 0002FD03 # asm("movl _pointer_data,_sgl_value_6"); /* save the LSW stored */
1456: 1448 0002FD03 0d effffff333 effffff32e movl _pointer_data,_sgl_value_6
1457: 1449 0002FD0E # asm("movl _pointer_data-4,_sgl_value_5"); /* and the MSW */
1458: 1450 0002FD0E 0d effffff324 effffff323 movl _pointer_data-4,_sgl_value_5
1459: 1451 0002FD19 # if( (sgl_value_5 != dbl_expected.m) || /* verify the result... */
1460: 1452 0002FD19 # (sgl_value_6 != dbl_expected.l) || /* verify the result... */
1461: 1453 0002FD19 # (sgl_value_10 != sgl_value_9) ) /* ... and the final FP */
1462: 1454 0002FD19 1d effffff31d effffff318 cmpl _sgl_value_5,_dbl_expected
1463: 1455 0002FD24 21 1d jneq L9991
1464: 1456 0002FD26 1d effffff310 effffff30f cmpl _sgl_value_6,_dbl_expected+4
1465: 1457 0002FD31 21 10 jneq L9991
1466: 1458 0002FD33 1d effffff303 effffff2fe cmpl _sgl_value_10,_sgl_value_9
1467: 1459 0002FD3E 21 03 13 0091 jeql L345
1468: 1460 0002FD43 L9991:
1469: 1461 0002FD43 # {
1470: 1462 0002FD43 # asm("movl _pre_event_fp,r13"); /* restore frame pointer */
1471: 1463 0002FD43 0d effffff2f3 5d movl _pre_event_fp,r13
1472: 1464 0002FD4A # asm("movl _pre_event_sp,r14"); /* restore stack pointer */
1473: 1465 0002FD4A 0d effffff2ec 5e movl _pre_event_sp,r14
1474: 1466 0002FD51 # errcnt++; /* bump the error count */
1475: 1467 0002FD51 6d effffff2e5 incl _errcnt
1476: 1468 0002FD57 # if ( prt_error ) {
1477: 1469 0002FD57 5d effffff2df tstl _prt_error
1478: 1470 0002FD5D 31 4e jeql L346
1479: 1471 0002FD5F # print_pipe14_er("indexed FP addressing.\n");
1480: 1472 0002FD5F .data 1
1481: 1473 00001081 * L347:
1482: 1474 00001081 * 696E646578656420465020616 .ascii "indexed FP addressing.\12\0"
1483: 46472657373696E672E0A00
1484: 1475 00001099 * .text
1485: 1476 0002FD5F dd 8f00001081 pushl $L347
1486: 1477 0002FD65 fe 08 ef00000094 callf $8,_print_pipe14_er
1487: 1478 0002FD6C # writes("final Frame Pointer = ");
1488: 1479 0002FD6C .data 1
1489: 1480 00001099 * L348:
1490: 1481 00001099 * 66696E616C204672616D65205 .ascii "final Frame Pointer = \0"
1491: 06F696E746572203D2000
1492: 1482 000010b0 * .text
1493: 1483 0002FD6C dd 8f00001099 pushl $L348
1494: 1484 0002FD72 fe 08 effffff2c3 callf $8,_writes
1495: 1485 0002FD79 # write32h( sgl_value_10 );
1496: 1486 0002FD79 dd effffff2bd pushl _sgl_value_10
1497: 1487 0002FD7F fe 08 effffff2b6 callf $8,_write32h
1498: 1488 0002FD86 # writes(", expected FP = ");
1499: 1489 0002FD86 .data 1
1500: 1490 000010b0 * L350:
1501: 1491 000010b0 * 2C20206578706563746564204 .ascii ", expected FP = \0"
1502: 650203D2000
1503: 1492 000010c2 * .text
1504: 1493 0002FD86 dd 8f000010b0 pushl $L350
1505: 1494 0002FD8C fe 08 effffff2a9 callf $8,_writes
1506: 1495 0002FD93 # write32h( sgl_value_9 );
1507: 1496 0002FD93 dd effffff2a3 pushl _sgl_value_9
1508: 1497 0002FD99 fe 08 effffff29c callf $8,_write32h
1509: 1498 0002FDA0 # writes(" \n");
1510: 1499 0002FDA0 .data 1
1511: 1500 000010c2 * L351:
1512: 1501 000010c2 * 200A00 .ascii " \12\0"
1513: 1502 000010c5 * .text
1514: 1503 0002FDA0 dd 8f000010c2 pushl $L351
1515: 1504 0002FDA6 fe 08 effffff28f callf $8,_writes
1516: 1505 0002FDAD # }
1517: 1506 0002FDAD # if ( halt_flg )
1518: 1507 0002FDAD L346:
1519: 1508 0002FDAD 5d effffff289 tstl _halt_flg
1520: 1509 0002FDB3 31 0d jeql L352
1521: 1510 0002FDB5 # pipe14_er_hlt( subtest );
1522: 1511 0002FDB5 dd effffff281 pushl _subtest
1523: 1512 0002FDBB fe 08 ef000001bc callf $8,_pipe14_er_hlt
1524: 1513 0002FDC2 # if ( loop_on_err ) {
1525: 1514 0002FDC2 L352:
1526: 1515 0002FDC2 5d effffff274 tstl _loop_on_err
1527: 1516 0002FDC8 31 0a jeql L353
1528: 1517 0002FDCA # force_loop = TRUE; /* set the force loop flag */
1529: 1518 0002FDCA 0d 01 effffff26b movl $1,_force_loop
1530: 1519 0002FDD1 # asm("brw _pipe14_9_lp1"); /* and loop */
1531: 1520 0002FDD1 13 fe56 brw _pipe14_9_lp1
1532: 1521 0002FDD4 # }
1533: 1522 0002FDD4 # } /* end of compare error */
1534: 1523 0002FDD4 L353:
1535: 1524 0002FDD4 # } while( index++ < max_divd_1_index );
1536: 1525 0002FDD4 L345:
1537: 1526 0002FDD4 L342:
1538: 1527 0002FDD4 0d effffff262 50 movl _index,r0
1539: 1528 0002FDDB 6d effffff25b incl _index
1540: 1529 0002FDE1 1d 50 effffff254 cmpl r0,_max_divd_1_index
1541: 1530 0002FDE8 81 03 13 fdc2 jlss L343
1542: 1531 0002FDED L341:
1543: 1532 0002FDED # asm("movl _pre_event_fp,r13"); /* restore the frame pointer */
1544: 1533 0002FDED 0d effffff249 5d movl _pre_event_fp,r13
1545: 1534 0002FDF4 # asm("movl _pre_event_sp,r14"); /* restore the stack pointer */
1546: 1535 0002FDF4 0d effffff242 5e movl _pre_event_sp,r14
1547: 1536 0002FDFB # } /* end of subtest 9 */
1548: 1537 0002FDFB 40 ret#2
1549: 1538 0002FDFC .set L337,0x0
1550: 1539 0002FDFC L339:
1551: 1540 0002FDFC 13 fd96 jbr L340
1552: 1541 0002FDFF .data
1553: 1542 00000fe4 * .text
1554: 1543 0002FDFF 00 .align 1
1555: 1544 0002FE00 .globl _print_pipe14_er
1556: 1545 0002FE00 _print_pipe14_er:
1557: 1546 0002FE00 0000 .word L354
1558: 1547 0002FE02 #
1559: 1548 0002FE02 #
1560: 1549 0002FE02 # /******************************************************************************
1561: 1550 0002FE02 # *
1562: 1551 0002FE02 # * ERROR ROUTINE
1563: 1552 0002FE02 # *
1564: 1553 0002FE02 # * print an error in the following form
1565: 1554 0002FE02 # *
1566: 1555 0002FE02 # *operand 1 = xxxxxxxx xxxxxxxx, final Acc = xxxxxxxx xxxxxxxx, index = dd
1567: 1556 0002FE02 # *operand 2 = xxxxxxxx xxxxxxxx, expected Acc = xxxxxxxx xxxxxxxx
1568: 1557 0002FE02 # *
1569: 1558 0002FE02 # ******************************************************************************/
1570: 1559 0002FE02 # print_pipe14_er(msg)
1571: 1560 0002FE02 # char *msg;
1572: 1561 0002FE02 # {
1573: 1562 0002FE02 13 0175 jbr L356
1574: 1563 0002FE05 L357:
1575: 1564 0002FE05 # writes(" \n"); /* start a new print line */
1576: 1565 0002FE05 .data 1
1577: 1566 000010c5 * L358:
1578: 1567 000010c5 * 200A00 .ascii " \12\0"
1579: 1568 000010c8 * .text
1580: 1569 0002FE05 dd 8f000010c5 pushl $L358
1581: 1570 0002FE0B fe 08 effffff22a callf $8,_writes
1582: 1571 0002FE12 # writes("cycle: ");
1583: 1572 0002FE12 .data 1
1584: 1573 000010c8 * L359:
1585: 1574 000010c8 * 6379636C653A2000 .ascii "cycle: \0"
1586: 1575 000010d0 * .text
1587: 1576 0002FE12 dd 8f000010c8 pushl $L359
1588: 1577 0002FE18 fe 08 effffff21d callf $8,_writes
1589: 1578 0002FE1F # writed( cycle );
1590: 1579 0002FE1F dd effffff217 pushl _cycle
1591: 1580 0002FE25 fe 08 effffff210 callf $8,_writed
1592: 1581 0002FE2C # writes(" test ");
1593: 1582 0002FE2C .data 1
1594: 1583 000010d0 * L361:
1595: 1584 000010d0 * 20746573742000 .ascii " test \0"
1596: 1585 000010d7 * .text
1597: 1586 0002FE2C dd 8f000010d0 pushl $L361
1598: 1587 0002FE32 fe 08 effffff203 callf $8,_writes
1599: 1588 0002FE39 # writed( test_no );
1600: 1589 0002FE39 dd effffff1fd pushl _test_no
1601: 1590 0002FE3F fe 08 effffff1f6 callf $8,_writed
1602: 1591 0002FE46 # writes(" (Pipe 14), subtest ");
1603: 1592 0002FE46 .data 1
1604: 1593 000010d7 * L362:
1605: 1594 000010d7 * 20202850697065203134292C2 .ascii " (Pipe 14), subtest \0"
1606: 0737562746573742000
1607: 1595 000010ed * .text
1608: 1596 0002FE46 dd 8f000010d7 pushl $L362
1609: 1597 0002FE4C fe 08 effffff1e9 callf $8,_writes
1610: 1598 0002FE53 # writed( subtest );
1611: 1599 0002FE53 dd effffff1e3 pushl _subtest
1612: 1600 0002FE59 fe 08 effffff1dc callf $8,_writed
1613: 1601 0002FE60 # writes(" error - ");
1614: 1602 0002FE60 .data 1
1615: 1603 000010ed * L363:
1616: 1604 000010ed * 206572726F72202D2000 .ascii " error - \0"
1617: 1605 000010f7 * .text
1618: 1606 0002FE60 dd 8f000010ed pushl $L363
1619: 1607 0002FE66 fe 08 effffff1cf callf $8,_writes
1620: 1608 0002FE6D # writes( msg );
1621: 1609 0002FE6D dd ad04 pushl 4(fp)
1622: 1610 0002FE70 fe 08 effffff1c5 callf $8,_writes
1623: 1611 0002FE77 # writec('\n');
1624: 1612 0002FE77 dd 0a pushl $10
1625: 1613 0002FE79 fe 08 effffff1bc callf $8,_writec
1626: 1614 0002FE80 # writes(" LDD(0.0) ADDD(op1) DIVD(op2) MULD(1.0) STD\n");
1627: 1615 0002FE80 .data 1
1628: 1616 000010f7 * L365:
1629: 1617 000010f7 * 204C444428302E30292020414 .ascii " LDD(0.0) ADDD(op1) DIVD(op2) MULD(1.0) STD\12\0"
1630: 44444286F7031292020444956
1631: 44286F70322920204D554C442
1632: 8312E302920205354440A00
1633: 1618 00001128 * .text
1634: 1619 0002FE80 dd 8f000010f7 pushl $L365
1635: 1620 0002FE86 fe 08 effffff1af callf $8,_writes
1636: 1621 0002FE8D # writes("operand 1 = ");
1637: 1622 0002FE8D .data 1
1638: 1623 00001128 * L366:
1639: 1624 00001128 * 6F706572616E642031203D200 .ascii "operand 1 = \0"
1640: 0
1641: 1625 00001135 * .text
1642: 1626 0002FE8D dd 8f00001128 pushl $L366
1643: 1627 0002FE93 fe 08 effffff1a2 callf $8,_writes
1644: 1628 0002FE9A # write32h( sgl_value_1 );
1645: 1629 0002FE9A dd effffff19c pushl _sgl_value_1
1646: 1630 0002FEA0 fe 08 effffff195 callf $8,_write32h
1647: 1631 0002FEA7 # writec(' ');
1648: 1632 0002FEA7 dd 20 pushl $32
1649: 1633 0002FEA9 fe 08 effffff18c callf $8,_writec
1650: 1634 0002FEB0 # write32h( sgl_value_2 );
1651: 1635 0002FEB0 dd effffff186 pushl _sgl_value_2
1652: 1636 0002FEB6 fe 08 effffff17f callf $8,_write32h
1653: 1637 0002FEBD # writes(", final Acc = ");
1654: 1638 0002FEBD .data 1
1655: 1639 00001135 * L367:
1656: 1640 00001135 * 2C2020202066696E616C20416 .ascii ", final Acc = \0"
1657: 363203D2000
1658: 1641 00001147 * .text
1659: 1642 0002FEBD dd 8f00001135 pushl $L367
1660: 1643 0002FEC3 fe 08 effffff172 callf $8,_writes
1661: 1644 0002FECA # write32h( dbl_st_acc.m );
1662: 1645 0002FECA dd effffff16c pushl _dbl_st_acc
1663: 1646 0002FED0 fe 08 effffff165 callf $8,_write32h
1664: 1647 0002FED7 # writec(' ');
1665: 1648 0002FED7 dd 20 pushl $32
1666: 1649 0002FED9 fe 08 effffff15c callf $8,_writec
1667: 1650 0002FEE0 # write32h( dbl_st_acc.l );
1668: 1651 0002FEE0 dd effffff15a pushl _dbl_st_acc+4
1669: 1652 0002FEE6 fe 08 effffff14f callf $8,_write32h
1670: 1653 0002FEED # writes(", index = ");
1671: 1654 0002FEED .data 1
1672: 1655 00001147 * L368:
1673: 1656 00001147 * 2C202020696E646578203D200 .ascii ", index = \0"
1674: 0
1675: 1657 00001154 * .text
1676: 1658 0002FEED dd 8f00001147 pushl $L368
1677: 1659 0002FEF3 fe 08 effffff142 callf $8,_writes
1678: 1660 0002FEFA # writed( index );
1679: 1661 0002FEFA dd effffff13c pushl _index
1680: 1662 0002FF00 fe 08 effffff135 callf $8,_writed
1681: 1663 0002FF07 # writec('\n');
1682: 1664 0002FF07 dd 0a pushl $10
1683: 1665 0002FF09 fe 08 effffff12c callf $8,_writec
1684: 1666 0002FF10 # writes("operand 2 = ");
1685: 1667 0002FF10 .data 1
1686: 1668 00001154 * L369:
1687: 1669 00001154 * 6F706572616E642032203D200 .ascii "operand 2 = \0"
1688: 0
1689: 1670 00001161 * .text
1690: 1671 0002FF10 dd 8f00001154 pushl $L369
1691: 1672 0002FF16 fe 08 effffff11f callf $8,_writes
1692: 1673 0002FF1D # write32h( sgl_value_3 );
1693: 1674 0002FF1D dd effffff119 pushl _sgl_value_3
1694: 1675 0002FF23 fe 08 effffff112 callf $8,_write32h
1695: 1676 0002FF2A # writec(' ');
1696: 1677 0002FF2A dd 20 pushl $32
1697: 1678 0002FF2C fe 08 effffff109 callf $8,_writec
1698: 1679 0002FF33 # write32h( sgl_value_4 );
1699: 1680 0002FF33 dd effffff103 pushl _sgl_value_4
1700: 1681 0002FF39 fe 08 effffff0fc callf $8,_write32h
1701: 1682 0002FF40 # writes(", expected Acc = ");
1702: 1683 0002FF40 .data 1
1703: 1684 00001161 * L370:
1704: 1685 00001161 * 2C20657870656374656420416 .ascii ", expected Acc = \0"
1705: 363203D2000
1706: 1686 00001173 * .text
1707: 1687 0002FF40 dd 8f00001161 pushl $L370
1708: 1688 0002FF46 fe 08 effffff0ef callf $8,_writes
1709: 1689 0002FF4D # write32h( dbl_expected.m );
1710: 1690 0002FF4D dd effffff0e9 pushl _dbl_expected
1711: 1691 0002FF53 fe 08 effffff0e2 callf $8,_write32h
1712: 1692 0002FF5A # writec(' ');
1713: 1693 0002FF5A dd 20 pushl $32
1714: 1694 0002FF5C fe 08 effffff0d9 callf $8,_writec
1715: 1695 0002FF63 # write32h( dbl_expected.l );
1716: 1696 0002FF63 dd effffff0d7 pushl _dbl_expected+4
1717: 1697 0002FF69 fe 08 effffff0cc callf $8,_write32h
1718: 1698 0002FF70 # writec('\n');
1719: 1699 0002FF70 dd 0a pushl $10
1720: 1700 0002FF72 fe 08 effffff0c3 callf $8,_writec
1721: 1701 0002FF79 # }
1722: 1702 0002FF79 40 ret#2
1723: 1703 0002FF7A .set L354,0x0
1724: 1704 0002FF7A L356:
1725: 1705 0002FF7A 13 fe88 jbr L357
1726: 1706 0002FF7D .data
1727: 1707 00000fe4 * .text
1728: 1708 0002FF7D 00 .align 1
1729: 1709 0002FF7E .globl _pipe14_er_hlt
1730: 1710 0002FF7E _pipe14_er_hlt:
1731: 1711 0002FF7E 0000 .word L371
1732: 1712 0002FF80 #
1733: 1713 0002FF80 #
1734: 1714 0002FF80 #
1735: 1715 0002FF80 #
1736: 1716 0002FF80 #
1737: 1717 0002FF80 # /******************************************************************************
1738: 1718 0002FF80 # *
1739: 1719 0002FF80 # * HALT ON ERROR ROUTINE
1740: 1720 0002FF80 # *
1741: 1721 0002FF80 # * halt with the necessary information saved in the registers
1742: 1722 0002FF80 # *
1743: 1723 0002FF80 # ******************************************************************************/
1744: 1724 0002FF80 # pipe14_er_hlt( subtest )
1745: 1725 0002FF80 # int subtest;
1746: 1726 0002FF80 # {
1747: 1727 0002FF80 13 0099 jbr L373
1748: 1728 0002FF83 L374:
1749: 1729 0002FF83 # sgl_value_5 = dbl_st_acc.m;
1750: 1730 0002FF83 0d effffff0b3 effffff0ae movl _dbl_st_acc,_sgl_value_5
1751: 1731 0002FF8E # sgl_value_6 = dbl_st_acc.l;
1752: 1732 0002FF8E 0d effffff0ac effffff0a3 movl _dbl_st_acc+4,_sgl_value_6
1753: 1733 0002FF99 # sgl_value_7 = dbl_expected.m;
1754: 1734 0002FF99 0d effffff09d effffff098 movl _dbl_expected,_sgl_value_7
1755: 1735 0002FFA4 # sgl_value_8 = dbl_expected.l;
1756: 1736 0002FFA4 0d effffff096 effffff08d movl _dbl_expected+4,_sgl_value_8
1757: 1737 0002FFAF # asm("movl _test_no,r0"); /* r0 = test number */
1758: 1738 0002FFAF 0d effffff087 50 movl _test_no,r0
1759: 1739 0002FFB6 # asm("movl _subtest,r1"); /* r1 = subtest number */
1760: 1740 0002FFB6 0d effffff080 51 movl _subtest,r1
1761: 1741 0002FFBD # asm("movl $1,r2"); /* r2 = error code */
1762: 1742 0002FFBD 0d 01 52 movl $1,r2
1763: 1743 0002FFC0 # asm("movl _cycle,r3"); /* r3 = cycle count */
1764: 1744 0002FFC0 0d effffff076 53 movl _cycle,r3
1765: 1745 0002FFC7 # asm("movl _sgl_value_1,r4"); /* r4 = MSW operand one */
1766: 1746 0002FFC7 0d effffff06f 54 movl _sgl_value_1,r4
1767: 1747 0002FFCE # asm("movl _sgl_value_2,r5"); /* r5 = LSW operand one */
1768: 1748 0002FFCE 0d effffff068 55 movl _sgl_value_2,r5
1769: 1749 0002FFD5 # asm("movl _sgl_value_3,r6"); /* r6 = MSW operand two */
1770: 1750 0002FFD5 0d effffff061 56 movl _sgl_value_3,r6
1771: 1751 0002FFDC # asm("movl _sgl_value_4,r7"); /* r7 = LSW operand two */
1772: 1752 0002FFDC 0d effffff05a 57 movl _sgl_value_4,r7
1773: 1753 0002FFE3 # asm("movl _sgl_value_5,r8"); /* r8 = MSW operand stored */
1774: 1754 0002FFE3 0d effffff053 58 movl _sgl_value_5,r8
1775: 1755 0002FFEA # asm("movl _sgl_value_6,r9"); /* r9 = LSW operand stored */
1776: 1756 0002FFEA 0d effffff04c 59 movl _sgl_value_6,r9
1777: 1757 0002FFF1 # asm("movl _sgl_value_7,r10"); /* r10 = MSW operand exp */
1778: 1758 0002FFF1 0d effffff045 5a movl _sgl_value_7,r10
1779: 1759 0002FFF8 # asm("movl _sgl_value_8,r11"); /* r11 = LSW operand exp */
1780: 1760 0002FFF8 0d effffff03e 5b movl _sgl_value_8,r11
1781: 1761 0002FFFF # asm("movl _index,r12"); /* r12 = data index */
1782: 1762 0002FFFF 0d effffff037 5c movl _index,r12
1783: 1763 00030006 # if( subtest == 9 ) {
1784: 1764 00030006 1d ad04 09 cmpl 4(fp),$9
1785: 1765 0003000A 21 0e jneq L375
1786: 1766 0003000C # asm("movl _sgl_value_10,r13"); /* r13 = final FP value */
1787: 1767 0003000C 0d effffff02a 5d movl _sgl_value_10,r13
1788: 1768 00030013 # asm("movl _sgl_value_9,r14"); /* r14 = expected FP value */
1789: 1769 00030013 0d effffff023 5e movl _sgl_value_9,r14
1790: 1770 0003001A # };
1791: 1771 0003001A L375:
1792: 1772 0003001A # asm(".globl _pipe14_1_hlt");
1793: 1773 0003001A .globl _pipe14_1_hlt
1794: 1774 0003001A # asm("_pipe14_1_hlt:"); /* PC after the halt */
1795: 1775 0003001A _pipe14_1_hlt:
1796: 1776 0003001A # asm("halt"); /* HALT ... */
1797: 1777 0003001A 00 halt
1798: 1778 0003001B # } /* end of halt on error */
1799: 1779 0003001B 40 ret#2
1800: 1780 0003001C .set L371,0x0
1801: 1781 0003001C L373:
1802: 1782 0003001C 13 ff64 jbr L374
1803: 1783 0003001F .data
1804: 1783 0005F05B .data
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