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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
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1.1 ! root 1: 1 00000000 LL0: ! 2: 2 00000000 .data ! 3: 3 00001010 * .text ! 4: 4 00000000 .align 1 ! 5: 5 00000000 .globl _pipe_15 ! 6: 6 00000000 _pipe_15: ! 7: 7 00030020 0000 .word L215 ! 8: 8 00030022 # #include "fpp_defs.h" ! 9: 9 00030022 # ! 10: 10 00030022 # ! 11: 11 00030022 # /***************************************************************************** ! 12: 12 00030022 # * ! 13: 13 00030022 # * DBL PIPELINE TEST #15 MONITOR ! 14: 14 00030022 # * ! 15: 15 00030022 # * This test will do: ! 16: 16 00030022 # * ! 17: 17 00030022 # * LDD(1) MULD(op1) DIVD(op2) DIVD(1) ADDD(0) STD ! 18: 18 00030022 # * ! 19: 19 00030022 # * where 'op1' and 'op2' are the DIVD data patterns. ! 20: 20 00030022 # *****************************************************************************/ ! 21: 21 00030022 # pipe_15() ! 22: 22 00030022 # { ! 23: 23 00030022 13 009b jbr L217 ! 24: 24 00030025 L218: ! 25: 25 00030025 # asm(".globl _pipeline_15_t"); ! 26: 26 00030025 .globl _pipeline_15_t ! 27: 27 00030025 # asm("_pipeline_15_t:"); /* entry address */ ! 28: 28 00030025 _pipeline_15_t: ! 29: 29 00030025 # if( (cycle == 1) && (prt_hdrs) ) /* print headers on 1st cycle */ ! 30: 30 00030025 1d effffffff5 01 cmpl _cycle,$1 ! 31: 31 0003002C 21 15 jneq L219 ! 32: 32 0003002E 5d efffffffec tstl _prt_hdrs ! 33: 33 00030034 31 0d jeql L219 ! 34: 34 00030036 # { ! 35: 35 00030036 # writes("\n PIPE_15"); ! 36: 36 00030036 .data 1 ! 37: 37 00001010 * L221: ! 38: 38 00001010 * 0A20504950455F313500 .ascii "\12 PIPE_15\0" ! 39: 39 0000101a * .text ! 40: 40 00030036 dd 8f00001010 pushl $L221 ! 41: 41 0003003C fe 08 efffffffdd callf $8,_writes ! 42: 42 00030043 # } ! 43: 43 00030043 # subtest = 1; ! 44: 44 00030043 L219: ! 45: 45 00030043 0d 01 efffffffd6 movl $1,_subtest ! 46: 46 0003004A # pipe15_1(); /* data in REGs, no NOPs */ ! 47: 47 0003004A fe 04 ef00000073 callf $4,_pipe15_1 ! 48: 48 00030051 # subtest++; /* increment subtest num */ ! 49: 49 00030051 6d efffffffc9 incl _subtest ! 50: 50 00030057 # pipe15_2(); /* data in REGs, 1 NOP */ ! 51: 51 00030057 fe 04 ef000001de callf $4,_pipe15_2 ! 52: 52 0003005E # subtest++; /* increment subtest num */ ! 53: 53 0003005E 6d efffffffbc incl _subtest ! 54: 54 00030064 # pipe15_3(); /* data in REGs, 2 NOPs */ ! 55: 55 00030064 fe 04 ef0000034d callf $4,_pipe15_3 ! 56: 56 0003006B # subtest++; /* increment subtest num */ ! 57: 57 0003006B 6d efffffffaf incl _subtest ! 58: 58 00030071 # pipe15_4(); /* data in REGs, 3 NOPs */ ! 59: 59 00030071 fe 04 ef000004c2 callf $4,_pipe15_4 ! 60: 60 00030078 # subtest++; /* increment subtest num */ ! 61: 61 00030078 6d efffffffa2 incl _subtest ! 62: 62 0003007E # pipe15_5(); /* data in CACHE, no NOPs */ ! 63: 63 0003007E fe 04 ef0000063b callf $4,_pipe15_5 ! 64: 64 00030085 # subtest++; /* increment subtest num */ ! 65: 65 00030085 6d efffffff95 incl _subtest ! 66: 66 0003008B # pipe15_6(); /* data in CACHE, 1 NOP */ ! 67: 67 0003008B fe 04 ef0000075e callf $4,_pipe15_6 ! 68: 68 00030092 # subtest++; /* increment subtest num */ ! 69: 69 00030092 6d efffffff88 incl _subtest ! 70: 70 00030098 # pipe15_7(); /* data in CACHE, 2 NOPs */ ! 71: 71 00030098 fe 04 ef00000885 callf $4,_pipe15_7 ! 72: 72 0003009F # subtest++; /* increment subtest num */ ! 73: 73 0003009F 6d efffffff7b incl _subtest ! 74: 74 000300A5 # pipe15_8(); /* data in CACHE, 3 NOPs */ ! 75: 75 000300A5 fe 04 ef000009b2 callf $4,_pipe15_8 ! 76: 76 000300AC # subtest++; /* increment subtest num */ ! 77: 77 000300AC 6d efffffff6e incl _subtest ! 78: 78 000300B2 # pipe15_9(); /* data via F.P. 0 NOPs */ ! 79: 79 000300B2 fe 04 ef00000ae3 callf $4,_pipe15_9 ! 80: 80 000300B9 # asm("jmp *return"); /* return to the test monitor */ ! 81: 81 000300B9 71 ffffffff61 jmp *return ! 82: 82 000300BF # } ! 83: 83 000300BF 40 ret#2 ! 84: 84 000300C0 .set L215,0x0 ! 85: 85 000300C0 L217: ! 86: 86 000300C0 13 ff62 jbr L218 ! 87: 87 000300C3 .data ! 88: 88 00001010 * .text ! 89: 89 000300C3 00 .align 1 ! 90: 90 000300C4 .globl _pipe15_1 ! 91: 91 000300C4 _pipe15_1: ! 92: 92 000300C4 0000 .word L231 ! 93: 93 000300C6 # ! 94: 94 000300C6 # ! 95: 95 000300C6 # ! 96: 96 000300C6 # ! 97: 97 000300C6 # ! 98: 98 000300C6 # ! 99: 99 000300C6 # ! 100: 100 000300C6 # ! 101: 101 000300C6 # /************************************************************************ ! 102: 102 000300C6 # * ! 103: 103 000300C6 # * SUBTEST 1 ! 104: 104 000300C6 # * data in registers, no NO-OPs ! 105: 105 000300C6 # * ! 106: 106 000300C6 # ************************************************************************/ ! 107: 107 000300C6 # pipe15_1() ! 108: 108 000300C6 # { ! 109: 109 000300C6 13 016f jbr L233 ! 110: 110 000300C9 L234: ! 111: 111 000300C9 # force_loop = FALSE; /* clear the force_loop flg */ ! 112: 112 000300C9 4d efffffff51 clrl _force_loop ! 113: 113 000300CF # index = 0; ! 114: 114 000300CF 4d efffffff4b clrl _index ! 115: 115 000300D5 # do ! 116: 116 000300D5 L237: ! 117: 117 000300D5 # { ! 118: 118 000300D5 # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */ ! 119: 119 000300D5 5c 18 efffffff44 50 mull3 $24,_index,r0 ! 120: 120 000300DD 0d e000000000 efffffff38 movl _divd_1_data(r0),_sgl_value_1 ! 121: 121 000300E8 # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */ ! 122: 122 000300E8 5c 18 efffffff31 50 mull3 $24,_index,r0 ! 123: 123 000300F0 0d e000000004 efffffff25 movl _divd_1_data+4(r0),_sgl_value_2 ! 124: 124 000300FB # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */ ! 125: 125 000300FB 5c 18 efffffff1e 50 mull3 $24,_index,r0 ! 126: 126 00030103 0d e000000008 efffffff12 movl _divd_1_data+8(r0),_sgl_value_3 ! 127: 127 0003010E # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */ ! 128: 128 0003010E 5c 18 efffffff0b 50 mull3 $24,_index,r0 ! 129: 129 00030116 0d e00000000c effffffeff movl _divd_1_data+12(r0),_sgl_value_4 ! 130: 130 00030121 # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */ ! 131: 131 00030121 0d 8f40800000 effffffef4 movl $1082130432,_sgl_value_7 ! 132: 132 0003012C # sgl_value_8 = 0; ! 133: 133 0003012C 4d effffffeee clrl _sgl_value_8 ! 134: 134 00030132 # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 135: 135 00030132 5c 18 effffffee7 50 mull3 $24,_index,r0 ! 136: 136 0003013A 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 137: 137 00030141 0d a004 effffffedb movl 4(r0),_dbl_expected+4 ! 138: 138 00030149 0d 60 effffffed0 movl (r0),_dbl_expected ! 139: 139 00030150 # /* ! 140: 140 00030150 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 141: 141 00030150 # * The force loop flag is set after the first error. ! 142: 142 00030150 # */ ! 143: 143 00030150 # asm("_pipe15_1_lp1:"); ! 144: 144 00030150 _pipe15_1_lp1: ! 145: 145 00030150 # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */ ! 146: 146 00030150 0d effffffeca 50 movl _sgl_value_1,r0 ! 147: 147 00030157 # asm("movl _sgl_value_2,r1"); ! 148: 148 00030157 0d effffffec3 51 movl _sgl_value_2,r1 ! 149: 149 0003015E # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */ ! 150: 150 0003015E 0d effffffebc 52 movl _sgl_value_3,r2 ! 151: 151 00030165 # asm("movl _sgl_value_4,r3"); ! 152: 152 00030165 0d effffffeb5 53 movl _sgl_value_4,r3 ! 153: 153 0003016C # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */ ! 154: 154 0003016C 0d effffffeae 54 movl _sgl_value_7,r4 ! 155: 155 00030173 # asm("movl _sgl_value_8,r5"); ! 156: 156 00030173 0d effffffea7 55 movl _sgl_value_8,r5 ! 157: 157 0003017A # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */ ! 158: 158 0003017A 0d effffffea0 58 movl _sgl_value_8,r8 ! 159: 159 00030181 # asm("movl _sgl_value_8,r9"); ! 160: 160 00030181 0d effffffe99 59 movl _sgl_value_8,r9 ! 161: 161 00030188 # asm("ldd r4"); /* load a '1.0' ( 1 ) */ ! 162: 162 00030188 07 54 ldd r4 ! 163: 163 0003018A # asm("muld r0"); /* mult by op. 1 ( op1 ) */ ! 164: 164 0003018A e7 50 muld r0 ! 165: 165 0003018C # asm("divd r2"); /* div by operand 2 ( exp ) */ ! 166: 166 0003018C f7 52 divd r2 ! 167: 167 0003018E # asm("divd r4"); /* divide by '1.0' ( exp ) */ ! 168: 168 0003018E f7 54 divd r4 ! 169: 169 00030190 # asm("addd r8"); /* add '0.0' ( exp ) */ ! 170: 170 00030190 c7 58 addd r8 ! 171: 171 00030192 # asm("std r6"); /* store the result ( exp ) */ ! 172: 172 00030192 27 56 std r6 ! 173: 173 00030194 # if( force_loop ) ! 174: 174 00030194 5d effffffe86 tstl _force_loop ! 175: 175 0003019A 31 02 jeql L238 ! 176: 176 0003019C # asm("brb _pipe15_1_lp1");; /* run the loop again */ ! 177: 177 0003019C 11 b2 brb _pipe15_1_lp1 ! 178: 178 0003019E L238: ! 179: 179 0003019E # /* ! 180: 180 0003019E # * verify the results ! 181: 181 0003019E # */ ! 182: 182 0003019E # asm("movl r6,_sgl_value_5"); /* get the result */ ! 183: 183 0003019E 0d 56 effffffe7b movl r6,_sgl_value_5 ! 184: 184 000301A5 # asm("movl r7,_sgl_value_6"); ! 185: 185 000301A5 0d 57 effffffe74 movl r7,_sgl_value_6 ! 186: 186 000301AC # dbl_st_acc.m = sgl_value_5; ! 187: 187 000301AC 0d effffffe6e effffffe69 movl _sgl_value_5,_dbl_st_acc ! 188: 188 000301B7 # dbl_st_acc.l = sgl_value_6; ! 189: 189 000301B7 0d effffffe63 effffffe62 movl _sgl_value_6,_dbl_st_acc+4 ! 190: 190 000301C2 # if( (dbl_st_acc.m != dbl_expected.m) ||/* compare the results */ ! 191: 191 000301C2 # (dbl_st_acc.l != dbl_expected.l) ) ! 192: 192 000301C2 1d effffffe58 effffffe53 cmpl _dbl_st_acc,_dbl_expected ! 193: 193 000301CD 21 0d jneq L9999 ! 194: 194 000301CF 1d effffffe4f effffffe4a cmpl _dbl_st_acc+4,_dbl_expected+4 ! 195: 195 000301DA 31 42 jeql L239 ! 196: 196 000301DC L9999: ! 197: 197 000301DC # { ! 198: 198 000301DC # errcnt++; /* bump the error count */ ! 199: 199 000301DC 6d effffffe3e incl _errcnt ! 200: 200 000301E2 # if ( prt_error ) ! 201: 201 000301E2 5d effffffe38 tstl _prt_error ! 202: 202 000301E8 31 0d jeql L240 ! 203: 203 000301EA # print_pipe15_er("Reg. Data, no NO-OPs"); ! 204: 204 000301EA .data 1 ! 205: 205 0000101a * L242: ! 206: 206 0000101a * 5265672E20446174612C206E6 .ascii "Reg. Data, no NO-OPs\0" ! 207: F204E4F2D4F507300 ! 208: 207 0000102f * .text ! 209: 208 000301EA dd 8f0000101a pushl $L242 ! 210: 209 000301F0 fe 08 ef00000c17 callf $8,_print_pipe15_er ! 211: 210 000301F7 # if ( halt_flg ) /* halt on error? */ ! 212: 211 000301F7 L240: ! 213: 212 000301F7 5d effffffe23 tstl _halt_flg ! 214: 213 000301FD 31 0d jeql L243 ! 215: 214 000301FF # pipe15_er_hlt( subtest ); ! 216: 215 000301FF dd effffffe1b pushl _subtest ! 217: 216 00030205 fe 08 ef00000d80 callf $8,_pipe15_er_hlt ! 218: 217 0003020C # if ( loop_on_err ) { ! 219: 218 0003020C L243: ! 220: 219 0003020C 5d effffffe0e tstl _loop_on_err ! 221: 220 00030212 31 0a jeql L245 ! 222: 221 00030214 # force_loop = TRUE; /* set the force loop flag */ ! 223: 222 00030214 0d 01 effffffe05 movl $1,_force_loop ! 224: 223 0003021B # asm("brw _pipe15_1_lp1"); /* and loop */ ! 225: 224 0003021B 13 ff32 brw _pipe15_1_lp1 ! 226: 225 0003021E # } ! 227: 226 0003021E # } /* end of compare error */ ! 228: 227 0003021E L245: ! 229: 228 0003021E # } while( index++ < max_divd_1_index ); ! 230: 229 0003021E L239: ! 231: 230 0003021E L236: ! 232: 231 0003021E 0d effffffdfc 50 movl _index,r0 ! 233: 232 00030225 6d effffffdf5 incl _index ! 234: 233 0003022B 1d 50 effffffdee cmpl r0,_max_divd_1_index ! 235: 234 00030232 81 03 13 fe9e jlss L237 ! 236: 235 00030237 L235: ! 237: 236 00030237 # } /* end of subtest 1 */ ! 238: 237 00030237 40 ret#2 ! 239: 238 00030238 .set L231,0x0 ! 240: 239 00030238 L233: ! 241: 240 00030238 13 fe8e jbr L234 ! 242: 241 0003023B .data ! 243: 242 00001010 * .text ! 244: 243 0003023B 00 .align 1 ! 245: 244 0003023C .globl _pipe15_2 ! 246: 245 0003023C _pipe15_2: ! 247: 246 0003023C 0000 .word L246 ! 248: 247 0003023E # ! 249: 248 0003023E # ! 250: 249 0003023E # ! 251: 250 0003023E # ! 252: 251 0003023E # ! 253: 252 0003023E # ! 254: 253 0003023E # /************************************************************************ ! 255: 254 0003023E # * ! 256: 255 0003023E # * SUBTEST 2 ! 257: 256 0003023E # * data in registers, 1 NO-OP ! 258: 257 0003023E # * ! 259: 258 0003023E # ************************************************************************/ ! 260: 259 0003023E # pipe15_2() ! 261: 260 0003023E # { ! 262: 261 0003023E 13 0174 jbr L248 ! 263: 262 00030241 L249: ! 264: 263 00030241 # force_loop = FALSE; /* clear the force_loop flg */ ! 265: 264 00030241 4d effffffdd9 clrl _force_loop ! 266: 265 00030247 # index = 0; ! 267: 266 00030247 4d effffffdd3 clrl _index ! 268: 267 0003024D # do ! 269: 268 0003024D L252: ! 270: 269 0003024D # { ! 271: 270 0003024D # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */ ! 272: 271 0003024D 5c 18 effffffdcc 50 mull3 $24,_index,r0 ! 273: 272 00030255 0d e000000000 effffffdc0 movl _divd_1_data(r0),_sgl_value_1 ! 274: 273 00030260 # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */ ! 275: 274 00030260 5c 18 effffffdb9 50 mull3 $24,_index,r0 ! 276: 275 00030268 0d e000000004 effffffdad movl _divd_1_data+4(r0),_sgl_value_2 ! 277: 276 00030273 # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */ ! 278: 277 00030273 5c 18 effffffda6 50 mull3 $24,_index,r0 ! 279: 278 0003027B 0d e000000008 effffffd9a movl _divd_1_data+8(r0),_sgl_value_3 ! 280: 279 00030286 # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */ ! 281: 280 00030286 5c 18 effffffd93 50 mull3 $24,_index,r0 ! 282: 281 0003028E 0d e00000000c effffffd87 movl _divd_1_data+12(r0),_sgl_value_4 ! 283: 282 00030299 # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */ ! 284: 283 00030299 0d 8f40800000 effffffd7c movl $1082130432,_sgl_value_7 ! 285: 284 000302A4 # sgl_value_8 = 0; ! 286: 285 000302A4 4d effffffd76 clrl _sgl_value_8 ! 287: 286 000302AA # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 288: 287 000302AA 5c 18 effffffd6f 50 mull3 $24,_index,r0 ! 289: 288 000302B2 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 290: 289 000302B9 0d a004 effffffd63 movl 4(r0),_dbl_expected+4 ! 291: 290 000302C1 0d 60 effffffd58 movl (r0),_dbl_expected ! 292: 291 000302C8 # /* ! 293: 292 000302C8 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 294: 293 000302C8 # * The force loop flag is set after the first error. ! 295: 294 000302C8 # */ ! 296: 295 000302C8 # asm("_pipe15_2_lp1:"); ! 297: 296 000302C8 _pipe15_2_lp1: ! 298: 297 000302C8 # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */ ! 299: 298 000302C8 0d effffffd52 50 movl _sgl_value_1,r0 ! 300: 299 000302CF # asm("movl _sgl_value_2,r1"); ! 301: 300 000302CF 0d effffffd4b 51 movl _sgl_value_2,r1 ! 302: 301 000302D6 # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */ ! 303: 302 000302D6 0d effffffd44 52 movl _sgl_value_3,r2 ! 304: 303 000302DD # asm("movl _sgl_value_4,r3"); ! 305: 304 000302DD 0d effffffd3d 53 movl _sgl_value_4,r3 ! 306: 305 000302E4 # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */ ! 307: 306 000302E4 0d effffffd36 54 movl _sgl_value_7,r4 ! 308: 307 000302EB # asm("movl _sgl_value_8,r5"); ! 309: 308 000302EB 0d effffffd2f 55 movl _sgl_value_8,r5 ! 310: 309 000302F2 # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */ ! 311: 310 000302F2 0d effffffd28 58 movl _sgl_value_8,r8 ! 312: 311 000302F9 # asm("movl _sgl_value_8,r9"); ! 313: 312 000302F9 0d effffffd21 59 movl _sgl_value_8,r9 ! 314: 313 00030300 # asm("ldd r4"); /* load a '1.0' ( 1 ) */ ! 315: 314 00030300 07 54 ldd r4 ! 316: 315 00030302 # asm("nop"); ! 317: 316 00030302 10 nop ! 318: 317 00030303 # asm("muld r0"); /* mult by op. 1 ( op1 ) */ ! 319: 318 00030303 e7 50 muld r0 ! 320: 319 00030305 # asm("nop"); ! 321: 320 00030305 10 nop ! 322: 321 00030306 # asm("divd r2"); /* div by operand 2 ( exp ) */ ! 323: 322 00030306 f7 52 divd r2 ! 324: 323 00030308 # asm("nop"); ! 325: 324 00030308 10 nop ! 326: 325 00030309 # asm("divd r4"); /* divide by '1.0' ( exp ) */ ! 327: 326 00030309 f7 54 divd r4 ! 328: 327 0003030B # asm("nop"); ! 329: 328 0003030B 10 nop ! 330: 329 0003030C # asm("addd r8"); /* add '0.0' ( exp ) */ ! 331: 330 0003030C c7 58 addd r8 ! 332: 331 0003030E # asm("nop"); ! 333: 332 0003030E 10 nop ! 334: 333 0003030F # asm("std r6"); /* store the result ( exp ) */ ! 335: 334 0003030F 27 56 std r6 ! 336: 335 00030311 # if( force_loop ) ! 337: 336 00030311 5d effffffd09 tstl _force_loop ! 338: 337 00030317 31 02 jeql L253 ! 339: 338 00030319 # asm("brb _pipe15_2_lp1");; /* run the loop again */ ! 340: 339 00030319 11 ad brb _pipe15_2_lp1 ! 341: 340 0003031B L253: ! 342: 341 0003031B # /* ! 343: 342 0003031B # * verify the results ! 344: 343 0003031B # */ ! 345: 344 0003031B # asm("movl r6,_sgl_value_5"); /* get the result */ ! 346: 345 0003031B 0d 56 effffffcfe movl r6,_sgl_value_5 ! 347: 346 00030322 # asm("movl r7,_sgl_value_6"); ! 348: 347 00030322 0d 57 effffffcf7 movl r7,_sgl_value_6 ! 349: 348 00030329 # dbl_st_acc.m = sgl_value_5; ! 350: 349 00030329 0d effffffcf1 effffffcec movl _sgl_value_5,_dbl_st_acc ! 351: 350 00030334 # dbl_st_acc.l = sgl_value_6; ! 352: 351 00030334 0d effffffce6 effffffce5 movl _sgl_value_6,_dbl_st_acc+4 ! 353: 352 0003033F # if( (dbl_st_acc.m != dbl_expected.m) ||/* compare the results */ ! 354: 353 0003033F # (dbl_st_acc.l != dbl_expected.l) ) ! 355: 354 0003033F 1d effffffcdb effffffcd6 cmpl _dbl_st_acc,_dbl_expected ! 356: 355 0003034A 21 0d jneq L9998 ! 357: 356 0003034C 1d effffffcd2 effffffccd cmpl _dbl_st_acc+4,_dbl_expected+4 ! 358: 357 00030357 31 42 jeql L254 ! 359: 358 00030359 L9998: ! 360: 359 00030359 # { ! 361: 360 00030359 # errcnt++; /* bump the error count */ ! 362: 361 00030359 6d effffffcc1 incl _errcnt ! 363: 362 0003035F # if ( prt_error ) ! 364: 363 0003035F 5d effffffcbb tstl _prt_error ! 365: 364 00030365 31 0d jeql L255 ! 366: 365 00030367 # print_pipe15_er("Reg. Data, 1 NO-OP"); ! 367: 366 00030367 .data 1 ! 368: 367 0000102f * L256: ! 369: 368 0000102f * 5265672E20446174612C20312 .ascii "Reg. Data, 1 NO-OP\0" ! 370: 04E4F2D4F5000 ! 371: 369 00001042 * .text ! 372: 370 00030367 dd 8f0000102f pushl $L256 ! 373: 371 0003036D fe 08 ef00000a9a callf $8,_print_pipe15_er ! 374: 372 00030374 # if ( halt_flg ) /* halt on error? */ ! 375: 373 00030374 L255: ! 376: 374 00030374 5d effffffca6 tstl _halt_flg ! 377: 375 0003037A 31 0d jeql L257 ! 378: 376 0003037C # pipe15_er_hlt( subtest ); ! 379: 377 0003037C dd effffffc9e pushl _subtest ! 380: 378 00030382 fe 08 ef00000c03 callf $8,_pipe15_er_hlt ! 381: 379 00030389 # if ( loop_on_err ) { ! 382: 380 00030389 L257: ! 383: 381 00030389 5d effffffc91 tstl _loop_on_err ! 384: 382 0003038F 31 0a jeql L258 ! 385: 383 00030391 # force_loop = TRUE; /* set the force loop flag */ ! 386: 384 00030391 0d 01 effffffc88 movl $1,_force_loop ! 387: 385 00030398 # asm("brw _pipe15_2_lp1"); /* and loop */ ! 388: 386 00030398 13 ff2d brw _pipe15_2_lp1 ! 389: 387 0003039B # } ! 390: 388 0003039B # } /* end of compare error */ ! 391: 389 0003039B L258: ! 392: 390 0003039B # } while( index++ < max_divd_1_index ); ! 393: 391 0003039B L254: ! 394: 392 0003039B L251: ! 395: 393 0003039B 0d effffffc7f 50 movl _index,r0 ! 396: 394 000303A2 6d effffffc78 incl _index ! 397: 395 000303A8 1d 50 effffffc71 cmpl r0,_max_divd_1_index ! 398: 396 000303AF 81 03 13 fe99 jlss L252 ! 399: 397 000303B4 L250: ! 400: 398 000303B4 # } /* end of subtest 2 */ ! 401: 399 000303B4 40 ret#2 ! 402: 400 000303B5 .set L246,0x0 ! 403: 401 000303B5 L248: ! 404: 402 000303B5 13 fe89 jbr L249 ! 405: 403 000303B8 .data ! 406: 404 00001010 * .text ! 407: 405 000303B8 .align 1 ! 408: 406 000303B8 .globl _pipe15_3 ! 409: 407 000303B8 _pipe15_3: ! 410: 408 000303B8 0000 .word L259 ! 411: 409 000303BA # ! 412: 410 000303BA # ! 413: 411 000303BA # ! 414: 412 000303BA # ! 415: 413 000303BA # ! 416: 414 000303BA # ! 417: 415 000303BA # ! 418: 416 000303BA # ! 419: 417 000303BA # /************************************************************************ ! 420: 418 000303BA # * ! 421: 419 000303BA # * SUBTEST 3 ! 422: 420 000303BA # * data in registers, 2 NO-OPs ! 423: 421 000303BA # * ! 424: 422 000303BA # ************************************************************************/ ! 425: 423 000303BA # pipe15_3() ! 426: 424 000303BA # { ! 427: 425 000303BA 13 0179 jbr L261 ! 428: 426 000303BD L262: ! 429: 427 000303BD # force_loop = FALSE; /* clear the force_loop flg */ ! 430: 428 000303BD 4d effffffc5d clrl _force_loop ! 431: 429 000303C3 # index = 0; ! 432: 430 000303C3 4d effffffc57 clrl _index ! 433: 431 000303C9 # do ! 434: 432 000303C9 L265: ! 435: 433 000303C9 # { ! 436: 434 000303C9 # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */ ! 437: 435 000303C9 5c 18 effffffc50 50 mull3 $24,_index,r0 ! 438: 436 000303D1 0d e000000000 effffffc44 movl _divd_1_data(r0),_sgl_value_1 ! 439: 437 000303DC # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */ ! 440: 438 000303DC 5c 18 effffffc3d 50 mull3 $24,_index,r0 ! 441: 439 000303E4 0d e000000004 effffffc31 movl _divd_1_data+4(r0),_sgl_value_2 ! 442: 440 000303EF # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */ ! 443: 441 000303EF 5c 18 effffffc2a 50 mull3 $24,_index,r0 ! 444: 442 000303F7 0d e000000008 effffffc1e movl _divd_1_data+8(r0),_sgl_value_3 ! 445: 443 00030402 # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */ ! 446: 444 00030402 5c 18 effffffc17 50 mull3 $24,_index,r0 ! 447: 445 0003040A 0d e00000000c effffffc0b movl _divd_1_data+12(r0),_sgl_value_4 ! 448: 446 00030415 # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */ ! 449: 447 00030415 0d 8f40800000 effffffc00 movl $1082130432,_sgl_value_7 ! 450: 448 00030420 # sgl_value_8 = 0; ! 451: 449 00030420 4d effffffbfa clrl _sgl_value_8 ! 452: 450 00030426 # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 453: 451 00030426 5c 18 effffffbf3 50 mull3 $24,_index,r0 ! 454: 452 0003042E 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 455: 453 00030435 0d a004 effffffbe7 movl 4(r0),_dbl_expected+4 ! 456: 454 0003043D 0d 60 effffffbdc movl (r0),_dbl_expected ! 457: 455 00030444 # /* ! 458: 456 00030444 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 459: 457 00030444 # * The force loop flag is set after the first error. ! 460: 458 00030444 # */ ! 461: 459 00030444 # asm("_pipe15_3_lp1:"); ! 462: 460 00030444 _pipe15_3_lp1: ! 463: 461 00030444 # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */ ! 464: 462 00030444 0d effffffbd6 50 movl _sgl_value_1,r0 ! 465: 463 0003044B # asm("movl _sgl_value_2,r1"); ! 466: 464 0003044B 0d effffffbcf 51 movl _sgl_value_2,r1 ! 467: 465 00030452 # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */ ! 468: 466 00030452 0d effffffbc8 52 movl _sgl_value_3,r2 ! 469: 467 00030459 # asm("movl _sgl_value_4,r3"); ! 470: 468 00030459 0d effffffbc1 53 movl _sgl_value_4,r3 ! 471: 469 00030460 # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */ ! 472: 470 00030460 0d effffffbba 54 movl _sgl_value_7,r4 ! 473: 471 00030467 # asm("movl _sgl_value_8,r5"); ! 474: 472 00030467 0d effffffbb3 55 movl _sgl_value_8,r5 ! 475: 473 0003046E # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */ ! 476: 474 0003046E 0d effffffbac 58 movl _sgl_value_8,r8 ! 477: 475 00030475 # asm("movl _sgl_value_8,r9"); ! 478: 476 00030475 0d effffffba5 59 movl _sgl_value_8,r9 ! 479: 477 0003047C # asm("ldd r4"); /* load a '1.0' ( 1 ) */ ! 480: 478 0003047C 07 54 ldd r4 ! 481: 479 0003047E # asm("nop"); ! 482: 480 0003047E 10 nop ! 483: 481 0003047F # asm("nop"); ! 484: 482 0003047F 10 nop ! 485: 483 00030480 # asm("muld r0"); /* mult by op. 1 ( op1 ) */ ! 486: 484 00030480 e7 50 muld r0 ! 487: 485 00030482 # asm("nop"); ! 488: 486 00030482 10 nop ! 489: 487 00030483 # asm("nop"); ! 490: 488 00030483 10 nop ! 491: 489 00030484 # asm("divd r2"); /* div by operand 2 ( exp ) */ ! 492: 490 00030484 f7 52 divd r2 ! 493: 491 00030486 # asm("nop"); ! 494: 492 00030486 10 nop ! 495: 493 00030487 # asm("nop"); ! 496: 494 00030487 10 nop ! 497: 495 00030488 # asm("divd r4"); /* divide by '1.0' ( exp ) */ ! 498: 496 00030488 f7 54 divd r4 ! 499: 497 0003048A # asm("nop"); ! 500: 498 0003048A 10 nop ! 501: 499 0003048B # asm("nop"); ! 502: 500 0003048B 10 nop ! 503: 501 0003048C # asm("addd r8"); /* add '0.0' ( exp ) */ ! 504: 502 0003048C c7 58 addd r8 ! 505: 503 0003048E # asm("nop"); ! 506: 504 0003048E 10 nop ! 507: 505 0003048F # asm("nop"); ! 508: 506 0003048F 10 nop ! 509: 507 00030490 # asm("std r6"); /* store the result ( exp ) */ ! 510: 508 00030490 27 56 std r6 ! 511: 509 00030492 # if( force_loop ) ! 512: 510 00030492 5d effffffb88 tstl _force_loop ! 513: 511 00030498 31 02 jeql L266 ! 514: 512 0003049A # asm("brb _pipe15_3_lp1");; /* run the loop again */ ! 515: 513 0003049A 11 a8 brb _pipe15_3_lp1 ! 516: 514 0003049C L266: ! 517: 515 0003049C # /* ! 518: 516 0003049C # * verify the results ! 519: 517 0003049C # */ ! 520: 518 0003049C # asm("movl r6,_sgl_value_5"); /* get the result */ ! 521: 519 0003049C 0d 56 effffffb7d movl r6,_sgl_value_5 ! 522: 520 000304A3 # asm("movl r7,_sgl_value_6"); ! 523: 521 000304A3 0d 57 effffffb76 movl r7,_sgl_value_6 ! 524: 522 000304AA # dbl_st_acc.m = sgl_value_5; ! 525: 523 000304AA 0d effffffb70 effffffb6b movl _sgl_value_5,_dbl_st_acc ! 526: 524 000304B5 # dbl_st_acc.l = sgl_value_6; ! 527: 525 000304B5 0d effffffb65 effffffb64 movl _sgl_value_6,_dbl_st_acc+4 ! 528: 526 000304C0 # if( (dbl_st_acc.m != dbl_expected.m) ||/* compare the results */ ! 529: 527 000304C0 # (dbl_st_acc.l != dbl_expected.l) ) ! 530: 528 000304C0 1d effffffb5a effffffb55 cmpl _dbl_st_acc,_dbl_expected ! 531: 529 000304CB 21 0d jneq L9997 ! 532: 530 000304CD 1d effffffb51 effffffb4c cmpl _dbl_st_acc+4,_dbl_expected+4 ! 533: 531 000304D8 31 42 jeql L267 ! 534: 532 000304DA L9997: ! 535: 533 000304DA # { ! 536: 534 000304DA # errcnt++; /* bump the error count */ ! 537: 535 000304DA 6d effffffb40 incl _errcnt ! 538: 536 000304E0 # if ( prt_error ) ! 539: 537 000304E0 5d effffffb3a tstl _prt_error ! 540: 538 000304E6 31 0d jeql L268 ! 541: 539 000304E8 # print_pipe15_er("Reg. Data, 2 NO-OPs"); ! 542: 540 000304E8 .data 1 ! 543: 541 00001042 * L269: ! 544: 542 00001042 * 5265672E20446174612C20322 .ascii "Reg. Data, 2 NO-OPs\0" ! 545: 04E4F2D4F507300 ! 546: 543 00001056 * .text ! 547: 544 000304E8 dd 8f00001042 pushl $L269 ! 548: 545 000304EE fe 08 ef00000919 callf $8,_print_pipe15_er ! 549: 546 000304F5 # if ( halt_flg ) /* halt on error? */ ! 550: 547 000304F5 L268: ! 551: 548 000304F5 5d effffffb25 tstl _halt_flg ! 552: 549 000304FB 31 0d jeql L270 ! 553: 550 000304FD # pipe15_er_hlt( subtest ); ! 554: 551 000304FD dd effffffb1d pushl _subtest ! 555: 552 00030503 fe 08 ef00000a82 callf $8,_pipe15_er_hlt ! 556: 553 0003050A # if ( loop_on_err ) { ! 557: 554 0003050A L270: ! 558: 555 0003050A 5d effffffb10 tstl _loop_on_err ! 559: 556 00030510 31 0a jeql L271 ! 560: 557 00030512 # force_loop = TRUE; /* set the force loop flag */ ! 561: 558 00030512 0d 01 effffffb07 movl $1,_force_loop ! 562: 559 00030519 # asm("brw _pipe15_3_lp1"); /* and loop */ ! 563: 560 00030519 13 ff28 brw _pipe15_3_lp1 ! 564: 561 0003051C # } ! 565: 562 0003051C # } /* end of compare error */ ! 566: 563 0003051C L271: ! 567: 564 0003051C # } while( index++ < max_divd_1_index ); ! 568: 565 0003051C L267: ! 569: 566 0003051C L264: ! 570: 567 0003051C 0d effffffafe 50 movl _index,r0 ! 571: 568 00030523 6d effffffaf7 incl _index ! 572: 569 00030529 1d 50 effffffaf0 cmpl r0,_max_divd_1_index ! 573: 570 00030530 81 03 13 fe94 jlss L265 ! 574: 571 00030535 L263: ! 575: 572 00030535 # } /* end of subtest 3 */ ! 576: 573 00030535 40 ret#2 ! 577: 574 00030536 .set L259,0x0 ! 578: 575 00030536 L261: ! 579: 576 00030536 13 fe84 jbr L262 ! 580: 577 00030539 .data ! 581: 578 00001010 * .text ! 582: 579 00030539 00 .align 1 ! 583: 580 0003053A .globl _pipe15_4 ! 584: 581 0003053A _pipe15_4: ! 585: 582 0003053A 0000 .word L272 ! 586: 583 0003053C # ! 587: 584 0003053C # ! 588: 585 0003053C # ! 589: 586 0003053C # ! 590: 587 0003053C # ! 591: 588 0003053C # ! 592: 589 0003053C # ! 593: 590 0003053C # /************************************************************************ ! 594: 591 0003053C # * ! 595: 592 0003053C # * SUBTEST 4 ! 596: 593 0003053C # * data in registers, 3 NO-OPs ! 597: 594 0003053C # * ! 598: 595 0003053C # ************************************************************************/ ! 599: 596 0003053C # pipe15_4() ! 600: 597 0003053C # { ! 601: 598 0003053C 13 017e jbr L274 ! 602: 599 0003053F L275: ! 603: 600 0003053F # force_loop = FALSE; /* clear the force_loop flg */ ! 604: 601 0003053F 4d effffffadb clrl _force_loop ! 605: 602 00030545 # index = 0; ! 606: 603 00030545 4d effffffad5 clrl _index ! 607: 604 0003054B # do ! 608: 605 0003054B L278: ! 609: 606 0003054B # { ! 610: 607 0003054B # sgl_value_1 = divd_1_data[index].op_1.m; /* get op_1's MSW */ ! 611: 608 0003054B 5c 18 efffffface 50 mull3 $24,_index,r0 ! 612: 609 00030553 0d e000000000 effffffac2 movl _divd_1_data(r0),_sgl_value_1 ! 613: 610 0003055E # sgl_value_2 = divd_1_data[index].op_1.l; /* get op_1's LSW */ ! 614: 611 0003055E 5c 18 effffffabb 50 mull3 $24,_index,r0 ! 615: 612 00030566 0d e000000004 effffffaaf movl _divd_1_data+4(r0),_sgl_value_2 ! 616: 613 00030571 # sgl_value_3 = divd_1_data[index].op_2.m; /* get op_2's MSW */ ! 617: 614 00030571 5c 18 effffffaa8 50 mull3 $24,_index,r0 ! 618: 615 00030579 0d e000000008 effffffa9c movl _divd_1_data+8(r0),_sgl_value_3 ! 619: 616 00030584 # sgl_value_4 = divd_1_data[index].op_2.l; /* get op_2's LSW */ ! 620: 617 00030584 5c 18 effffffa95 50 mull3 $24,_index,r0 ! 621: 618 0003058C 0d e00000000c effffffa89 movl _divd_1_data+12(r0),_sgl_value_4 ! 622: 619 00030597 # sgl_value_7 = 0x40800000; /* get dbl precision 1.0 */ ! 623: 620 00030597 0d 8f40800000 effffffa7e movl $1082130432,_sgl_value_7 ! 624: 621 000305A2 # sgl_value_8 = 0; ! 625: 622 000305A2 4d effffffa78 clrl _sgl_value_8 ! 626: 623 000305A8 # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 627: 624 000305A8 5c 18 effffffa71 50 mull3 $24,_index,r0 ! 628: 625 000305B0 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 629: 626 000305B7 0d a004 effffffa65 movl 4(r0),_dbl_expected+4 ! 630: 627 000305BF 0d 60 effffffa5a movl (r0),_dbl_expected ! 631: 628 000305C6 # /* ! 632: 629 000305C6 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 633: 630 000305C6 # * The force loop flag is set after the first error. ! 634: 631 000305C6 # */ ! 635: 632 000305C6 # asm("_pipe15_4_lp1:"); ! 636: 633 000305C6 _pipe15_4_lp1: ! 637: 634 000305C6 # asm("movl _sgl_value_1,r0"); /* move operand 1 to r0/r1 */ ! 638: 635 000305C6 0d effffffa54 50 movl _sgl_value_1,r0 ! 639: 636 000305CD # asm("movl _sgl_value_2,r1"); ! 640: 637 000305CD 0d effffffa4d 51 movl _sgl_value_2,r1 ! 641: 638 000305D4 # asm("movl _sgl_value_3,r2"); /* move operand 2 to r2/r3 */ ! 642: 639 000305D4 0d effffffa46 52 movl _sgl_value_3,r2 ! 643: 640 000305DB # asm("movl _sgl_value_4,r3"); ! 644: 641 000305DB 0d effffffa3f 53 movl _sgl_value_4,r3 ! 645: 642 000305E2 # asm("movl _sgl_value_7,r4"); /* move a '1.0' to r4/r5 */ ! 646: 643 000305E2 0d effffffa38 54 movl _sgl_value_7,r4 ! 647: 644 000305E9 # asm("movl _sgl_value_8,r5"); ! 648: 645 000305E9 0d effffffa31 55 movl _sgl_value_8,r5 ! 649: 646 000305F0 # asm("movl _sgl_value_8,r8"); /* move a '0.0' to r8/r9 */ ! 650: 647 000305F0 0d effffffa2a 58 movl _sgl_value_8,r8 ! 651: 648 000305F7 # asm("movl _sgl_value_8,r9"); ! 652: 649 000305F7 0d effffffa23 59 movl _sgl_value_8,r9 ! 653: 650 000305FE # asm("ldd r4"); /* load a '1.0' ( 1 ) */ ! 654: 651 000305FE 07 54 ldd r4 ! 655: 652 00030600 # asm("nop"); ! 656: 653 00030600 10 nop ! 657: 654 00030601 # asm("nop"); ! 658: 655 00030601 10 nop ! 659: 656 00030602 # asm("nop"); ! 660: 657 00030602 10 nop ! 661: 658 00030603 # asm("muld r0"); /* mult by op. 1 ( op1 ) */ ! 662: 659 00030603 e7 50 muld r0 ! 663: 660 00030605 # asm("nop"); ! 664: 661 00030605 10 nop ! 665: 662 00030606 # asm("nop"); ! 666: 663 00030606 10 nop ! 667: 664 00030607 # asm("nop"); ! 668: 665 00030607 10 nop ! 669: 666 00030608 # asm("divd r2"); /* div by operand 2 ( exp ) */ ! 670: 667 00030608 f7 52 divd r2 ! 671: 668 0003060A # asm("nop"); ! 672: 669 0003060A 10 nop ! 673: 670 0003060B # asm("nop"); ! 674: 671 0003060B 10 nop ! 675: 672 0003060C # asm("nop"); ! 676: 673 0003060C 10 nop ! 677: 674 0003060D # asm("divd r4"); /* divide by '1.0' ( exp ) */ ! 678: 675 0003060D f7 54 divd r4 ! 679: 676 0003060F # asm("nop"); ! 680: 677 0003060F 10 nop ! 681: 678 00030610 # asm("nop"); ! 682: 679 00030610 10 nop ! 683: 680 00030611 # asm("nop"); ! 684: 681 00030611 10 nop ! 685: 682 00030612 # asm("addd r8"); /* add '0.0' ( exp ) */ ! 686: 683 00030612 c7 58 addd r8 ! 687: 684 00030614 # asm("nop"); ! 688: 685 00030614 10 nop ! 689: 686 00030615 # asm("nop"); ! 690: 687 00030615 10 nop ! 691: 688 00030616 # asm("nop"); ! 692: 689 00030616 10 nop ! 693: 690 00030617 # asm("std r6"); /* store the result ( exp ) */ ! 694: 691 00030617 27 56 std r6 ! 695: 692 00030619 # if( force_loop ) ! 696: 693 00030619 5d effffffa01 tstl _force_loop ! 697: 694 0003061F 31 02 jeql L279 ! 698: 695 00030621 # asm("brb _pipe15_4_lp1");; /* run the loop again */ ! 699: 696 00030621 11 a3 brb _pipe15_4_lp1 ! 700: 697 00030623 L279: ! 701: 698 00030623 # /* ! 702: 699 00030623 # * verify the results ! 703: 700 00030623 # */ ! 704: 701 00030623 # asm("movl r6,_sgl_value_5"); /* get the result */ ! 705: 702 00030623 0d 56 effffff9f6 movl r6,_sgl_value_5 ! 706: 703 0003062A # asm("movl r7,_sgl_value_6"); ! 707: 704 0003062A 0d 57 effffff9ef movl r7,_sgl_value_6 ! 708: 705 00030631 # dbl_st_acc.m = sgl_value_5; ! 709: 706 00030631 0d effffff9e9 effffff9e4 movl _sgl_value_5,_dbl_st_acc ! 710: 707 0003063C # dbl_st_acc.l = sgl_value_6; ! 711: 708 0003063C 0d effffff9de effffff9dd movl _sgl_value_6,_dbl_st_acc+4 ! 712: 709 00030647 # if( (dbl_st_acc.m != dbl_expected.m) ||/* compare the results */ ! 713: 710 00030647 # (dbl_st_acc.l != dbl_expected.l) ) ! 714: 711 00030647 1d effffff9d3 effffff9ce cmpl _dbl_st_acc,_dbl_expected ! 715: 712 00030652 21 0d jneq L9996 ! 716: 713 00030654 1d effffff9ca effffff9c5 cmpl _dbl_st_acc+4,_dbl_expected+4 ! 717: 714 0003065F 31 42 jeql L280 ! 718: 715 00030661 L9996: ! 719: 716 00030661 # { ! 720: 717 00030661 # errcnt++; /* bump the error count */ ! 721: 718 00030661 6d effffff9b9 incl _errcnt ! 722: 719 00030667 # if ( prt_error ) ! 723: 720 00030667 5d effffff9b3 tstl _prt_error ! 724: 721 0003066D 31 0d jeql L281 ! 725: 722 0003066F # print_pipe15_er("Reg. Data, 3 NO-OPs"); ! 726: 723 0003066F .data 1 ! 727: 724 00001056 * L282: ! 728: 725 00001056 * 5265672E20446174612C20332 .ascii "Reg. Data, 3 NO-OPs\0" ! 729: 04E4F2D4F507300 ! 730: 726 0000106a * .text ! 731: 727 0003066F dd 8f00001056 pushl $L282 ! 732: 728 00030675 fe 08 ef00000792 callf $8,_print_pipe15_er ! 733: 729 0003067C # if ( halt_flg ) /* halt on error? */ ! 734: 730 0003067C L281: ! 735: 731 0003067C 5d effffff99e tstl _halt_flg ! 736: 732 00030682 31 0d jeql L283 ! 737: 733 00030684 # pipe15_er_hlt( subtest ); ! 738: 734 00030684 dd effffff996 pushl _subtest ! 739: 735 0003068A fe 08 ef000008fb callf $8,_pipe15_er_hlt ! 740: 736 00030691 # if ( loop_on_err ) { ! 741: 737 00030691 L283: ! 742: 738 00030691 5d effffff989 tstl _loop_on_err ! 743: 739 00030697 31 0a jeql L284 ! 744: 740 00030699 # force_loop = TRUE; /* set the force loop flag */ ! 745: 741 00030699 0d 01 effffff980 movl $1,_force_loop ! 746: 742 000306A0 # asm("brw _pipe15_4_lp1"); /* and loop */ ! 747: 743 000306A0 13 ff23 brw _pipe15_4_lp1 ! 748: 744 000306A3 # } ! 749: 745 000306A3 # } /* end of compare error */ ! 750: 746 000306A3 L284: ! 751: 747 000306A3 # } while( index++ < max_divd_1_index ); ! 752: 748 000306A3 L280: ! 753: 749 000306A3 L277: ! 754: 750 000306A3 0d effffff977 50 movl _index,r0 ! 755: 751 000306AA 6d effffff970 incl _index ! 756: 752 000306B0 1d 50 effffff969 cmpl r0,_max_divd_1_index ! 757: 753 000306B7 81 03 13 fe8f jlss L278 ! 758: 754 000306BC L276: ! 759: 755 000306BC # } /* end of subtest 4 */ ! 760: 756 000306BC 40 ret#2 ! 761: 757 000306BD .set L272,0x0 ! 762: 758 000306BD L274: ! 763: 759 000306BD 13 fe7f jbr L275 ! 764: 760 000306C0 .data ! 765: 761 00001010 * .text ! 766: 762 000306C0 .align 1 ! 767: 763 000306C0 .globl _pipe15_5 ! 768: 764 000306C0 _pipe15_5: ! 769: 765 000306C0 0000 .word L285 ! 770: 766 000306C2 # ! 771: 767 000306C2 # ! 772: 768 000306C2 # ! 773: 769 000306C2 # ! 774: 770 000306C2 # ! 775: 771 000306C2 # ! 776: 772 000306C2 # ! 777: 773 000306C2 # ! 778: 774 000306C2 # /************************************************************************ ! 779: 775 000306C2 # * ! 780: 776 000306C2 # * SUBTEST 5 ! 781: 777 000306C2 # * data in cache, no NO-OPs ! 782: 778 000306C2 # * ! 783: 779 000306C2 # ************************************************************************/ ! 784: 780 000306C2 # pipe15_5() ! 785: 781 000306C2 # { ! 786: 782 000306C2 13 0127 jbr L287 ! 787: 783 000306C5 L288: ! 788: 784 000306C5 # force_loop = FALSE; /* clear the force_loop flg */ ! 789: 785 000306C5 4d effffff955 clrl _force_loop ! 790: 786 000306CB # index = 0; ! 791: 787 000306CB 4d effffff94f clrl _index ! 792: 788 000306D1 # do ! 793: 789 000306D1 L291: ! 794: 790 000306D1 # { ! 795: 791 000306D1 # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */ ! 796: 792 000306D1 5c 18 effffff948 50 mull3 $24,_index,r0 ! 797: 793 000306D9 0c 8f00000000 50 addl2 $_divd_1_data,r0 ! 798: 794 000306E0 0d a004 effffff93c movl 4(r0),_dbl_value_1+4 ! 799: 795 000306E8 0d 60 effffff931 movl (r0),_dbl_value_1 ! 800: 796 000306EF # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */ ! 801: 797 000306EF 5c 18 effffff92a 50 mull3 $24,_index,r0 ! 802: 798 000306F7 0c 8f00000008 50 addl2 $_divd_1_data+8,r0 ! 803: 799 000306FE 0d a004 effffff91e movl 4(r0),_dbl_value_2+4 ! 804: 800 00030706 0d 60 effffff913 movl (r0),_dbl_value_2 ! 805: 801 0003070D # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 806: 802 0003070D 5c 18 effffff90c 50 mull3 $24,_index,r0 ! 807: 803 00030715 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 808: 804 0003071C 0d a004 effffff900 movl 4(r0),_dbl_expected+4 ! 809: 805 00030724 0d 60 effffff8f5 movl (r0),_dbl_expected ! 810: 806 0003072B # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */ ! 811: 807 0003072B 0d 8f40800000 effffff8ea movl $1082130432,_dbl_dummy1 ! 812: 808 00030736 # dbl_dummy1.l = 0; ! 813: 809 00030736 4d effffff8e8 clrl _dbl_dummy1+4 ! 814: 810 0003073C # dbl_dummy2.m = 0; /* get dbl precision 0.0 */ ! 815: 811 0003073C 4d effffff8de clrl _dbl_dummy2 ! 816: 812 00030742 # dbl_dummy2.l = 0; ! 817: 813 00030742 4d effffff8dc clrl _dbl_dummy2+4 ! 818: 814 00030748 # /* ! 819: 815 00030748 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 820: 816 00030748 # * The force loop flag is set after the first error. ! 821: 817 00030748 # */ ! 822: 818 00030748 # asm("_pipe15_5_lp1:"); ! 823: 819 00030748 _pipe15_5_lp1: ! 824: 820 00030748 # asm("ldd _dbl_dummy1"); /* load a '1.0' ( 1 ) */ ! 825: 821 00030748 07 effffff8d2 ldd _dbl_dummy1 ! 826: 822 0003074E # asm("muld _dbl_value_1"); /* mult by op. 1 ( op1 ) */ ! 827: 823 0003074E e7 effffff8cc muld _dbl_value_1 ! 828: 824 00030754 # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */ ! 829: 825 00030754 f7 effffff8c6 divd _dbl_value_2 ! 830: 826 0003075A # asm("divd _dbl_dummy1"); /* divide by '1.0' ( exp ) */ ! 831: 827 0003075A f7 effffff8c0 divd _dbl_dummy1 ! 832: 828 00030760 # asm("addd _dbl_dummy2"); /* add a '0.0' ( exp ) */ ! 833: 829 00030760 c7 effffff8ba addd _dbl_dummy2 ! 834: 830 00030766 # asm("std _dbl_st_acc"); /* store the result ( exp ) */ ! 835: 831 00030766 27 effffff8b4 std _dbl_st_acc ! 836: 832 0003076C # if( force_loop ) ! 837: 833 0003076C 5d effffff8ae tstl _force_loop ! 838: 834 00030772 31 02 jeql L292 ! 839: 835 00030774 # asm("brb _pipe15_5_lp1");; /* run the loop again */ ! 840: 836 00030774 11 d2 brb _pipe15_5_lp1 ! 841: 837 00030776 L292: ! 842: 838 00030776 # /* ! 843: 839 00030776 # * verify the results ! 844: 840 00030776 # */ ! 845: 841 00030776 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */ ! 846: 842 00030776 # (dbl_st_acc.l != dbl_expected.l) ) ! 847: 843 00030776 1d effffff8a4 effffff89f cmpl _dbl_st_acc,_dbl_expected ! 848: 844 00030781 21 0d jneq L9995 ! 849: 845 00030783 1d effffff89b effffff896 cmpl _dbl_st_acc+4,_dbl_expected+4 ! 850: 846 0003078E 31 42 jeql L293 ! 851: 847 00030790 L9995: ! 852: 848 00030790 # { ! 853: 849 00030790 # errcnt++; /* bump the error count */ ! 854: 850 00030790 6d effffff88a incl _errcnt ! 855: 851 00030796 # if ( prt_error ) ! 856: 852 00030796 5d effffff884 tstl _prt_error ! 857: 853 0003079C 31 0d jeql L294 ! 858: 854 0003079E # print_pipe15_er("Cache Data, no NO-OPs"); ! 859: 855 0003079E .data 1 ! 860: 856 0000106a * L295: ! 861: 857 0000106a * 436163686520446174612C206 .ascii "Cache Data, no NO-OPs\0" ! 862: E6F204E4F2D4F507300 ! 863: 858 00001080 * .text ! 864: 859 0003079E dd 8f0000106a pushl $L295 ! 865: 860 000307A4 fe 08 ef00000663 callf $8,_print_pipe15_er ! 866: 861 000307AB # if ( halt_flg ) /* halt on error? */ ! 867: 862 000307AB L294: ! 868: 863 000307AB 5d effffff86f tstl _halt_flg ! 869: 864 000307B1 31 0d jeql L296 ! 870: 865 000307B3 # pipe15_er_hlt( subtest ); ! 871: 866 000307B3 dd effffff867 pushl _subtest ! 872: 867 000307B9 fe 08 ef000007cc callf $8,_pipe15_er_hlt ! 873: 868 000307C0 # if ( loop_on_err ) { ! 874: 869 000307C0 L296: ! 875: 870 000307C0 5d effffff85a tstl _loop_on_err ! 876: 871 000307C6 31 0a jeql L297 ! 877: 872 000307C8 # force_loop = TRUE; /* set the force loop flag */ ! 878: 873 000307C8 0d 01 effffff851 movl $1,_force_loop ! 879: 874 000307CF # asm("brw _pipe15_5_lp1"); /* and loop */ ! 880: 875 000307CF 13 ff76 brw _pipe15_5_lp1 ! 881: 876 000307D2 # } ! 882: 877 000307D2 # } /* end of compare error */ ! 883: 878 000307D2 L297: ! 884: 879 000307D2 # } while( index++ < max_divd_1_index ); ! 885: 880 000307D2 L293: ! 886: 881 000307D2 L290: ! 887: 882 000307D2 0d effffff848 50 movl _index,r0 ! 888: 883 000307D9 6d effffff841 incl _index ! 889: 884 000307DF 1d 50 effffff83a cmpl r0,_max_divd_1_index ! 890: 885 000307E6 81 03 13 fee6 jlss L291 ! 891: 886 000307EB L289: ! 892: 887 000307EB # } /* end of subtest 5 */ ! 893: 888 000307EB 40 ret#2 ! 894: 889 000307EC .set L285,0x0 ! 895: 890 000307EC L287: ! 896: 891 000307EC 13 fed6 jbr L288 ! 897: 892 000307EF .data ! 898: 893 00001010 * .text ! 899: 894 000307EF 00 .align 1 ! 900: 895 000307F0 .globl _pipe15_6 ! 901: 896 000307F0 _pipe15_6: ! 902: 897 000307F0 0000 .word L298 ! 903: 898 000307F2 # ! 904: 899 000307F2 # ! 905: 900 000307F2 # ! 906: 901 000307F2 # ! 907: 902 000307F2 # ! 908: 903 000307F2 # ! 909: 904 000307F2 # ! 910: 905 000307F2 # /************************************************************************ ! 911: 906 000307F2 # * ! 912: 907 000307F2 # * SUBTEST 6 ! 913: 908 000307F2 # * data in cache, 1 NO-OP ! 914: 909 000307F2 # * ! 915: 910 000307F2 # ************************************************************************/ ! 916: 911 000307F2 # pipe15_6() ! 917: 912 000307F2 # { ! 918: 913 000307F2 13 012c jbr L300 ! 919: 914 000307F5 L301: ! 920: 915 000307F5 # force_loop = FALSE; /* clear the force_loop flg */ ! 921: 916 000307F5 4d effffff825 clrl _force_loop ! 922: 917 000307FB # index = 0; ! 923: 918 000307FB 4d effffff81f clrl _index ! 924: 919 00030801 # do ! 925: 920 00030801 L304: ! 926: 921 00030801 # { ! 927: 922 00030801 # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */ ! 928: 923 00030801 5c 18 effffff818 50 mull3 $24,_index,r0 ! 929: 924 00030809 0c 8f00000000 50 addl2 $_divd_1_data,r0 ! 930: 925 00030810 0d a004 effffff80c movl 4(r0),_dbl_value_1+4 ! 931: 926 00030818 0d 60 effffff801 movl (r0),_dbl_value_1 ! 932: 927 0003081F # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */ ! 933: 928 0003081F 5c 18 effffff7fa 50 mull3 $24,_index,r0 ! 934: 929 00030827 0c 8f00000008 50 addl2 $_divd_1_data+8,r0 ! 935: 930 0003082E 0d a004 effffff7ee movl 4(r0),_dbl_value_2+4 ! 936: 931 00030836 0d 60 effffff7e3 movl (r0),_dbl_value_2 ! 937: 932 0003083D # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 938: 933 0003083D 5c 18 effffff7dc 50 mull3 $24,_index,r0 ! 939: 934 00030845 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 940: 935 0003084C 0d a004 effffff7d0 movl 4(r0),_dbl_expected+4 ! 941: 936 00030854 0d 60 effffff7c5 movl (r0),_dbl_expected ! 942: 937 0003085B # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */ ! 943: 938 0003085B 0d 8f40800000 effffff7ba movl $1082130432,_dbl_dummy1 ! 944: 939 00030866 # dbl_dummy1.l = 0; ! 945: 940 00030866 4d effffff7b8 clrl _dbl_dummy1+4 ! 946: 941 0003086C # dbl_dummy2.m = 0; /* get dbl precision 0.0 */ ! 947: 942 0003086C 4d effffff7ae clrl _dbl_dummy2 ! 948: 943 00030872 # dbl_dummy2.l = 0; ! 949: 944 00030872 4d effffff7ac clrl _dbl_dummy2+4 ! 950: 945 00030878 # /* ! 951: 946 00030878 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 952: 947 00030878 # * The force loop flag is set after the first error. ! 953: 948 00030878 # */ ! 954: 949 00030878 # asm("_pipe15_6_lp1:"); ! 955: 950 00030878 _pipe15_6_lp1: ! 956: 951 00030878 # asm("ldd _dbl_dummy1"); /* load a '1.0' ( 1 ) */ ! 957: 952 00030878 07 effffff7a2 ldd _dbl_dummy1 ! 958: 953 0003087E # asm("nop"); ! 959: 954 0003087E 10 nop ! 960: 955 0003087F # asm("muld _dbl_value_1"); /* mult by op. 1 ( op1 ) */ ! 961: 956 0003087F e7 effffff79b muld _dbl_value_1 ! 962: 957 00030885 # asm("nop"); ! 963: 958 00030885 10 nop ! 964: 959 00030886 # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */ ! 965: 960 00030886 f7 effffff794 divd _dbl_value_2 ! 966: 961 0003088C # asm("nop"); ! 967: 962 0003088C 10 nop ! 968: 963 0003088D # asm("divd _dbl_dummy1"); /* divide by '1.0' ( exp ) */ ! 969: 964 0003088D f7 effffff78d divd _dbl_dummy1 ! 970: 965 00030893 # asm("nop"); ! 971: 966 00030893 10 nop ! 972: 967 00030894 # asm("addd _dbl_dummy2"); /* add a '0.0' ( exp ) */ ! 973: 968 00030894 c7 effffff786 addd _dbl_dummy2 ! 974: 969 0003089A # asm("nop"); ! 975: 970 0003089A 10 nop ! 976: 971 0003089B # asm("std _dbl_st_acc"); /* store the result ( exp ) */ ! 977: 972 0003089B 27 effffff77f std _dbl_st_acc ! 978: 973 000308A1 # if( force_loop ) ! 979: 974 000308A1 5d effffff779 tstl _force_loop ! 980: 975 000308A7 31 02 jeql L305 ! 981: 976 000308A9 # asm("brb _pipe15_6_lp1");; /* run the loop again */ ! 982: 977 000308A9 11 cd brb _pipe15_6_lp1 ! 983: 978 000308AB L305: ! 984: 979 000308AB # /* ! 985: 980 000308AB # * verify the results ! 986: 981 000308AB # */ ! 987: 982 000308AB # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */ ! 988: 983 000308AB # (dbl_st_acc.l != dbl_expected.l) ) ! 989: 984 000308AB 1d effffff76f effffff76a cmpl _dbl_st_acc,_dbl_expected ! 990: 985 000308B6 21 0d jneq L9994 ! 991: 986 000308B8 1d effffff766 effffff761 cmpl _dbl_st_acc+4,_dbl_expected+4 ! 992: 987 000308C3 31 42 jeql L306 ! 993: 988 000308C5 L9994: ! 994: 989 000308C5 # { ! 995: 990 000308C5 # errcnt++; /* bump the error count */ ! 996: 991 000308C5 6d effffff755 incl _errcnt ! 997: 992 000308CB # if ( prt_error ) ! 998: 993 000308CB 5d effffff74f tstl _prt_error ! 999: 994 000308D1 31 0d jeql L307 ! 1000: 995 000308D3 # print_pipe15_er("Cache Data, 1 NO-OP"); ! 1001: 996 000308D3 .data 1 ! 1002: 997 00001080 * L308: ! 1003: 998 00001080 * 436163686520446174612C203 .ascii "Cache Data, 1 NO-OP\0" ! 1004: 1204E4F2D4F5000 ! 1005: 999 00001094 * .text ! 1006: 1000 000308D3 dd 8f00001080 pushl $L308 ! 1007: 1001 000308D9 fe 08 ef0000052e callf $8,_print_pipe15_er ! 1008: 1002 000308E0 # if ( halt_flg ) /* halt on error? */ ! 1009: 1003 000308E0 L307: ! 1010: 1004 000308E0 5d effffff73a tstl _halt_flg ! 1011: 1005 000308E6 31 0d jeql L309 ! 1012: 1006 000308E8 # pipe15_er_hlt( subtest ); ! 1013: 1007 000308E8 dd effffff732 pushl _subtest ! 1014: 1008 000308EE fe 08 ef00000697 callf $8,_pipe15_er_hlt ! 1015: 1009 000308F5 # if ( loop_on_err ) { ! 1016: 1010 000308F5 L309: ! 1017: 1011 000308F5 5d effffff725 tstl _loop_on_err ! 1018: 1012 000308FB 31 0a jeql L310 ! 1019: 1013 000308FD # force_loop = TRUE; /* set the force loop flag */ ! 1020: 1014 000308FD 0d 01 effffff71c movl $1,_force_loop ! 1021: 1015 00030904 # asm("brw _pipe15_6_lp1"); /* and loop */ ! 1022: 1016 00030904 13 ff71 brw _pipe15_6_lp1 ! 1023: 1017 00030907 # } ! 1024: 1018 00030907 # } /* end of compare error */ ! 1025: 1019 00030907 L310: ! 1026: 1020 00030907 # } while( index++ < max_divd_1_index ); ! 1027: 1021 00030907 L306: ! 1028: 1022 00030907 L303: ! 1029: 1023 00030907 0d effffff713 50 movl _index,r0 ! 1030: 1024 0003090E 6d effffff70c incl _index ! 1031: 1025 00030914 1d 50 effffff705 cmpl r0,_max_divd_1_index ! 1032: 1026 0003091B 81 03 13 fee1 jlss L304 ! 1033: 1027 00030920 L302: ! 1034: 1028 00030920 # } /* end of subtest 6 */ ! 1035: 1029 00030920 40 ret#2 ! 1036: 1030 00030921 .set L298,0x0 ! 1037: 1031 00030921 L300: ! 1038: 1032 00030921 13 fed1 jbr L301 ! 1039: 1033 00030924 .data ! 1040: 1034 00001010 * .text ! 1041: 1035 00030924 .align 1 ! 1042: 1036 00030924 .globl _pipe15_7 ! 1043: 1037 00030924 _pipe15_7: ! 1044: 1038 00030924 0000 .word L311 ! 1045: 1039 00030926 # ! 1046: 1040 00030926 # ! 1047: 1041 00030926 # ! 1048: 1042 00030926 # ! 1049: 1043 00030926 # ! 1050: 1044 00030926 # ! 1051: 1045 00030926 # ! 1052: 1046 00030926 # ! 1053: 1047 00030926 # /************************************************************************ ! 1054: 1048 00030926 # * ! 1055: 1049 00030926 # * SUBTEST 7 ! 1056: 1050 00030926 # * data in cache, 2 NO-OPs ! 1057: 1051 00030926 # * ! 1058: 1052 00030926 # ************************************************************************/ ! 1059: 1053 00030926 # pipe15_7() ! 1060: 1054 00030926 # { ! 1061: 1055 00030926 13 0131 jbr L313 ! 1062: 1056 00030929 L314: ! 1063: 1057 00030929 # force_loop = FALSE; /* clear the force_loop flg */ ! 1064: 1058 00030929 4d effffff6f1 clrl _force_loop ! 1065: 1059 0003092F # index = 0; ! 1066: 1060 0003092F 4d effffff6eb clrl _index ! 1067: 1061 00030935 # do ! 1068: 1062 00030935 L317: ! 1069: 1063 00030935 # { ! 1070: 1064 00030935 # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */ ! 1071: 1065 00030935 5c 18 effffff6e4 50 mull3 $24,_index,r0 ! 1072: 1066 0003093D 0c 8f00000000 50 addl2 $_divd_1_data,r0 ! 1073: 1067 00030944 0d a004 effffff6d8 movl 4(r0),_dbl_value_1+4 ! 1074: 1068 0003094C 0d 60 effffff6cd movl (r0),_dbl_value_1 ! 1075: 1069 00030953 # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */ ! 1076: 1070 00030953 5c 18 effffff6c6 50 mull3 $24,_index,r0 ! 1077: 1071 0003095B 0c 8f00000008 50 addl2 $_divd_1_data+8,r0 ! 1078: 1072 00030962 0d a004 effffff6ba movl 4(r0),_dbl_value_2+4 ! 1079: 1073 0003096A 0d 60 effffff6af movl (r0),_dbl_value_2 ! 1080: 1074 00030971 # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 1081: 1075 00030971 5c 18 effffff6a8 50 mull3 $24,_index,r0 ! 1082: 1076 00030979 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 1083: 1077 00030980 0d a004 effffff69c movl 4(r0),_dbl_expected+4 ! 1084: 1078 00030988 0d 60 effffff691 movl (r0),_dbl_expected ! 1085: 1079 0003098F # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */ ! 1086: 1080 0003098F 0d 8f40800000 effffff686 movl $1082130432,_dbl_dummy1 ! 1087: 1081 0003099A # dbl_dummy1.l = 0; ! 1088: 1082 0003099A 4d effffff684 clrl _dbl_dummy1+4 ! 1089: 1083 000309A0 # dbl_dummy2.m = 0; /* get dbl precision 0.0 */ ! 1090: 1084 000309A0 4d effffff67a clrl _dbl_dummy2 ! 1091: 1085 000309A6 # dbl_dummy2.l = 0; ! 1092: 1086 000309A6 4d effffff678 clrl _dbl_dummy2+4 ! 1093: 1087 000309AC # /* ! 1094: 1088 000309AC # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 1095: 1089 000309AC # * The force loop flag is set after the first error. ! 1096: 1090 000309AC # */ ! 1097: 1091 000309AC # asm("_pipe15_7_lp1:"); ! 1098: 1092 000309AC _pipe15_7_lp1: ! 1099: 1093 000309AC # asm("ldd _dbl_dummy1"); /* load a '1.0' ( 1 ) */ ! 1100: 1094 000309AC 07 effffff66e ldd _dbl_dummy1 ! 1101: 1095 000309B2 # asm("nop"); ! 1102: 1096 000309B2 10 nop ! 1103: 1097 000309B3 # asm("nop"); ! 1104: 1098 000309B3 10 nop ! 1105: 1099 000309B4 # asm("muld _dbl_value_1"); /* mult by op. 1 ( op1 ) */ ! 1106: 1100 000309B4 e7 effffff666 muld _dbl_value_1 ! 1107: 1101 000309BA # asm("nop"); ! 1108: 1102 000309BA 10 nop ! 1109: 1103 000309BB # asm("nop"); ! 1110: 1104 000309BB 10 nop ! 1111: 1105 000309BC # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */ ! 1112: 1106 000309BC f7 effffff65e divd _dbl_value_2 ! 1113: 1107 000309C2 # asm("nop"); ! 1114: 1108 000309C2 10 nop ! 1115: 1109 000309C3 # asm("nop"); ! 1116: 1110 000309C3 10 nop ! 1117: 1111 000309C4 # asm("divd _dbl_dummy1"); /* divide by '1.0' ( exp ) */ ! 1118: 1112 000309C4 f7 effffff656 divd _dbl_dummy1 ! 1119: 1113 000309CA # asm("nop"); ! 1120: 1114 000309CA 10 nop ! 1121: 1115 000309CB # asm("nop"); ! 1122: 1116 000309CB 10 nop ! 1123: 1117 000309CC # asm("addd _dbl_dummy2"); /* add a '0.0' ( exp ) */ ! 1124: 1118 000309CC c7 effffff64e addd _dbl_dummy2 ! 1125: 1119 000309D2 # asm("nop"); ! 1126: 1120 000309D2 10 nop ! 1127: 1121 000309D3 # asm("nop"); ! 1128: 1122 000309D3 10 nop ! 1129: 1123 000309D4 # asm("std _dbl_st_acc"); /* store the result ( exp ) */ ! 1130: 1124 000309D4 27 effffff646 std _dbl_st_acc ! 1131: 1125 000309DA # if( force_loop ) ! 1132: 1126 000309DA 5d effffff640 tstl _force_loop ! 1133: 1127 000309E0 31 02 jeql L318 ! 1134: 1128 000309E2 # asm("brb _pipe15_7_lp1");; /* run the loop again */ ! 1135: 1129 000309E2 11 c8 brb _pipe15_7_lp1 ! 1136: 1130 000309E4 L318: ! 1137: 1131 000309E4 # /* ! 1138: 1132 000309E4 # * verify the results ! 1139: 1133 000309E4 # */ ! 1140: 1134 000309E4 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */ ! 1141: 1135 000309E4 # (dbl_st_acc.l != dbl_expected.l) ) ! 1142: 1136 000309E4 1d effffff636 effffff631 cmpl _dbl_st_acc,_dbl_expected ! 1143: 1137 000309EF 21 0d jneq L9993 ! 1144: 1138 000309F1 1d effffff62d effffff628 cmpl _dbl_st_acc+4,_dbl_expected+4 ! 1145: 1139 000309FC 31 42 jeql L319 ! 1146: 1140 000309FE L9993: ! 1147: 1141 000309FE # { ! 1148: 1142 000309FE # errcnt++; /* bump the error count */ ! 1149: 1143 000309FE 6d effffff61c incl _errcnt ! 1150: 1144 00030A04 # if ( prt_error ) ! 1151: 1145 00030A04 5d effffff616 tstl _prt_error ! 1152: 1146 00030A0A 31 0d jeql L320 ! 1153: 1147 00030A0C # print_pipe15_er("Cache Data, 2 NO-OPs"); ! 1154: 1148 00030A0C .data 1 ! 1155: 1149 00001094 * L321: ! 1156: 1150 00001094 * 436163686520446174612C203 .ascii "Cache Data, 2 NO-OPs\0" ! 1157: 2204E4F2D4F507300 ! 1158: 1151 000010a9 * .text ! 1159: 1152 00030A0C dd 8f00001094 pushl $L321 ! 1160: 1153 00030A12 fe 08 ef000003f5 callf $8,_print_pipe15_er ! 1161: 1154 00030A19 # if ( halt_flg ) /* halt on error? */ ! 1162: 1155 00030A19 L320: ! 1163: 1156 00030A19 5d effffff601 tstl _halt_flg ! 1164: 1157 00030A1F 31 0d jeql L322 ! 1165: 1158 00030A21 # pipe15_er_hlt( subtest ); ! 1166: 1159 00030A21 dd effffff5f9 pushl _subtest ! 1167: 1160 00030A27 fe 08 ef0000055e callf $8,_pipe15_er_hlt ! 1168: 1161 00030A2E # if ( loop_on_err ) { ! 1169: 1162 00030A2E L322: ! 1170: 1163 00030A2E 5d effffff5ec tstl _loop_on_err ! 1171: 1164 00030A34 31 0a jeql L323 ! 1172: 1165 00030A36 # force_loop = TRUE; /* set the force loop flag */ ! 1173: 1166 00030A36 0d 01 effffff5e3 movl $1,_force_loop ! 1174: 1167 00030A3D # asm("brw _pipe15_7_lp1"); /* and loop */ ! 1175: 1168 00030A3D 13 ff6c brw _pipe15_7_lp1 ! 1176: 1169 00030A40 # } ! 1177: 1170 00030A40 # } /* end of compare error */ ! 1178: 1171 00030A40 L323: ! 1179: 1172 00030A40 # } while( index++ < max_divd_1_index ); ! 1180: 1173 00030A40 L319: ! 1181: 1174 00030A40 L316: ! 1182: 1175 00030A40 0d effffff5da 50 movl _index,r0 ! 1183: 1176 00030A47 6d effffff5d3 incl _index ! 1184: 1177 00030A4D 1d 50 effffff5cc cmpl r0,_max_divd_1_index ! 1185: 1178 00030A54 81 03 13 fedc jlss L317 ! 1186: 1179 00030A59 L315: ! 1187: 1180 00030A59 # } /* end of subtest 7 */ ! 1188: 1181 00030A59 40 ret#2 ! 1189: 1182 00030A5A .set L311,0x0 ! 1190: 1183 00030A5A L313: ! 1191: 1184 00030A5A 13 fecc jbr L314 ! 1192: 1185 00030A5D .data ! 1193: 1186 00001010 * .text ! 1194: 1187 00030A5D 00 .align 1 ! 1195: 1188 00030A5E .globl _pipe15_8 ! 1196: 1189 00030A5E _pipe15_8: ! 1197: 1190 00030A5E 0000 .word L324 ! 1198: 1191 00030A60 # ! 1199: 1192 00030A60 # ! 1200: 1193 00030A60 # ! 1201: 1194 00030A60 # ! 1202: 1195 00030A60 # ! 1203: 1196 00030A60 # ! 1204: 1197 00030A60 # ! 1205: 1198 00030A60 # /************************************************************************ ! 1206: 1199 00030A60 # * ! 1207: 1200 00030A60 # * SUBTEST 8 ! 1208: 1201 00030A60 # * data in cache, 3 NO-OPs ! 1209: 1202 00030A60 # * ! 1210: 1203 00030A60 # ************************************************************************/ ! 1211: 1204 00030A60 # pipe15_8() ! 1212: 1205 00030A60 # { ! 1213: 1206 00030A60 13 0136 jbr L326 ! 1214: 1207 00030A63 L327: ! 1215: 1208 00030A63 # force_loop = FALSE; /* clear the force_loop flg */ ! 1216: 1209 00030A63 4d effffff5b7 clrl _force_loop ! 1217: 1210 00030A69 # index = 0; ! 1218: 1211 00030A69 4d effffff5b1 clrl _index ! 1219: 1212 00030A6F # do ! 1220: 1213 00030A6F L330: ! 1221: 1214 00030A6F # { ! 1222: 1215 00030A6F # dbl_value_1 = divd_1_data[index].op_1; /* get dbl operand # 1 */ ! 1223: 1216 00030A6F 5c 18 effffff5aa 50 mull3 $24,_index,r0 ! 1224: 1217 00030A77 0c 8f00000000 50 addl2 $_divd_1_data,r0 ! 1225: 1218 00030A7E 0d a004 effffff59e movl 4(r0),_dbl_value_1+4 ! 1226: 1219 00030A86 0d 60 effffff593 movl (r0),_dbl_value_1 ! 1227: 1220 00030A8D # dbl_value_2 = divd_1_data[index].op_2; /* get dbl operand # 2 */ ! 1228: 1221 00030A8D 5c 18 effffff58c 50 mull3 $24,_index,r0 ! 1229: 1222 00030A95 0c 8f00000008 50 addl2 $_divd_1_data+8,r0 ! 1230: 1223 00030A9C 0d a004 effffff580 movl 4(r0),_dbl_value_2+4 ! 1231: 1224 00030AA4 0d 60 effffff575 movl (r0),_dbl_value_2 ! 1232: 1225 00030AAB # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 1233: 1226 00030AAB 5c 18 effffff56e 50 mull3 $24,_index,r0 ! 1234: 1227 00030AB3 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 1235: 1228 00030ABA 0d a004 effffff562 movl 4(r0),_dbl_expected+4 ! 1236: 1229 00030AC2 0d 60 effffff557 movl (r0),_dbl_expected ! 1237: 1230 00030AC9 # dbl_dummy1.m = 0x40800000; /* get dbl precision 1.0 */ ! 1238: 1231 00030AC9 0d 8f40800000 effffff54c movl $1082130432,_dbl_dummy1 ! 1239: 1232 00030AD4 # dbl_dummy1.l = 0; ! 1240: 1233 00030AD4 4d effffff54a clrl _dbl_dummy1+4 ! 1241: 1234 00030ADA # dbl_dummy2.m = 0; /* get dbl precision 0.0 */ ! 1242: 1235 00030ADA 4d effffff540 clrl _dbl_dummy2 ! 1243: 1236 00030AE0 # dbl_dummy2.l = 0; ! 1244: 1237 00030AE0 4d effffff53e clrl _dbl_dummy2+4 ! 1245: 1238 00030AE6 # /* ! 1246: 1239 00030AE6 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 1247: 1240 00030AE6 # * The force loop flag is set after the first error. ! 1248: 1241 00030AE6 # */ ! 1249: 1242 00030AE6 # asm("_pipe15_8_lp1:"); ! 1250: 1243 00030AE6 _pipe15_8_lp1: ! 1251: 1244 00030AE6 # asm("ldd _dbl_dummy1"); /* load a '1.0' ( 1 ) */ ! 1252: 1245 00030AE6 07 effffff534 ldd _dbl_dummy1 ! 1253: 1246 00030AEC # asm("nop"); ! 1254: 1247 00030AEC 10 nop ! 1255: 1248 00030AED # asm("nop"); ! 1256: 1249 00030AED 10 nop ! 1257: 1250 00030AEE # asm("nop"); ! 1258: 1251 00030AEE 10 nop ! 1259: 1252 00030AEF # asm("muld _dbl_value_1"); /* mult by op. 1 ( op1 ) */ ! 1260: 1253 00030AEF e7 effffff52b muld _dbl_value_1 ! 1261: 1254 00030AF5 # asm("nop"); ! 1262: 1255 00030AF5 10 nop ! 1263: 1256 00030AF6 # asm("nop"); ! 1264: 1257 00030AF6 10 nop ! 1265: 1258 00030AF7 # asm("nop"); ! 1266: 1259 00030AF7 10 nop ! 1267: 1260 00030AF8 # asm("divd _dbl_value_2"); /* div by operand 2 ( exp ) */ ! 1268: 1261 00030AF8 f7 effffff522 divd _dbl_value_2 ! 1269: 1262 00030AFE # asm("nop"); ! 1270: 1263 00030AFE 10 nop ! 1271: 1264 00030AFF # asm("nop"); ! 1272: 1265 00030AFF 10 nop ! 1273: 1266 00030B00 # asm("nop"); ! 1274: 1267 00030B00 10 nop ! 1275: 1268 00030B01 # asm("divd _dbl_dummy1"); /* divide by '1.0' ( exp ) */ ! 1276: 1269 00030B01 f7 effffff519 divd _dbl_dummy1 ! 1277: 1270 00030B07 # asm("nop"); ! 1278: 1271 00030B07 10 nop ! 1279: 1272 00030B08 # asm("nop"); ! 1280: 1273 00030B08 10 nop ! 1281: 1274 00030B09 # asm("nop"); ! 1282: 1275 00030B09 10 nop ! 1283: 1276 00030B0A # asm("addd _dbl_dummy2"); /* add a '0.0' ( exp ) */ ! 1284: 1277 00030B0A c7 effffff510 addd _dbl_dummy2 ! 1285: 1278 00030B10 # asm("nop"); ! 1286: 1279 00030B10 10 nop ! 1287: 1280 00030B11 # asm("nop"); ! 1288: 1281 00030B11 10 nop ! 1289: 1282 00030B12 # asm("nop"); ! 1290: 1283 00030B12 10 nop ! 1291: 1284 00030B13 # asm("std _dbl_st_acc"); /* store the result ( exp ) */ ! 1292: 1285 00030B13 27 effffff507 std _dbl_st_acc ! 1293: 1286 00030B19 # if( force_loop ) ! 1294: 1287 00030B19 5d effffff501 tstl _force_loop ! 1295: 1288 00030B1F 31 02 jeql L331 ! 1296: 1289 00030B21 # asm("brb _pipe15_8_lp1");; /* run the loop again */ ! 1297: 1290 00030B21 11 c3 brb _pipe15_8_lp1 ! 1298: 1291 00030B23 L331: ! 1299: 1292 00030B23 # /* ! 1300: 1293 00030B23 # * verify the results ! 1301: 1294 00030B23 # */ ! 1302: 1295 00030B23 # if( (dbl_st_acc.m != dbl_expected.m) || /* compare the results */ ! 1303: 1296 00030B23 # (dbl_st_acc.l != dbl_expected.l) ) ! 1304: 1297 00030B23 1d effffff4f7 effffff4f2 cmpl _dbl_st_acc,_dbl_expected ! 1305: 1298 00030B2E 21 0d jneq L9992 ! 1306: 1299 00030B30 1d effffff4ee effffff4e9 cmpl _dbl_st_acc+4,_dbl_expected+4 ! 1307: 1300 00030B3B 31 42 jeql L332 ! 1308: 1301 00030B3D L9992: ! 1309: 1302 00030B3D # { ! 1310: 1303 00030B3D # errcnt++; /* bump the error count */ ! 1311: 1304 00030B3D 6d effffff4dd incl _errcnt ! 1312: 1305 00030B43 # if ( prt_error ) ! 1313: 1306 00030B43 5d effffff4d7 tstl _prt_error ! 1314: 1307 00030B49 31 0d jeql L333 ! 1315: 1308 00030B4B # print_pipe15_er("Cache Data, 3 NO-OPs"); ! 1316: 1309 00030B4B .data 1 ! 1317: 1310 000010a9 * L334: ! 1318: 1311 000010a9 * 436163686520446174612C203 .ascii "Cache Data, 3 NO-OPs\0" ! 1319: 3204E4F2D4F507300 ! 1320: 1312 000010be * .text ! 1321: 1313 00030B4B dd 8f000010a9 pushl $L334 ! 1322: 1314 00030B51 fe 08 ef000002b6 callf $8,_print_pipe15_er ! 1323: 1315 00030B58 # if ( halt_flg ) /* halt on error? */ ! 1324: 1316 00030B58 L333: ! 1325: 1317 00030B58 5d effffff4c2 tstl _halt_flg ! 1326: 1318 00030B5E 31 0d jeql L335 ! 1327: 1319 00030B60 # pipe15_er_hlt( subtest ); ! 1328: 1320 00030B60 dd effffff4ba pushl _subtest ! 1329: 1321 00030B66 fe 08 ef0000041f callf $8,_pipe15_er_hlt ! 1330: 1322 00030B6D # if ( loop_on_err ) { ! 1331: 1323 00030B6D L335: ! 1332: 1324 00030B6D 5d effffff4ad tstl _loop_on_err ! 1333: 1325 00030B73 31 0a jeql L336 ! 1334: 1326 00030B75 # force_loop = TRUE; /* set the force loop flag */ ! 1335: 1327 00030B75 0d 01 effffff4a4 movl $1,_force_loop ! 1336: 1328 00030B7C # asm("brw _pipe15_8_lp1"); /* and loop */ ! 1337: 1329 00030B7C 13 ff67 brw _pipe15_8_lp1 ! 1338: 1330 00030B7F # } ! 1339: 1331 00030B7F # } /* end of compare error */ ! 1340: 1332 00030B7F L336: ! 1341: 1333 00030B7F # } while( index++ < max_divd_1_index ); ! 1342: 1334 00030B7F L332: ! 1343: 1335 00030B7F L329: ! 1344: 1336 00030B7F 0d effffff49b 50 movl _index,r0 ! 1345: 1337 00030B86 6d effffff494 incl _index ! 1346: 1338 00030B8C 1d 50 effffff48d cmpl r0,_max_divd_1_index ! 1347: 1339 00030B93 81 03 13 fed7 jlss L330 ! 1348: 1340 00030B98 L328: ! 1349: 1341 00030B98 # } /* end of subtest 8 */ ! 1350: 1342 00030B98 40 ret#2 ! 1351: 1343 00030B99 .set L324,0x0 ! 1352: 1344 00030B99 L326: ! 1353: 1345 00030B99 13 fec7 jbr L327 ! 1354: 1346 00030B9C .data ! 1355: 1347 00001010 * .text ! 1356: 1348 00030B9C .align 1 ! 1357: 1349 00030B9C .globl _pipe15_9 ! 1358: 1350 00030B9C _pipe15_9: ! 1359: 1351 00030B9C 0000 .word L337 ! 1360: 1352 00030B9E # ! 1361: 1353 00030B9E # ! 1362: 1354 00030B9E # ! 1363: 1355 00030B9E # ! 1364: 1356 00030B9E # ! 1365: 1357 00030B9E # ! 1366: 1358 00030B9E # ! 1367: 1359 00030B9E # ! 1368: 1360 00030B9E # /****************************************************************************** ! 1369: 1361 00030B9E # * ! 1370: 1362 00030B9E # * SUBTEST 9 ! 1371: 1363 00030B9E # * ! 1372: 1364 00030B9E # * Get the data via the FRAME POINTER ( quad word indexed ) ! 1373: 1365 00030B9E # * ! 1374: 1366 00030B9E # * ADDRESSES OF DATA OPERANDS INDEX DATA ! 1375: 1367 00030B9E # * pointer_data,-4 ( FP+40 ) 5 the STF result goes here ! 1376: 1368 00030B9E # * pointer_data-8,-12 ( FP+32 ) 4 <operand #1 data> ! 1377: 1369 00030B9E # * pointer_data-16,-20 ( FP+24 ) 3 <operand #2 data> ! 1378: 1370 00030B9E # * pointer_data-24,-28 ( FP+16 ) 2 < '1.0' data> ! 1379: 1371 00030B9E # * pointer_data-32,-36 ( FP+8 ) 1 < '0.0' data> ! 1380: 1372 00030B9E # * pointer_data-40,-44 ( FP ) 0 point the frame pointer here ! 1381: 1373 00030B9E # * ! 1382: 1374 00030B9E # * NOTE: The double precision instructions are using Quad Word indexing. ! 1383: 1375 00030B9E # ******************************************************************************/ ! 1384: 1376 00030B9E # pipe15_9() ! 1385: 1377 00030B9E # { ! 1386: 1378 00030B9E 13 026a jbr L339 ! 1387: 1379 00030BA1 L340: ! 1388: 1380 00030BA1 # asm("moval (r13),_pre_event_fp"); /* save the frame pointer */ ! 1389: 1381 00030BA1 ed 6d effffff478 moval (r13),_pre_event_fp ! 1390: 1382 00030BA8 # asm("moval (r14),_pre_event_sp"); /* save the stack pointer */ ! 1391: 1383 00030BA8 ed 6e effffff471 moval (r14),_pre_event_sp ! 1392: 1384 00030BAF # force_loop = FALSE; /* clear force_loop flag */ ! 1393: 1385 00030BAF 4d effffff46b clrl _force_loop ! 1394: 1386 00030BB5 # index = 0; ! 1395: 1387 00030BB5 4d effffff465 clrl _index ! 1396: 1388 00030BBB # do ! 1397: 1389 00030BBB L343: ! 1398: 1390 00030BBB # { ! 1399: 1391 00030BBB # sgl_value_1 = divd_1_data[index].op_1.m; /* get op. #1's MSW */ ! 1400: 1392 00030BBB 5c 18 effffff45e 50 mull3 $24,_index,r0 ! 1401: 1393 00030BC3 0d e000000000 effffff452 movl _divd_1_data(r0),_sgl_value_1 ! 1402: 1394 00030BCE # sgl_value_2 = divd_1_data[index].op_1.l; /* get op. #1's LSW */ ! 1403: 1395 00030BCE 5c 18 effffff44b 50 mull3 $24,_index,r0 ! 1404: 1396 00030BD6 0d e000000004 effffff43f movl _divd_1_data+4(r0),_sgl_value_2 ! 1405: 1397 00030BE1 # sgl_value_3 = divd_1_data[index].op_2.m; /* get op. #2's MSW */ ! 1406: 1398 00030BE1 5c 18 effffff438 50 mull3 $24,_index,r0 ! 1407: 1399 00030BE9 0d e000000008 effffff42c movl _divd_1_data+8(r0),_sgl_value_3 ! 1408: 1400 00030BF4 # sgl_value_4 = divd_1_data[index].op_2.l; /* get op. #2's LSW */ ! 1409: 1401 00030BF4 5c 18 effffff425 50 mull3 $24,_index,r0 ! 1410: 1402 00030BFC 0d e00000000c effffff419 movl _divd_1_data+12(r0),_sgl_value_4 ! 1411: 1403 00030C07 # sgl_value_7 = 0x40800000; /* get the '1.0' data */ ! 1412: 1404 00030C07 0d 8f40800000 effffff40e movl $1082130432,_sgl_value_7 ! 1413: 1405 00030C12 # sgl_value_8 = 0; ! 1414: 1406 00030C12 4d effffff408 clrl _sgl_value_8 ! 1415: 1407 00030C18 # dbl_expected = divd_1_data[index].exp; /* get expected results */ ! 1416: 1408 00030C18 5c 18 effffff401 50 mull3 $24,_index,r0 ! 1417: 1409 00030C20 0c 8f00000010 50 addl2 $_divd_1_data+16,r0 ! 1418: 1410 00030C27 0d a004 effffff3f5 movl 4(r0),_dbl_expected+4 ! 1419: 1411 00030C2F 0d 60 effffff3ea movl (r0),_dbl_expected ! 1420: 1412 00030C36 # /* ! 1421: 1413 00030C36 # * If LOOP ON ERROR is set, this is the loop for this subtest. ! 1422: 1414 00030C36 # * The force loop flag is set after the first error. ! 1423: 1415 00030C36 # */ ! 1424: 1416 00030C36 # asm("_pipe15_9_lp1:"); ! 1425: 1417 00030C36 _pipe15_9_lp1: ! 1426: 1418 00030C36 # asm("moval _pointer_data,_sgl_value_9");/* get store data's addr */ ! 1427: 1419 00030C36 ed effffff3e4 effffff3df moval _pointer_data,_sgl_value_9 ! 1428: 1420 00030C41 # sgl_value_9 -= 8; ! 1429: 1421 00030C41 2c 08 effffff3d8 subl2 $8,_sgl_value_9 ! 1430: 1422 00030C48 # asm("movl _sgl_value_2,*_sgl_value_9"); /* set operand #1's LSW */ ! 1431: 1423 00030C48 0d effffff3d2 fffffff3cd movl _sgl_value_2,*_sgl_value_9 ! 1432: 1424 00030C53 # sgl_value_9 -= 4; ! 1433: 1425 00030C53 2c 04 effffff3c6 subl2 $4,_sgl_value_9 ! 1434: 1426 00030C5A # asm("movl _sgl_value_1,*_sgl_value_9"); /* set operand #1's MSW */ ! 1435: 1427 00030C5A 0d effffff3c0 fffffff3bb movl _sgl_value_1,*_sgl_value_9 ! 1436: 1428 00030C65 # sgl_value_9 -= 4; ! 1437: 1429 00030C65 2c 04 effffff3b4 subl2 $4,_sgl_value_9 ! 1438: 1430 00030C6C # asm("movl _sgl_value_4,*_sgl_value_9"); /* set operand #2's LSW */ ! 1439: 1431 00030C6C 0d effffff3ae fffffff3a9 movl _sgl_value_4,*_sgl_value_9 ! 1440: 1432 00030C77 # sgl_value_9 -= 4; ! 1441: 1433 00030C77 2c 04 effffff3a2 subl2 $4,_sgl_value_9 ! 1442: 1434 00030C7E # asm("movl _sgl_value_3,*_sgl_value_9"); /* set operand #2's MSW */ ! 1443: 1435 00030C7E 0d effffff39c fffffff397 movl _sgl_value_3,*_sgl_value_9 ! 1444: 1436 00030C89 # sgl_value_9 -= 4; ! 1445: 1437 00030C89 2c 04 effffff390 subl2 $4,_sgl_value_9 ! 1446: 1438 00030C90 # asm("movl _sgl_value_8,*_sgl_value_9"); /* set '1.0' data's LSW */ ! 1447: 1439 00030C90 0d effffff38a fffffff385 movl _sgl_value_8,*_sgl_value_9 ! 1448: 1440 00030C9B # sgl_value_9 -= 4; ! 1449: 1441 00030C9B 2c 04 effffff37e subl2 $4,_sgl_value_9 ! 1450: 1442 00030CA2 # asm("movl _sgl_value_7,*_sgl_value_9"); /* set '1.0' data's MSW */ ! 1451: 1443 00030CA2 0d effffff378 fffffff373 movl _sgl_value_7,*_sgl_value_9 ! 1452: 1444 00030CAD # sgl_value_9 -= 4; ! 1453: 1445 00030CAD 2c 04 effffff36c subl2 $4,_sgl_value_9 ! 1454: 1446 00030CB4 # asm("movl _sgl_value_8,*_sgl_value_9"); /* set '0.0' data's LSW */ ! 1455: 1447 00030CB4 0d effffff366 fffffff361 movl _sgl_value_8,*_sgl_value_9 ! 1456: 1448 00030CBF # sgl_value_9 -= 4; ! 1457: 1449 00030CBF 2c 04 effffff35a subl2 $4,_sgl_value_9 ! 1458: 1450 00030CC6 # asm("movl _sgl_value_8,*_sgl_value_9"); /* set '0.0' data's MSW */ ! 1459: 1451 00030CC6 0d effffff354 fffffff34f movl _sgl_value_8,*_sgl_value_9 ! 1460: 1452 00030CD1 # sgl_value_9 -= 8; /* get FRAME PTR's value */ ! 1461: 1453 00030CD1 2c 08 effffff348 subl2 $8,_sgl_value_9 ! 1462: 1454 00030CD8 # asm("movl _sgl_value_9,r13"); /* set the FRAME POINTER */ ! 1463: 1455 00030CD8 0d effffff342 5d movl _sgl_value_9,r13 ! 1464: 1456 00030CDF # asm("movl $1,r2"); /* r2 index = 1 quadwords */ ! 1465: 1457 00030CDF 0d 01 52 movl $1,r2 ! 1466: 1458 00030CE2 # asm("movl $2,r3"); /* r3 index = 2 quadwords */ ! 1467: 1459 00030CE2 0d 02 53 movl $2,r3 ! 1468: 1460 00030CE5 # asm("movl $3,r4"); /* r4 index = 3 quadwords */ ! 1469: 1461 00030CE5 0d 03 54 movl $3,r4 ! 1470: 1462 00030CE8 # asm("movl $4,r5"); /* r5 index = 4 quadwords */ ! 1471: 1463 00030CE8 0d 04 55 movl $4,r5 ! 1472: 1464 00030CEB # asm("movl $5,r6"); /* r6 index = 5 quadwords */ ! 1473: 1465 00030CEB 0d 05 56 movl $5,r6 ! 1474: 1466 00030CEE # asm("ldd (r13)[r3]"); /* load a '1.0' ( 0 ) */ ! 1475: 1467 00030CEE 07 436d ldd (r13)[r3] ! 1476: 1468 00030CF1 # asm("muld (r13)[r5]"); /* mult by op. #1 ( op1 ) */ ! 1477: 1469 00030CF1 e7 456d muld (r13)[r5] ! 1478: 1470 00030CF4 # asm("divd (r13)[r4]"); /* divide by op. #2 ( exp ) */ ! 1479: 1471 00030CF4 f7 446d divd (r13)[r4] ! 1480: 1472 00030CF7 # asm("divd (r13)[r3]"); /* divide by '1.0' ( exp ) */ ! 1481: 1473 00030CF7 f7 436d divd (r13)[r3] ! 1482: 1474 00030CFA # asm("addd (r13)[r2]"); /* add '0.0' ( exp ) */ ! 1483: 1475 00030CFA c7 426d addd (r13)[r2] ! 1484: 1476 00030CFD # asm("std (r13)[r6]"); /* store the result ( exp ) */ ! 1485: 1477 00030CFD 27 466d std (r13)[r6] ! 1486: 1478 00030D00 # if( force_loop ) ! 1487: 1479 00030D00 5d effffff31a tstl _force_loop ! 1488: 1480 00030D06 31 03 jeql L344 ! 1489: 1481 00030D08 # asm("brw _pipe15_9_lp1");; /* run the loop again */ ! 1490: 1482 00030D08 13 ff2b brw _pipe15_9_lp1 ! 1491: 1483 00030D0B L344: ! 1492: 1484 00030D0B # /* ! 1493: 1485 00030D0B # * verify the results ! 1494: 1486 00030D0B # */ ! 1495: 1487 00030D0B # asm("moval (r13),_sgl_value_10"); /* save the frame pointer */ ! 1496: 1488 00030D0B ed 6d effffff30e moval (r13),_sgl_value_10 ! 1497: 1489 00030D12 # asm("movl _pointer_data,_sgl_value_6"); /* save the LSW stored */ ! 1498: 1490 00030D12 0d effffff308 effffff303 movl _pointer_data,_sgl_value_6 ! 1499: 1491 00030D1D # asm("movl _pointer_data-4,_sgl_value_5"); /* and the MSW */ ! 1500: 1492 00030D1D 0d effffff2f9 effffff2f8 movl _pointer_data-4,_sgl_value_5 ! 1501: 1493 00030D28 # if( (sgl_value_5 != dbl_expected.m) || /* verify the result... */ ! 1502: 1494 00030D28 # (sgl_value_6 != dbl_expected.l) || /* verify the result... */ ! 1503: 1495 00030D28 # (sgl_value_10 != sgl_value_9) ) /* ... and the final FP */ ! 1504: 1496 00030D28 1d effffff2f2 effffff2ed cmpl _sgl_value_5,_dbl_expected ! 1505: 1497 00030D33 21 1d jneq L9991 ! 1506: 1498 00030D35 1d effffff2e5 effffff2e4 cmpl _sgl_value_6,_dbl_expected+4 ! 1507: 1499 00030D40 21 10 jneq L9991 ! 1508: 1500 00030D42 1d effffff2d8 effffff2d3 cmpl _sgl_value_10,_sgl_value_9 ! 1509: 1501 00030D4D 21 03 13 0091 jeql L345 ! 1510: 1502 00030D52 L9991: ! 1511: 1503 00030D52 # { ! 1512: 1504 00030D52 # asm("movl _pre_event_fp,r13"); /* restore frame pointer */ ! 1513: 1505 00030D52 0d effffff2c8 5d movl _pre_event_fp,r13 ! 1514: 1506 00030D59 # asm("movl _pre_event_sp,r14"); /* restore stack pointer */ ! 1515: 1507 00030D59 0d effffff2c1 5e movl _pre_event_sp,r14 ! 1516: 1508 00030D60 # errcnt++; /* bump the error count */ ! 1517: 1509 00030D60 6d effffff2ba incl _errcnt ! 1518: 1510 00030D66 # if ( prt_error ) { ! 1519: 1511 00030D66 5d effffff2b4 tstl _prt_error ! 1520: 1512 00030D6C 31 4e jeql L346 ! 1521: 1513 00030D6E # print_pipe15_er("indexed FP addressing.\n"); ! 1522: 1514 00030D6E .data 1 ! 1523: 1515 000010be * L347: ! 1524: 1516 000010be * 696E646578656420465020616 .ascii "indexed FP addressing.\12\0" ! 1525: 46472657373696E672E0A00 ! 1526: 1517 000010d6 * .text ! 1527: 1518 00030D6E dd 8f000010be pushl $L347 ! 1528: 1519 00030D74 fe 08 ef00000093 callf $8,_print_pipe15_er ! 1529: 1520 00030D7B # writes("final Frame Pointer = "); ! 1530: 1521 00030D7B .data 1 ! 1531: 1522 000010d6 * L348: ! 1532: 1523 000010d6 * 66696E616C204672616D65205 .ascii "final Frame Pointer = \0" ! 1533: 06F696E746572203D2000 ! 1534: 1524 000010ed * .text ! 1535: 1525 00030D7B dd 8f000010d6 pushl $L348 ! 1536: 1526 00030D81 fe 08 effffff298 callf $8,_writes ! 1537: 1527 00030D88 # write32h( sgl_value_10 ); ! 1538: 1528 00030D88 dd effffff292 pushl _sgl_value_10 ! 1539: 1529 00030D8E fe 08 effffff28b callf $8,_write32h ! 1540: 1530 00030D95 # writes(", expected FP = "); ! 1541: 1531 00030D95 .data 1 ! 1542: 1532 000010ed * L350: ! 1543: 1533 000010ed * 2C20206578706563746564204 .ascii ", expected FP = \0" ! 1544: 650203D2000 ! 1545: 1534 000010ff * .text ! 1546: 1535 00030D95 dd 8f000010ed pushl $L350 ! 1547: 1536 00030D9B fe 08 effffff27e callf $8,_writes ! 1548: 1537 00030DA2 # write32h( sgl_value_9 ); ! 1549: 1538 00030DA2 dd effffff278 pushl _sgl_value_9 ! 1550: 1539 00030DA8 fe 08 effffff271 callf $8,_write32h ! 1551: 1540 00030DAF # writes(" \n"); ! 1552: 1541 00030DAF .data 1 ! 1553: 1542 000010ff * L351: ! 1554: 1543 000010ff * 200A00 .ascii " \12\0" ! 1555: 1544 00001102 * .text ! 1556: 1545 00030DAF dd 8f000010ff pushl $L351 ! 1557: 1546 00030DB5 fe 08 effffff264 callf $8,_writes ! 1558: 1547 00030DBC # } ! 1559: 1548 00030DBC # if ( halt_flg ) ! 1560: 1549 00030DBC L346: ! 1561: 1550 00030DBC 5d effffff25e tstl _halt_flg ! 1562: 1551 00030DC2 31 0d jeql L352 ! 1563: 1552 00030DC4 # pipe15_er_hlt( subtest ); ! 1564: 1553 00030DC4 dd effffff256 pushl _subtest ! 1565: 1554 00030DCA fe 08 ef000001bb callf $8,_pipe15_er_hlt ! 1566: 1555 00030DD1 # if ( loop_on_err ) { ! 1567: 1556 00030DD1 L352: ! 1568: 1557 00030DD1 5d effffff249 tstl _loop_on_err ! 1569: 1558 00030DD7 31 0a jeql L353 ! 1570: 1559 00030DD9 # force_loop = TRUE; /* set the force loop flag */ ! 1571: 1560 00030DD9 0d 01 effffff240 movl $1,_force_loop ! 1572: 1561 00030DE0 # asm("brw _pipe15_9_lp1"); /* and loop */ ! 1573: 1562 00030DE0 13 fe53 brw _pipe15_9_lp1 ! 1574: 1563 00030DE3 # } ! 1575: 1564 00030DE3 # } /* end of compare error */ ! 1576: 1565 00030DE3 L353: ! 1577: 1566 00030DE3 # } while( index++ < max_divd_1_index ); ! 1578: 1567 00030DE3 L345: ! 1579: 1568 00030DE3 L342: ! 1580: 1569 00030DE3 0d effffff237 50 movl _index,r0 ! 1581: 1570 00030DEA 6d effffff230 incl _index ! 1582: 1571 00030DF0 1d 50 effffff229 cmpl r0,_max_divd_1_index ! 1583: 1572 00030DF7 81 03 13 fdbf jlss L343 ! 1584: 1573 00030DFC L341: ! 1585: 1574 00030DFC # asm("movl _pre_event_fp,r13"); /* restore the frame pointer */ ! 1586: 1575 00030DFC 0d effffff21e 5d movl _pre_event_fp,r13 ! 1587: 1576 00030E03 # asm("movl _pre_event_sp,r14"); /* restore the stack pointer */ ! 1588: 1577 00030E03 0d effffff217 5e movl _pre_event_sp,r14 ! 1589: 1578 00030E0A # } /* end of subtest 9 */ ! 1590: 1579 00030E0A 40 ret#2 ! 1591: 1580 00030E0B .set L337,0x0 ! 1592: 1581 00030E0B L339: ! 1593: 1582 00030E0B 13 fd93 jbr L340 ! 1594: 1583 00030E0E .data ! 1595: 1584 00001010 * .text ! 1596: 1585 00030E0E .align 1 ! 1597: 1586 00030E0E .globl _print_pipe15_er ! 1598: 1587 00030E0E _print_pipe15_er: ! 1599: 1588 00030E0E 0000 .word L354 ! 1600: 1589 00030E10 # ! 1601: 1590 00030E10 # ! 1602: 1591 00030E10 # /****************************************************************************** ! 1603: 1592 00030E10 # * ! 1604: 1593 00030E10 # * ERROR ROUTINE ! 1605: 1594 00030E10 # * ! 1606: 1595 00030E10 # * print an error in the following form ! 1607: 1596 00030E10 # * ! 1608: 1597 00030E10 # *operand 1 = xxxxxxxx xxxxxxxx, final Acc = xxxxxxxx xxxxxxxx, index = dd ! 1609: 1598 00030E10 # *operand 2 = xxxxxxxx xxxxxxxx, expected Acc = xxxxxxxx xxxxxxxx ! 1610: 1599 00030E10 # * ! 1611: 1600 00030E10 # ******************************************************************************/ ! 1612: 1601 00030E10 # print_pipe15_er(msg) ! 1613: 1602 00030E10 # char *msg; ! 1614: 1603 00030E10 # { ! 1615: 1604 00030E10 13 0175 jbr L356 ! 1616: 1605 00030E13 L357: ! 1617: 1606 00030E13 # writes(" \n"); /* start a new print line */ ! 1618: 1607 00030E13 .data 1 ! 1619: 1608 00001102 * L358: ! 1620: 1609 00001102 * 200A00 .ascii " \12\0" ! 1621: 1610 00001105 * .text ! 1622: 1611 00030E13 dd 8f00001102 pushl $L358 ! 1623: 1612 00030E19 fe 08 effffff200 callf $8,_writes ! 1624: 1613 00030E20 # writes("cycle: "); ! 1625: 1614 00030E20 .data 1 ! 1626: 1615 00001105 * L359: ! 1627: 1616 00001105 * 6379636C653A2000 .ascii "cycle: \0" ! 1628: 1617 0000110d * .text ! 1629: 1618 00030E20 dd 8f00001105 pushl $L359 ! 1630: 1619 00030E26 fe 08 effffff1f3 callf $8,_writes ! 1631: 1620 00030E2D # writed( cycle ); ! 1632: 1621 00030E2D dd effffff1ed pushl _cycle ! 1633: 1622 00030E33 fe 08 effffff1e6 callf $8,_writed ! 1634: 1623 00030E3A # writes(" test "); ! 1635: 1624 00030E3A .data 1 ! 1636: 1625 0000110d * L361: ! 1637: 1626 0000110d * 20746573742000 .ascii " test \0" ! 1638: 1627 00001114 * .text ! 1639: 1628 00030E3A dd 8f0000110d pushl $L361 ! 1640: 1629 00030E40 fe 08 effffff1d9 callf $8,_writes ! 1641: 1630 00030E47 # writed( test_no ); ! 1642: 1631 00030E47 dd effffff1d3 pushl _test_no ! 1643: 1632 00030E4D fe 08 effffff1cc callf $8,_writed ! 1644: 1633 00030E54 # writes(" (Pipe 15), subtest "); ! 1645: 1634 00030E54 .data 1 ! 1646: 1635 00001114 * L362: ! 1647: 1636 00001114 * 20202850697065203135292C2 .ascii " (Pipe 15), subtest \0" ! 1648: 0737562746573742000 ! 1649: 1637 0000112a * .text ! 1650: 1638 00030E54 dd 8f00001114 pushl $L362 ! 1651: 1639 00030E5A fe 08 effffff1bf callf $8,_writes ! 1652: 1640 00030E61 # writed( subtest ); ! 1653: 1641 00030E61 dd effffff1b9 pushl _subtest ! 1654: 1642 00030E67 fe 08 effffff1b2 callf $8,_writed ! 1655: 1643 00030E6E # writes(" error - "); ! 1656: 1644 00030E6E .data 1 ! 1657: 1645 0000112a * L363: ! 1658: 1646 0000112a * 206572726F72202D2000 .ascii " error - \0" ! 1659: 1647 00001134 * .text ! 1660: 1648 00030E6E dd 8f0000112a pushl $L363 ! 1661: 1649 00030E74 fe 08 effffff1a5 callf $8,_writes ! 1662: 1650 00030E7B # writes( msg ); ! 1663: 1651 00030E7B dd ad04 pushl 4(fp) ! 1664: 1652 00030E7E fe 08 effffff19b callf $8,_writes ! 1665: 1653 00030E85 # writec('\n'); ! 1666: 1654 00030E85 dd 0a pushl $10 ! 1667: 1655 00030E87 fe 08 effffff192 callf $8,_writec ! 1668: 1656 00030E8E # writes(" LDD(1.0) MULD(op1) DIVD(op2) DIVD(1.0) ADDD(0.0) STD\n"); ! 1669: 1657 00030E8E .data 1 ! 1670: 1658 00001134 * L365: ! 1671: 1659 00001134 * 204C444428312E302920204D5 .ascii " LDD(1.0) MULD(op1) DIVD(op2) DIVD(1.0) ADDD(0.0) STD\12\0" ! 1672: 54C44286F7031292020444956 ! 1673: 44286F7032292020444956442 ! 1674: 8312E30292020414444442830 ! 1675: 2E302920205354440A00 ! 1676: 1660 00001170 * .text ! 1677: 1661 00030E8E dd 8f00001134 pushl $L365 ! 1678: 1662 00030E94 fe 08 effffff185 callf $8,_writes ! 1679: 1663 00030E9B # writes("operand 1 = "); ! 1680: 1664 00030E9B .data 1 ! 1681: 1665 00001170 * L366: ! 1682: 1666 00001170 * 6F706572616E642031203D200 .ascii "operand 1 = \0" ! 1683: 0 ! 1684: 1667 0000117d * .text ! 1685: 1668 00030E9B dd 8f00001170 pushl $L366 ! 1686: 1669 00030EA1 fe 08 effffff178 callf $8,_writes ! 1687: 1670 00030EA8 # write32h( sgl_value_1 ); ! 1688: 1671 00030EA8 dd effffff172 pushl _sgl_value_1 ! 1689: 1672 00030EAE fe 08 effffff16b callf $8,_write32h ! 1690: 1673 00030EB5 # writec(' '); ! 1691: 1674 00030EB5 dd 20 pushl $32 ! 1692: 1675 00030EB7 fe 08 effffff162 callf $8,_writec ! 1693: 1676 00030EBE # write32h( sgl_value_2 ); ! 1694: 1677 00030EBE dd effffff15c pushl _sgl_value_2 ! 1695: 1678 00030EC4 fe 08 effffff155 callf $8,_write32h ! 1696: 1679 00030ECB # writes(", final Acc = "); ! 1697: 1680 00030ECB .data 1 ! 1698: 1681 0000117d * L367: ! 1699: 1682 0000117d * 2C2020202066696E616C20416 .ascii ", final Acc = \0" ! 1700: 363203D2000 ! 1701: 1683 0000118f * .text ! 1702: 1684 00030ECB dd 8f0000117d pushl $L367 ! 1703: 1685 00030ED1 fe 08 effffff148 callf $8,_writes ! 1704: 1686 00030ED8 # write32h( dbl_st_acc.m ); ! 1705: 1687 00030ED8 dd effffff142 pushl _dbl_st_acc ! 1706: 1688 00030EDE fe 08 effffff13b callf $8,_write32h ! 1707: 1689 00030EE5 # writec(' '); ! 1708: 1690 00030EE5 dd 20 pushl $32 ! 1709: 1691 00030EE7 fe 08 effffff132 callf $8,_writec ! 1710: 1692 00030EEE # write32h( dbl_st_acc.l ); ! 1711: 1693 00030EEE dd effffff130 pushl _dbl_st_acc+4 ! 1712: 1694 00030EF4 fe 08 effffff125 callf $8,_write32h ! 1713: 1695 00030EFB # writes(", index = "); ! 1714: 1696 00030EFB .data 1 ! 1715: 1697 0000118f * L368: ! 1716: 1698 0000118f * 2C202020696E646578203D200 .ascii ", index = \0" ! 1717: 0 ! 1718: 1699 0000119c * .text ! 1719: 1700 00030EFB dd 8f0000118f pushl $L368 ! 1720: 1701 00030F01 fe 08 effffff118 callf $8,_writes ! 1721: 1702 00030F08 # writed( index ); ! 1722: 1703 00030F08 dd effffff112 pushl _index ! 1723: 1704 00030F0E fe 08 effffff10b callf $8,_writed ! 1724: 1705 00030F15 # writec('\n'); ! 1725: 1706 00030F15 dd 0a pushl $10 ! 1726: 1707 00030F17 fe 08 effffff102 callf $8,_writec ! 1727: 1708 00030F1E # writes("operand 2 = "); ! 1728: 1709 00030F1E .data 1 ! 1729: 1710 0000119c * L369: ! 1730: 1711 0000119c * 6F706572616E642032203D200 .ascii "operand 2 = \0" ! 1731: 0 ! 1732: 1712 000011a9 * .text ! 1733: 1713 00030F1E dd 8f0000119c pushl $L369 ! 1734: 1714 00030F24 fe 08 effffff0f5 callf $8,_writes ! 1735: 1715 00030F2B # write32h( sgl_value_3 ); ! 1736: 1716 00030F2B dd effffff0ef pushl _sgl_value_3 ! 1737: 1717 00030F31 fe 08 effffff0e8 callf $8,_write32h ! 1738: 1718 00030F38 # writec(' '); ! 1739: 1719 00030F38 dd 20 pushl $32 ! 1740: 1720 00030F3A fe 08 effffff0df callf $8,_writec ! 1741: 1721 00030F41 # write32h( sgl_value_4 ); ! 1742: 1722 00030F41 dd effffff0d9 pushl _sgl_value_4 ! 1743: 1723 00030F47 fe 08 effffff0d2 callf $8,_write32h ! 1744: 1724 00030F4E # writes(", expected Acc = "); ! 1745: 1725 00030F4E .data 1 ! 1746: 1726 000011a9 * L370: ! 1747: 1727 000011a9 * 2C20657870656374656420416 .ascii ", expected Acc = \0" ! 1748: 363203D2000 ! 1749: 1728 000011bb * .text ! 1750: 1729 00030F4E dd 8f000011a9 pushl $L370 ! 1751: 1730 00030F54 fe 08 effffff0c5 callf $8,_writes ! 1752: 1731 00030F5B # write32h( dbl_expected.m ); ! 1753: 1732 00030F5B dd effffff0bf pushl _dbl_expected ! 1754: 1733 00030F61 fe 08 effffff0b8 callf $8,_write32h ! 1755: 1734 00030F68 # writec(' '); ! 1756: 1735 00030F68 dd 20 pushl $32 ! 1757: 1736 00030F6A fe 08 effffff0af callf $8,_writec ! 1758: 1737 00030F71 # write32h( dbl_expected.l ); ! 1759: 1738 00030F71 dd effffff0ad pushl _dbl_expected+4 ! 1760: 1739 00030F77 fe 08 effffff0a2 callf $8,_write32h ! 1761: 1740 00030F7E # writec('\n'); ! 1762: 1741 00030F7E dd 0a pushl $10 ! 1763: 1742 00030F80 fe 08 effffff099 callf $8,_writec ! 1764: 1743 00030F87 # } ! 1765: 1744 00030F87 40 ret#2 ! 1766: 1745 00030F88 .set L354,0x0 ! 1767: 1746 00030F88 L356: ! 1768: 1747 00030F88 13 fe88 jbr L357 ! 1769: 1748 00030F8B .data ! 1770: 1749 00001010 * .text ! 1771: 1750 00030F8B 00 .align 1 ! 1772: 1751 00030F8C .globl _pipe15_er_hlt ! 1773: 1752 00030F8C _pipe15_er_hlt: ! 1774: 1753 00030F8C 0000 .word L371 ! 1775: 1754 00030F8E # ! 1776: 1755 00030F8E # ! 1777: 1756 00030F8E # ! 1778: 1757 00030F8E # ! 1779: 1758 00030F8E # ! 1780: 1759 00030F8E # /****************************************************************************** ! 1781: 1760 00030F8E # * ! 1782: 1761 00030F8E # * HALT ON ERROR ROUTINE ! 1783: 1762 00030F8E # * ! 1784: 1763 00030F8E # * halt with the necessary information saved in the registers ! 1785: 1764 00030F8E # * ! 1786: 1765 00030F8E # ******************************************************************************/ ! 1787: 1766 00030F8E # pipe15_er_hlt( subtest ) ! 1788: 1767 00030F8E # int subtest; ! 1789: 1768 00030F8E # { ! 1790: 1769 00030F8E 13 0099 jbr L373 ! 1791: 1770 00030F91 L374: ! 1792: 1771 00030F91 # sgl_value_5 = dbl_st_acc.m; ! 1793: 1772 00030F91 0d effffff089 effffff084 movl _dbl_st_acc,_sgl_value_5 ! 1794: 1773 00030F9C # sgl_value_6 = dbl_st_acc.l; ! 1795: 1774 00030F9C 0d effffff082 effffff079 movl _dbl_st_acc+4,_sgl_value_6 ! 1796: 1775 00030FA7 # sgl_value_7 = dbl_expected.m; ! 1797: 1776 00030FA7 0d effffff073 effffff06e movl _dbl_expected,_sgl_value_7 ! 1798: 1777 00030FB2 # sgl_value_8 = dbl_expected.l; ! 1799: 1778 00030FB2 0d effffff06c effffff063 movl _dbl_expected+4,_sgl_value_8 ! 1800: 1779 00030FBD # asm("movl _test_no,r0"); /* r0 = test number */ ! 1801: 1780 00030FBD 0d effffff05d 50 movl _test_no,r0 ! 1802: 1781 00030FC4 # asm("movl _subtest,r1"); /* r1 = subtest number */ ! 1803: 1782 00030FC4 0d effffff056 51 movl _subtest,r1 ! 1804: 1783 00030FCB # asm("movl $1,r2"); /* r2 = error code */ ! 1805: 1784 00030FCB 0d 01 52 movl $1,r2 ! 1806: 1785 00030FCE # asm("movl _cycle,r3"); /* r3 = cycle count */ ! 1807: 1786 00030FCE 0d effffff04c 53 movl _cycle,r3 ! 1808: 1787 00030FD5 # asm("movl _sgl_value_1,r4"); /* r4 = MSW operand one */ ! 1809: 1788 00030FD5 0d effffff045 54 movl _sgl_value_1,r4 ! 1810: 1789 00030FDC # asm("movl _sgl_value_2,r5"); /* r5 = LSW operand one */ ! 1811: 1790 00030FDC 0d effffff03e 55 movl _sgl_value_2,r5 ! 1812: 1791 00030FE3 # asm("movl _sgl_value_3,r6"); /* r6 = MSW operand two */ ! 1813: 1792 00030FE3 0d effffff037 56 movl _sgl_value_3,r6 ! 1814: 1793 00030FEA # asm("movl _sgl_value_4,r7"); /* r7 = LSW operand two */ ! 1815: 1794 00030FEA 0d effffff030 57 movl _sgl_value_4,r7 ! 1816: 1795 00030FF1 # asm("movl _sgl_value_5,r8"); /* r8 = MSW operand stored */ ! 1817: 1796 00030FF1 0d effffff029 58 movl _sgl_value_5,r8 ! 1818: 1797 00030FF8 # asm("movl _sgl_value_6,r9"); /* r9 = LSW operand stored */ ! 1819: 1798 00030FF8 0d effffff022 59 movl _sgl_value_6,r9 ! 1820: 1799 00030FFF # asm("movl _sgl_value_7,r10"); /* r10 = MSW operand exp */ ! 1821: 1800 00030FFF 0d effffff01b 5a movl _sgl_value_7,r10 ! 1822: 1801 00031006 # asm("movl _sgl_value_8,r11"); /* r11 = LSW operand exp */ ! 1823: 1802 00031006 0d effffff014 5b movl _sgl_value_8,r11 ! 1824: 1803 0003100D # asm("movl _index,r12"); /* r12 = data index */ ! 1825: 1804 0003100D 0d effffff00d 5c movl _index,r12 ! 1826: 1805 00031014 # if( subtest == 9 ) { ! 1827: 1806 00031014 1d ad04 09 cmpl 4(fp),$9 ! 1828: 1807 00031018 21 0e jneq L375 ! 1829: 1808 0003101A # asm("movl _sgl_value_10,r13"); /* r13 = final FP value */ ! 1830: 1809 0003101A 0d effffff000 5d movl _sgl_value_10,r13 ! 1831: 1810 00031021 # asm("movl _sgl_value_9,r14"); /* r14 = expected FP value */ ! 1832: 1811 00031021 0d efffffeff9 5e movl _sgl_value_9,r14 ! 1833: 1812 00031028 # }; ! 1834: 1813 00031028 L375: ! 1835: 1814 00031028 # asm(".globl _pipe15_1_hlt"); ! 1836: 1815 00031028 .globl _pipe15_1_hlt ! 1837: 1816 00031028 # asm("_pipe15_1_hlt:"); /* PC after the halt */ ! 1838: 1817 00031028 _pipe15_1_hlt: ! 1839: 1818 00031028 # asm("halt"); /* HALT ... */ ! 1840: 1819 00031028 00 halt ! 1841: 1820 00031029 # } /* end of halt on error */ ! 1842: 1821 00031029 40 ret#2 ! 1843: 1822 0003102A .set L371,0x0 ! 1844: 1823 0003102A L373: ! 1845: 1824 0003102A 13 ff64 jbr L374 ! 1846: 1825 0003102D .data ! 1847: 1825 0006104D .data
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