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1.1 root 1: #include "fpp_defs.h"
2:
3:
4: /***************************************************************************
5: *
6: * PUSHD - PUSH FLOATING POINT DOUBLE-PRECISION OPERAND ONTO STACK
7: *
8: * PUSHD TEST MONITOR
9: *
10: * Load a double precision operand into the accumulator and then push it
11: * onto the stack.
12: ***************************************************************************/
13: pushd()
14: {
15: asm(".globl _pushd_t");
16: asm("_pushd_t:"); /* entry address */
17: if( (cycle == 1) && (prt_hdrs) ) /* print headers on 1st cycle */
18: writes(" PUSHD");
19: pushd_1(); /* ldd/pushd data patterns */
20: pushd_2(); /* register corruption test */
21: if( !no_fpp_wcs )
22: pushd_3(); /* PSL test */
23: asm("jmp *return"); /* return to the test monitor */
24: }
25:
26:
27:
28: /************************************************************************
29: *
30: * SUBTEST 1 - load / push / pop / compare
31: *
32: ************************************************************************/
33: pushd_1()
34: {
35: force_loop = FALSE;
36: index = 0;
37: subtest = 1;
38: do {
39: dbl_ld_acc = ldd_1_data[index].ld; /* get data to load */
40: dbl_expected = ldd_1_data[index].exp; /* get expected results */
41: if( !(dbl_ld_acc.m & 0x7f800000) ) {
42: dbl_expected.m = 0;
43: dbl_expected.l = 0; /* ignore bad 0's */
44: }
45: /*
46: * If LOOP ON ERROR is set, this is the loop for this subtest.
47: * The force loop flag is set after the first error.
48: */
49: asm("_pushd_1_lp1:");
50: asm("moval (sp),_pre_event_sp"); /* save the pre-push SP */
51: asm("ldd _dbl_ld_acc"); /* LOAD the (dbl) value */
52: asm("pushd"); /* PUSH the data */
53: asm("moval (sp),_post_event_sp"); /* save the post-push SP */
54: asm("movl (sp)+,_pop_val_1"); /* POP the MS word */
55: asm("movl (sp)+,_pop_val_2"); /* POP the LS word */
56: asm("std _dbl_st_acc"); /* save the acc */
57: if( force_loop )
58: asm("brb _pushd_1_lp1"); /* run the loop again */
59: sgl_dummy1 = pre_event_sp - 8; /* get expected final SP */
60: sgl_value_7 = post_event_sp - pre_event_sp; /* get amount pushed */
61: if( (dbl_expected.m != pop_val_1) || /* verify stack data */
62: (dbl_expected.l != pop_val_2) ||
63: (post_event_sp != sgl_dummy1) ) {
64: errcnt++; /* bump the error count */
65: if ( prt_error ) {
66: writes("\ncycle: ");
67: writed( cycle );
68: writes(" PUSHD test ");
69: writed( test_no );
70: writes(", subtest 1 (Cache Data) - WRONG DATA PUSHED\n");
71: print_pushd_data();
72: writes(", data pushed = ");
73: write32h( pop_val_1 );
74: writec(' ');
75: write32h( pop_val_2 );
76: writes(", index = ");
77: writed( index );
78: writec('\n');
79: writes(" final Acc = ");
80: write32h( dbl_st_acc.m );
81: writec(' ');
82: write32h( dbl_st_acc.l );
83: writes(", exp. data = ");
84: write32h( dbl_expected.m );
85: writec(' ');
86: write32h( dbl_expected.l );
87: writec('\n');
88: }
89: if ( halt_flg ) /* halt on error? */
90: pushd_er_halt( BAD_STORE_HLT );
91: if ( loop_on_err )
92: {
93: force_loop = TRUE; /* set the force loop flag */
94: asm("brw _pushd_1_lp1"); /* and loop on the error */
95: } /* end of loop-on-error */
96: } /* end of data compare error */
97: if( ( post_event_sp - pre_event_sp ) == 2 ) {/* ver stack data */
98: errcnt++; /* bump the error count */
99: if ( prt_error ) {
100: writes("\ncycle: ");
101: writed( cycle );
102: writes(" PUSHD test ");
103: writed( test_no );
104: writes(", subtest 1 (Data Pat.) - WRONG PUSH COUNT\n");
105: print_pushd_data();
106: writes(", ");
107: writed( sgl_value_7 );
108: writes(" longwords pushed, ");
109: writes("2 expected");
110: writec('\n');
111: writes(" final Acc = ");
112: write32h( dbl_st_acc.m );
113: writec(' ');
114: write32h( dbl_st_acc.l );
115: writec('\n');
116: }
117: if ( halt_flg ) /* halt on error? */
118: pushd_er_halt( PUSH_CNT_HLT );
119: if ( loop_on_err )
120: {
121: force_loop = TRUE; /* set the force loop flag */
122: asm("brw _pushd_1_lp1"); /* and loop on the error */
123: } /* end of loop-on-error */
124: } /* end of push count error */
125: if( ( dbl_st_acc.m != dbl_expected.m ) &&
126: ( dbl_st_acc.l != dbl_expected.l ) ) {
127: errcnt++; /* bump the error count */
128: if ( prt_error )
129: {
130: writes("\ncycle: ");
131: writed( cycle );
132: writes(" PUSHD test ");
133: writed( test_no );
134: writes(", subtest 1 (Acc. Corr.) - BAD FINAL ACC\n");
135: print_pushd_data();
136: writes(", data pushed = ");
137: write32h( pop_val_1 );
138: writec(' ');
139: write32h( pop_val_2 );
140: writes(", index = ");
141: writed( index );
142: writec('\n');
143: writes(" final Acc = ");
144: write32h( dbl_st_acc.m );
145: writec(' ');
146: write32h( dbl_st_acc.l );
147: writes(", Acc expected = ");
148: write32h( dbl_expected.m );
149: writec(' ');
150: write32h( dbl_expected.l );
151: writec('\n');
152: }
153: if ( halt_flg ) /* halt on error? */
154: pushd_er_halt( BAD_ACC_HLT );
155: if ( loop_on_err )
156: {
157: force_loop = TRUE; /* set the force loop flag */
158: asm("brw _pushd_1_lp1"); /* and loop on the error */
159: } /* end of loop-on-error */
160: } /* end of acc corr error */
161: } while( index++ < max_ldd_1_index );
162: } /* end of subtest 1 */
163:
164:
165:
166: /************************************************************************
167: *
168: * SUBTEST 2 - register corruption test
169: *
170: ************************************************************************/
171: pushd_2()
172: {
173: force_loop = FALSE;
174: subtest = 2;
175: index = 0;
176: do
177: {
178: fill_reg_buf( load_regs ); /* Set the values that */
179: dbl_ld_acc = ldd_1_data[index].ld; /* get data to load */
180: dbl_expected = ldd_1_data[index].exp; /* get expected results */
181: /*
182: * If LOOP ON ERROR is set, this is the loop for this subtest.
183: * The force loop flag is set after the first error.
184: */
185: asm("_pushd_2_lp1:");
186: asm("ldd _dbl_ld_acc"); /* LOAD the (dbl) value */
187: asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
188: asm("nop");
189: asm("pushd"); /* push the accumulator */
190: asm("nop");
191: asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
192: if( force_loop )
193: asm("brb _pushd_2_lp1");; /* run the loop again */
194: index2 = 0;
195: while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
196: index2++; /* check reg values */
197: if( index2 < 13 ) { /* error if index2 < 13 */
198: errcnt++; /* bump the error count */
199: if ( prt_error ) {
200: writes("\ncycle: ");
201: writed( cycle );
202: writes(" PUSHD test ");
203: writed( test_no );
204: writes(", subtest 2 - A REGISTER WAS MODIFIED\n");
205: print_pushd_data();
206: writes(", pushed = ");
207: write32h( dbl_ld_acc.m );
208: writec(' ');
209: write32h( dbl_ld_acc.l );
210: writec('\n');
211: writes("register "); /* print the information */
212: writed( index2 ); /* about the corrupted */
213: writes(" = "); /* register */
214: write32h( store_regs[index2] );
215: writes(", should be = ");
216: write32h( load_regs[index2] );
217: writes("\n");
218: }
219: if ( halt_flg ) /* halt on error? */
220: pushd_er_halt( BAD_REG_HLT );
221: if ( loop_on_err ) {
222: force_loop = TRUE; /* set the force loop flag */
223: asm("jmp _pushd_2_lp1"); /* and loop */
224: } /* end of loop-on-error */
225: } /* end of compare error */
226: } while( index++ < max_ldd_1_index );
227: } /* end of subtest 2 */
228:
229:
230:
231: /************************************************************************
232: *
233: * SUBTEST 3 - PUSHD status test
234: *
235: ************************************************************************/
236: pushd_3()
237: {
238: force_loop = FALSE;
239: subtest = 3;
240: index = 0;
241: do {
242: dbl_ld_acc = ldd_1_data[index].ld; /* get the operand */
243: status_index = 0; /* clear the status index */
244: do {
245: sgl_dummy1 = status_array[status_index]; /* array = +, -, 0 */
246: /*
247: * If LOOP ON ERROR is set, this is the loop for this subtest.
248: * The force loop flag is set after the first error.
249: */
250: asm("_pushd_3_lp1:");
251: asm("ldd _dbl_ld_acc"); /* load the operand */
252: asm("tstl _sgl_dummy1"); /* generate initial status */
253: asm("movpsl _init_psl"); /* save the initial status */
254: asm("nop");
255: asm("pushd"); /* push the accumulator */
256: asm("nop");
257: asm("movpsl _psl_val"); /* save the final status */
258: asm("std _dbl_st_acc"); /* save the acc */
259: if( force_loop ) /* loop? */
260: asm("brb _pushd_3_lp1");; /* run the loop again */
261: exp_psl = init_psl; /* get the initial PSL */
262: exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
263: if( !(dbl_ld_acc.m & 0x7f800000) )
264: exp_psl |= PSL_Z; /* expect the ZERO bit set */
265: else if( dbl_ld_acc.m & 0x80000000 )
266: exp_psl |= PSL_N; /* expect the NEG bit set */
267: if( psl_val != exp_psl ) { /* COMPARE the values */
268: errcnt++; /* bump the error count */
269: if ( prt_error ) {
270: writes(" \n"); /* start a new print line */
271: writes("cycle: ");
272: writed( cycle );
273: writes(" PUSHD test ");
274: writed( test_no );
275: writes(", subtest 3 - INCORRECT FINAL PSL\n");
276: print_pushd_data();
277: writes(", pushed = ");
278: write32h( dbl_ld_acc.m );
279: writec(' ');
280: write32h( dbl_ld_acc.l );
281: writec('\n');
282: writes("initial PSL = ");
283: write32h( init_psl );
284: writes(", final PSL = ");
285: write32h( psl_val );
286: writes(", expected PSL = ");
287: write32h( exp_psl );
288: writec('\n');
289: }
290: if ( halt_flg ) /* halt on error? */
291: pushd_er_halt( BAD_PSL_HLT );
292: if ( loop_on_err ) {
293: force_loop = TRUE; /* set the force loop flag */
294: asm("jmp _pushd_3_lp1"); /* and loop */
295: }; /* end of loop-on-error */
296: } /* end of compare error */
297: } while( ++status_index < 3 );
298: } while( index++ < max_ldd_1_index );
299: } /* end of subtest 3 */
300:
301:
302:
303: /**************************************************************************
304: *
305: * PRINT THE DATA AND STORE RESULTS
306: *
307: * initial Acc = xxxxxxxx xxxxxxxx, stored = xxxxxxxx xxxxxxxx, index = xx
308: * operand = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx
309: **************************************************************************/
310: print_pushd_data()
311: {
312: writes("initial Acc = ");
313: write32h( dbl_ld_acc.m );
314: writec(' ');
315: write32h( dbl_ld_acc.l );
316: }
317:
318:
319:
320: /**************************************************************************
321: *
322: * HALT ON ERROR ROUTINE
323: *
324: **************************************************************************/
325: pushd_er_halt( halt_code )
326: int halt_code;
327: {
328: sgl_value_1 = dbl_ld_acc.m;
329: sgl_value_2 = dbl_ld_acc.l;
330: sgl_value_3 = dbl_st_acc.m;
331: sgl_value_4 = dbl_st_acc.l;
332: sgl_value_5 = pop_val_1;
333: sgl_value_6 = pop_val_2;
334: sgl_dummy1 = halt_code; /* get the error type */
335: asm("movl _test_no,r0"); /* r0 = test number */
336: asm("movl _subtest,r1"); /* r1 = subtest number */
337: asm("movl _sgl_dummy1,r2"); /* r2 = error code */
338: asm("movl _cycle,r3"); /* r3 = cycle count */
339: asm("movl _sgl_value_1,r4"); /* r4 = MS loaded */
340: asm("movl _sgl_value_2,r5"); /* r5 = LS loaded */
341: asm("movl _sgl_value_3,r6"); /* r6 = MS stored */
342: asm("movl _sgl_value_4,r7"); /* r7 = LS stored */
343: asm("movl _sgl_value_5,r8"); /* r8 = MS popped */
344: asm("movl _sgl_value_6,r9"); /* r9 = LS popped */
345: if( halt_code == BAD_ACC_HLT ) {
346: sgl_value_1 = dbl_expected.m;
347: sgl_value_2 = dbl_expected.l;
348: asm("movl _sgl_value_1,r10"); /* r10 = MS expected */
349: asm("movl _sgl_value_2,r11"); /* r11 = LS expected */
350: asm("movl _index,r12"); /* r12 = data index */
351: } else
352: if( halt_code == BAD_REG_HLT ) {
353: sgl_dummy1 = load_regs[index2];
354: sgl_dummy2 = store_regs[index2];
355: asm("movl _index2,r11"); /* r11 = bad register # */
356: asm("movl _sgl_dummy2,r12"); /* r12 = actual value */
357: asm("movl _sgl_dummy1,r13"); /* r13 = expected value */
358: } else
359: if( halt_code == BAD_PSL_HLT ) {
360: asm("movl _init_psl,r11"); /* r11 = initial PSL */
361: asm("movl _psl_val,r12"); /* r12 = final PSL */
362: asm("movl _exp_psl,r13"); /* r13 = expected PSL */
363: } else
364: if( halt_code == BAD_STORE_HLT ) {
365: sgl_value_1 = dbl_expected.m;
366: sgl_value_2 = dbl_expected.l;
367: asm("movl _sgl_value_1,r10"); /* r10 = MS expected */
368: asm("movl _sgl_value_2,r11"); /* r11 = LS expected */
369: asm("movl _index,r12"); /* r12 = data index */
370: } else
371: if( halt_code == PUSH_CNT_HLT ) {
372: asm("movl _sgl_value_7,r10"); /* r10 = num words push */
373: asm("movl $2,r11"); /* r11 = num words exp */
374: };
375: asm("halt"); /* HALT ... */
376: }
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