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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4|
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Power 6/32 Unix version 1.21
1 00000000 LL0:
2 00000000 .data
3 00000aac * .text
4 00000000 .align 1
5 00000000 .globl _pushd
6 00000000 _pushd:
7 0001F650 0000 .word L215
8 0001F652 # #include "fpp_defs.h"
9 0001F652 #
10 0001F652 #
11 0001F652 # /***************************************************************************
12 0001F652 # *
13 0001F652 # * PUSHD - PUSH FLOATING POINT DOUBLE-PRECISION OPERAND ONTO STACK
14 0001F652 # *
15 0001F652 # * PUSHD TEST MONITOR
16 0001F652 # *
17 0001F652 # * Load a double precision operand into the accumulator and then push it
18 0001F652 # * onto the stack.
19 0001F652 # ***************************************************************************/
20 0001F652 # pushd()
21 0001F652 # {
22 0001F652 11 42 jbr L217
23 0001F654 L218:
24 0001F654 # asm(".globl _pushd_t");
25 0001F654 .globl _pushd_t
26 0001F654 # asm("_pushd_t:"); /* entry address */
27 0001F654 _pushd_t:
28 0001F654 # if( (cycle == 1) && (prt_hdrs) ) /* print headers on 1st cycle */
29 0001F654 1d effffffff6 01 cmpl _cycle,$1
30 0001F65B 21 15 jneq L219
31 0001F65D 5d efffffffed tstl _prt_hdrs
32 0001F663 31 0d jeql L219
33 0001F665 # writes(" PUSHD");
34 0001F665 .data 1
35 00000aac * L221:
36 00000aac * 20505553484400 .ascii " PUSHD\0"
37 00000ab3 * .text
38 0001F665 dd 8f00000aac pushl $L221
39 0001F66B fe 08 efffffffde callf $8,_writes
40 0001F672 # pushd_1(); /* ldd/pushd data patterns */
41 0001F672 L219:
42 0001F672 fe 04 ef0000001f callf $4,_pushd_1
43 0001F679 # pushd_2(); /* register corruption test */
44 0001F679 fe 04 ef000004b4 callf $4,_pushd_2
45 0001F680 # if( !no_fpp_wcs )
46 0001F680 5d efffffffca tstl _no_fpp_wcs
47 0001F686 21 07 jneq L224
48 0001F688 # pushd_3(); /* PSL test */
49 0001F688 fe 04 ef000006ab callf $4,_pushd_3
50 0001F68F # asm("jmp *return"); /* return to the test monitor */
51 0001F68F L224:
52 0001F68F 71 ffffffffbb jmp *return
53 0001F695 # }
54 0001F695 40 ret#2
55 0001F696 .set L215,0x0
56 0001F696 L217:
57 0001F696 11 bc jbr L218
58 0001F698 .data
59 00000aac * .text
60 0001F698 .align 1
61 0001F698 .globl _pushd_1
62 0001F698 _pushd_1:
63 0001F698 0000 .word L226
64 0001F69A #
65 0001F69A #
66 0001F69A #
67 0001F69A # /************************************************************************
68 0001F69A # *
69 0001F69A # * SUBTEST 1 - load / push / pop / compare
70 0001F69A # *
71 0001F69A # ************************************************************************/
72 0001F69A # pushd_1()
73 0001F69A # {
74 0001F69A 13 0494 jbr L228
75 0001F69D L229:
76 0001F69D # force_loop = FALSE;
77 0001F69D 4d efffffffad clrl _force_loop
78 0001F6A3 # index = 0;
79 0001F6A3 4d efffffffa7 clrl _index
80 0001F6A9 # subtest = 1;
81 0001F6A9 0d 01 efffffffa0 movl $1,_subtest
82 0001F6B0 # do {
83 0001F6B0 L232:
84 0001F6B0 # dbl_ld_acc = ldd_1_data[index].ld; /* get data to load */
85 0001F6B0 48 04 efffffff99 50 shll $4,_index,r0
86 0001F6B8 0c 8f00000000 50 addl2 $_ldd_1_data,r0
87 0001F6BF 0d a004 efffffff8d movl 4(r0),_dbl_ld_acc+4
88 0001F6C7 0d 60 efffffff82 movl (r0),_dbl_ld_acc
89 0001F6CE # dbl_expected = ldd_1_data[index].exp; /* get expected results */
90 0001F6CE 48 04 efffffff7b 50 shll $4,_index,r0
91 0001F6D6 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
92 0001F6DD 0d a004 efffffff6f movl 4(r0),_dbl_expected+4
93 0001F6E5 0d 60 efffffff64 movl (r0),_dbl_expected
94 0001F6EC # if( !(dbl_ld_acc.m & 0x7f800000) ) {
95 0001F6EC 3d 8f7f800000 efffffff59 bitl $2139095040,_dbl_ld_acc
96 0001F6F7 21 0c jneq L233
97 0001F6F9 # dbl_expected.m = 0;
98 0001F6F9 4d efffffff51 clrl _dbl_expected
99 0001F6FF # dbl_expected.l = 0; /* ignore bad 0's */
100 0001F6FF 4d efffffff4f clrl _dbl_expected+4
101 0001F705 # }
102 0001F705 # /*
103 0001F705 # * If LOOP ON ERROR is set, this is the loop for this subtest.
104 0001F705 # * The force loop flag is set after the first error.
105 0001F705 # */
106 0001F705 # asm("_pushd_1_lp1:");
107 0001F705 L233:
108 0001F705 _pushd_1_lp1:
109 0001F705 # asm("moval (sp),_pre_event_sp"); /* save the pre-push SP */
110 0001F705 ed 6e efffffff44 moval (sp),_pre_event_sp
111 0001F70C # asm("ldd _dbl_ld_acc"); /* LOAD the (dbl) value */
112 0001F70C 07 efffffff3e ldd _dbl_ld_acc
113 0001F712 # asm("pushd"); /* PUSH the data */
114 0001F712 67 pushd
115 0001F713 # asm("moval (sp),_post_event_sp"); /* save the post-push SP */
116 0001F713 ed 6e efffffff36 moval (sp),_post_event_sp
117 0001F71A # asm("movl (sp)+,_pop_val_1"); /* POP the MS word */
118 0001F71A 0d 8e efffffff2f movl (sp)+,_pop_val_1
119 0001F721 # asm("movl (sp)+,_pop_val_2"); /* POP the LS word */
120 0001F721 0d 8e efffffff28 movl (sp)+,_pop_val_2
121 0001F728 # asm("std _dbl_st_acc"); /* save the acc */
122 0001F728 27 efffffff22 std _dbl_st_acc
123 0001F72E # if( force_loop )
124 0001F72E 5d efffffff1c tstl _force_loop
125 0001F734 31 02 jeql L234
126 0001F736 # asm("brb _pushd_1_lp1"); /* run the loop again */
127 0001F736 11 cd brb _pushd_1_lp1
128 0001F738 # sgl_dummy1 = pre_event_sp - 8; /* get expected final SP */
129 0001F738 L234:
130 0001F738 3c 08 efffffff11 50 subl3 $8,_pre_event_sp,r0
131 0001F740 0d 50 efffffff09 movl r0,_sgl_dummy1
132 0001F747 # sgl_value_7 = post_event_sp - pre_event_sp; /* get amount pushed */
133 0001F747 3c efffffff03 effffffefe subl3 _pre_event_sp,_post_event_sp,r0
50
134 0001F753 0d 50 effffffef6 movl r0,_sgl_value_7
135 0001F75A # if( (dbl_expected.m != pop_val_1) || /* verify stack data */
136 0001F75A # (dbl_expected.l != pop_val_2) ||
137 0001F75A # (post_event_sp != sgl_dummy1) ) {
138 0001F75A 1d effffffef0 effffffeeb cmpl _dbl_expected,_pop_val_1
139 0001F765 21 1d jneq L9999
140 0001F767 1d effffffee7 effffffede cmpl _dbl_expected+4,_pop_val_2
141 0001F772 21 10 jneq L9999
142 0001F774 1d effffffed6 effffffed1 cmpl _post_event_sp,_sgl_dummy1
143 0001F77F 21 03 13 0138 jeql L235
144 0001F784 L9999:
145 0001F784 # errcnt++; /* bump the error count */
146 0001F784 6d effffffec6 incl _errcnt
147 0001F78A # if ( prt_error ) {
148 0001F78A 5d effffffec0 tstl _prt_error
149 0001F790 21 03 13 0104 jeql L236
150 0001F795 # writes("\ncycle: ");
151 0001F795 .data 1
152 00000ab3 * L237:
153 00000ab3 * 0A6379636C653A2000 .ascii "\12cycle: \0"
154 00000abc * .text
155 0001F795 dd 8f00000ab3 pushl $L237
156 0001F79B fe 08 effffffeae callf $8,_writes
157 0001F7A2 # writed( cycle );
158 0001F7A2 dd effffffea8 pushl _cycle
159 0001F7A8 fe 08 effffffea1 callf $8,_writed
160 0001F7AF # writes(" PUSHD test ");
161 0001F7AF .data 1
162 00000abc * L239:
163 00000abc * 2020505553484420746573742 .ascii " PUSHD test \0"
000
164 00000aca * .text
165 0001F7AF dd 8f00000abc pushl $L239
166 0001F7B5 fe 08 effffffe94 callf $8,_writes
167 0001F7BC # writed( test_no );
168 0001F7BC dd effffffe8e pushl _test_no
169 0001F7C2 fe 08 effffffe87 callf $8,_writed
170 0001F7C9 # writes(", subtest 1 (Cache Data) - WRONG DATA PUSHED\n");
171 0001F7C9 .data 1
172 00000aca * L240:
173 00000aca * 2C20737562746573742031202 .ascii ", subtest 1 (Cache Data) - WRONG DATA PUSHED\12\0"
8436163686520446174612920
2D2057524F4E4720444154412
05055534845440A00
174 00000af8 * .text
175 0001F7C9 dd 8f00000aca pushl $L240
176 0001F7CF fe 08 effffffe7a callf $8,_writes
177 0001F7D6 # print_pushd_data();
178 0001F7D6 fe 04 ef00000773 callf $4,_print_pushd_data
179 0001F7DD # writes(", data pushed = ");
180 0001F7DD .data 1
181 00000af8 * L242:
182 00000af8 * 2C20206461746120707573686 .ascii ", data pushed = \0"
564203D2000
183 00000b0a * .text
184 0001F7DD dd 8f00000af8 pushl $L242
185 0001F7E3 fe 08 effffffe66 callf $8,_writes
186 0001F7EA # write32h( pop_val_1 );
187 0001F7EA dd effffffe60 pushl _pop_val_1
188 0001F7F0 fe 08 effffffe59 callf $8,_write32h
189 0001F7F7 # writec(' ');
190 0001F7F7 dd 20 pushl $32
191 0001F7F9 fe 08 effffffe50 callf $8,_writec
192 0001F800 # write32h( pop_val_2 );
193 0001F800 dd effffffe4a pushl _pop_val_2
194 0001F806 fe 08 effffffe43 callf $8,_write32h
195 0001F80D # writes(", index = ");
196 0001F80D .data 1
197 00000b0a * L245:
198 00000b0a * 2C2020696E646578203D2000 .ascii ", index = \0"
199 00000b16 * .text
200 0001F80D dd 8f00000b0a pushl $L245
201 0001F813 fe 08 effffffe36 callf $8,_writes
202 0001F81A # writed( index );
203 0001F81A dd effffffe30 pushl _index
204 0001F820 fe 08 effffffe29 callf $8,_writed
205 0001F827 # writec('\n');
206 0001F827 dd 0a pushl $10
207 0001F829 fe 08 effffffe20 callf $8,_writec
208 0001F830 # writes(" final Acc = ");
209 0001F830 .data 1
210 00000b16 * L246:
211 00000b16 * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
212 00000b25 * .text
213 0001F830 dd 8f00000b16 pushl $L246
214 0001F836 fe 08 effffffe13 callf $8,_writes
215 0001F83D # write32h( dbl_st_acc.m );
216 0001F83D dd effffffe0d pushl _dbl_st_acc
217 0001F843 fe 08 effffffe06 callf $8,_write32h
218 0001F84A # writec(' ');
219 0001F84A dd 20 pushl $32
220 0001F84C fe 08 effffffdfd callf $8,_writec
221 0001F853 # write32h( dbl_st_acc.l );
222 0001F853 dd effffffdfb pushl _dbl_st_acc+4
223 0001F859 fe 08 effffffdf0 callf $8,_write32h
224 0001F860 # writes(", exp. data = ");
225 0001F860 .data 1
226 00000b25 * L247:
227 00000b25 * 2C202020206578702E2064617 .ascii ", exp. data = \0"
461203D2000
228 00000b37 * .text
229 0001F860 dd 8f00000b25 pushl $L247
230 0001F866 fe 08 effffffde3 callf $8,_writes
231 0001F86D # write32h( dbl_expected.m );
232 0001F86D dd effffffddd pushl _dbl_expected
233 0001F873 fe 08 effffffdd6 callf $8,_write32h
234 0001F87A # writec(' ');
235 0001F87A dd 20 pushl $32
236 0001F87C fe 08 effffffdcd callf $8,_writec
237 0001F883 # write32h( dbl_expected.l );
238 0001F883 dd effffffdcb pushl _dbl_expected+4
239 0001F889 fe 08 effffffdc0 callf $8,_write32h
240 0001F890 # writec('\n');
241 0001F890 dd 0a pushl $10
242 0001F892 fe 08 effffffdb7 callf $8,_writec
243 0001F899 # }
244 0001F899 # if ( halt_flg ) /* halt on error? */
245 0001F899 L236:
246 0001F899 5d effffffdb1 tstl _halt_flg
247 0001F89F 31 09 jeql L248
248 0001F8A1 # pushd_er_halt( BAD_STORE_HLT );
249 0001F8A1 dd 09 pushl $9
250 0001F8A3 fe 08 ef000006de callf $8,_pushd_er_halt
251 0001F8AA # if ( loop_on_err )
252 0001F8AA L248:
253 0001F8AA 5d effffffda0 tstl _loop_on_err
254 0001F8B0 31 0a jeql L250
255 0001F8B2 # {
256 0001F8B2 # force_loop = TRUE; /* set the force loop flag */
257 0001F8B2 0d 01 effffffd97 movl $1,_force_loop
258 0001F8B9 # asm("brw _pushd_1_lp1"); /* and loop on the error */
259 0001F8B9 13 fe49 brw _pushd_1_lp1
260 0001F8BC # } /* end of loop-on-error */
261 0001F8BC # } /* end of data compare error */
262 0001F8BC L250:
263 0001F8BC # if( ( post_event_sp - pre_event_sp ) == 2 ) {/* ver stack data */
264 0001F8BC L235:
265 0001F8BC 3c effffffd8e effffffd89 subl3 _pre_event_sp,_post_event_sp,r0
50
266 0001F8C8 1d 50 02 cmpl r0,$2
267 0001F8CB 31 03 13 00f2 jneq L251
268 0001F8D0 # errcnt++; /* bump the error count */
269 0001F8D0 6d effffffd7a incl _errcnt
270 0001F8D6 # if ( prt_error ) {
271 0001F8D6 5d effffffd74 tstl _prt_error
272 0001F8DC 21 03 13 00be jeql L252
273 0001F8E1 # writes("\ncycle: ");
274 0001F8E1 .data 1
275 00000b37 * L253:
276 00000b37 * 0A6379636C653A2000 .ascii "\12cycle: \0"
277 00000b40 * .text
278 0001F8E1 dd 8f00000b37 pushl $L253
279 0001F8E7 fe 08 effffffd62 callf $8,_writes
280 0001F8EE # writed( cycle );
281 0001F8EE dd effffffd5c pushl _cycle
282 0001F8F4 fe 08 effffffd55 callf $8,_writed
283 0001F8FB # writes(" PUSHD test ");
284 0001F8FB .data 1
285 00000b40 * L254:
286 00000b40 * 2020505553484420746573742 .ascii " PUSHD test \0"
000
287 00000b4e * .text
288 0001F8FB dd 8f00000b40 pushl $L254
289 0001F901 fe 08 effffffd48 callf $8,_writes
290 0001F908 # writed( test_no );
291 0001F908 dd effffffd42 pushl _test_no
292 0001F90E fe 08 effffffd3b callf $8,_writed
293 0001F915 # writes(", subtest 1 (Data Pat.) - WRONG PUSH COUNT\n");
294 0001F915 .data 1
295 00000b4e * L255:
296 00000b4e * 2C20737562746573742031202 .ascii ", subtest 1 (Data Pat.) - WRONG PUSH COUNT\12\0"
844617461205061742E29202D
2057524F4E472050555348204
34F554E540A00
297 00000b7a * .text
298 0001F915 dd 8f00000b4e pushl $L255
299 0001F91B fe 08 effffffd2e callf $8,_writes
300 0001F922 # print_pushd_data();
301 0001F922 fe 04 ef00000627 callf $4,_print_pushd_data
302 0001F929 # writes(", ");
303 0001F929 .data 1
304 00000b7a * L256:
305 00000b7a * 2C202000 .ascii ", \0"
306 00000b7e * .text
307 0001F929 dd 8f00000b7a pushl $L256
308 0001F92F fe 08 effffffd1a callf $8,_writes
309 0001F936 # writed( sgl_value_7 );
310 0001F936 dd effffffd14 pushl _sgl_value_7
311 0001F93C fe 08 effffffd0d callf $8,_writed
312 0001F943 # writes(" longwords pushed, ");
313 0001F943 .data 1
314 00000b7e * L257:
315 00000b7e * 206C6F6E67776F72647320707 .ascii " longwords pushed, \0"
5736865642C202000
316 00000b93 * .text
317 0001F943 dd 8f00000b7e pushl $L257
318 0001F949 fe 08 effffffd00 callf $8,_writes
319 0001F950 # writes("2 expected");
320 0001F950 .data 1
321 00000b93 * L258:
322 00000b93 * .ascii ""
323 00000b93 * 3220657870656374656400 .ascii "2 expected\0"
324 00000b9e * .text
325 0001F950 dd 8f00000b93 pushl $L258
326 0001F956 fe 08 effffffcf3 callf $8,_writes
327 0001F95D # writec('\n');
328 0001F95D dd 0a pushl $10
329 0001F95F fe 08 effffffcea callf $8,_writec
330 0001F966 # writes(" final Acc = ");
331 0001F966 .data 1
332 00000b9e * L259:
333 00000b9e * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
334 00000bad * .text
335 0001F966 dd 8f00000b9e pushl $L259
336 0001F96C fe 08 effffffcdd callf $8,_writes
337 0001F973 # write32h( dbl_st_acc.m );
338 0001F973 dd effffffcd7 pushl _dbl_st_acc
339 0001F979 fe 08 effffffcd0 callf $8,_write32h
340 0001F980 # writec(' ');
341 0001F980 dd 20 pushl $32
342 0001F982 fe 08 effffffcc7 callf $8,_writec
343 0001F989 # write32h( dbl_st_acc.l );
344 0001F989 dd effffffcc5 pushl _dbl_st_acc+4
345 0001F98F fe 08 effffffcba callf $8,_write32h
346 0001F996 # writec('\n');
347 0001F996 dd 0a pushl $10
348 0001F998 fe 08 effffffcb1 callf $8,_writec
349 0001F99F # }
350 0001F99F # if ( halt_flg ) /* halt on error? */
351 0001F99F L252:
352 0001F99F 5d effffffcab tstl _halt_flg
353 0001F9A5 31 09 jeql L260
354 0001F9A7 # pushd_er_halt( PUSH_CNT_HLT );
355 0001F9A7 dd 08 pushl $8
356 0001F9A9 fe 08 ef000005d8 callf $8,_pushd_er_halt
357 0001F9B0 # if ( loop_on_err )
358 0001F9B0 L260:
359 0001F9B0 5d effffffc9a tstl _loop_on_err
360 0001F9B6 31 0a jeql L261
361 0001F9B8 # {
362 0001F9B8 # force_loop = TRUE; /* set the force loop flag */
363 0001F9B8 0d 01 effffffc91 movl $1,_force_loop
364 0001F9BF # asm("brw _pushd_1_lp1"); /* and loop on the error */
365 0001F9BF 13 fd43 brw _pushd_1_lp1
366 0001F9C2 # } /* end of loop-on-error */
367 0001F9C2 # } /* end of push count error */
368 0001F9C2 L261:
369 0001F9C2 # if( ( dbl_st_acc.m != dbl_expected.m ) &&
370 0001F9C2 L251:
371 0001F9C2 # ( dbl_st_acc.l != dbl_expected.l ) ) {
372 0001F9C2 1d effffffc88 effffffc83 cmpl _dbl_st_acc,_dbl_expected
373 0001F9CD 21 03 13 0145 jeql L262
374 0001F9D2 1d effffffc7c effffffc77 cmpl _dbl_st_acc+4,_dbl_expected+4
375 0001F9DD 31 f0 jeql L262
376 0001F9DF # errcnt++; /* bump the error count */
377 0001F9DF 6d effffffc6b incl _errcnt
378 0001F9E5 # if ( prt_error )
379 0001F9E5 5d effffffc65 tstl _prt_error
380 0001F9EB 21 03 13 0104 jeql L263
381 0001F9F0 # {
382 0001F9F0 # writes("\ncycle: ");
383 0001F9F0 .data 1
384 00000bad * L264:
385 00000bad * 0A6379636C653A2000 .ascii "\12cycle: \0"
386 00000bb6 * .text
387 0001F9F0 dd 8f00000bad pushl $L264
388 0001F9F6 fe 08 effffffc53 callf $8,_writes
389 0001F9FD # writed( cycle );
390 0001F9FD dd effffffc4d pushl _cycle
391 0001FA03 fe 08 effffffc46 callf $8,_writed
392 0001FA0A # writes(" PUSHD test ");
393 0001FA0A .data 1
394 00000bb6 * L265:
395 00000bb6 * 2020505553484420746573742 .ascii " PUSHD test \0"
000
396 00000bc4 * .text
397 0001FA0A dd 8f00000bb6 pushl $L265
398 0001FA10 fe 08 effffffc39 callf $8,_writes
399 0001FA17 # writed( test_no );
400 0001FA17 dd effffffc33 pushl _test_no
401 0001FA1D fe 08 effffffc2c callf $8,_writed
402 0001FA24 # writes(", subtest 1 (Acc. Corr.) - BAD FINAL ACC\n");
403 0001FA24 .data 1
404 00000bc4 * L266:
405 00000bc4 * 2C20737562746573742031202 .ascii ", subtest 1 (Acc. Corr.) - BAD FINAL ACC\12\0"
84163632E20436F72722E2920
2D204241442046494E414C204
143430A00
406 00000bee * .text
407 0001FA24 dd 8f00000bc4 pushl $L266
408 0001FA2A fe 08 effffffc1f callf $8,_writes
409 0001FA31 # print_pushd_data();
410 0001FA31 fe 04 ef00000518 callf $4,_print_pushd_data
411 0001FA38 # writes(", data pushed = ");
412 0001FA38 .data 1
413 00000bee * L267:
414 00000bee * 2C20206461746120707573686 .ascii ", data pushed = \0"
564203D2000
415 00000c00 * .text
416 0001FA38 dd 8f00000bee pushl $L267
417 0001FA3E fe 08 effffffc0b callf $8,_writes
418 0001FA45 # write32h( pop_val_1 );
419 0001FA45 dd effffffc05 pushl _pop_val_1
420 0001FA4B fe 08 effffffbfe callf $8,_write32h
421 0001FA52 # writec(' ');
422 0001FA52 dd 20 pushl $32
423 0001FA54 fe 08 effffffbf5 callf $8,_writec
424 0001FA5B # write32h( pop_val_2 );
425 0001FA5B dd effffffbef pushl _pop_val_2
426 0001FA61 fe 08 effffffbe8 callf $8,_write32h
427 0001FA68 # writes(", index = ");
428 0001FA68 .data 1
429 00000c00 * L268:
430 00000c00 * 2C2020696E646578203D2000 .ascii ", index = \0"
431 00000c0c * .text
432 0001FA68 dd 8f00000c00 pushl $L268
433 0001FA6E fe 08 effffffbdb callf $8,_writes
434 0001FA75 # writed( index );
435 0001FA75 dd effffffbd5 pushl _index
436 0001FA7B fe 08 effffffbce callf $8,_writed
437 0001FA82 # writec('\n');
438 0001FA82 dd 0a pushl $10
439 0001FA84 fe 08 effffffbc5 callf $8,_writec
440 0001FA8B # writes(" final Acc = ");
441 0001FA8B .data 1
442 00000c0c * L269:
443 00000c0c * 202066696E616C20416363203 .ascii " final Acc = \0"
D2000
444 00000c1b * .text
445 0001FA8B dd 8f00000c0c pushl $L269
446 0001FA91 fe 08 effffffbb8 callf $8,_writes
447 0001FA98 # write32h( dbl_st_acc.m );
448 0001FA98 dd effffffbb2 pushl _dbl_st_acc
449 0001FA9E fe 08 effffffbab callf $8,_write32h
450 0001FAA5 # writec(' ');
451 0001FAA5 dd 20 pushl $32
452 0001FAA7 fe 08 effffffba2 callf $8,_writec
453 0001FAAE # write32h( dbl_st_acc.l );
454 0001FAAE dd effffffba0 pushl _dbl_st_acc+4
455 0001FAB4 fe 08 effffffb95 callf $8,_write32h
456 0001FABB # writes(", Acc expected = ");
457 0001FABB .data 1
458 00000c1b * L270:
459 00000c1b * 2C20204163632065787065637 .ascii ", Acc expected = \0"
46564203D2000
460 00000c2e * .text
461 0001FABB dd 8f00000c1b pushl $L270
462 0001FAC1 fe 08 effffffb88 callf $8,_writes
463 0001FAC8 # write32h( dbl_expected.m );
464 0001FAC8 dd effffffb82 pushl _dbl_expected
465 0001FACE fe 08 effffffb7b callf $8,_write32h
466 0001FAD5 # writec(' ');
467 0001FAD5 dd 20 pushl $32
468 0001FAD7 fe 08 effffffb72 callf $8,_writec
469 0001FADE # write32h( dbl_expected.l );
470 0001FADE dd effffffb70 pushl _dbl_expected+4
471 0001FAE4 fe 08 effffffb65 callf $8,_write32h
472 0001FAEB # writec('\n');
473 0001FAEB dd 0a pushl $10
474 0001FAED fe 08 effffffb5c callf $8,_writec
475 0001FAF4 # }
476 0001FAF4 # if ( halt_flg ) /* halt on error? */
477 0001FAF4 L263:
478 0001FAF4 5d effffffb56 tstl _halt_flg
479 0001FAFA 31 09 jeql L271
480 0001FAFC # pushd_er_halt( BAD_ACC_HLT );
481 0001FAFC dd 01 pushl $1
482 0001FAFE fe 08 ef00000483 callf $8,_pushd_er_halt
483 0001FB05 # if ( loop_on_err )
484 0001FB05 L271:
485 0001FB05 5d effffffb45 tstl _loop_on_err
486 0001FB0B 31 0a jeql L272
487 0001FB0D # {
488 0001FB0D # force_loop = TRUE; /* set the force loop flag */
489 0001FB0D 0d 01 effffffb3c movl $1,_force_loop
490 0001FB14 # asm("brw _pushd_1_lp1"); /* and loop on the error */
491 0001FB14 13 fbee brw _pushd_1_lp1
492 0001FB17 # } /* end of loop-on-error */
493 0001FB17 # } /* end of acc corr error */
494 0001FB17 L272:
495 0001FB17 # } while( index++ < max_ldd_1_index );
496 0001FB17 L262:
497 0001FB17 L231:
498 0001FB17 0d effffffb33 50 movl _index,r0
499 0001FB1E 6d effffffb2c incl _index
500 0001FB24 1d 50 effffffb25 cmpl r0,_max_ldd_1_index
501 0001FB2B 81 03 13 fb80 jlss L232
502 0001FB30 L230:
503 0001FB30 # } /* end of subtest 1 */
504 0001FB30 40 ret#2
505 0001FB31 .set L226,0x0
506 0001FB31 L228:
507 0001FB31 13 fb69 jbr L229
508 0001FB34 .data
509 00000aac * .text
510 0001FB34 .align 1
511 0001FB34 .globl _pushd_2
512 0001FB34 _pushd_2:
513 0001FB34 0000 .word L273
514 0001FB36 #
515 0001FB36 #
516 0001FB36 #
517 0001FB36 # /************************************************************************
518 0001FB36 # *
519 0001FB36 # * SUBTEST 2 - register corruption test
520 0001FB36 # *
521 0001FB36 # ************************************************************************/
522 0001FB36 # pushd_2()
523 0001FB36 # {
524 0001FB36 13 01fe jbr L275
525 0001FB39 L276:
526 0001FB39 # force_loop = FALSE;
527 0001FB39 4d effffffb11 clrl _force_loop
528 0001FB3F # subtest = 2;
529 0001FB3F 0d 02 effffffb0a movl $2,_subtest
530 0001FB46 # index = 0;
531 0001FB46 4d effffffb04 clrl _index
532 0001FB4C # do
533 0001FB4C L279:
534 0001FB4C # {
535 0001FB4C # fill_reg_buf( load_regs ); /* Set the values that */
536 0001FB4C dd 8f00000000 pushl $_load_regs
537 0001FB52 fe 08 effffffaf7 callf $8,_fill_reg_buf
538 0001FB59 # dbl_ld_acc = ldd_1_data[index].ld; /* get data to load */
539 0001FB59 48 04 effffffaf0 50 shll $4,_index,r0
540 0001FB61 0c 8f00000000 50 addl2 $_ldd_1_data,r0
541 0001FB68 0d a004 effffffae4 movl 4(r0),_dbl_ld_acc+4
542 0001FB70 0d 60 effffffad9 movl (r0),_dbl_ld_acc
543 0001FB77 # dbl_expected = ldd_1_data[index].exp; /* get expected results */
544 0001FB77 48 04 effffffad2 50 shll $4,_index,r0
545 0001FB7F 0c 8f00000008 50 addl2 $_ldd_1_data+8,r0
546 0001FB86 0d a004 effffffac6 movl 4(r0),_dbl_expected+4
547 0001FB8E 0d 60 effffffabb movl (r0),_dbl_expected
548 0001FB95 # /*
549 0001FB95 # * If LOOP ON ERROR is set, this is the loop for this subtest.
550 0001FB95 # * The force loop flag is set after the first error.
551 0001FB95 # */
552 0001FB95 # asm("_pushd_2_lp1:");
553 0001FB95 _pushd_2_lp1:
554 0001FB95 # asm("ldd _dbl_ld_acc"); /* LOAD the (dbl) value */
555 0001FB95 07 effffffab5 ldd _dbl_ld_acc
556 0001FB9B # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
557 0001FB9B ab 891fff effffffaac loadr $0x1fff,_load_regs
558 0001FBA4 # asm("nop");
559 0001FBA4 10 nop
560 0001FBA5 # asm("pushd"); /* push the accumulator */
561 0001FBA5 67 pushd
562 0001FBA6 # asm("nop");
563 0001FBA6 10 nop
564 0001FBA7 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
565 0001FBA7 bb 891fff effffffaa0 storer $0x1fff,_store_regs
566 0001FBB0 # if( force_loop )
567 0001FBB0 5d effffffa9a tstl _force_loop
568 0001FBB6 31 02 jeql L281
569 0001FBB8 # asm("brb _pushd_2_lp1");; /* run the loop again */
570 0001FBB8 11 db brb _pushd_2_lp1
571 0001FBBA L281:
572 0001FBBA # index2 = 0;
573 0001FBBA 4d effffffa90 clrl _index2
574 0001FBC0 # while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
575 0001FBC0 L282:
576 0001FBC0 0d effffffa8a 50 movl _index2,r0
577 0001FBC7 0d effffffa83 51 movl _index2,r1
578 0001FBCE 1d 40effffffa7b cmpl _load_regs[r0],_store_regs[r1]
41effffffa75
579 0001FBDB 21 11 jneq L283
580 0001FBDD 1d effffffa6d 0d cmpl _index2,$13
581 0001FBE4 81 08 jgeq L283
582 0001FBE6 # index2++; /* check reg values */
583 0001FBE6 6d effffffa64 incl _index2
584 0001FBEC 11 d2 jbr L282
585 0001FBEE L283:
586 0001FBEE # if( index2 < 13 ) { /* error if index2 < 13 */
587 0001FBEE 1d effffffa5c 0d cmpl _index2,$13
588 0001FBF5 91 03 13 0123 jgeq L284
589 0001FBFA # errcnt++; /* bump the error count */
590 0001FBFA 6d effffffa50 incl _errcnt
591 0001FC00 # if ( prt_error ) {
592 0001FC00 5d effffffa4a tstl _prt_error
593 0001FC06 21 03 13 00ec jeql L285
594 0001FC0B # writes("\ncycle: ");
595 0001FC0B .data 1
596 00000c2e * L286:
597 00000c2e * 0A6379636C653A2000 .ascii "\12cycle: \0"
598 00000c37 * .text
599 0001FC0B dd 8f00000c2e pushl $L286
600 0001FC11 fe 08 effffffa38 callf $8,_writes
601 0001FC18 # writed( cycle );
602 0001FC18 dd effffffa32 pushl _cycle
603 0001FC1E fe 08 effffffa2b callf $8,_writed
604 0001FC25 # writes(" PUSHD test ");
605 0001FC25 .data 1
606 00000c37 * L287:
607 00000c37 * 2020505553484420746573742 .ascii " PUSHD test \0"
000
608 00000c45 * .text
609 0001FC25 dd 8f00000c37 pushl $L287
610 0001FC2B fe 08 effffffa1e callf $8,_writes
611 0001FC32 # writed( test_no );
612 0001FC32 dd effffffa18 pushl _test_no
613 0001FC38 fe 08 effffffa11 callf $8,_writed
614 0001FC3F # writes(", subtest 2 - A REGISTER WAS MODIFIED\n");
615 0001FC3F .data 1
616 00000c45 * L288:
617 00000c45 * 2C20737562746573742032202 .ascii ", subtest 2 - A REGISTER WAS MODIFIED\12\0"
D204120524547495354455220
574153204D4F4449464945440
A00
618 00000c6c * .text
619 0001FC3F dd 8f00000c45 pushl $L288
620 0001FC45 fe 08 effffffa04 callf $8,_writes
621 0001FC4C # print_pushd_data();
622 0001FC4C fe 04 ef000002fd callf $4,_print_pushd_data
623 0001FC53 # writes(", pushed = ");
624 0001FC53 .data 1
625 00000c6c * L289:
626 00000c6c * 2C2020707573686564203D200 .ascii ", pushed = \0"
0
627 00000c79 * .text
628 0001FC53 dd 8f00000c6c pushl $L289
629 0001FC59 fe 08 effffff9f0 callf $8,_writes
630 0001FC60 # write32h( dbl_ld_acc.m );
631 0001FC60 dd effffff9ea pushl _dbl_ld_acc
632 0001FC66 fe 08 effffff9e3 callf $8,_write32h
633 0001FC6D # writec(' ');
634 0001FC6D dd 20 pushl $32
635 0001FC6F fe 08 effffff9da callf $8,_writec
636 0001FC76 # write32h( dbl_ld_acc.l );
637 0001FC76 dd effffff9d8 pushl _dbl_ld_acc+4
638 0001FC7C fe 08 effffff9cd callf $8,_write32h
639 0001FC83 # writec('\n');
640 0001FC83 dd 0a pushl $10
641 0001FC85 fe 08 effffff9c4 callf $8,_writec
642 0001FC8C # writes("register "); /* print the information */
643 0001FC8C .data 1
644 00000c79 * L290:
645 00000c79 * 72656769737465722000 .ascii "register \0"
646 00000c83 * .text
647 0001FC8C dd 8f00000c79 pushl $L290
648 0001FC92 fe 08 effffff9b7 callf $8,_writes
649 0001FC99 # writed( index2 ); /* about the corrupted */
650 0001FC99 dd effffff9b1 pushl _index2
651 0001FC9F fe 08 effffff9aa callf $8,_writed
652 0001FCA6 # writes(" = "); /* register */
653 0001FCA6 .data 1
654 00000c83 * L291:
655 00000c83 * 203D2000 .ascii " = \0"
656 00000c87 * .text
657 0001FCA6 dd 8f00000c83 pushl $L291
658 0001FCAC fe 08 effffff99d callf $8,_writes
659 0001FCB3 # write32h( store_regs[index2] );
660 0001FCB3 0d effffff997 50 movl _index2,r0
661 0001FCBA dd 40effffff98f pushl _store_regs[r0]
662 0001FCC1 fe 08 effffff988 callf $8,_write32h
663 0001FCC8 # writes(", should be = ");
664 0001FCC8 .data 1
665 00000c87 * L292:
666 00000c87 * 2C202073686F756C642062652 .ascii ", should be = \0"
03D2000
667 00000c97 * .text
668 0001FCC8 dd 8f00000c87 pushl $L292
669 0001FCCE fe 08 effffff97b callf $8,_writes
670 0001FCD5 # write32h( load_regs[index2] );
671 0001FCD5 0d effffff975 50 movl _index2,r0
672 0001FCDC dd 40effffff96d pushl _load_regs[r0]
673 0001FCE3 fe 08 effffff966 callf $8,_write32h
674 0001FCEA # writes("\n");
675 0001FCEA .data 1
676 00000c97 * L293:
677 00000c97 * 0A00 .ascii "\12\0"
678 00000c99 * .text
679 0001FCEA dd 8f00000c97 pushl $L293
680 0001FCF0 fe 08 effffff959 callf $8,_writes
681 0001FCF7 # }
682 0001FCF7 # if ( halt_flg ) /* halt on error? */
683 0001FCF7 L285:
684 0001FCF7 5d effffff953 tstl _halt_flg
685 0001FCFD 31 09 jeql L294
686 0001FCFF # pushd_er_halt( BAD_REG_HLT );
687 0001FCFF dd 02 pushl $2
688 0001FD01 fe 08 ef00000280 callf $8,_pushd_er_halt
689 0001FD08 # if ( loop_on_err ) {
690 0001FD08 L294:
691 0001FD08 5d effffff942 tstl _loop_on_err
692 0001FD0E 31 0d jeql L295
693 0001FD10 # force_loop = TRUE; /* set the force loop flag */
694 0001FD10 0d 01 effffff939 movl $1,_force_loop
695 0001FD17 # asm("jmp _pushd_2_lp1"); /* and loop */
696 0001FD17 71 effffffe78 jmp _pushd_2_lp1
697 0001FD1D # } /* end of loop-on-error */
698 0001FD1D # } /* end of compare error */
699 0001FD1D L295:
700 0001FD1D # } while( index++ < max_ldd_1_index );
701 0001FD1D L284:
702 0001FD1D L278:
703 0001FD1D 0d effffff92d 50 movl _index,r0
704 0001FD24 6d effffff926 incl _index
705 0001FD2A 1d 50 effffff91f cmpl r0,_max_ldd_1_index
706 0001FD31 81 03 13 fe16 jlss L279
707 0001FD36 L277:
708 0001FD36 # } /* end of subtest 2 */
709 0001FD36 40 ret#2
710 0001FD37 .set L273,0x0
711 0001FD37 L275:
712 0001FD37 13 fdff jbr L276
713 0001FD3A .data
714 00000aac * .text
715 0001FD3A .align 1
716 0001FD3A .globl _pushd_3
717 0001FD3A _pushd_3:
718 0001FD3A 0000 .word L296
719 0001FD3C #
720 0001FD3C #
721 0001FD3C #
722 0001FD3C # /************************************************************************
723 0001FD3C # *
724 0001FD3C # * SUBTEST 3 - PUSHD status test
725 0001FD3C # *
726 0001FD3C # ************************************************************************/
727 0001FD3C # pushd_3()
728 0001FD3C # {
729 0001FD3C 13 020d jbr L298
730 0001FD3F L299:
731 0001FD3F # force_loop = FALSE;
732 0001FD3F 4d effffff90b clrl _force_loop
733 0001FD45 # subtest = 3;
734 0001FD45 0d 03 effffff904 movl $3,_subtest
735 0001FD4C # index = 0;
736 0001FD4C 4d effffff8fe clrl _index
737 0001FD52 # do {
738 0001FD52 L302:
739 0001FD52 # dbl_ld_acc = ldd_1_data[index].ld; /* get the operand */
740 0001FD52 48 04 effffff8f7 50 shll $4,_index,r0
741 0001FD5A 0c 8f00000000 50 addl2 $_ldd_1_data,r0
742 0001FD61 0d a004 effffff8eb movl 4(r0),_dbl_ld_acc+4
743 0001FD69 0d 60 effffff8e0 movl (r0),_dbl_ld_acc
744 0001FD70 # status_index = 0; /* clear the status index */
745 0001FD70 4d effffff8da clrl _status_index
746 0001FD76 # do {
747 0001FD76 L305:
748 0001FD76 # sgl_dummy1 = status_array[status_index]; /* array = +, -, 0 */
749 0001FD76 0d effffff8d4 50 movl _status_index,r0
750 0001FD7D 0d 40effffff8cc movl _status_array[r0],_sgl_dummy1
effffff8c7
751 0001FD89 # /*
752 0001FD89 # * If LOOP ON ERROR is set, this is the loop for this subtest.
753 0001FD89 # * The force loop flag is set after the first error.
754 0001FD89 # */
755 0001FD89 # asm("_pushd_3_lp1:");
756 0001FD89 _pushd_3_lp1:
757 0001FD89 # asm("ldd _dbl_ld_acc"); /* load the operand */
758 0001FD89 07 effffff8c1 ldd _dbl_ld_acc
759 0001FD8F # asm("tstl _sgl_dummy1"); /* generate initial status */
760 0001FD8F 5d effffff8bb tstl _sgl_dummy1
761 0001FD95 # asm("movpsl _init_psl"); /* save the initial status */
762 0001FD95 cd effffff8b5 movpsl _init_psl
763 0001FD9B # asm("nop");
764 0001FD9B 10 nop
765 0001FD9C # asm("pushd"); /* push the accumulator */
766 0001FD9C 67 pushd
767 0001FD9D # asm("nop");
768 0001FD9D 10 nop
769 0001FD9E # asm("movpsl _psl_val"); /* save the final status */
770 0001FD9E cd effffff8ac movpsl _psl_val
771 0001FDA4 # asm("std _dbl_st_acc"); /* save the acc */
772 0001FDA4 27 effffff8a6 std _dbl_st_acc
773 0001FDAA # if( force_loop ) /* loop? */
774 0001FDAA 5d effffff8a0 tstl _force_loop
775 0001FDB0 31 02 jeql L306
776 0001FDB2 # asm("brb _pushd_3_lp1");; /* run the loop again */
777 0001FDB2 11 d5 brb _pushd_3_lp1
778 0001FDB4 L306:
779 0001FDB4 # exp_psl = init_psl; /* get the initial PSL */
780 0001FDB4 0d effffff896 effffff891 movl _init_psl,_exp_psl
781 0001FDBF # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
782 0001FDBF ac 88f3 effffff889 andl2 $-13,_exp_psl
783 0001FDC7 # if( !(dbl_ld_acc.m & 0x7f800000) )
784 0001FDC7 3d 8f7f800000 effffff87e bitl $2139095040,_dbl_ld_acc
785 0001FDD2 21 09 jneq L307
786 0001FDD4 # exp_psl |= PSL_Z; /* expect the ZERO bit set */
787 0001FDD4 8c 04 effffff875 orl2 $4,_exp_psl
788 0001FDDB # else if( dbl_ld_acc.m & 0x80000000 )
789 0001FDDB 11 14 jbr L308
790 0001FDDD L307:
791 0001FDDD 3d 8f80000000 effffff868 bitl $-2147483648,_dbl_ld_acc
792 0001FDE8 31 07 jeql L309
793 0001FDEA # exp_psl |= PSL_N; /* expect the NEG bit set */
794 0001FDEA 8c 08 effffff85f orl2 $8,_exp_psl
795 0001FDF1 # if( psl_val != exp_psl ) { /* COMPARE the values */
796 0001FDF1 L309:
797 0001FDF1 L308:
798 0001FDF1 1d effffff859 effffff854 cmpl _psl_val,_exp_psl
799 0001FDFC 21 03 13 011c jeql L310
800 0001FE01 # errcnt++; /* bump the error count */
801 0001FE01 6d effffff849 incl _errcnt
802 0001FE07 # if ( prt_error ) {
803 0001FE07 5d effffff843 tstl _prt_error
804 0001FE0D 21 03 13 00e5 jeql L311
805 0001FE12 # writes(" \n"); /* start a new print line */
806 0001FE12 .data 1
807 00000c99 * L312:
808 00000c99 * 200A00 .ascii " \12\0"
809 00000c9c * .text
810 0001FE12 dd 8f00000c99 pushl $L312
811 0001FE18 fe 08 effffff831 callf $8,_writes
812 0001FE1F # writes("cycle: ");
813 0001FE1F .data 1
814 00000c9c * L313:
815 00000c9c * 6379636C653A2000 .ascii "cycle: \0"
816 00000ca4 * .text
817 0001FE1F dd 8f00000c9c pushl $L313
818 0001FE25 fe 08 effffff824 callf $8,_writes
819 0001FE2C # writed( cycle );
820 0001FE2C dd effffff81e pushl _cycle
821 0001FE32 fe 08 effffff817 callf $8,_writed
822 0001FE39 # writes(" PUSHD test ");
823 0001FE39 .data 1
824 00000ca4 * L314:
825 00000ca4 * 2020505553484420746573742 .ascii " PUSHD test \0"
000
826 00000cb2 * .text
827 0001FE39 dd 8f00000ca4 pushl $L314
828 0001FE3F fe 08 effffff80a callf $8,_writes
829 0001FE46 # writed( test_no );
830 0001FE46 dd effffff804 pushl _test_no
831 0001FE4C fe 08 effffff7fd callf $8,_writed
832 0001FE53 # writes(", subtest 3 - INCORRECT FINAL PSL\n");
833 0001FE53 .data 1
834 00000cb2 * L315:
835 00000cb2 * 2C20737562746573742033202 .ascii ", subtest 3 - INCORRECT FINAL PSL\12\0"
02D20494E434F525245435420
46494E414C2050534C0A00
836 00000cd6 * .text
837 0001FE53 dd 8f00000cb2 pushl $L315
838 0001FE59 fe 08 effffff7f0 callf $8,_writes
839 0001FE60 # print_pushd_data();
840 0001FE60 fe 04 ef000000e9 callf $4,_print_pushd_data
841 0001FE67 # writes(", pushed = ");
842 0001FE67 .data 1
843 00000cd6 * L316:
844 00000cd6 * 2C2020707573686564203D200 .ascii ", pushed = \0"
0
845 00000ce3 * .text
846 0001FE67 dd 8f00000cd6 pushl $L316
847 0001FE6D fe 08 effffff7dc callf $8,_writes
848 0001FE74 # write32h( dbl_ld_acc.m );
849 0001FE74 dd effffff7d6 pushl _dbl_ld_acc
850 0001FE7A fe 08 effffff7cf callf $8,_write32h
851 0001FE81 # writec(' ');
852 0001FE81 dd 20 pushl $32
853 0001FE83 fe 08 effffff7c6 callf $8,_writec
854 0001FE8A # write32h( dbl_ld_acc.l );
855 0001FE8A dd effffff7c4 pushl _dbl_ld_acc+4
856 0001FE90 fe 08 effffff7b9 callf $8,_write32h
857 0001FE97 # writec('\n');
858 0001FE97 dd 0a pushl $10
859 0001FE99 fe 08 effffff7b0 callf $8,_writec
860 0001FEA0 # writes("initial PSL = ");
861 0001FEA0 .data 1
862 00000ce3 * L317:
863 00000ce3 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
D2000
864 00000cf2 * .text
865 0001FEA0 dd 8f00000ce3 pushl $L317
866 0001FEA6 fe 08 effffff7a3 callf $8,_writes
867 0001FEAD # write32h( init_psl );
868 0001FEAD dd effffff79d pushl _init_psl
869 0001FEB3 fe 08 effffff796 callf $8,_write32h
870 0001FEBA # writes(", final PSL = ");
871 0001FEBA .data 1
872 00000cf2 * L318:
873 00000cf2 * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
03D2000
874 00000d02 * .text
875 0001FEBA dd 8f00000cf2 pushl $L318
876 0001FEC0 fe 08 effffff789 callf $8,_writes
877 0001FEC7 # write32h( psl_val );
878 0001FEC7 dd effffff783 pushl _psl_val
879 0001FECD fe 08 effffff77c callf $8,_write32h
880 0001FED4 # writes(", expected PSL = ");
881 0001FED4 .data 1
882 00000d02 * L319:
883 00000d02 * 2C20206578706563746564205 .ascii ", expected PSL = \0"
0534C203D2000
884 00000d15 * .text
885 0001FED4 dd 8f00000d02 pushl $L319
886 0001FEDA fe 08 effffff76f callf $8,_writes
887 0001FEE1 # write32h( exp_psl );
888 0001FEE1 dd effffff769 pushl _exp_psl
889 0001FEE7 fe 08 effffff762 callf $8,_write32h
890 0001FEEE # writec('\n');
891 0001FEEE dd 0a pushl $10
892 0001FEF0 fe 08 effffff759 callf $8,_writec
893 0001FEF7 # }
894 0001FEF7 # if ( halt_flg ) /* halt on error? */
895 0001FEF7 L311:
896 0001FEF7 5d effffff753 tstl _halt_flg
897 0001FEFD 31 09 jeql L320
898 0001FEFF # pushd_er_halt( BAD_PSL_HLT );
899 0001FEFF dd 03 pushl $3
900 0001FF01 fe 08 ef00000080 callf $8,_pushd_er_halt
901 0001FF08 # if ( loop_on_err ) {
902 0001FF08 L320:
903 0001FF08 5d effffff742 tstl _loop_on_err
904 0001FF0E 31 0d jeql L321
905 0001FF10 # force_loop = TRUE; /* set the force loop flag */
906 0001FF10 0d 01 effffff739 movl $1,_force_loop
907 0001FF17 # asm("jmp _pushd_3_lp1"); /* and loop */
908 0001FF17 71 effffffe6c jmp _pushd_3_lp1
909 0001FF1D # }; /* end of loop-on-error */
910 0001FF1D L321:
911 0001FF1D # } /* end of compare error */
912 0001FF1D # } while( ++status_index < 3 );
913 0001FF1D L310:
914 0001FF1D L304:
915 0001FF1D 6d effffff72d incl _status_index
916 0001FF23 0d effffff727 50 movl _status_index,r0
917 0001FF2A 1d 50 03 cmpl r0,$3
918 0001FF2D 81 03 13 fe44 jlss L305
919 0001FF32 L303:
920 0001FF32 # } while( index++ < max_ldd_1_index );
921 0001FF32 L301:
922 0001FF32 0d effffff718 50 movl _index,r0
923 0001FF39 6d effffff711 incl _index
924 0001FF3F 1d 50 effffff70a cmpl r0,_max_ldd_1_index
925 0001FF46 81 03 13 fe07 jlss L302
926 0001FF4B L300:
927 0001FF4B # } /* end of subtest 3 */
928 0001FF4B 40 ret#2
929 0001FF4C .set L296,0x0
930 0001FF4C L298:
931 0001FF4C 13 fdf0 jbr L299
932 0001FF4F .data
933 00000aac * .text
934 0001FF4F 00 .align 1
935 0001FF50 .globl _print_pushd_data
936 0001FF50 _print_pushd_data:
937 0001FF50 0000 .word L322
938 0001FF52 #
939 0001FF52 #
940 0001FF52 #
941 0001FF52 # /**************************************************************************
942 0001FF52 # *
943 0001FF52 # * PRINT THE DATA AND STORE RESULTS
944 0001FF52 # *
945 0001FF52 # * initial Acc = xxxxxxxx xxxxxxxx, stored = xxxxxxxx xxxxxxxx, index = xx
946 0001FF52 # * operand = xxxxxxxx xxxxxxxx, expected = xxxxxxxx xxxxxxxx
947 0001FF52 # **************************************************************************/
948 0001FF52 # print_pushd_data()
949 0001FF52 # {
950 0001FF52 11 31 jbr L324
951 0001FF54 L325:
952 0001FF54 # writes("initial Acc = ");
953 0001FF54 .data 1
954 00000d15 * L326:
955 00000d15 * 696E697469616C20416363203 .ascii "initial Acc = \0"
D2000
956 00000d24 * .text
957 0001FF54 dd 8f00000d15 pushl $L326
958 0001FF5A fe 08 effffff6ef callf $8,_writes
959 0001FF61 # write32h( dbl_ld_acc.m );
960 0001FF61 dd effffff6e9 pushl _dbl_ld_acc
961 0001FF67 fe 08 effffff6e2 callf $8,_write32h
962 0001FF6E # writec(' ');
963 0001FF6E dd 20 pushl $32
964 0001FF70 fe 08 effffff6d9 callf $8,_writec
965 0001FF77 # write32h( dbl_ld_acc.l );
966 0001FF77 dd effffff6d7 pushl _dbl_ld_acc+4
967 0001FF7D fe 08 effffff6cc callf $8,_write32h
968 0001FF84 # }
969 0001FF84 40 ret#2
970 0001FF85 .set L322,0x0
971 0001FF85 L324:
972 0001FF85 11 cd jbr L325
973 0001FF87 .data
974 00000aac * .text
975 0001FF87 00 .align 1
976 0001FF88 .globl _pushd_er_halt
977 0001FF88 _pushd_er_halt:
978 0001FF88 0000 .word L327
979 0001FF8A #
980 0001FF8A #
981 0001FF8A #
982 0001FF8A # /**************************************************************************
983 0001FF8A # *
984 0001FF8A # * HALT ON ERROR ROUTINE
985 0001FF8A # *
986 0001FF8A # **************************************************************************/
987 0001FF8A # pushd_er_halt( halt_code )
988 0001FF8A # int halt_code;
989 0001FF8A # {
990 0001FF8A 13 0169 jbr L329
991 0001FF8D L330:
992 0001FF8D # sgl_value_1 = dbl_ld_acc.m;
993 0001FF8D 0d effffff6bd effffff6b8 movl _dbl_ld_acc,_sgl_value_1
994 0001FF98 # sgl_value_2 = dbl_ld_acc.l;
995 0001FF98 0d effffff6b6 effffff6ad movl _dbl_ld_acc+4,_sgl_value_2
996 0001FFA3 # sgl_value_3 = dbl_st_acc.m;
997 0001FFA3 0d effffff6a7 effffff6a2 movl _dbl_st_acc,_sgl_value_3
998 0001FFAE # sgl_value_4 = dbl_st_acc.l;
999 0001FFAE 0d effffff6a0 effffff697 movl _dbl_st_acc+4,_sgl_value_4
1000 0001FFB9 # sgl_value_5 = pop_val_1;
1001 0001FFB9 0d effffff691 effffff68c movl _pop_val_1,_sgl_value_5
1002 0001FFC4 # sgl_value_6 = pop_val_2;
1003 0001FFC4 0d effffff686 effffff681 movl _pop_val_2,_sgl_value_6
1004 0001FFCF # sgl_dummy1 = halt_code; /* get the error type */
1005 0001FFCF 0d ad04 effffff679 movl 4(fp),_sgl_dummy1
1006 0001FFD7 # asm("movl _test_no,r0"); /* r0 = test number */
1007 0001FFD7 0d effffff673 50 movl _test_no,r0
1008 0001FFDE # asm("movl _subtest,r1"); /* r1 = subtest number */
1009 0001FFDE 0d effffff66c 51 movl _subtest,r1
1010 0001FFE5 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1011 0001FFE5 0d effffff665 52 movl _sgl_dummy1,r2
1012 0001FFEC # asm("movl _cycle,r3"); /* r3 = cycle count */
1013 0001FFEC 0d effffff65e 53 movl _cycle,r3
1014 0001FFF3 # asm("movl _sgl_value_1,r4"); /* r4 = MS loaded */
1015 0001FFF3 0d effffff657 54 movl _sgl_value_1,r4
1016 0001FFFA # asm("movl _sgl_value_2,r5"); /* r5 = LS loaded */
1017 0001FFFA 0d effffff650 55 movl _sgl_value_2,r5
1018 00020001 # asm("movl _sgl_value_3,r6"); /* r6 = MS stored */
1019 00020001 0d effffff649 56 movl _sgl_value_3,r6
1020 00020008 # asm("movl _sgl_value_4,r7"); /* r7 = LS stored */
1021 00020008 0d effffff642 57 movl _sgl_value_4,r7
1022 0002000F # asm("movl _sgl_value_5,r8"); /* r8 = MS popped */
1023 0002000F 0d effffff63b 58 movl _sgl_value_5,r8
1024 00020016 # asm("movl _sgl_value_6,r9"); /* r9 = LS popped */
1025 00020016 0d effffff634 59 movl _sgl_value_6,r9
1026 0002001D # if( halt_code == BAD_ACC_HLT ) {
1027 0002001D 1d ad04 01 cmpl 4(fp),$1
1028 00020021 21 2e jneq L331
1029 00020023 # sgl_value_1 = dbl_expected.m;
1030 00020023 0d effffff627 effffff622 movl _dbl_expected,_sgl_value_1
1031 0002002E # sgl_value_2 = dbl_expected.l;
1032 0002002E 0d effffff620 effffff617 movl _dbl_expected+4,_sgl_value_2
1033 00020039 # asm("movl _sgl_value_1,r10"); /* r10 = MS expected */
1034 00020039 0d effffff611 5a movl _sgl_value_1,r10
1035 00020040 # asm("movl _sgl_value_2,r11"); /* r11 = LS expected */
1036 00020040 0d effffff60a 5b movl _sgl_value_2,r11
1037 00020047 # asm("movl _index,r12"); /* r12 = data index */
1038 00020047 0d effffff603 5c movl _index,r12
1039 0002004E # } else
1040 0002004E 13 00a3 jbr L332
1041 00020051 L331:
1042 00020051 # if( halt_code == BAD_REG_HLT ) {
1043 00020051 1d ad04 02 cmpl 4(fp),$2
1044 00020055 21 3d jneq L333
1045 00020057 # sgl_dummy1 = load_regs[index2];
1046 00020057 0d effffff5f3 50 movl _index2,r0
1047 0002005E 0d 40effffff5eb movl _load_regs[r0],_sgl_dummy1
effffff5e6
1048 0002006A # sgl_dummy2 = store_regs[index2];
1049 0002006A 0d effffff5e0 50 movl _index2,r0
1050 00020071 0d 40effffff5d8 movl _store_regs[r0],_sgl_dummy2
effffff5d3
1051 0002007D # asm("movl _index2,r11"); /* r11 = bad register # */
1052 0002007D 0d effffff5cd 5b movl _index2,r11
1053 00020084 # asm("movl _sgl_dummy2,r12"); /* r12 = actual value */
1054 00020084 0d effffff5c6 5c movl _sgl_dummy2,r12
1055 0002008B # asm("movl _sgl_dummy1,r13"); /* r13 = expected value */
1056 0002008B 0d effffff5bf 5d movl _sgl_dummy1,r13
1057 00020092 # } else
1058 00020092 11 60 jbr L334
1059 00020094 L333:
1060 00020094 # if( halt_code == BAD_PSL_HLT ) {
1061 00020094 1d ad04 03 cmpl 4(fp),$3
1062 00020098 21 17 jneq L335
1063 0002009A # asm("movl _init_psl,r11"); /* r11 = initial PSL */
1064 0002009A 0d effffff5b0 5b movl _init_psl,r11
1065 000200A1 # asm("movl _psl_val,r12"); /* r12 = final PSL */
1066 000200A1 0d effffff5a9 5c movl _psl_val,r12
1067 000200A8 # asm("movl _exp_psl,r13"); /* r13 = expected PSL */
1068 000200A8 0d effffff5a2 5d movl _exp_psl,r13
1069 000200AF # } else
1070 000200AF 11 43 jbr L336
1071 000200B1 L335:
1072 000200B1 # if( halt_code == BAD_STORE_HLT ) {
1073 000200B1 1d ad04 09 cmpl 4(fp),$9
1074 000200B5 21 2d jneq L337
1075 000200B7 # sgl_value_1 = dbl_expected.m;
1076 000200B7 0d effffff593 effffff58e movl _dbl_expected,_sgl_value_1
1077 000200C2 # sgl_value_2 = dbl_expected.l;
1078 000200C2 0d effffff58c effffff583 movl _dbl_expected+4,_sgl_value_2
1079 000200CD # asm("movl _sgl_value_1,r10"); /* r10 = MS expected */
1080 000200CD 0d effffff57d 5a movl _sgl_value_1,r10
1081 000200D4 # asm("movl _sgl_value_2,r11"); /* r11 = LS expected */
1082 000200D4 0d effffff576 5b movl _sgl_value_2,r11
1083 000200DB # asm("movl _index,r12"); /* r12 = data index */
1084 000200DB 0d effffff56f 5c movl _index,r12
1085 000200E2 # } else
1086 000200E2 11 10 jbr L338
1087 000200E4 L337:
1088 000200E4 # if( halt_code == PUSH_CNT_HLT ) {
1089 000200E4 1d ad04 08 cmpl 4(fp),$8
1090 000200E8 21 0a jneq L339
1091 000200EA # asm("movl _sgl_value_7,r10"); /* r10 = num words push */
1092 000200EA 0d effffff560 5a movl _sgl_value_7,r10
1093 000200F1 # asm("movl $2,r11"); /* r11 = num words exp */
1094 000200F1 0d 02 5b movl $2,r11
1095 000200F4 # };
1096 000200F4 L339:
1097 000200F4 L338:
1098 000200F4 L336:
1099 000200F4 L334:
1100 000200F4 L332:
1101 000200F4 # asm("halt"); /* HALT ... */
1102 000200F4 00 halt
1103 000200F5 # }
1104 000200F5 40 ret#2
1105 000200F6 .set L327,0x0
1106 000200F6 L329:
1107 000200F6 13 fe94 jbr L330
1108 000200F9 .data
1108 0003F749 .data
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