File:  [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / macro4 / subd.lst
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Sun Jul 28 12:30:56 2019 UTC (7 years ago) by root
Branches: bsd, MAIN
CVS tags: v121, HEAD
Power 6/32 Unix version 1.21

   1  00000000                                  LL0:
   2  00000000                                  	.data
   3  00000d28 *                                	.text
   4  00000000                                  	.align	1
   5  00000000                                  	.globl	_subd
   6  00000000                                  _subd:
   7  00017588    0000                          	.word	L215
   8  0001758A                                   # 
   9  0001758A                                   # 
  10  0001758A                                   # #include "fpp_defs.h"
  11  0001758A                                   # 
  12  0001758A                                   # 
  13  0001758A                                   # /*****************************************************************************
  14  0001758A                                   # *
  15  0001758A                                   # *       SUBD - DOUBLE PRECISION FLOATING POINT SUBTRACT TEST
  16  0001758A                                   # *
  17  0001758A                                   # *****************************************************************************/
  18  0001758A                                   # subd()
  19  0001758A                                   # {
  20  0001758A    11 7a                         	jbr 	L217
  21  0001758C                                  L218:
  22  0001758C                                   #         asm(".globl _subd_t");
  23  0001758C                                  .globl _subd_t
  24  0001758C                                   #         asm("_subd_t:");                        /* entry address            */
  25  0001758C                                  _subd_t:
  26  0001758C                                   #         if( (cycle == 1) && (prt_hdrs) )        /* print headers on 1st cycle */
  27  0001758C    1d effffffff6 01              	cmpl	_cycle,$1
  28  00017593    21 15                         	jneq	L219
  29  00017595    5d efffffffed                 	tstl	_prt_hdrs
  30  0001759B    31 0d                         	jeql	L219
  31  0001759D                                   #            writes(" SUBD");
  32  0001759D                                  	.data	1
  33  00000d28 *                                L221:
  34  00000d28 *  205355424400                  	.ascii	" SUBD\0"
  35  00000d2e *                                	.text
  36  0001759D    dd 8f00000d28                 	pushl	$L221
  37  000175A3    fe 08 efffffffde              	callf	$8,_writes
  38  000175AA                                   #         subd_1();                               /* sub through a register     */
  39  000175AA                                  L219:
  40  000175AA    fe 04 ef00000057              	callf	$4,_subd_1
  41  000175B1                                   #         subd_2();                               /* sub through the cache      */
  42  000175B1    fe 04 ef000001b2              	callf	$4,_subd_2
  43  000175B8                                   #         subd_3();                               /* wait 1 NOP before storeing */
  44  000175B8    fe 04 ef000002f9              	callf	$4,_subd_3
  45  000175BF                                   #         for( nop_cnt = 3; nop_cnt > 0; nop_cnt-- )
  46  000175BF    0d 03 efffffffc2              	movl	$3,_nop_cnt
  47  000175C6                                  L227:
  48  000175C6    5d efffffffbc                 	tstl	_nop_cnt
  49  000175CC    51 15                         	jleq	L226
  50  000175CE                                   #              subd_3(nop_cnt);                   /* wait 6 ... 2 NOPs          */
  51  000175CE    dd efffffffb4                 	pushl	_nop_cnt
  52  000175D4    fe 08 ef000002dd              	callf	$8,_subd_3
  53  000175DB                                  L225:
  54  000175DB    7d efffffffa7                 	decl	_nop_cnt
  55  000175E1    11 e3                         	jbr 	L227
  56  000175E3                                  L226:
  57  000175E3                                   #         subd_4();                               /* wait 3 NOPs                */
  58  000175E3    fe 04 ef00000456              	callf	$4,_subd_4
  59  000175EA                                   #         subd_5();                               /* wait 1 NOP before storing  */
  60  000175EA    fe 04 ef000005a1              	callf	$4,_subd_5
  61  000175F1                                   #         subd_6();                               /* register stability test    */
  62  000175F1    fe 04 ef000006ea              	callf	$4,_subd_6
  63  000175F8                                   #         subd_7();                               /* PSL stability test         */
  64  000175F8    fe 04 ef000008b3              	callf	$4,_subd_7
  65  000175FF                                   #         asm("jmp *return");                     /* return to the test monitor */
  66  000175FF    71 ffffffff83                 jmp *return
  67  00017605                                   # }
  68  00017605    40                            	ret#2
  69  00017606                                  	.set	L215,0x0
  70  00017606                                  L217:
  71  00017606    11 84                         	jbr 	L218
  72  00017608                                  	.data
  73  00000d28 *                                	.text
  74  00017608                                  	.align	1
  75  00017608                                  	.globl	_subd_1
  76  00017608                                  _subd_1:
  77  00017608    0000                          	.word	L232
  78  0001760A                                   #   
  79  0001760A                                   # 
  80  0001760A                                   # 
  81  0001760A                                   # /************************************************************************
  82  0001760A                                   # *
  83  0001760A                                   # *               SUBTEST 1 - subtract through a register
  84  0001760A                                   # *
  85  0001760A                                   # ************************************************************************/
  86  0001760A                                   # subd_1() 
  87  0001760A                                   # {
  88  0001760A    13 015a                       	jbr 	L234
  89  0001760D                                  L235:
  90  0001760D                                   #         force_loop = FALSE;
  91  0001760D    4d efffffff75                 	clrl	_force_loop
  92  00017613                                   #         subtest = 1;
  93  00017613    0d 01 efffffff6e              	movl	$1,_subtest
  94  0001761A                                   #         for( index = 0; index < max_subd_1_index; index++ ) {
  95  0001761A    4d efffffff68                 	clrl	_index
  96  00017620                                  L238:
  97  00017620    1d efffffff62 efffffff5d      	cmpl	_index,_max_subd_1_index
  98  0001762B    91 03 13 0136                 	jgeq	L237
  99  00017630                                   #              dbl_ld_acc   = subd_1_data[index].op_1; /* get operand 1       */
 100  00017630    5c 18 efffffff51 50           	mull3	$24,_index,r0
 101  00017638    0c 8f00000000 50              	addl2	$_subd_1_data,r0
 102  0001763F    0d a004 efffffff45            	movl	4(r0),_dbl_ld_acc+4
 103  00017647    0d 60 efffffff3a              	movl	(r0),_dbl_ld_acc
 104  0001764E                                   #              dbl_value_1  = subd_1_data[index].op_2; /* get operand 2       */
 105  0001764E    5c 18 efffffff33 50           	mull3	$24,_index,r0
 106  00017656    0c 8f00000008 50              	addl2	$_subd_1_data+8,r0
 107  0001765D    0d a004 efffffff27            	movl	4(r0),_dbl_value_1+4
 108  00017665    0d 60 efffffff1c              	movl	(r0),_dbl_value_1
 109  0001766C                                   #              dbl_expected = subd_1_data[index].exp;  /* get expected result */
 110  0001766C    5c 18 efffffff15 50           	mull3	$24,_index,r0
 111  00017674    0c 8f00000010 50              	addl2	$_subd_1_data+16,r0
 112  0001767B    0d a004 efffffff09            	movl	4(r0),_dbl_expected+4
 113  00017683    0d 60 effffffefe              	movl	(r0),_dbl_expected
 114  0001768A                                   # /*
 115  0001768A                                   #  * If LOOP ON ERROR is set, this is the loop for this subtest.
 116  0001768A                                   #  * The force loop flag is set after the first error.
 117  0001768A                                   # */
 118  0001768A                                   #              asm("_subd_1_lp1:");
 119  0001768A                                  _subd_1_lp1:
 120  0001768A                                   #              asm("movl _dbl_ld_acc,r2");        /* move operand 1 to r2/r3 */
 121  0001768A    0d effffffef8 52              movl _dbl_ld_acc,r2
 122  00017691                                   #              asm("movl _dbl_ld_acc+4,r3");
 123  00017691    0d effffffef5 53              movl _dbl_ld_acc+4,r3
 124  00017698                                   #              asm("movl _dbl_value_1,r4");       /* move operand 2 to r4/r5 */
 125  00017698    0d effffffeea 54              movl _dbl_value_1,r4
 126  0001769F                                   #              asm("movl _dbl_value_1+4,r5");
 127  0001769F    0d effffffee7 55              movl _dbl_value_1+4,r5
 128  000176A6                                   #              asm("ldd r2");                     /* load the 1st operand    */
 129  000176A6    07 52                         ldd r2
 130  000176A8                                   #              asm("subd r4");                    /* subtract the 2nd operand*/
 131  000176A8    d7 54                         subd r4
 132  000176AA                                   #              asm("std _dbl_st_acc");            /* store the result        */
 133  000176AA    27 effffffed8                 std _dbl_st_acc
 134  000176B0                                   #              if( force_loop )
 135  000176B0    5d effffffed2                 	tstl	_force_loop
 136  000176B6    31 02                         	jeql	L239
 137  000176B8                                   #                   asm("brb _subd_1_lp1");;      /* loop on the error       */
 138  000176B8    11 d0                         brb _subd_1_lp1
 139  000176BA                                  L239:
 140  000176BA                                   # /* 
 141  000176BA                                   #  * end error loop - test the results
 142  000176BA                                   # */
 143  000176BA                                   #              if( (dbl_st_acc.m != dbl_expected.m) ||  /* verify the results */
 144  000176BA                                   #                  (dbl_st_acc.l != dbl_expected.l) ) {
 145  000176BA    1d effffffec8 effffffec3      	cmpl	_dbl_st_acc,_dbl_expected
 146  000176C5    21 10                         	jneq	L9999
 147  000176C7    1d effffffebf effffffeba      	cmpl	_dbl_st_acc+4,_dbl_expected+4
 148  000176D2    21 03 13 0086                 	jeql	L240
 149  000176D7                                  L9999:
 150  000176D7                                   #                    errcnt++;                    /* bump the error count   */
 151  000176D7    6d effffffeab                 	incl	_errcnt
 152  000176DD                                   #                    if( prt_error ) {
 153  000176DD    5d effffffea5                 	tstl	_prt_error
 154  000176E3    31 55                         	jeql	L241
 155  000176E5                                   #                         writes(" \n");      /* start a new print line */
 156  000176E5                                  	.data	1
 157  00000d2e *                                L242:
 158  00000d2e *  200A00                        	.ascii	" \12\0"
 159  00000d31 *                                	.text
 160  000176E5    dd 8f00000d2e                 	pushl	$L242
 161  000176EB    fe 08 effffffe96              	callf	$8,_writes
 162  000176F2                                   #                         writes("cycle: ");
 163  000176F2                                  	.data	1
 164  00000d31 *                                L243:
 165  00000d31 *  6379636C653A2000              	.ascii	"cycle: \0"
 166  00000d39 *                                	.text
 167  000176F2    dd 8f00000d31                 	pushl	$L243
 168  000176F8    fe 08 effffffe89              	callf	$8,_writes
 169  000176FF                                   #                         writed( cycle );
 170  000176FF    dd effffffe83                 	pushl	_cycle
 171  00017705    fe 08 effffffe7c              	callf	$8,_writed
 172  0001770C                                   #                         writes("  SUBD test ");
 173  0001770C                                  	.data	1
 174  00000d39 *                                L245:
 175  00000d39 *  2020535542442074657374200     	.ascii	"  SUBD test \0"
                  0
 176  00000d46 *                                	.text
 177  0001770C    dd 8f00000d39                 	pushl	$L245
 178  00017712    fe 08 effffffe6f              	callf	$8,_writes
 179  00017719                                   # 			writed( test_no );
 180  00017719    dd effffffe69                 	pushl	_test_no
 181  0001771F    fe 08 effffffe62              	callf	$8,_writed
 182  00017726                                   # 			writes(", subtest 1 (Reg. Data) - BAD FINAL ACC\n");
 183  00017726                                  	.data	1
 184  00000d46 *                                L246:
 185  00000d46 *  2C20737562746573742031202     	.ascii	", subtest 1 (Reg. Data) - BAD FINAL ACC\12\0"
                  85265672E204461746129202D
                  204241442046494E414C20414
                  3430A00
 186  00000d6f *                                	.text
 187  00017726    dd 8f00000d46                 	pushl	$L246
 188  0001772C    fe 08 effffffe55              	callf	$8,_writes
 189  00017733                                   #                         print_subd_data();
 190  00017733    fe 04 ef00000952              	callf	$4,_print_subd_data
 191  0001773A                                   #                    }
 192  0001773A                                   #                    if( halt_flg ) 
 193  0001773A                                  L241:
 194  0001773A    5d effffffe48                 	tstl	_halt_flg
 195  00017740    31 09                         	jeql	L248
 196  00017742                                   #                         subd_er_halt( BAD_ACC_HLT );    /* halt on the error */
 197  00017742    dd 01                         	pushl	$1
 198  00017744    fe 08 ef00000a37              	callf	$8,_subd_er_halt
 199  0001774B                                   #                    if( loop_on_err ) {
 200  0001774B                                  L248:
 201  0001774B    5d effffffe37                 	tstl	_loop_on_err
 202  00017751    31 0a                         	jeql	L250
 203  00017753                                   #                         force_loop = TRUE;        /* set the force loop flag */
 204  00017753    0d 01 effffffe2e              	movl	$1,_force_loop
 205  0001775A                                   #                         asm("brw _subd_1_lp1");;  /* and loop on the error   */
 206  0001775A    13 ff2d                       brw _subd_1_lp1
 207  0001775D                                   #                    }   /* end of loop on error */
 208  0001775D                                   #              }   /* end of compare error */
 209  0001775D                                  L250:
 210  0001775D                                   #         }  /* end of WHILE loop */
 211  0001775D                                  L240:
 212  0001775D                                  L236:
 213  0001775D    6d effffffe25                 	incl	_index
 214  00017763    13 feba                       	jbr 	L238
 215  00017766                                  L237:
 216  00017766                                   # }  /* end of subtest 1 */
 217  00017766    40                            	ret#2
 218  00017767                                  	.set	L232,0x0
 219  00017767                                  L234:
 220  00017767    13 fea3                       	jbr 	L235
 221  0001776A                                  	.data
 222  00000d28 *                                	.text
 223  0001776A                                  	.align	1
 224  0001776A                                  	.globl	_subd_2
 225  0001776A                                  _subd_2:
 226  0001776A    0000                          	.word	L251
 227  0001776C                                   #   
 228  0001776C                                   # 
 229  0001776C                                   # 
 230  0001776C                                   # /************************************************************************
 231  0001776C                                   # *
 232  0001776C                                   # *               SUBTEST 2 - subtract through memory
 233  0001776C                                   # *
 234  0001776C                                   # ************************************************************************/
 235  0001776C                                   # subd_2() 
 236  0001776C                                   # {
 237  0001776C    13 0146                       	jbr 	L253
 238  0001776F                                  L254:
 239  0001776F                                   #         force_loop = FALSE;
 240  0001776F    4d effffffe13                 	clrl	_force_loop
 241  00017775                                   #         subtest = 2;
 242  00017775    0d 02 effffffe0c              	movl	$2,_subtest
 243  0001777C                                   #         for( index = 0; index < max_subd_1_index; index++ ) {
 244  0001777C    4d effffffe06                 	clrl	_index
 245  00017782                                  L257:
 246  00017782    1d effffffe00 effffffdfb      	cmpl	_index,_max_subd_1_index
 247  0001778D    91 03 13 0122                 	jgeq	L256
 248  00017792                                   #              dbl_ld_acc   = subd_1_data[index].op_1; /* get operand 1       */
 249  00017792    5c 18 effffffdef 50           	mull3	$24,_index,r0
 250  0001779A    0c 8f00000000 50              	addl2	$_subd_1_data,r0
 251  000177A1    0d a004 effffffde3            	movl	4(r0),_dbl_ld_acc+4
 252  000177A9    0d 60 effffffdd8              	movl	(r0),_dbl_ld_acc
 253  000177B0                                   #              dbl_value_1  = subd_1_data[index].op_2; /* get operand 2       */
 254  000177B0    5c 18 effffffdd1 50           	mull3	$24,_index,r0
 255  000177B8    0c 8f00000008 50              	addl2	$_subd_1_data+8,r0
 256  000177BF    0d a004 effffffdc5            	movl	4(r0),_dbl_value_1+4
 257  000177C7    0d 60 effffffdba              	movl	(r0),_dbl_value_1
 258  000177CE                                   #              dbl_expected = subd_1_data[index].exp;  /* get expected result */
 259  000177CE    5c 18 effffffdb3 50           	mull3	$24,_index,r0
 260  000177D6    0c 8f00000010 50              	addl2	$_subd_1_data+16,r0
 261  000177DD    0d a004 effffffda7            	movl	4(r0),_dbl_expected+4
 262  000177E5    0d 60 effffffd9c              	movl	(r0),_dbl_expected
 263  000177EC                                   # /*
 264  000177EC                                   #  * If LOOP ON ERROR is set, this is the loop for this subtest.
 265  000177EC                                   #  * The force loop flag is set after the first error.
 266  000177EC                                   # */
 267  000177EC                                   #              asm("_subd_2_lp1:");
 268  000177EC                                  _subd_2_lp1:
 269  000177EC                                   #              asm("ldd _dbl_ld_acc");            /* load the 1st operand    */
 270  000177EC    07 effffffd96                 ldd _dbl_ld_acc
 271  000177F2                                   #              asm("subd _dbl_value_1");          /* subtract the 2nd operand*/
 272  000177F2    d7 effffffd90                 subd _dbl_value_1
 273  000177F8                                   #              asm("std _dbl_st_acc");            /* store the result        */
 274  000177F8    27 effffffd8a                 std _dbl_st_acc
 275  000177FE                                   #              if( force_loop )
 276  000177FE    5d effffffd84                 	tstl	_force_loop
 277  00017804    31 02                         	jeql	L258
 278  00017806                                   #                   asm("brb _subd_2_lp1");;      /* loop on the error       */
 279  00017806    11 e4                         brb _subd_2_lp1
 280  00017808                                  L258:
 281  00017808                                   # /* 
 282  00017808                                   #  * end error loop - test the results
 283  00017808                                   # */
 284  00017808                                   #              if( (dbl_st_acc.m != dbl_expected.m) ||  /* verify the results */
 285  00017808                                   #                  (dbl_st_acc.l != dbl_expected.l) ) {
 286  00017808    1d effffffd7a effffffd75      	cmpl	_dbl_st_acc,_dbl_expected
 287  00017813    21 10                         	jneq	L9998
 288  00017815    1d effffffd71 effffffd6c      	cmpl	_dbl_st_acc+4,_dbl_expected+4
 289  00017820    21 03 13 0086                 	jeql	L259
 290  00017825                                  L9998:
 291  00017825                                   #                    errcnt++;                    /* bump the error count   */
 292  00017825    6d effffffd5d                 	incl	_errcnt
 293  0001782B                                   #                    if( prt_error ) {
 294  0001782B    5d effffffd57                 	tstl	_prt_error
 295  00017831    31 55                         	jeql	L260
 296  00017833                                   #                         writes(" \n");      /* start a new print line */
 297  00017833                                  	.data	1
 298  00000d6f *                                L261:
 299  00000d6f *  200A00                        	.ascii	" \12\0"
 300  00000d72 *                                	.text
 301  00017833    dd 8f00000d6f                 	pushl	$L261
 302  00017839    fe 08 effffffd48              	callf	$8,_writes
 303  00017840                                   #                         writes("cycle: ");
 304  00017840                                  	.data	1
 305  00000d72 *                                L262:
 306  00000d72 *  6379636C653A2000              	.ascii	"cycle: \0"
 307  00000d7a *                                	.text
 308  00017840    dd 8f00000d72                 	pushl	$L262
 309  00017846    fe 08 effffffd3b              	callf	$8,_writes
 310  0001784D                                   #                         writed( cycle );
 311  0001784D    dd effffffd35                 	pushl	_cycle
 312  00017853    fe 08 effffffd2e              	callf	$8,_writed
 313  0001785A                                   #                         writes("  SUBD test ");
 314  0001785A                                  	.data	1
 315  00000d7a *                                L263:
 316  00000d7a *  2020535542442074657374200     	.ascii	"  SUBD test \0"
                  0
 317  00000d87 *                                	.text
 318  0001785A    dd 8f00000d7a                 	pushl	$L263
 319  00017860    fe 08 effffffd21              	callf	$8,_writes
 320  00017867                                   # 			writed( test_no );
 321  00017867    dd effffffd1b                 	pushl	_test_no
 322  0001786D    fe 08 effffffd14              	callf	$8,_writed
 323  00017874                                   # 			writes(", subtest 2 (Cache Data) - BAD FINAL ACC\n");
 324  00017874                                  	.data	1
 325  00000d87 *                                L264:
 326  00000d87 *  2C20737562746573742032202     	.ascii	", subtest 2 (Cache Data) - BAD FINAL ACC\12\0"
                  8436163686520446174612920
                  2D204241442046494E414C204
                  143430A00
 327  00000db1 *                                	.text
 328  00017874    dd 8f00000d87                 	pushl	$L264
 329  0001787A    fe 08 effffffd07              	callf	$8,_writes
 330  00017881                                   #                         print_subd_data();
 331  00017881    fe 04 ef00000804              	callf	$4,_print_subd_data
 332  00017888                                   #                    }
 333  00017888                                   #                    if( halt_flg ) 
 334  00017888                                  L260:
 335  00017888    5d effffffcfa                 	tstl	_halt_flg
 336  0001788E    31 09                         	jeql	L265
 337  00017890                                   #                         subd_er_halt( BAD_ACC_HLT );    /* halt on the error */
 338  00017890    dd 01                         	pushl	$1
 339  00017892    fe 08 ef000008e9              	callf	$8,_subd_er_halt
 340  00017899                                   #                    if( loop_on_err ) {
 341  00017899                                  L265:
 342  00017899    5d effffffce9                 	tstl	_loop_on_err
 343  0001789F    31 0a                         	jeql	L266
 344  000178A1                                   #                         force_loop = TRUE;        /* set the force loop flag */
 345  000178A1    0d 01 effffffce0              	movl	$1,_force_loop
 346  000178A8                                   #                         asm("brw _subd_2_lp1");;  /* and loop on the error   */
 347  000178A8    13 ff41                       brw _subd_2_lp1
 348  000178AB                                   #                    }   /* end of loop on error */
 349  000178AB                                   #              }   /* end of compare error */
 350  000178AB                                  L266:
 351  000178AB                                   #         }  /* end of WHILE loop */
 352  000178AB                                  L259:
 353  000178AB                                  L255:
 354  000178AB    6d effffffcd7                 	incl	_index
 355  000178B1    13 fece                       	jbr 	L257
 356  000178B4                                  L256:
 357  000178B4                                   # }  /* end of subtest 2 */
 358  000178B4    40                            	ret#2
 359  000178B5                                  	.set	L251,0x0
 360  000178B5                                  L253:
 361  000178B5    13 feb7                       	jbr 	L254
 362  000178B8                                  	.data
 363  00000d28 *                                	.text
 364  000178B8                                  	.align	1
 365  000178B8                                  	.globl	_subd_3
 366  000178B8                                  _subd_3:
 367  000178B8    0000                          	.word	L267
 368  000178BA                                   #   
 369  000178BA                                   # 
 370  000178BA                                   # 
 371  000178BA                                   # /****************************************************************************
 372  000178BA                                   # *
 373  000178BA                                   # *       SUBTEST 3 - Wait 2n NOPs before storing the results
 374  000178BA                                   # *
 375  000178BA                                   # ****************************************************************************/
 376  000178BA                                   # subd_3( count ) 
 377  000178BA                                   # int count;                                      /* wait "count" * 2 NOPs   */
 378  000178BA                                   # {
 379  000178BA    13 0180                       	jbr 	L269
 380  000178BD                                  L270:
 381  000178BD                                   #         force_loop = FALSE;
 382  000178BD    4d effffffcc5                 	clrl	_force_loop
 383  000178C3                                   #         subtest = 3;
 384  000178C3    0d 03 effffffcbe              	movl	$3,_subtest
 385  000178CA                                   #         sgl_dummy2 = count;                     /* get the NOP count */
 386  000178CA    0d ad04 effffffcb6            	movl	4(fp),_sgl_dummy2
 387  000178D2                                   #         for( index = 0; index < max_subd_1_index; index++ ) {
 388  000178D2    4d effffffcb0                 	clrl	_index
 389  000178D8                                  L273:
 390  000178D8    1d effffffcaa effffffca5      	cmpl	_index,_max_subd_1_index
 391  000178E3    91 03 13 0154                 	jgeq	L272
 392  000178E8                                   #              dbl_ld_acc   = subd_1_data[index].op_1; /* get operand 1       */
 393  000178E8    5c 18 effffffc99 50           	mull3	$24,_index,r0
 394  000178F0    0c 8f00000000 50              	addl2	$_subd_1_data,r0
 395  000178F7    0d a004 effffffc8d            	movl	4(r0),_dbl_ld_acc+4
 396  000178FF    0d 60 effffffc82              	movl	(r0),_dbl_ld_acc
 397  00017906                                   #              dbl_value_1  = subd_1_data[index].op_2; /* get operand 2       */
 398  00017906    5c 18 effffffc7b 50           	mull3	$24,_index,r0
 399  0001790E    0c 8f00000008 50              	addl2	$_subd_1_data+8,r0
 400  00017915    0d a004 effffffc6f            	movl	4(r0),_dbl_value_1+4
 401  0001791D    0d 60 effffffc64              	movl	(r0),_dbl_value_1
 402  00017924                                   #              dbl_expected = subd_1_data[index].exp;  /* get expected result */
 403  00017924    5c 18 effffffc5d 50           	mull3	$24,_index,r0
 404  0001792C    0c 8f00000010 50              	addl2	$_subd_1_data+16,r0
 405  00017933    0d a004 effffffc51            	movl	4(r0),_dbl_expected+4
 406  0001793B    0d 60 effffffc46              	movl	(r0),_dbl_expected
 407  00017942                                   # /*
 408  00017942                                   #  * If LOOP ON ERROR is set, this is the loop for this subtest.
 409  00017942                                   #  * The force loop flag is set after the first error.
 410  00017942                                   # */
 411  00017942                                   #              asm("_subd_3_lp1:");
 412  00017942                                  _subd_3_lp1:
 413  00017942                                   #              asm("movl _sgl_dummy2,r0");        /* set the NOP count       */
 414  00017942    0d effffffc40 50              movl _sgl_dummy2,r0
 415  00017949                                   #              asm("ldd _dbl_ld_acc");            /* load the 1st operand    */
 416  00017949    07 effffffc39                 ldd _dbl_ld_acc
 417  0001794F                                   #              asm("nop");                        /* delay                   */
 418  0001794F    10                            nop
 419  00017950                                   #              asm("subd _dbl_value_1");          /* subtract the 2nd operand*/
 420  00017950    d7 effffffc32                 subd _dbl_value_1
 421  00017956                                   #              asm("1:");
 422  00017956                                  1:
 423  00017956                                   #              asm("decl r0");                    /* decrement the NOP count  */
 424  00017956    7d 50                         decl r0
 425  00017958                                   #              asm("bneq 1b");                    /*    till the count = 0    */
 426  00017958    21 fc                         bneq 1b
 427  0001795A                                   #              asm("std _dbl_st_acc");            /* store the result        */
 428  0001795A    27 effffffc28                 std _dbl_st_acc
 429  00017960                                   #              if( force_loop )
 430  00017960    5d effffffc22                 	tstl	_force_loop
 431  00017966    31 02                         	jeql	L274
 432  00017968                                   #                   asm("brb _subd_3_lp1");;      /* loop on the error       */
 433  00017968    11 d8                         brb _subd_3_lp1
 434  0001796A                                  L274:
 435  0001796A                                   # /* 
 436  0001796A                                   #  * end error loop - test the results
 437  0001796A                                   # */
 438  0001796A                                   #              if( (dbl_st_acc.m != dbl_expected.m) ||  /* verify the results */
 439  0001796A                                   #                  (dbl_st_acc.l != dbl_expected.l) ) {
 440  0001796A    1d effffffc18 effffffc13      	cmpl	_dbl_st_acc,_dbl_expected
 441  00017975    21 10                         	jneq	L9997
 442  00017977    1d effffffc0f effffffc0a      	cmpl	_dbl_st_acc+4,_dbl_expected+4
 443  00017982    21 03 13 00ac                 	jeql	L275
 444  00017987                                  L9997:
 445  00017987                                   #                    errcnt++;                    /* bump the error count   */
 446  00017987    6d effffffbfb                 	incl	_errcnt
 447  0001798D                                   #                    if( prt_error ) {
 448  0001798D    5d effffffbf5                 	tstl	_prt_error
 449  00017993    31 7b                         	jeql	L276
 450  00017995                                   #                         writes(" \n");      /* start a new print line */
 451  00017995                                  	.data	1
 452  00000db1 *                                L277:
 453  00000db1 *  200A00                        	.ascii	" \12\0"
 454  00000db4 *                                	.text
 455  00017995    dd 8f00000db1                 	pushl	$L277
 456  0001799B    fe 08 effffffbe6              	callf	$8,_writes
 457  000179A2                                   #                         writes("cycle: ");
 458  000179A2                                  	.data	1
 459  00000db4 *                                L278:
 460  00000db4 *  6379636C653A2000              	.ascii	"cycle: \0"
 461  00000dbc *                                	.text
 462  000179A2    dd 8f00000db4                 	pushl	$L278
 463  000179A8    fe 08 effffffbd9              	callf	$8,_writes
 464  000179AF                                   #                         writed( cycle );
 465  000179AF    dd effffffbd3                 	pushl	_cycle
 466  000179B5    fe 08 effffffbcc              	callf	$8,_writed
 467  000179BC                                   #                         writes("  SUBD test ");
 468  000179BC                                  	.data	1
 469  00000dbc *                                L279:
 470  00000dbc *  2020535542442074657374200     	.ascii	"  SUBD test \0"
                  0
 471  00000dc9 *                                	.text
 472  000179BC    dd 8f00000dbc                 	pushl	$L279
 473  000179C2    fe 08 effffffbbf              	callf	$8,_writes
 474  000179C9                                   # 			writed( test_no );
 475  000179C9    dd effffffbb9                 	pushl	_test_no
 476  000179CF    fe 08 effffffbb2              	callf	$8,_writed
 477  000179D6                                   # 			writes(", subtest 3 (wait ");
 478  000179D6                                  	.data	1
 479  00000dc9 *                                L280:
 480  00000dc9 *  2C20737562746573742033202     	.ascii	", subtest 3 (wait \0"
                  8776169742000
 481  00000ddc *                                	.text
 482  000179D6    dd 8f00000dc9                 	pushl	$L280
 483  000179DC    fe 08 effffffba5              	callf	$8,_writes
 484  000179E3                                   #                         sgl_dummy1 = 2*count;
 485  000179E3    48 01 ad04 50                 	shll	$1,4(fp),r0
 486  000179E8    0d 50 effffffb99              	movl	r0,_sgl_dummy1
 487  000179EF                                   #                         writed( sgl_dummy1 );   /* write the NOP count    */
 488  000179EF    dd effffffb93                 	pushl	_sgl_dummy1
 489  000179F5    fe 08 effffffb8c              	callf	$8,_writed
 490  000179FC                                   #                         writes(" NOPs) - BAD FINAL ACC\n");
 491  000179FC                                  	.data	1
 492  00000ddc *                                L281:
 493  00000ddc *  204E4F507329202D204241442     	.ascii	" NOPs) - BAD FINAL ACC\12\0"
                  046494E414C204143430A00
 494  00000df4 *                                	.text
 495  000179FC    dd 8f00000ddc                 	pushl	$L281
 496  00017A02    fe 08 effffffb7f              	callf	$8,_writes
 497  00017A09                                   #                         print_subd_data();
 498  00017A09    fe 04 ef0000067c              	callf	$4,_print_subd_data
 499  00017A10                                   #                    }
 500  00017A10                                   #                    if( halt_flg ) 
 501  00017A10                                  L276:
 502  00017A10    5d effffffb72                 	tstl	_halt_flg
 503  00017A16    31 09                         	jeql	L282
 504  00017A18                                   #                         subd_er_halt( BAD_ACC_HLT );    /* halt on the error */
 505  00017A18    dd 01                         	pushl	$1
 506  00017A1A    fe 08 ef00000761              	callf	$8,_subd_er_halt
 507  00017A21                                   #                    if( loop_on_err ) {
 508  00017A21                                  L282:
 509  00017A21    5d effffffb61                 	tstl	_loop_on_err
 510  00017A27    31 0a                         	jeql	L283
 511  00017A29                                   #                         force_loop = TRUE;        /* set the force loop flag */
 512  00017A29    0d 01 effffffb58              	movl	$1,_force_loop
 513  00017A30                                   #                         asm("brw _subd_3_lp1");;  /* and loop on the error   */
 514  00017A30    13 ff0f                       brw _subd_3_lp1
 515  00017A33                                   #                    }   /* end of loop on error */
 516  00017A33                                   #              }   /* end of compare error */
 517  00017A33                                  L283:
 518  00017A33                                   #         }  /* end of WHILE loop */
 519  00017A33                                  L275:
 520  00017A33                                  L271:
 521  00017A33    6d effffffb4f                 	incl	_index
 522  00017A39    13 fe9c                       	jbr 	L273
 523  00017A3C                                  L272:
 524  00017A3C                                   # }  /* end of subtest 3 */
 525  00017A3C    40                            	ret#2
 526  00017A3D                                  	.set	L267,0x0
 527  00017A3D                                  L269:
 528  00017A3D    13 fe7d                       	jbr 	L270
 529  00017A40                                  	.data
 530  00000d28 *                                	.text
 531  00017A40                                  	.align	1
 532  00017A40                                  	.globl	_subd_4
 533  00017A40                                  _subd_4:
 534  00017A40    0000                          	.word	L284
 535  00017A42                                   #   
 536  00017A42                                   # 
 537  00017A42                                   # 
 538  00017A42                                   # /************************************************************************
 539  00017A42                                   # *
 540  00017A42                                   # *       SUBTEST 4 - Wait 2 NOPs before storing the results
 541  00017A42                                   # *
 542  00017A42                                   # ************************************************************************/
 543  00017A42                                   # subd_4() 
 544  00017A42                                   # {
 545  00017A42    13 0149                       	jbr 	L286
 546  00017A45                                  L287:
 547  00017A45                                   #         force_loop = FALSE;
 548  00017A45    4d effffffb3d                 	clrl	_force_loop
 549  00017A4B                                   #         subtest = 4;
 550  00017A4B    0d 04 effffffb36              	movl	$4,_subtest
 551  00017A52                                   #         for( index = 0; index < max_subd_1_index; index++ ) {
 552  00017A52    4d effffffb30                 	clrl	_index
 553  00017A58                                  L290:
 554  00017A58    1d effffffb2a effffffb25      	cmpl	_index,_max_subd_1_index
 555  00017A63    91 03 13 0125                 	jgeq	L289
 556  00017A68                                   #              dbl_ld_acc   = subd_1_data[index].op_1; /* get operand 1       */
 557  00017A68    5c 18 effffffb19 50           	mull3	$24,_index,r0
 558  00017A70    0c 8f00000000 50              	addl2	$_subd_1_data,r0
 559  00017A77    0d a004 effffffb0d            	movl	4(r0),_dbl_ld_acc+4
 560  00017A7F    0d 60 effffffb02              	movl	(r0),_dbl_ld_acc
 561  00017A86                                   #              dbl_value_1  = subd_1_data[index].op_2; /* get operand 2       */
 562  00017A86    5c 18 effffffafb 50           	mull3	$24,_index,r0
 563  00017A8E    0c 8f00000008 50              	addl2	$_subd_1_data+8,r0
 564  00017A95    0d a004 effffffaef            	movl	4(r0),_dbl_value_1+4
 565  00017A9D    0d 60 effffffae4              	movl	(r0),_dbl_value_1
 566  00017AA4                                   #              dbl_expected = subd_1_data[index].exp;  /* get expected result */
 567  00017AA4    5c 18 effffffadd 50           	mull3	$24,_index,r0
 568  00017AAC    0c 8f00000010 50              	addl2	$_subd_1_data+16,r0
 569  00017AB3    0d a004 effffffad1            	movl	4(r0),_dbl_expected+4
 570  00017ABB    0d 60 effffffac6              	movl	(r0),_dbl_expected
 571  00017AC2                                   # /*
 572  00017AC2                                   #  * If LOOP ON ERROR is set, this is the loop for this subtest.
 573  00017AC2                                   #  * The force loop flag is set after the first error.
 574  00017AC2                                   # */
 575  00017AC2                                   #              asm("_subd_4_lp1:");
 576  00017AC2                                  _subd_4_lp1:
 577  00017AC2                                   #              asm("ldd _dbl_ld_acc");            /* load the 1st operand    */
 578  00017AC2    07 effffffac0                 ldd _dbl_ld_acc
 579  00017AC8                                   #              asm("nop");                        /* delay                   */
 580  00017AC8    10                            nop
 581  00017AC9                                   #              asm("subd _dbl_value_1");          /* subtract the 2nd operand*/
 582  00017AC9    d7 effffffab9                 subd _dbl_value_1
 583  00017ACF                                   #              asm("nop");                        /* delay before ...        */
 584  00017ACF    10                            nop
 585  00017AD0                                   #              asm("nop");                        /* ... storing the result  */
 586  00017AD0    10                            nop
 587  00017AD1                                   #              asm("std _dbl_st_acc");            /* store the result        */
 588  00017AD1    27 effffffab1                 std _dbl_st_acc
 589  00017AD7                                   #              if( force_loop )
 590  00017AD7    5d effffffaab                 	tstl	_force_loop
 591  00017ADD    31 02                         	jeql	L291
 592  00017ADF                                   #                   asm("brb _subd_4_lp1");;      /* loop on the error       */
 593  00017ADF    11 e1                         brb _subd_4_lp1
 594  00017AE1                                  L291:
 595  00017AE1                                   # /* 
 596  00017AE1                                   #  * end error loop - test the results
 597  00017AE1                                   # */
 598  00017AE1                                   #              if( (dbl_st_acc.m != dbl_expected.m) ||  /* verify the results */
 599  00017AE1                                   #                  (dbl_st_acc.l != dbl_expected.l) ) {
 600  00017AE1    1d effffffaa1 effffffa9c      	cmpl	_dbl_st_acc,_dbl_expected
 601  00017AEC    21 10                         	jneq	L9996
 602  00017AEE    1d effffffa98 effffffa93      	cmpl	_dbl_st_acc+4,_dbl_expected+4
 603  00017AF9    21 03 13 0086                 	jeql	L292
 604  00017AFE                                  L9996:
 605  00017AFE                                   #                    errcnt++;                    /* bump the error count   */
 606  00017AFE    6d effffffa84                 	incl	_errcnt
 607  00017B04                                   #                    if( prt_error ) {
 608  00017B04    5d effffffa7e                 	tstl	_prt_error
 609  00017B0A    31 55                         	jeql	L293
 610  00017B0C                                   #                         writes(" \n");      /* start a new print line */
 611  00017B0C                                  	.data	1
 612  00000df4 *                                L294:
 613  00000df4 *  200A00                        	.ascii	" \12\0"
 614  00000df7 *                                	.text
 615  00017B0C    dd 8f00000df4                 	pushl	$L294
 616  00017B12    fe 08 effffffa6f              	callf	$8,_writes
 617  00017B19                                   #                         writes("cycle: ");
 618  00017B19                                  	.data	1
 619  00000df7 *                                L295:
 620  00000df7 *  6379636C653A2000              	.ascii	"cycle: \0"
 621  00000dff *                                	.text
 622  00017B19    dd 8f00000df7                 	pushl	$L295
 623  00017B1F    fe 08 effffffa62              	callf	$8,_writes
 624  00017B26                                   #                         writed( cycle );
 625  00017B26    dd effffffa5c                 	pushl	_cycle
 626  00017B2C    fe 08 effffffa55              	callf	$8,_writed
 627  00017B33                                   #                         writes("  SUBD test ");
 628  00017B33                                  	.data	1
 629  00000dff *                                L296:
 630  00000dff *  2020535542442074657374200     	.ascii	"  SUBD test \0"
                  0
 631  00000e0c *                                	.text
 632  00017B33    dd 8f00000dff                 	pushl	$L296
 633  00017B39    fe 08 effffffa48              	callf	$8,_writes
 634  00017B40                                   # 			writed( test_no );
 635  00017B40    dd effffffa42                 	pushl	_test_no
 636  00017B46    fe 08 effffffa3b              	callf	$8,_writed
 637  00017B4D                                   # 			writes(", subtest 4 (2 NOPs) - BAD FINAL ACC\n");
 638  00017B4D                                  	.data	1
 639  00000e0c *                                L297:
 640  00000e0c *  2C20737562746573742034202     	.ascii	", subtest 4 (2 NOPs) - BAD FINAL ACC\12\0"
                  832204E4F507329202D204241
                  442046494E414C204143430A0
                  0
 641  00000e32 *                                	.text
 642  00017B4D    dd 8f00000e0c                 	pushl	$L297
 643  00017B53    fe 08 effffffa2e              	callf	$8,_writes
 644  00017B5A                                   #                         print_subd_data();
 645  00017B5A    fe 04 ef0000052b              	callf	$4,_print_subd_data
 646  00017B61                                   #                    }
 647  00017B61                                   #                    if( halt_flg ) 
 648  00017B61                                  L293:
 649  00017B61    5d effffffa21                 	tstl	_halt_flg
 650  00017B67    31 09                         	jeql	L298
 651  00017B69                                   #                         subd_er_halt( BAD_ACC_HLT );    /* halt on the error */
 652  00017B69    dd 01                         	pushl	$1
 653  00017B6B    fe 08 ef00000610              	callf	$8,_subd_er_halt
 654  00017B72                                   #                    if( loop_on_err ) {
 655  00017B72                                  L298:
 656  00017B72    5d effffffa10                 	tstl	_loop_on_err
 657  00017B78    31 0a                         	jeql	L299
 658  00017B7A                                   #                         force_loop = TRUE;        /* set the force loop flag */
 659  00017B7A    0d 01 effffffa07              	movl	$1,_force_loop
 660  00017B81                                   #                         asm("brw _subd_4_lp1");;  /* and loop on the error   */
 661  00017B81    13 ff3e                       brw _subd_4_lp1
 662  00017B84                                   #                    }   /* end of loop on error */
 663  00017B84                                   #              }   /* end of compare error */
 664  00017B84                                  L299:
 665  00017B84                                   #         }  /* end of WHILE loop */
 666  00017B84                                  L292:
 667  00017B84                                  L288:
 668  00017B84    6d effffff9fe                 	incl	_index
 669  00017B8A    13 fecb                       	jbr 	L290
 670  00017B8D                                  L289:
 671  00017B8D                                   # }  /* end of subtest 4 */
 672  00017B8D    40                            	ret#2
 673  00017B8E                                  	.set	L284,0x0
 674  00017B8E                                  L286:
 675  00017B8E    13 feb4                       	jbr 	L287
 676  00017B91                                  	.data
 677  00000d28 *                                	.text
 678  00017B91    00                            	.align	1
 679  00017B92                                  	.globl	_subd_5
 680  00017B92                                  _subd_5:
 681  00017B92    0000                          	.word	L300
 682  00017B94                                   #   
 683  00017B94                                   # 
 684  00017B94                                   # 
 685  00017B94                                   # /************************************************************************
 686  00017B94                                   # *
 687  00017B94                                   # *       SUBTEST 5 - Wait 1 NOP before storing the results
 688  00017B94                                   # *
 689  00017B94                                   # ************************************************************************/
 690  00017B94                                   # subd_5() 
 691  00017B94                                   # {
 692  00017B94    13 0148                       	jbr 	L302
 693  00017B97                                  L303:
 694  00017B97                                   #         force_loop = FALSE;
 695  00017B97    4d effffff9eb                 	clrl	_force_loop
 696  00017B9D                                   #         subtest = 5;
 697  00017B9D    0d 05 effffff9e4              	movl	$5,_subtest
 698  00017BA4                                   #         for( index = 0; index < max_subd_1_index; index++ ) {
 699  00017BA4    4d effffff9de                 	clrl	_index
 700  00017BAA                                  L306:
 701  00017BAA    1d effffff9d8 effffff9d3      	cmpl	_index,_max_subd_1_index
 702  00017BB5    91 03 13 0124                 	jgeq	L305
 703  00017BBA                                   #              dbl_ld_acc   = subd_1_data[index].op_1; /* get operand 1       */
 704  00017BBA    5c 18 effffff9c7 50           	mull3	$24,_index,r0
 705  00017BC2    0c 8f00000000 50              	addl2	$_subd_1_data,r0
 706  00017BC9    0d a004 effffff9bb            	movl	4(r0),_dbl_ld_acc+4
 707  00017BD1    0d 60 effffff9b0              	movl	(r0),_dbl_ld_acc
 708  00017BD8                                   #              dbl_value_1  = subd_1_data[index].op_2; /* get operand 2       */
 709  00017BD8    5c 18 effffff9a9 50           	mull3	$24,_index,r0
 710  00017BE0    0c 8f00000008 50              	addl2	$_subd_1_data+8,r0
 711  00017BE7    0d a004 effffff99d            	movl	4(r0),_dbl_value_1+4
 712  00017BEF    0d 60 effffff992              	movl	(r0),_dbl_value_1
 713  00017BF6                                   #              dbl_expected = subd_1_data[index].exp;  /* get expected result */
 714  00017BF6    5c 18 effffff98b 50           	mull3	$24,_index,r0
 715  00017BFE    0c 8f00000010 50              	addl2	$_subd_1_data+16,r0
 716  00017C05    0d a004 effffff97f            	movl	4(r0),_dbl_expected+4
 717  00017C0D    0d 60 effffff974              	movl	(r0),_dbl_expected
 718  00017C14                                   # /*
 719  00017C14                                   #  * If LOOP ON ERROR is set, this is the loop for this subtest.
 720  00017C14                                   #  * The force loop flag is set after the first error.
 721  00017C14                                   # */
 722  00017C14                                   #              asm("_subd_5_lp1:");
 723  00017C14                                  _subd_5_lp1:
 724  00017C14                                   #              asm("ldd _dbl_ld_acc");            /* load the 1st operand    */
 725  00017C14    07 effffff96e                 ldd _dbl_ld_acc
 726  00017C1A                                   #              asm("nop");                        /* delay                   */
 727  00017C1A    10                            nop
 728  00017C1B                                   #              asm("subd _dbl_value_1");          /* subtract the 2nd operand*/
 729  00017C1B    d7 effffff967                 subd _dbl_value_1
 730  00017C21                                   #              asm("nop");                        /* delay before storing    */
 731  00017C21    10                            nop
 732  00017C22                                   #              asm("std _dbl_st_acc");            /* store the result        */
 733  00017C22    27 effffff960                 std _dbl_st_acc
 734  00017C28                                   #              if( force_loop )
 735  00017C28    5d effffff95a                 	tstl	_force_loop
 736  00017C2E    31 02                         	jeql	L307
 737  00017C30                                   #                   asm("brb _subd_5_lp1");;      /* loop on the error       */
 738  00017C30    11 e2                         brb _subd_5_lp1
 739  00017C32                                  L307:
 740  00017C32                                   # /* 
 741  00017C32                                   #  * end error loop - test the results
 742  00017C32                                   # */
 743  00017C32                                   #              if( (dbl_st_acc.m != dbl_expected.m) ||  /* verify the results */
 744  00017C32                                   #                  (dbl_st_acc.l != dbl_expected.l) ) {
 745  00017C32    1d effffff950 effffff94b      	cmpl	_dbl_st_acc,_dbl_expected
 746  00017C3D    21 10                         	jneq	L9995
 747  00017C3F    1d effffff947 effffff942      	cmpl	_dbl_st_acc+4,_dbl_expected+4
 748  00017C4A    21 03 13 0086                 	jeql	L308
 749  00017C4F                                  L9995:
 750  00017C4F                                   #                    errcnt++;                    /* bump the error count   */
 751  00017C4F    6d effffff933                 	incl	_errcnt
 752  00017C55                                   #                    if( prt_error ) {
 753  00017C55    5d effffff92d                 	tstl	_prt_error
 754  00017C5B    31 55                         	jeql	L309
 755  00017C5D                                   #                         writes(" \n");      /* start a new print line */
 756  00017C5D                                  	.data	1
 757  00000e32 *                                L310:
 758  00000e32 *  200A00                        	.ascii	" \12\0"
 759  00000e35 *                                	.text
 760  00017C5D    dd 8f00000e32                 	pushl	$L310
 761  00017C63    fe 08 effffff91e              	callf	$8,_writes
 762  00017C6A                                   #                         writes("cycle: ");
 763  00017C6A                                  	.data	1
 764  00000e35 *                                L311:
 765  00000e35 *  6379636C653A2000              	.ascii	"cycle: \0"
 766  00000e3d *                                	.text
 767  00017C6A    dd 8f00000e35                 	pushl	$L311
 768  00017C70    fe 08 effffff911              	callf	$8,_writes
 769  00017C77                                   #                         writed( cycle );
 770  00017C77    dd effffff90b                 	pushl	_cycle
 771  00017C7D    fe 08 effffff904              	callf	$8,_writed
 772  00017C84                                   #                         writes("  SUBD test ");
 773  00017C84                                  	.data	1
 774  00000e3d *                                L312:
 775  00000e3d *  2020535542442074657374200     	.ascii	"  SUBD test \0"
                  0
 776  00000e4a *                                	.text
 777  00017C84    dd 8f00000e3d                 	pushl	$L312
 778  00017C8A    fe 08 effffff8f7              	callf	$8,_writes
 779  00017C91                                   # 			writed( test_no );
 780  00017C91    dd effffff8f1                 	pushl	_test_no
 781  00017C97    fe 08 effffff8ea              	callf	$8,_writed
 782  00017C9E                                   # 			writes(", subtest 5 (1 NOP) - BAD FINAL ACC\n");
 783  00017C9E                                  	.data	1
 784  00000e4a *                                L313:
 785  00000e4a *  2C20737562746573742035202     	.ascii	", subtest 5 (1 NOP) - BAD FINAL ACC\12\0"
                  831204E4F5029202D20424144
                  2046494E414C204143430A00
 786  00000e6f *                                	.text
 787  00017C9E    dd 8f00000e4a                 	pushl	$L313
 788  00017CA4    fe 08 effffff8dd              	callf	$8,_writes
 789  00017CAB                                   #                         print_subd_data();
 790  00017CAB    fe 04 ef000003da              	callf	$4,_print_subd_data
 791  00017CB2                                   #                    }
 792  00017CB2                                   #                    if( halt_flg ) 
 793  00017CB2                                  L309:
 794  00017CB2    5d effffff8d0                 	tstl	_halt_flg
 795  00017CB8    31 09                         	jeql	L314
 796  00017CBA                                   #                         subd_er_halt( BAD_ACC_HLT );    /* halt on the error */
 797  00017CBA    dd 01                         	pushl	$1
 798  00017CBC    fe 08 ef000004bf              	callf	$8,_subd_er_halt
 799  00017CC3                                   #                    if( loop_on_err ) {
 800  00017CC3                                  L314:
 801  00017CC3    5d effffff8bf                 	tstl	_loop_on_err
 802  00017CC9    31 0a                         	jeql	L315
 803  00017CCB                                   #                         force_loop = TRUE;        /* set the force loop flag */
 804  00017CCB    0d 01 effffff8b6              	movl	$1,_force_loop
 805  00017CD2                                   #                         asm("brw _subd_5_lp1");;  /* and loop on the error   */
 806  00017CD2    13 ff3f                       brw _subd_5_lp1
 807  00017CD5                                   #                    }   /* end of loop on error */
 808  00017CD5                                   #              }   /* end of compare error */
 809  00017CD5                                  L315:
 810  00017CD5                                   #         }  /* end of WHILE loop */
 811  00017CD5                                  L308:
 812  00017CD5                                  L304:
 813  00017CD5    6d effffff8ad                 	incl	_index
 814  00017CDB    13 fecc                       	jbr 	L306
 815  00017CDE                                  L305:
 816  00017CDE                                   # }  /* end of subtest 5 */
 817  00017CDE    40                            	ret#2
 818  00017CDF                                  	.set	L300,0x0
 819  00017CDF                                  L302:
 820  00017CDF    13 feb5                       	jbr 	L303
 821  00017CE2                                  	.data
 822  00000d28 *                                	.text
 823  00017CE2                                  	.align	1
 824  00017CE2                                  	.globl	_subd_6
 825  00017CE2                                  _subd_6:
 826  00017CE2    0000                          	.word	L316
 827  00017CE4                                   #   
 828  00017CE4                                   # 
 829  00017CE4                                   # 
 830  00017CE4                                   # /************************************************************************
 831  00017CE4                                   # *
 832  00017CE4                                   # *       SUBTEST 6 - Check for register corruption
 833  00017CE4                                   # *
 834  00017CE4                                   # ************************************************************************/
 835  00017CE4                                   # subd_6() 
 836  00017CE4                                   # {
 837  00017CE4    13 01c8                       	jbr 	L318
 838  00017CE7                                  L319:
 839  00017CE7                                   #         force_loop = FALSE;                     /* clear force_loop flg */
 840  00017CE7    4d effffff89b                 	clrl	_force_loop
 841  00017CED                                   #         subtest = 6;
 842  00017CED    0d 06 effffff894              	movl	$6,_subtest
 843  00017CF4                                   #         fill_reg_buf( load_regs );              /* get patterns for regs */
 844  00017CF4    dd 8f00000000                 	pushl	$_load_regs
 845  00017CFA    fe 08 effffff887              	callf	$8,_fill_reg_buf
 846  00017D01                                   #         index = 0;
 847  00017D01    4d effffff881                 	clrl	_index
 848  00017D07                                   #         dbl_ld_acc   = subd_1_data[0].op_1;     /* get operand 1       */
 849  00017D07    0d effffff87f effffff87a      	movl	_subd_1_data+4,_dbl_ld_acc+4
 850  00017D12    0d effffff870 effffff86b      	movl	_subd_1_data,_dbl_ld_acc
 851  00017D1D                                   #         dbl_value_1  = subd_1_data[0].op_2;     /* get operand 2       */
 852  00017D1D    0d effffff871 effffff864      	movl	_subd_1_data+12,_dbl_value_1+4
 853  00017D28    0d effffff862 effffff855      	movl	_subd_1_data+8,_dbl_value_1
 854  00017D33                                   #         dbl_expected = subd_1_data[0].exp;      /* get expected result */
 855  00017D33    0d effffff863 effffff84e      	movl	_subd_1_data+20,_dbl_expected+4
 856  00017D3E    0d effffff854 effffff83f      	movl	_subd_1_data+16,_dbl_expected
 857  00017D49                                   # /*
 858  00017D49                                   #  * If LOOP ON ERROR is set, this is the loop for this subtest.
 859  00017D49                                   #  * The force loop flag is set after the first error.
 860  00017D49                                   # */
 861  00017D49                                   #         asm("_subd_6_lp1:");
 862  00017D49                                  _subd_6_lp1:
 863  00017D49                                   #         asm("ldd _dbl_ld_acc");                 /* LOAD the accumulator  */
 864  00017D49    07 effffff839                 ldd _dbl_ld_acc
 865  00017D4F                                   #         asm("nop");
 866  00017D4F    10                            nop
 867  00017D50                                   #         asm("loadr $0x1fff,_load_regs");        /* load regs 0 - 12      */
 868  00017D50    ab 891fff effffff82f          loadr $0x1fff,_load_regs
 869  00017D59                                   #         asm("nop");
 870  00017D59    10                            nop
 871  00017D5A                                   #         asm("subd _dbl_value_1");               /* do the subtract       */
 872  00017D5A    d7 effffff828                 subd _dbl_value_1
 873  00017D60                                   #         asm("nop");
 874  00017D60    10                            nop
 875  00017D61                                   #         asm("storer $0x1fff,_store_regs");      /* store regs 0 - 12 */
 876  00017D61    bb 891fff effffff81e          storer $0x1fff,_store_regs
 877  00017D6A                                   #         asm("std _dbl_st_acc");                 /* save the accumulator  */
 878  00017D6A    27 effffff818                 std _dbl_st_acc
 879  00017D70                                   #         if( force_loop )
 880  00017D70    5d effffff812                 	tstl	_force_loop
 881  00017D76    31 02                         	jeql	L321
 882  00017D78                                   #              asm("brb _subd_6_lp1");;           /* loop on the error     */
 883  00017D78    11 cf                         brb _subd_6_lp1
 884  00017D7A                                  L321:
 885  00017D7A                                   # /*
 886  00017D7A                                   #  * Now compare the stored register values to those that were loaded
 887  00017D7A                                   # */
 888  00017D7A                                   #         index2 = 0;
 889  00017D7A    4d effffff808                 	clrl	_index2
 890  00017D80                                   #         while( (load_regs[index2] == store_regs[index2]) && (index2 < 13) )
 891  00017D80                                  L322:
 892  00017D80    0d effffff802 50              	movl	_index2,r0
 893  00017D87    0d effffff7fb 51              	movl	_index2,r1
 894  00017D8E    1d 40effffff7f3               	cmpl	_load_regs[r0],_store_regs[r1]
                  41effffff7ed 
 895  00017D9B    21 11                         	jneq	L323
 896  00017D9D    1d effffff7e5 0d              	cmpl	_index2,$13
 897  00017DA4    81 08                         	jgeq	L323
 898  00017DA6                                   #              index2++;                          /* check reg values        */
 899  00017DA6    6d effffff7dc                 	incl	_index2
 900  00017DAC    11 d2                         	jbr 	L322
 901  00017DAE                                  L323:
 902  00017DAE                                   #         if( index2 < 13 ) {                     /* error if index2 < 13    */
 903  00017DAE    1d effffff7d4 0d              	cmpl	_index2,$13
 904  00017DB5    91 03 13 00f4                 	jgeq	L324
 905  00017DBA                                   #              errcnt++;                          /* bump the error count    */
 906  00017DBA    6d effffff7c8                 	incl	_errcnt
 907  00017DC0                                   #              if( prt_error ) {
 908  00017DC0    5d effffff7c2                 	tstl	_prt_error
 909  00017DC6    21 03 13 00c0                 	jeql	L325
 910  00017DCB                                   #                   writes(" \n");           /* start a new print line  */
 911  00017DCB                                  	.data	1
 912  00000e6f *                                L326:
 913  00000e6f *  200A00                        	.ascii	" \12\0"
 914  00000e72 *                                	.text
 915  00017DCB    dd 8f00000e6f                 	pushl	$L326
 916  00017DD1    fe 08 effffff7b0              	callf	$8,_writes
 917  00017DD8                                   #                   writes("cycle: ");
 918  00017DD8                                  	.data	1
 919  00000e72 *                                L327:
 920  00000e72 *  6379636C653A2000              	.ascii	"cycle: \0"
 921  00000e7a *                                	.text
 922  00017DD8    dd 8f00000e72                 	pushl	$L327
 923  00017DDE    fe 08 effffff7a3              	callf	$8,_writes
 924  00017DE5                                   #                   writed( cycle );
 925  00017DE5    dd effffff79d                 	pushl	_cycle
 926  00017DEB    fe 08 effffff796              	callf	$8,_writed
 927  00017DF2                                   #                   writes("  SUBD test ");
 928  00017DF2                                  	.data	1
 929  00000e7a *                                L328:
 930  00000e7a *  2020535542442074657374200     	.ascii	"  SUBD test \0"
                  0
 931  00000e87 *                                	.text
 932  00017DF2    dd 8f00000e7a                 	pushl	$L328
 933  00017DF8    fe 08 effffff789              	callf	$8,_writes
 934  00017DFF                                   # 		  writed( test_no );
 935  00017DFF    dd effffff783                 	pushl	_test_no
 936  00017E05    fe 08 effffff77c              	callf	$8,_writed
 937  00017E0C                                   # 	writes(", subtest 6 - A REGISTER WAS CHANGED\n");
 938  00017E0C                                  	.data	1
 939  00000e87 *                                L329:
 940  00000e87 *  2C20737562746573742036202     	.ascii	", subtest 6 - A REGISTER WAS CHANGED\12\0"
                  D204120524547495354455220
                  574153204348414E4745440A0
                  0
 941  00000ead *                                	.text
 942  00017E0C    dd 8f00000e87                 	pushl	$L329
 943  00017E12    fe 08 effffff76f              	callf	$8,_writes
 944  00017E19                                   #                   print_subd_data();            /* print the operands      */
 945  00017E19    fe 04 ef0000026c              	callf	$4,_print_subd_data
 946  00017E20                                   #                   writes("register ");          /* print the information   */
 947  00017E20                                  	.data	1
 948  00000ead *                                L330:
 949  00000ead *  72656769737465722000          	.ascii	"register \0"
 950  00000eb7 *                                	.text
 951  00017E20    dd 8f00000ead                 	pushl	$L330
 952  00017E26    fe 08 effffff75b              	callf	$8,_writes
 953  00017E2D                                   #                   writed( index2 );             /*    about the corrupted  */
 954  00017E2D    dd effffff755                 	pushl	_index2
 955  00017E33    fe 08 effffff74e              	callf	$8,_writed
 956  00017E3A                                   #                   writes(" = ");                /*        register         */
 957  00017E3A                                  	.data	1
 958  00000eb7 *                                L331:
 959  00000eb7 *  203D2000                      	.ascii	" = \0"
 960  00000ebb *                                	.text
 961  00017E3A    dd 8f00000eb7                 	pushl	$L331
 962  00017E40    fe 08 effffff741              	callf	$8,_writes
 963  00017E47                                   #                   write32h( store_regs[index2] );
 964  00017E47    0d effffff73b 50              	movl	_index2,r0
 965  00017E4E    dd 40effffff733               	pushl	_store_regs[r0]
 966  00017E55    fe 08 effffff72c              	callf	$8,_write32h
 967  00017E5C                                   #                   writes(",  should be = ");
 968  00017E5C                                  	.data	1
 969  00000ebb *                                L333:
 970  00000ebb *  2C202073686F756C642062652     	.ascii	",  should be = \0"
                  03D2000
 971  00000ecb *                                	.text
 972  00017E5C    dd 8f00000ebb                 	pushl	$L333
 973  00017E62    fe 08 effffff71f              	callf	$8,_writes
 974  00017E69                                   #                   write32h( load_regs[index2] );
 975  00017E69    0d effffff719 50              	movl	_index2,r0
 976  00017E70    dd 40effffff711               	pushl	_load_regs[r0]
 977  00017E77    fe 08 effffff70a              	callf	$8,_write32h
 978  00017E7E                                   #                   writes("\n");
 979  00017E7E                                  	.data	1
 980  00000ecb *                                L334:
 981  00000ecb *  0A00                          	.ascii	"\12\0"
 982  00000ecd *                                	.text
 983  00017E7E    dd 8f00000ecb                 	pushl	$L334
 984  00017E84    fe 08 effffff6fd              	callf	$8,_writes
 985  00017E8B                                   #              }
 986  00017E8B                                   #              if( halt_flg )   
 987  00017E8B                                  L325:
 988  00017E8B    5d effffff6f7                 	tstl	_halt_flg
 989  00017E91    31 09                         	jeql	L335
 990  00017E93                                   #                   subd_er_halt( BAD_REG_HLT );  /* halt on the error      */
 991  00017E93    dd 02                         	pushl	$2
 992  00017E95    fe 08 ef000002e6              	callf	$8,_subd_er_halt
 993  00017E9C                                   #              if( loop_on_err ) {
 994  00017E9C                                  L335:
 995  00017E9C    5d effffff6e6                 	tstl	_loop_on_err
 996  00017EA2    31 0a                         	jeql	L336
 997  00017EA4                                   #                   force_loop = TRUE;        /* set the force loop flag */
 998  00017EA4    0d 01 effffff6dd              	movl	$1,_force_loop
 999  00017EAB                                   #                   asm("brw _subd_6_lp1");;  /* and loop on the error   */
1000  00017EAB    13 fe9b                       brw _subd_6_lp1
1001  00017EAE                                   #              }   /* end of loop on error */
1002  00017EAE                                   #         }  /* end of register corruption error */
1003  00017EAE                                  L336:
1004  00017EAE                                   # }  /* end of subtest 6 */
1005  00017EAE                                  L324:
1006  00017EAE    40                            	ret#2
1007  00017EAF                                  	.set	L316,0x0
1008  00017EAF                                  L318:
1009  00017EAF    13 fe35                       	jbr 	L319
1010  00017EB2                                  	.data
1011  00000d28 *                                	.text
1012  00017EB2                                  	.align	1
1013  00017EB2                                  	.globl	_subd_7
1014  00017EB2                                  _subd_7:
1015  00017EB2    0000                          	.word	L337
1016  00017EB4                                   #   
1017  00017EB4                                   # 
1018  00017EB4                                   # 
1019  00017EB4                                   # /************************************************************************
1020  00017EB4                                   # *
1021  00017EB4                                   # *       SUBTEST 7 - Check for PSL corruption
1022  00017EB4                                   # *
1023  00017EB4                                   # ************************************************************************/
1024  00017EB4                                   # subd_7() 
1025  00017EB4                                   # {
1026  00017EB4    13 01d2                       	jbr 	L339
1027  00017EB7                                  L340:
1028  00017EB7                                   #         force_loop = FALSE;                     /* clear force_loop flg */
1029  00017EB7    4d effffff6cb                 	clrl	_force_loop
1030  00017EBD                                   #         subtest = 7;
1031  00017EBD    0d 07 effffff6c4              	movl	$7,_subtest
1032  00017EC4                                   #         fill_reg_buf( load_regs );              /* get patterns for regs */
1033  00017EC4    dd 8f00000000                 	pushl	$_load_regs
1034  00017ECA    fe 08 effffff6b7              	callf	$8,_fill_reg_buf
1035  00017ED1                                   #         for( index = 0; index < 3; index++ ) {
1036  00017ED1    4d effffff6b1                 	clrl	_index
1037  00017ED7                                  L343:
1038  00017ED7    1d effffff6ab 03              	cmpl	_index,$3
1039  00017EDE    91 03 13 01a5                 	jgeq	L342
1040  00017EE3                                   #              dbl_ld_acc   = subd_1_data[index].op_1;    /* get operand 1 */
1041  00017EE3    5c 18 effffff69e 50           	mull3	$24,_index,r0
1042  00017EEB    0c 8f00000000 50              	addl2	$_subd_1_data,r0
1043  00017EF2    0d a004 effffff692            	movl	4(r0),_dbl_ld_acc+4
1044  00017EFA    0d 60 effffff687              	movl	(r0),_dbl_ld_acc
1045  00017F01                                   #              dbl_value_1  = subd_1_data[index].op_2;    /* get operand 2 */
1046  00017F01    5c 18 effffff680 50           	mull3	$24,_index,r0
1047  00017F09    0c 8f00000008 50              	addl2	$_subd_1_data+8,r0
1048  00017F10    0d a004 effffff674            	movl	4(r0),_dbl_value_1+4
1049  00017F18    0d 60 effffff669              	movl	(r0),_dbl_value_1
1050  00017F1F                                   #              dbl_expected = subd_1_data[index].exp;     /* get expected  */
1051  00017F1F    5c 18 effffff662 50           	mull3	$24,_index,r0
1052  00017F27    0c 8f00000010 50              	addl2	$_subd_1_data+16,r0
1053  00017F2E    0d a004 effffff656            	movl	4(r0),_dbl_expected+4
1054  00017F36    0d 60 effffff64b              	movl	(r0),_dbl_expected
1055  00017F3D                                   #              sgl_dummy1 = status_array[status_index];    /* status = +, -, 0 */
1056  00017F3D    0d effffff645 50              	movl	_status_index,r0
1057  00017F44    0d 40effffff63d               	movl	_status_array[r0],_sgl_dummy1
                  effffff638 
1058  00017F50                                   # /*
1059  00017F50                                   #  * If LOOP ON ERROR is set, this is the loop for this subtest.
1060  00017F50                                   #  * The force loop flag is set after the first error.
1061  00017F50                                   # */
1062  00017F50                                   #              asm("_subd_7_lp1:");
1063  00017F50                                  _subd_7_lp1:
1064  00017F50                                   #              asm("ldd _dbl_ld_acc");            /* LOAD the accumulator  */
1065  00017F50    07 effffff632                 ldd _dbl_ld_acc
1066  00017F56                                   #              asm("nop");
1067  00017F56    10                            nop
1068  00017F57                                   #              asm("tstl _sgl_dummy1");		/* set the PSL status    */
1069  00017F57    5d effffff62b                 tstl _sgl_dummy1
1070  00017F5D                                   # 	     asm("movpsl _init_psl");		/* save the initial PSL  */
1071  00017F5D    cd effffff625                 movpsl _init_psl
1072  00017F63                                   #              asm("subd _dbl_value_1");          /* do the subtract       */
1073  00017F63    d7 effffff61f                 subd _dbl_value_1
1074  00017F69                                   #              asm("nop");
1075  00017F69    10                            nop
1076  00017F6A                                   #              asm("movpsl _psl_val");            /* save the final PSL    */
1077  00017F6A    cd effffff618                 movpsl _psl_val
1078  00017F70                                   #              asm("std _dbl_st_acc");            /* save the accumulator  */
1079  00017F70    27 effffff612                 std _dbl_st_acc
1080  00017F76                                   #              if( force_loop )
1081  00017F76    5d effffff60c                 	tstl	_force_loop
1082  00017F7C    31 02                         	jeql	L344
1083  00017F7E                                   #                   asm("brb _subd_7_lp1");;      /* loop on the error     */
1084  00017F7E    11 d0                         brb _subd_7_lp1
1085  00017F80                                  L344:
1086  00017F80                                   # /*
1087  00017F80                                   #  * Now compare the final PSL to the initial PSL -they should be the same
1088  00017F80                                   # */
1089  00017F80                                   #              exp_psl = init_psl;
1090  00017F80    0d effffff602 effffff5fd      	movl	_init_psl,_exp_psl
1091  00017F8B                                   # 	     if( psl_val != exp_psl ) {
1092  00017F8B    1d effffff5f7 effffff5f2      	cmpl	_psl_val,_exp_psl
1093  00017F96    21 03 13 00e4                 	jeql	L345
1094  00017F9B                                   #                   errcnt++;                     /* bump the error count    */
1095  00017F9B    6d effffff5e7                 	incl	_errcnt
1096  00017FA1                                   #                   if( prt_error ) {
1097  00017FA1    5d effffff5e1                 	tstl	_prt_error
1098  00017FA7    21 03 13 00b0                 	jeql	L346
1099  00017FAC                                   #                        writes(" \n");      /* start a new print line  */
1100  00017FAC                                  	.data	1
1101  00000ecd *                                L347:
1102  00000ecd *  200A00                        	.ascii	" \12\0"
1103  00000ed0 *                                	.text
1104  00017FAC    dd 8f00000ecd                 	pushl	$L347
1105  00017FB2    fe 08 effffff5cf              	callf	$8,_writes
1106  00017FB9                                   #                        writes("cycle: ");
1107  00017FB9                                  	.data	1
1108  00000ed0 *                                L348:
1109  00000ed0 *  6379636C653A2000              	.ascii	"cycle: \0"
1110  00000ed8 *                                	.text
1111  00017FB9    dd 8f00000ed0                 	pushl	$L348
1112  00017FBF    fe 08 effffff5c2              	callf	$8,_writes
1113  00017FC6                                   #                        writed( cycle );
1114  00017FC6    dd effffff5bc                 	pushl	_cycle
1115  00017FCC    fe 08 effffff5b5              	callf	$8,_writed
1116  00017FD3                                   #                        writes("  SUBD test ");
1117  00017FD3                                  	.data	1
1118  00000ed8 *                                L349:
1119  00000ed8 *  2020535542442074657374200     	.ascii	"  SUBD test \0"
                  0
1120  00000ee5 *                                	.text
1121  00017FD3    dd 8f00000ed8                 	pushl	$L349
1122  00017FD9    fe 08 effffff5a8              	callf	$8,_writes
1123  00017FE0                                   # 		       writed( test_no );
1124  00017FE0    dd effffff5a2                 	pushl	_test_no
1125  00017FE6    fe 08 effffff59b              	callf	$8,_writed
1126  00017FED                                   # 	writes(", subtest 7 - INCORRECT FINAL PSL\n");
1127  00017FED                                  	.data	1
1128  00000ee5 *                                L350:
1129  00000ee5 *  2C20737562746573742037202     	.ascii	", subtest 7 - INCORRECT FINAL PSL\12\0"
                  D20494E434F52524543542046
                  494E414C2050534C0A00
1130  00000f08 *                                	.text
1131  00017FED    dd 8f00000ee5                 	pushl	$L350
1132  00017FF3    fe 08 effffff58e              	callf	$8,_writes
1133  00017FFA                                   #                        print_subd_data();       /* print the operands      */
1134  00017FFA    fe 04 ef0000008b              	callf	$4,_print_subd_data
1135  00018001                                   #                        writes("initial PSL = ");
1136  00018001                                  	.data	1
1137  00000f08 *                                L351:
1138  00000f08 *  696E697469616C2050534C203     	.ascii	"initial PSL = \0"
                  D2000
1139  00000f17 *                                	.text
1140  00018001    dd 8f00000f08                 	pushl	$L351
1141  00018007    fe 08 effffff57a              	callf	$8,_writes
1142  0001800E                                   #                        write32h( init_psl );
1143  0001800E    dd effffff574                 	pushl	_init_psl
1144  00018014    fe 08 effffff56d              	callf	$8,_write32h
1145  0001801B                                   #                        writes(",  final PSL = ");
1146  0001801B                                  	.data	1
1147  00000f17 *                                L352:
1148  00000f17 *  2C202066696E616C2050534C2     	.ascii	",  final PSL = \0"
                  03D2000
1149  00000f27 *                                	.text
1150  0001801B    dd 8f00000f17                 	pushl	$L352
1151  00018021    fe 08 effffff560              	callf	$8,_writes
1152  00018028                                   #                        write32h( psl_val );
1153  00018028    dd effffff55a                 	pushl	_psl_val
1154  0001802E    fe 08 effffff553              	callf	$8,_write32h
1155  00018035                                   #                        writes(",  expected PSL = ");
1156  00018035                                  	.data	1
1157  00000f27 *                                L353:
1158  00000f27 *  2C20206578706563746564205     	.ascii	",  expected PSL = \0"
                  0534C203D2000
1159  00000f3a *                                	.text
1160  00018035    dd 8f00000f27                 	pushl	$L353
1161  0001803B    fe 08 effffff546              	callf	$8,_writes
1162  00018042                                   #                        write32h( exp_psl );
1163  00018042    dd effffff540                 	pushl	_exp_psl
1164  00018048    fe 08 effffff539              	callf	$8,_write32h
1165  0001804F                                   #                        writes("\n");
1166  0001804F                                  	.data	1
1167  00000f3a *                                L354:
1168  00000f3a *  0A00                          	.ascii	"\12\0"
1169  00000f3c *                                	.text
1170  0001804F    dd 8f00000f3a                 	pushl	$L354
1171  00018055    fe 08 effffff52c              	callf	$8,_writes
1172  0001805C                                   #                   }
1173  0001805C                                   #                   if( halt_flg )   
1174  0001805C                                  L346:
1175  0001805C    5d effffff526                 	tstl	_halt_flg
1176  00018062    31 09                         	jeql	L355
1177  00018064                                   #                        subd_er_halt( BAD_PSL_HLT );   /* halt on the error */
1178  00018064    dd 03                         	pushl	$3
1179  00018066    fe 08 ef00000115              	callf	$8,_subd_er_halt
1180  0001806D                                   #                   if( loop_on_err ) {
1181  0001806D                                  L355:
1182  0001806D    5d effffff515                 	tstl	_loop_on_err
1183  00018073    31 0a                         	jeql	L356
1184  00018075                                   #                        force_loop = TRUE;        /* set the force loop flag */
1185  00018075    0d 01 effffff50c              	movl	$1,_force_loop
1186  0001807C                                   #                        asm("brw _subd_7_lp1");;  /* and loop on the error   */
1187  0001807C    13 fed1                       brw _subd_7_lp1
1188  0001807F                                   #                   }   /* end of loop on error */
1189  0001807F                                   #              }  /* end of PSL corruption error */
1190  0001807F                                  L356:
1191  0001807F                                   #         }  /* end of WHILE loop */
1192  0001807F                                  L345:
1193  0001807F                                  L341:
1194  0001807F    6d effffff503                 	incl	_index
1195  00018085    13 fe4f                       	jbr 	L343
1196  00018088                                  L342:
1197  00018088                                   # }  /* end of subtest 7 */
1198  00018088    40                            	ret#2
1199  00018089                                  	.set	L337,0x0
1200  00018089                                  L339:
1201  00018089    13 fe2b                       	jbr 	L340
1202  0001808C                                  	.data
1203  00000d28 *                                	.text
1204  0001808C                                  	.align	1
1205  0001808C                                  	.globl	_print_subd_data
1206  0001808C                                  _print_subd_data:
1207  0001808C    0000                          	.word	L357
1208  0001808E                                   #   
1209  0001808E                                   # 
1210  0001808E                                   # 
1211  0001808E                                   # /**************************************************************************
1212  0001808E                                   # *
1213  0001808E                                   # *       PRINT THE DATA AND STORE RESULTS
1214  0001808E                                   # *
1215  0001808E                                   # * initial Acc = xxxxxxxx xxxxxxxx,    stored = xxxxxxxx xxxxxxxx,  index = xx
1216  0001808E                                   # *     operand = xxxxxxxx xxxxxxxx,  expected = xxxxxxxx xxxxxxxx
1217  0001808E                                   # **************************************************************************/
1218  0001808E                                   # print_subd_data()
1219  0001808E                                   # {
1220  0001808E    13 00ed                       	jbr 	L359
1221  00018091                                  L360:
1222  00018091                                   #         writes("initial Acc = ");
1223  00018091                                  	.data	1
1224  00000f3c *                                L361:
1225  00000f3c *  696E697469616C20416363203     	.ascii	"initial Acc = \0"
                  D2000
1226  00000f4b *                                	.text
1227  00018091    dd 8f00000f3c                 	pushl	$L361
1228  00018097    fe 08 effffff4ea              	callf	$8,_writes
1229  0001809E                                   #         write32h( dbl_ld_acc.m );
1230  0001809E    dd effffff4e4                 	pushl	_dbl_ld_acc
1231  000180A4    fe 08 effffff4dd              	callf	$8,_write32h
1232  000180AB                                   #         writec(' ');
1233  000180AB    dd 20                         	pushl	$32
1234  000180AD    fe 08 effffff4d4              	callf	$8,_writec
1235  000180B4                                   #         write32h( dbl_ld_acc.l );
1236  000180B4    dd effffff4d2                 	pushl	_dbl_ld_acc+4
1237  000180BA    fe 08 effffff4c7              	callf	$8,_write32h
1238  000180C1                                   #         writes(",    stored = ");
1239  000180C1                                  	.data	1
1240  00000f4b *                                L363:
1241  00000f4b *  2C2020202073746F726564203     	.ascii	",    stored = \0"
                  D2000
1242  00000f5a *                                	.text
1243  000180C1    dd 8f00000f4b                 	pushl	$L363
1244  000180C7    fe 08 effffff4ba              	callf	$8,_writes
1245  000180CE                                   #         write32h( dbl_st_acc.m );
1246  000180CE    dd effffff4b4                 	pushl	_dbl_st_acc
1247  000180D4    fe 08 effffff4ad              	callf	$8,_write32h
1248  000180DB                                   #         writec(' ');
1249  000180DB    dd 20                         	pushl	$32
1250  000180DD    fe 08 effffff4a4              	callf	$8,_writec
1251  000180E4                                   #         write32h( dbl_st_acc.l );
1252  000180E4    dd effffff4a2                 	pushl	_dbl_st_acc+4
1253  000180EA    fe 08 effffff497              	callf	$8,_write32h
1254  000180F1                                   #         writes(",   index = ");
1255  000180F1                                  	.data	1
1256  00000f5a *                                L364:
1257  00000f5a *  2C202020696E646578203D200     	.ascii	",   index = \0"
                  0
1258  00000f67 *                                	.text
1259  000180F1    dd 8f00000f5a                 	pushl	$L364
1260  000180F7    fe 08 effffff48a              	callf	$8,_writes
1261  000180FE                                   #         writed( index );
1262  000180FE    dd effffff484                 	pushl	_index
1263  00018104    fe 08 effffff47d              	callf	$8,_writed
1264  0001810B                                   #         writec('\n');
1265  0001810B    dd 0a                         	pushl	$10
1266  0001810D    fe 08 effffff474              	callf	$8,_writec
1267  00018114                                   #         writes("    operand = ");
1268  00018114                                  	.data	1
1269  00000f67 *                                L365:
1270  00000f67 *  202020206F706572616E64203     	.ascii	"    operand = \0"
                  D2000
1271  00000f76 *                                	.text
1272  00018114    dd 8f00000f67                 	pushl	$L365
1273  0001811A    fe 08 effffff467              	callf	$8,_writes
1274  00018121                                   #         write32h( dbl_value_1.m );
1275  00018121    dd effffff461                 	pushl	_dbl_value_1
1276  00018127    fe 08 effffff45a              	callf	$8,_write32h
1277  0001812E                                   #         writec(' ');
1278  0001812E    dd 20                         	pushl	$32
1279  00018130    fe 08 effffff451              	callf	$8,_writec
1280  00018137                                   #         write32h( dbl_value_1.l );
1281  00018137    dd effffff44f                 	pushl	_dbl_value_1+4
1282  0001813D    fe 08 effffff444              	callf	$8,_write32h
1283  00018144                                   #         writes(",  expected = ");
1284  00018144                                  	.data	1
1285  00000f76 *                                L366:
1286  00000f76 *  2C20206578706563746564203     	.ascii	",  expected = \0"
                  D2000
1287  00000f85 *                                	.text
1288  00018144    dd 8f00000f76                 	pushl	$L366
1289  0001814A    fe 08 effffff437              	callf	$8,_writes
1290  00018151                                   #         write32h( dbl_expected.m );
1291  00018151    dd effffff431                 	pushl	_dbl_expected
1292  00018157    fe 08 effffff42a              	callf	$8,_write32h
1293  0001815E                                   #         writec(' ');
1294  0001815E    dd 20                         	pushl	$32
1295  00018160    fe 08 effffff421              	callf	$8,_writec
1296  00018167                                   #         write32h( dbl_expected.l );
1297  00018167    dd effffff41f                 	pushl	_dbl_expected+4
1298  0001816D    fe 08 effffff414              	callf	$8,_write32h
1299  00018174                                   #         writec('\n');
1300  00018174    dd 0a                         	pushl	$10
1301  00018176    fe 08 effffff40b              	callf	$8,_writec
1302  0001817D                                   # }
1303  0001817D    40                            	ret#2
1304  0001817E                                  	.set	L357,0x0
1305  0001817E                                  L359:
1306  0001817E    13 ff10                       	jbr 	L360
1307  00018181                                  	.data
1308  00000d28 *                                	.text
1309  00018181    00                            	.align	1
1310  00018182                                  	.globl	_subd_er_halt
1311  00018182                                  _subd_er_halt:
1312  00018182    0000                          	.word	L367
1313  00018184                                   #   
1314  00018184                                   # 
1315  00018184                                   # 
1316  00018184                                   # /**************************************************************************
1317  00018184                                   # *
1318  00018184                                   # *               HALT ON ERROR ROUTINE 
1319  00018184                                   # *
1320  00018184                                   # **************************************************************************/
1321  00018184                                   # subd_er_halt( halt_code )
1322  00018184                                   # int halt_code;
1323  00018184                                   # {
1324  00018184    13 0123                       	jbr 	L369
1325  00018187                                  L370:
1326  00018187                                   #         sgl_value_1 = dbl_ld_acc.m;
1327  00018187    0d effffff3fb effffff3f6      	movl	_dbl_ld_acc,_sgl_value_1
1328  00018192                                   #         sgl_value_2 = dbl_ld_acc.l;
1329  00018192    0d effffff3f4 effffff3eb      	movl	_dbl_ld_acc+4,_sgl_value_2
1330  0001819D                                   #         sgl_value_3 = dbl_value_1.m;
1331  0001819D    0d effffff3e5 effffff3e0      	movl	_dbl_value_1,_sgl_value_3
1332  000181A8                                   #         sgl_value_4 = dbl_value_1.l;
1333  000181A8    0d effffff3de effffff3d5      	movl	_dbl_value_1+4,_sgl_value_4
1334  000181B3                                   #         sgl_value_5 = dbl_st_acc.m;
1335  000181B3    0d effffff3cf effffff3ca      	movl	_dbl_st_acc,_sgl_value_5
1336  000181BE                                   #         sgl_value_6 = dbl_st_acc.l;
1337  000181BE    0d effffff3c8 effffff3bf      	movl	_dbl_st_acc+4,_sgl_value_6
1338  000181C9                                   #         sgl_dummy1 = halt_code;                 /* get the error type    */
1339  000181C9    0d ad04 effffff3b7            	movl	4(fp),_sgl_dummy1
1340  000181D1                                   #         asm("movl _test_no,r0");                /* r0  = test number     */
1341  000181D1    0d effffff3b1 50              movl _test_no,r0
1342  000181D8                                   #         asm("movl _subtest,r1");                /* r1  = subtest number  */
1343  000181D8    0d effffff3aa 51              movl _subtest,r1
1344  000181DF                                   #         asm("movl _sgl_dummy1,r2");             /* r2  = error code      */
1345  000181DF    0d effffff3a3 52              movl _sgl_dummy1,r2
1346  000181E6                                   #         asm("movl _cycle,r3");                  /* r3  = cycle count     */
1347  000181E6    0d effffff39c 53              movl _cycle,r3
1348  000181ED                                   #         asm("movl _sgl_value_1,r4");            /* r4  = MS operand 1    */
1349  000181ED    0d effffff395 54              movl _sgl_value_1,r4
1350  000181F4                                   #         asm("movl _sgl_value_2,r5");            /* r5  = LS operand 1    */
1351  000181F4    0d effffff38e 55              movl _sgl_value_2,r5
1352  000181FB                                   #         asm("movl _sgl_value_3,r6");            /* r6  = MS operand 2    */
1353  000181FB    0d effffff387 56              movl _sgl_value_3,r6
1354  00018202                                   #         asm("movl _sgl_value_4,r7");            /* r7  = LS operand 2    */
1355  00018202    0d effffff380 57              movl _sgl_value_4,r7
1356  00018209                                   #         asm("movl _sgl_value_5,r8");            /* r8  = MS stored       */
1357  00018209    0d effffff379 58              movl _sgl_value_5,r8
1358  00018210                                   #         asm("movl _sgl_value_6,r9");            /* r9  = LS stored       */
1359  00018210    0d effffff372 59              movl _sgl_value_6,r9
1360  00018217                                   #         if( halt_code == BAD_ACC_HLT ) {
1361  00018217    1d ad04 01                    	cmpl	4(fp),$1
1362  0001821B    21 2d                         	jneq	L371
1363  0001821D                                   #              sgl_value_1 = dbl_expected.m;
1364  0001821D    0d effffff365 effffff360      	movl	_dbl_expected,_sgl_value_1
1365  00018228                                   #              sgl_value_2 = dbl_expected.l;
1366  00018228    0d effffff35e effffff355      	movl	_dbl_expected+4,_sgl_value_2
1367  00018233                                   #              asm("movl _sgl_value_1,r10");      /* r10 = MS expected     */
1368  00018233    0d effffff34f 5a              movl _sgl_value_1,r10
1369  0001823A                                   #              asm("movl _sgl_value_2,r11");      /* r11 = LS expected     */
1370  0001823A    0d effffff348 5b              movl _sgl_value_2,r11
1371  00018241                                   #              asm("movl _index2,r12");           /* r12 = data index      */
1372  00018241    0d effffff341 5c              movl _index2,r12
1373  00018248                                   #         } else 
1374  00018248    11 5e                         	jbr 	L372
1375  0001824A                                  L371:
1376  0001824A                                   #           if( halt_code == BAD_REG_HLT ) {
1377  0001824A    1d ad04 02                    	cmpl	4(fp),$2
1378  0001824E    21 3d                         	jneq	L373
1379  00018250                                   #              sgl_dummy1 = load_regs[index2];
1380  00018250    0d effffff332 50              	movl	_index2,r0
1381  00018257    0d 40effffff32a               	movl	_load_regs[r0],_sgl_dummy1
                  effffff325 
1382  00018263                                   #              sgl_dummy2 = store_regs[index2];
1383  00018263    0d effffff31f 50              	movl	_index2,r0
1384  0001826A    0d 40effffff317               	movl	_store_regs[r0],_sgl_dummy2
                  effffff312 
1385  00018276                                   #              asm("movl _index2,r10");           /* r10 = bad register #  */
1386  00018276    0d effffff30c 5a              movl _index2,r10
1387  0001827D                                   #              asm("movl _sgl_dummy2,r11");       /* r11 = actual value    */
1388  0001827D    0d effffff305 5b              movl _sgl_dummy2,r11
1389  00018284                                   #              asm("movl _sgl_dummy1,r12");       /* r12 = expected value  */
1390  00018284    0d effffff2fe 5c              movl _sgl_dummy1,r12
1391  0001828B                                   #         } else
1392  0001828B    11 1b                         	jbr 	L374
1393  0001828D                                  L373:
1394  0001828D                                   #           if( halt_code == BAD_PSL_HLT ) {
1395  0001828D    1d ad04 03                    	cmpl	4(fp),$3
1396  00018291    21 15                         	jneq	L375
1397  00018293                                   #              asm("movl _init_psl,r10");         /* r10 = initial PSL     */
1398  00018293    0d effffff2ef 5a              movl _init_psl,r10
1399  0001829A                                   #              asm("movl _psl_val,r11");          /* r11 = final PSL       */
1400  0001829A    0d effffff2e8 5b              movl _psl_val,r11
1401  000182A1                                   #              asm("movl _exp_psl,r12");          /* r12 = expected PSL    */
1402  000182A1    0d effffff2e1 5c              movl _exp_psl,r12
1403  000182A8                                   #         };
1404  000182A8                                  L375:
1405  000182A8                                  L374:
1406  000182A8                                  L372:
1407  000182A8                                   #         asm("halt");                            /* HALT ...              */
1408  000182A8    00                            halt
1409  000182A9                                   # }  
1410  000182A9    40                            	ret#2
1411  000182AA                                  	.set	L367,0x0
1412  000182AA                                  L369:
1413  000182AA    13 feda                       	jbr 	L370
1414  000182AD                                  	.data
1414  0002F835                                  	.data

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