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1.1 ! root 1: ! 2: #include "fpp_defs.h" ! 3: ! 4: ! 5: /***************************************************************************** ! 6: * ! 7: * TSTF - SINGLE PRECISION FLOATING POINT TEST ACC. TEST ! 8: * ! 9: *****************************************************************************/ ! 10: tstf() ! 11: { ! 12: asm(".globl _tstf_t"); ! 13: asm("_tstf_t:"); /* entry address */ ! 14: if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */ ! 15: writes(" TSTF"); ! 16: tstf_1(); /* PSL flags test */ ! 17: tstf_2(); /* register stability */ ! 18: tstf_3(); /* accumulator stability */ ! 19: if( !no_fpp_wcs ) { ! 20: tstf_4(); /* pipelined entry test */ ! 21: tstf_5(); /* pipelined exit test */ ! 22: }; ! 23: asm("jmp *return"); /* return to the test monitor */ ! 24: } ! 25: ! 26: ! 27: ! 28: /************************************************************************ ! 29: * ! 30: * SUBTEST 1 - Check for PSL corruption ! 31: * ! 32: ************************************************************************/ ! 33: tstf_1() ! 34: { ! 35: force_loop = FALSE; /* clear force_loop flg */ ! 36: subtest = 1; ! 37: for( index = 0; index < max_tstf_1_index; index++ ) { ! 38: sgl_ld_acc = tstf_1_data[index].ld; /* get value to load */ ! 39: sgl_expected = tstf_1_data[index].exp; /* get expected flags*/ ! 40: for( status_index = 0; status_index < 3; status_index++ ) { ! 41: sgl_dummy1 = status_array[status_index]; /* status = +,-,0 */ ! 42: /* ! 43: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 44: * The force loop flag is set after the first error. ! 45: */ ! 46: asm("ldf _sgl_ld_acc"); /* load the initial value */ ! 47: asm("_tstf_1_lp1:"); ! 48: asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 49: asm("movpsl _init_psl"); /* save the initial PSL */ ! 50: asm("tstf"); /* test the accmulator */ ! 51: asm("nop"); ! 52: asm("movpsl _psl_val"); /* save the final PSL */ ! 53: asm("stf _sgl_st_acc"); /* save the final Acc. */ ! 54: if( force_loop ) ! 55: asm("brb _tstf_1_lp1");; /* loop on the error */ ! 56: /* ! 57: * Now compare the final PSL to the initial PSL -they should be the same ! 58: */ ! 59: exp_psl = init_psl; /* get the initial PSL */ ! 60: exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */ ! 61: if( sgl_expected == ZERO ) ! 62: exp_psl |= PSL_Z; /* expect the ZERO bit set */ ! 63: if( sgl_expected == NEGATIVE ) ! 64: exp_psl |= PSL_N; /* expect the NEG bit set */ ! 65: if( psl_val != exp_psl ) { ! 66: errcnt++; /* bump the error count */ ! 67: if( prt_error ) { ! 68: writes(" \n"); /* start new print line */ ! 69: writes("cycle: "); ! 70: writed( cycle ); ! 71: writes(" TSTF test "); ! 72: writed( test_no ); ! 73: writes( ! 74: ", subtest 1 - BAD FINAL PSL\n"); ! 75: print_tstf_data(); /* print the operands */ ! 76: writes("initial PSL = "); ! 77: write32h( init_psl ); ! 78: writes(", final PSL = "); ! 79: write32h( psl_val ); ! 80: writes(", expected PSL = "); ! 81: write32h( exp_psl ); ! 82: writes("\n"); ! 83: } ! 84: if( halt_flg ) ! 85: tstf_er_halt( BAD_PSL_HLT ); /* halt on error */ ! 86: if( loop_on_err ) { ! 87: force_loop = TRUE; /* set force loop flag */ ! 88: asm("brw _tstf_1_lp1"); /* loop on the error */ ! 89: } /* end of loop on error */ ! 90: } /* end of PSL corruption error */ ! 91: } /* end of initial status WHILE loop */ ! 92: } /* end of data pattern WHILE loop */ ! 93: } /* end of subtest 1 */ ! 94: ! 95: ! 96: ! 97: /************************************************************************ ! 98: * ! 99: * SUBTEST 2 - Check for register corruption ! 100: * ! 101: ************************************************************************/ ! 102: tstf_2() ! 103: { ! 104: force_loop = FALSE; /* clear force_loop flg */ ! 105: subtest = 2; ! 106: fill_reg_buf( load_regs ); /* get patterns for regs */ ! 107: for( index = 0; index < max_tstf_1_index; index++ ) { ! 108: sgl_ld_acc = tstf_1_data[index].ld; /* get value to load */ ! 109: sgl_expected = tstf_1_data[index].exp; /* get expected flags*/ ! 110: for( status_index = 0; status_index < 3; status_index++ ) { ! 111: sgl_dummy1 = status_array[status_index]; /* status = +,-,0 */ ! 112: /* ! 113: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 114: * The force loop flag is set after the first error. ! 115: */ ! 116: asm("_tstf_2_lp1:"); ! 117: asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */ ! 118: asm("ldf _sgl_ld_acc"); /* load the Acc. */ ! 119: asm("nop"); ! 120: asm("tstf"); /* test the acc. */ ! 121: asm("nop"); ! 122: asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */ ! 123: asm("stf _sgl_st_acc"); /* save the acc. */ ! 124: if( force_loop ) ! 125: asm("brb _tstf_2_lp1");; /* loop on the error */ ! 126: /* ! 127: * Now compare the stored register values to those that were loaded ! 128: */ ! 129: index2 = 0; ! 130: while( (load_regs[index2] == store_regs[index2]) && ! 131: (index2 < 13) ) ! 132: index2++; /* check reg values */ ! 133: if( index2 < 13 ) { /* error if index2 < 13 */ ! 134: errcnt++; /* bump the error count */ ! 135: if( prt_error ) { ! 136: writes(" \n"); /* start a new print line */ ! 137: writes("cycle: "); ! 138: writed( cycle ); ! 139: writes(" TSTF test "); ! 140: writed( test_no ); ! 141: writes(", subtest 2 - A REGISTER WAS MODIFIED\n"); ! 142: print_tstf_data(); /* print the operands */ ! 143: writes("register "); /* print the information */ ! 144: writed( index2 ); /* about the corrupted */ ! 145: writes(" = "); /* register */ ! 146: write32h( store_regs[index2] ); ! 147: writes(", should be = "); ! 148: write32h( load_regs[index2] ); ! 149: writes("\n"); ! 150: } ! 151: if( halt_flg ) ! 152: tstf_er_halt( BAD_REG_HLT ); /* halt on error */ ! 153: if( loop_on_err ) { ! 154: force_loop = TRUE; /* set force loop flag */ ! 155: asm("brw _tstf_2_lp1"); /* loop on the error */ ! 156: } /* end of loop on error */ ! 157: } /* end of register corruption error */ ! 158: } /* end of initial PSL WHILE loop */ ! 159: } /* end of tstf data WHILE loop */ ! 160: } /* end of subtest 2 */ ! 161: ! 162: ! 163: ! 164: ! 165: /************************************************************************ ! 166: * ! 167: * SUBTEST 3 - Check for accumulator corruption ! 168: * ! 169: ************************************************************************/ ! 170: tstf_3() ! 171: { ! 172: force_loop = FALSE; /* clear force_loop flg */ ! 173: subtest = 3; ! 174: for( index = 0; index < max_tstf_1_index; index++ ) { ! 175: sgl_ld_acc = tstf_1_data[index].ld; /* get value to load */ ! 176: if( sgl_ld_acc & 0x7f800000 ) ! 177: sgl_expected = sgl_ld_acc; /* the Acc should not change */ ! 178: else ! 179: sgl_expected = 0; /* expect a '0' final Acc */ ! 180: /* ! 181: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 182: * The force loop flag is set after the first error. ! 183: */ ! 184: asm("_tstf_3_lp1:"); ! 185: asm("ldf _sgl_ld_acc"); ! 186: asm("nop"); ! 187: asm("tstf"); /* test the accumulator */ ! 188: asm("nop"); ! 189: asm("stf _sgl_st_acc"); /* save the accumulator */ ! 190: if( force_loop ) ! 191: asm("brb _tstf_3_lp1");; /* loop on the error */ ! 192: /* ! 193: * Now compare the stored accumulator to the value that was loaded ! 194: */ ! 195: if( sgl_st_acc != sgl_expected ) { /* Acc corrupted? */ ! 196: errcnt++; /* bump error count */ ! 197: if( prt_error ) { ! 198: writes(" \n"); /* start a new line */ ! 199: writes("cycle: "); ! 200: writed( cycle ); ! 201: writes(" TSTF test "); ! 202: writed( test_no ); ! 203: writes(", subtest 3 (Cache Data) - THE ACC WAS MODIFIED\n"); ! 204: print_tstf_data(); /* print the operands */ ! 205: writes(" expected Acc = "); ! 206: write32h( sgl_expected ); ! 207: writes("\n"); ! 208: } ! 209: if( halt_flg ) ! 210: tstf_er_halt( BAD_ACC_HLT ); /* halt on error */ ! 211: if( loop_on_err ) { ! 212: force_loop = TRUE; /* set force loop flag */ ! 213: asm("brw _tstf_3_lp1"); /* loop on the error */ ! 214: } /* end of loop on error */ ! 215: } /* end of register corruption error */ ! 216: } /* end of tstf data WHILE loop */ ! 217: } /* end of subtest 3 */ ! 218: ! 219: ! 220: ! 221: /************************************************************************ ! 222: * ! 223: * SUBTEST 4 - pipelined entry test ! 224: * ! 225: ************************************************************************/ ! 226: tstf_4() ! 227: { ! 228: force_loop = FALSE; ! 229: subtest = 4; ! 230: for( index = 0; index < max_tstf_1_index; index++ ) { ! 231: sgl_ld_acc = tstf_1_data[index].ld; /* get value to negate */ ! 232: sgl_expected = tstf_1_data[index].exp; /* get expected result */ ! 233: for( status_index = 0; status_index < 3; status_index++ ) { ! 234: sgl_dummy1 = status_array[status_index]; /* status = +,-,0 */ ! 235: /* ! 236: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 237: * The force loop flag is set after the first error. ! 238: */ ! 239: asm("_tstf_4_lp1:"); ! 240: asm("ldf $0"); /* load Acc. with 0.0 */ ! 241: asm("tstl _sgl_dummy1"); /* set the PSL status */ ! 242: asm("movpsl _init_psl"); /* save initial PSL */ ! 243: asm("addf _sgl_ld_acc"); /* add the value */ ! 244: asm("tstf"); /* test accumulator */ ! 245: asm("movpsl _psl_val"); /* save final PSL */ ! 246: asm("stf _sgl_st_acc"); /* store the result */ ! 247: if( force_loop ) ! 248: asm("brb _tstf_4_lp1");; /* loop on the error */ ! 249: /* ! 250: * end error loop - test the results ! 251: */ ! 252: exp_psl = init_psl; /* get initial PSL */ ! 253: exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */ ! 254: if( sgl_expected == ZERO ) ! 255: exp_psl |= PSL_Z; /* expect ZERO bit set */ ! 256: if( sgl_expected == NEGATIVE ) ! 257: exp_psl |= PSL_N; /* expect NEG bit set */ ! 258: if( psl_val != exp_psl ) { ! 259: errcnt++; /* bump the error count */ ! 260: if( prt_error ) { ! 261: writes(" \n"); /* start new print line */ ! 262: writes("cycle: "); ! 263: writed( cycle ); ! 264: writes(" TSTF test "); ! 265: writed( test_no ); ! 266: writes( ! 267: ", subtest 4 (Piped Entry) -BAD FINAL PSL\n"); ! 268: print_tstf_data(); /* print operands */ ! 269: writes("initial PSL = "); ! 270: write32h( init_psl ); ! 271: writes(", final PSL = "); ! 272: write32h( psl_val ); ! 273: writes(", expected PSL = "); ! 274: write32h( exp_psl ); ! 275: writes("\n"); ! 276: } ! 277: if( halt_flg ) ! 278: tstf_er_halt( BAD_PSL_HLT ); /* halt on error */ ! 279: if( loop_on_err ) { ! 280: force_loop = TRUE; /* set loop flag */ ! 281: asm("brw _tstf_4_lp1"); /* loop on error */ ! 282: } /* end of loop on error */ ! 283: } /* end of PSL corruption error */ ! 284: } /* end of status WHILE loop */ ! 285: } /* end of data WHILE loop */ ! 286: } /* end of subtest 4 */ ! 287: ! 288: ! 289: ! 290: /************************************************************************ ! 291: * ! 292: * SUBTEST 5 - pipelined exit test ! 293: * ! 294: ************************************************************************/ ! 295: tstf_5() ! 296: { ! 297: force_loop = FALSE; ! 298: subtest = 5; ! 299: for( index = 0; index < max_tstf_1_index; index++ ) { ! 300: sgl_ld_acc = tstf_1_data[index].ld; /* get value to test */ ! 301: if( sgl_ld_acc & 0x7f800000 ) ! 302: sgl_expected = sgl_ld_acc; /* the Acc should not change */ ! 303: else ! 304: sgl_expected = 0; /* expect a '0' final Acc */ ! 305: /* ! 306: * If LOOP ON ERROR is set, this is the loop for this subtest. ! 307: * The force loop flag is set after the first error. ! 308: */ ! 309: asm("_tstf_5_lp1:"); ! 310: asm("movl $0,r0"); /* clear r0 */ ! 311: asm("ldf _sgl_ld_acc"); /* load the value */ ! 312: asm("tstf"); /* test the accumulator */ ! 313: asm("addf r0"); /* add a zero */ ! 314: asm("stf _sgl_st_acc"); /* store the result */ ! 315: if( force_loop ) ! 316: asm("brb _tstf_5_lp1");; /* loop on the error */ ! 317: /* ! 318: * end error loop - test the results ! 319: */ ! 320: if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */ ! 321: errcnt++; /* bump the error count */ ! 322: if( prt_error ) { ! 323: writes(" \n"); /* start a new print line */ ! 324: writes("cycle: "); ! 325: writed( cycle ); ! 326: writes(" TSTF test "); ! 327: writed( test_no ); ! 328: writes( ! 329: ", subtest 5 (Piped Exit) - BAD FINAL ACC\n"); ! 330: print_tstf_data(); ! 331: writes(" expected Acc = "); ! 332: write32h( sgl_expected ); ! 333: writec('\n'); ! 334: } ! 335: if( halt_flg ) ! 336: tstf_er_halt( BAD_ACC_HLT ); /* halt on the error */ ! 337: if( loop_on_err ) { ! 338: force_loop = TRUE; /* set the force loop flag */ ! 339: asm("brw _tstf_5_lp1"); /* and loop on the error */ ! 340: } /* end of loop on error */ ! 341: } /* end of compare error */ ! 342: } /* end of WHILE loop */ ! 343: } /* end of subtest 5 */ ! 344: ! 345: ! 346: ! 347: /************************************************************************** ! 348: * ! 349: * PRINT THE DATA AND STORE RESULTS ! 350: * ! 351: * initial Acc = xxxxxxxx, final Acc = xxxxxxxx, data index = xx ! 352: **************************************************************************/ ! 353: print_tstf_data() ! 354: { ! 355: writes("initial Acc = "); ! 356: write32h( sgl_ld_acc ); ! 357: writes(", final Acc = "); ! 358: write32h( sgl_st_acc ); ! 359: writes(", data index = "); ! 360: writed( index ); ! 361: writec('\n'); ! 362: } ! 363: ! 364: ! 365: ! 366: /************************************************************************** ! 367: * ! 368: * HALT ON ERROR ROUTINE ! 369: * ! 370: **************************************************************************/ ! 371: tstf_er_halt( halt_code ) ! 372: int halt_code; ! 373: { ! 374: sgl_dummy1 = halt_code; /* get the error type */ ! 375: asm("movl _test_no,r0"); /* r0 = test number */ ! 376: asm("movl _subtest,r1"); /* r1 = subtest number */ ! 377: asm("movl _sgl_dummy1,r2"); /* r2 = error code */ ! 378: asm("movl _cycle,r3"); /* r3 = cycle count */ ! 379: asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */ ! 380: asm("movl _psl_val,r5"); /* r5 = final PSL */ ! 381: if( halt_code == BAD_ACC_HLT ) { ! 382: asm("movl _sgl_st_acc,r6"); /* r6 = actual value */ ! 383: asm("movl _sgl_expected,r7"); /* r7 = expected value */ ! 384: } else ! 385: if( halt_code == BAD_REG_HLT ) { ! 386: sgl_dummy1 = load_regs[index2]; ! 387: sgl_dummy2 = store_regs[index2]; ! 388: asm("movl _index2,r6"); /* r6 = bad register # */ ! 389: asm("movl _sgl_dummy2,r7"); /* r7 = actual value */ ! 390: asm("movl _sgl_dummy1,r8"); /* r8 = expected value */ ! 391: } else ! 392: if( halt_code == BAD_PSL_HLT ) { ! 393: asm("movl _exp_psl,r6"); /* r6 = expected PSL */ ! 394: asm("movl _index,r7"); /* r7 = data index */ ! 395: }; ! 396: asm("halt"); /* HALT ... */ ! 397: }
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