|
|
1.1 root 1: 1 00000000 LL0:
2: 2 00000000 .data
3: 3 000009a4 * .text
4: 4 00000000 .align 1
5: 5 00000000 .globl _tstf
6: 6 00000000 _tstf:
7: 7 00011A14 0000 .word L215
8: 8 00011A16 #
9: 9 00011A16 # #include "fpp_defs.h"
10: 10 00011A16 #
11: 11 00011A16 #
12: 12 00011A16 # /*****************************************************************************
13: 13 00011A16 # *
14: 14 00011A16 # * TSTF - SINGLE PRECISION FLOATING POINT TEST ACC. TEST
15: 15 00011A16 # *
16: 16 00011A16 # *****************************************************************************/
17: 17 00011A16 # tstf()
18: 18 00011A16 # {
19: 19 00011A16 11 50 jbr L217
20: 20 00011A18 L218:
21: 21 00011A18 # asm(".globl _tstf_t");
22: 22 00011A18 .globl _tstf_t
23: 23 00011A18 # asm("_tstf_t:"); /* entry address */
24: 24 00011A18 _tstf_t:
25: 25 00011A18 # if( ( cycle == 1 ) && ( prt_hdrs ) ) /* print headers on 1st pass */
26: 26 00011A18 1d effffffff6 01 cmpl _cycle,$1
27: 27 00011A1F 21 15 jneq L219
28: 28 00011A21 5d efffffffed tstl _prt_hdrs
29: 29 00011A27 31 0d jeql L219
30: 30 00011A29 # writes(" TSTF");
31: 31 00011A29 .data 1
32: 32 000009a4 * L221:
33: 33 000009a4 * 205453544600 .ascii " TSTF\0"
34: 34 000009aa * .text
35: 35 00011A29 dd 8f000009a4 pushl $L221
36: 36 00011A2F fe 08 efffffffde callf $8,_writes
37: 37 00011A36 # tstf_1(); /* PSL flags test */
38: 38 00011A36 L219:
39: 39 00011A36 fe 04 ef0000002d callf $4,_tstf_1
40: 40 00011A3D # tstf_2(); /* register stability */
41: 41 00011A3D fe 04 ef00000206 callf $4,_tstf_2
42: 42 00011A44 # tstf_3(); /* accumulator stability */
43: 43 00011A44 fe 04 ef000003fb callf $4,_tstf_3
44: 44 00011A4B # if( !no_fpp_wcs ) {
45: 45 00011A4B 5d efffffffc3 tstl _no_fpp_wcs
46: 46 00011A51 21 0e jneq L225
47: 47 00011A53 # tstf_4(); /* pipelined entry test */
48: 48 00011A53 fe 04 ef0000052e callf $4,_tstf_4
49: 49 00011A5A # tstf_5(); /* pipelined exit test */
50: 50 00011A5A fe 04 ef0000070d callf $4,_tstf_5
51: 51 00011A61 # };
52: 52 00011A61 L225:
53: 53 00011A61 # asm("jmp *return"); /* return to the test monitor */
54: 54 00011A61 71 ffffffffad jmp *return
55: 55 00011A67 # }
56: 56 00011A67 40 ret#2
57: 57 00011A68 .set L215,0x0
58: 58 00011A68 L217:
59: 59 00011A68 11 ae jbr L218
60: 60 00011A6A .data
61: 61 000009a4 * .text
62: 62 00011A6A .align 1
63: 63 00011A6A .globl _tstf_1
64: 64 00011A6A _tstf_1:
65: 65 00011A6A 0000 .word L228
66: 66 00011A6C #
67: 67 00011A6C #
68: 68 00011A6C #
69: 69 00011A6C # /************************************************************************
70: 70 00011A6C # *
71: 71 00011A6C # * SUBTEST 1 - Check for PSL corruption
72: 72 00011A6C # *
73: 73 00011A6C # ************************************************************************/
74: 74 00011A6C # tstf_1()
75: 75 00011A6C # {
76: 76 00011A6C 13 01d8 jbr L230
77: 77 00011A6F L231:
78: 78 00011A6F # force_loop = FALSE; /* clear force_loop flg */
79: 79 00011A6F 4d efffffff9f clrl _force_loop
80: 80 00011A75 # subtest = 1;
81: 81 00011A75 0d 01 efffffff98 movl $1,_subtest
82: 82 00011A7C # for( index = 0; index < max_tstf_1_index; index++ ) {
83: 83 00011A7C 4d efffffff92 clrl _index
84: 84 00011A82 L234:
85: 85 00011A82 1d efffffff8c efffffff87 cmpl _index,_max_tstf_1_index
86: 86 00011A8D 91 03 13 01b4 jgeq L233
87: 87 00011A92 # sgl_ld_acc = tstf_1_data[index].ld; /* get value to load */
88: 88 00011A92 0d efffffff7c 50 movl _index,r0
89: 89 00011A99 48 03 50 50 shll $3,r0,r0
90: 90 00011A9D 0d e000000000 efffffff6c movl _tstf_1_data(r0),_sgl_ld_acc
91: 91 00011AA8 # sgl_expected = tstf_1_data[index].exp; /* get expected flags*/
92: 92 00011AA8 0d efffffff66 50 movl _index,r0
93: 93 00011AAF 48 03 50 50 shll $3,r0,r0
94: 94 00011AB3 0d e000000004 efffffff56 movl _tstf_1_data+4(r0),_sgl_expected
95: 95 00011ABE # for( status_index = 0; status_index < 3; status_index++ ) {
96: 96 00011ABE 4d efffffff50 clrl _status_index
97: 97 00011AC4 L237:
98: 98 00011AC4 1d efffffff4a 03 cmpl _status_index,$3
99: 99 00011ACB 91 03 13 016d jgeq L236
100: 100 00011AD0 # sgl_dummy1 = status_array[status_index]; /* status = +,-,0 */
101: 101 00011AD0 0d efffffff3e 50 movl _status_index,r0
102: 102 00011AD7 0d 40efffffff36 movl _status_array[r0],_sgl_dummy1
103: efffffff31
104: 103 00011AE3 # /*
105: 104 00011AE3 # * If LOOP ON ERROR is set, this is the loop for this subtest.
106: 105 00011AE3 # * The force loop flag is set after the first error.
107: 106 00011AE3 # */
108: 107 00011AE3 # asm("ldf _sgl_ld_acc"); /* load the initial value */
109: 108 00011AE3 06 efffffff2b ldf _sgl_ld_acc
110: 109 00011AE9 # asm("_tstf_1_lp1:");
111: 110 00011AE9 _tstf_1_lp1:
112: 111 00011AE9 # asm("tstl _sgl_dummy1"); /* set the PSL status */
113: 112 00011AE9 5d efffffff25 tstl _sgl_dummy1
114: 113 00011AEF # asm("movpsl _init_psl"); /* save the initial PSL */
115: 114 00011AEF cd efffffff1f movpsl _init_psl
116: 115 00011AF5 # asm("tstf"); /* test the accmulator */
117: 116 00011AF5 56 tstf
118: 117 00011AF6 # asm("nop");
119: 118 00011AF6 10 nop
120: 119 00011AF7 # asm("movpsl _psl_val"); /* save the final PSL */
121: 120 00011AF7 cd efffffff17 movpsl _psl_val
122: 121 00011AFD # asm("stf _sgl_st_acc"); /* save the final Acc. */
123: 122 00011AFD 26 efffffff11 stf _sgl_st_acc
124: 123 00011B03 # if( force_loop )
125: 124 00011B03 5d efffffff0b tstl _force_loop
126: 125 00011B09 31 02 jeql L238
127: 126 00011B0B # asm("brb _tstf_1_lp1");; /* loop on the error */
128: 127 00011B0B 11 dc brb _tstf_1_lp1
129: 128 00011B0D L238:
130: 129 00011B0D # /*
131: 130 00011B0D # * Now compare the final PSL to the initial PSL -they should be the same
132: 131 00011B0D # */
133: 132 00011B0D # exp_psl = init_psl; /* get the initial PSL */
134: 133 00011B0D 0d efffffff01 effffffefc movl _init_psl,_exp_psl
135: 134 00011B18 # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
136: 135 00011B18 ac 88f3 effffffef4 andl2 $-13,_exp_psl
137: 136 00011B20 # if( sgl_expected == ZERO )
138: 137 00011B20 1d effffffeee 04 cmpl _sgl_expected,$4
139: 138 00011B27 21 07 jneq L239
140: 139 00011B29 # exp_psl |= PSL_Z; /* expect the ZERO bit set */
141: 140 00011B29 8c 04 effffffee4 orl2 $4,_exp_psl
142: 141 00011B30 # if( sgl_expected == NEGATIVE )
143: 142 00011B30 L239:
144: 143 00011B30 1d effffffede 08 cmpl _sgl_expected,$8
145: 144 00011B37 21 07 jneq L240
146: 145 00011B39 # exp_psl |= PSL_N; /* expect the NEG bit set */
147: 146 00011B39 8c 08 effffffed4 orl2 $8,_exp_psl
148: 147 00011B40 # if( psl_val != exp_psl ) {
149: 148 00011B40 L240:
150: 149 00011B40 1d effffffece effffffec9 cmpl _psl_val,_exp_psl
151: 150 00011B4B 21 03 13 00e4 jeql L241
152: 151 00011B50 # errcnt++; /* bump the error count */
153: 152 00011B50 6d effffffebe incl _errcnt
154: 153 00011B56 # if( prt_error ) {
155: 154 00011B56 5d effffffeb8 tstl _prt_error
156: 155 00011B5C 21 03 13 00b0 jeql L242
157: 156 00011B61 # writes(" \n"); /* start new print line */
158: 157 00011B61 .data 1
159: 158 000009aa * L243:
160: 159 000009aa * 200A00 .ascii " \12\0"
161: 160 000009ad * .text
162: 161 00011B61 dd 8f000009aa pushl $L243
163: 162 00011B67 fe 08 effffffea6 callf $8,_writes
164: 163 00011B6E # writes("cycle: ");
165: 164 00011B6E .data 1
166: 165 000009ad * L244:
167: 166 000009ad * 6379636C653A2000 .ascii "cycle: \0"
168: 167 000009b5 * .text
169: 168 00011B6E dd 8f000009ad pushl $L244
170: 169 00011B74 fe 08 effffffe99 callf $8,_writes
171: 170 00011B7B # writed( cycle );
172: 171 00011B7B dd effffffe93 pushl _cycle
173: 172 00011B81 fe 08 effffffe8c callf $8,_writed
174: 173 00011B88 # writes(" TSTF test ");
175: 174 00011B88 .data 1
176: 175 000009b5 * L246:
177: 176 000009b5 * 2020545354462074657374200 .ascii " TSTF test \0"
178: 0
179: 177 000009c2 * .text
180: 178 00011B88 dd 8f000009b5 pushl $L246
181: 179 00011B8E fe 08 effffffe7f callf $8,_writes
182: 180 00011B95 # writed( test_no );
183: 181 00011B95 dd effffffe79 pushl _test_no
184: 182 00011B9B fe 08 effffffe72 callf $8,_writed
185: 183 00011BA2 # writes(
186: 184 00011BA2 # ", subtest 1 - BAD FINAL PSL\n");
187: 185 00011BA2 .data 1
188: 186 000009c2 * L247:
189: 187 000009c2 * 2C20737562746573742031202 .ascii ", subtest 1 - BAD FINAL PSL\12\0"
190: D204241442046494E414C2050
191: 534C0A00
192: 188 000009df * .text
193: 189 00011BA2 dd 8f000009c2 pushl $L247
194: 190 00011BA8 fe 08 effffffe65 callf $8,_writes
195: 191 00011BAF # print_tstf_data(); /* print the operands */
196: 192 00011BAF fe 04 ef000006f8 callf $4,_print_tstf_data
197: 193 00011BB6 # writes("initial PSL = ");
198: 194 00011BB6 .data 1
199: 195 000009df * L249:
200: 196 000009df * 696E697469616C2050534C203 .ascii "initial PSL = \0"
201: D2000
202: 197 000009ee * .text
203: 198 00011BB6 dd 8f000009df pushl $L249
204: 199 00011BBC fe 08 effffffe51 callf $8,_writes
205: 200 00011BC3 # write32h( init_psl );
206: 201 00011BC3 dd effffffe4b pushl _init_psl
207: 202 00011BC9 fe 08 effffffe44 callf $8,_write32h
208: 203 00011BD0 # writes(", final PSL = ");
209: 204 00011BD0 .data 1
210: 205 000009ee * L251:
211: 206 000009ee * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
212: 03D2000
213: 207 000009fe * .text
214: 208 00011BD0 dd 8f000009ee pushl $L251
215: 209 00011BD6 fe 08 effffffe37 callf $8,_writes
216: 210 00011BDD # write32h( psl_val );
217: 211 00011BDD dd effffffe31 pushl _psl_val
218: 212 00011BE3 fe 08 effffffe2a callf $8,_write32h
219: 213 00011BEA # writes(", expected PSL = ");
220: 214 00011BEA .data 1
221: 215 000009fe * L252:
222: 216 000009fe * 2C20657870656374656420505 .ascii ", expected PSL = \0"
223: 34C203D2000
224: 217 00000a10 * .text
225: 218 00011BEA dd 8f000009fe pushl $L252
226: 219 00011BF0 fe 08 effffffe1d callf $8,_writes
227: 220 00011BF7 # write32h( exp_psl );
228: 221 00011BF7 dd effffffe17 pushl _exp_psl
229: 222 00011BFD fe 08 effffffe10 callf $8,_write32h
230: 223 00011C04 # writes("\n");
231: 224 00011C04 .data 1
232: 225 00000a10 * L253:
233: 226 00000a10 * 0A00 .ascii "\12\0"
234: 227 00000a12 * .text
235: 228 00011C04 dd 8f00000a10 pushl $L253
236: 229 00011C0A fe 08 effffffe03 callf $8,_writes
237: 230 00011C11 # }
238: 231 00011C11 # if( halt_flg )
239: 232 00011C11 L242:
240: 233 00011C11 5d effffffdfd tstl _halt_flg
241: 234 00011C17 31 09 jeql L254
242: 235 00011C19 # tstf_er_halt( BAD_PSL_HLT ); /* halt on error */
243: 236 00011C19 dd 03 pushl $3
244: 237 00011C1B fe 08 ef000006ea callf $8,_tstf_er_halt
245: 238 00011C22 # if( loop_on_err ) {
246: 239 00011C22 L254:
247: 240 00011C22 5d effffffdec tstl _loop_on_err
248: 241 00011C28 31 0a jeql L256
249: 242 00011C2A # force_loop = TRUE; /* set force loop flag */
250: 243 00011C2A 0d 01 effffffde3 movl $1,_force_loop
251: 244 00011C31 # asm("brw _tstf_1_lp1"); /* loop on the error */
252: 245 00011C31 13 feb5 brw _tstf_1_lp1
253: 246 00011C34 # } /* end of loop on error */
254: 247 00011C34 # } /* end of PSL corruption error */
255: 248 00011C34 L256:
256: 249 00011C34 # } /* end of initial status WHILE loop */
257: 250 00011C34 L241:
258: 251 00011C34 L235:
259: 252 00011C34 6d effffffdda incl _status_index
260: 253 00011C3A 13 fe87 jbr L237
261: 254 00011C3D L236:
262: 255 00011C3D # } /* end of data pattern WHILE loop */
263: 256 00011C3D L232:
264: 257 00011C3D 6d effffffdd1 incl _index
265: 258 00011C43 13 fe3c jbr L234
266: 259 00011C46 L233:
267: 260 00011C46 # } /* end of subtest 1 */
268: 261 00011C46 40 ret#2
269: 262 00011C47 .set L228,0x0
270: 263 00011C47 L230:
271: 264 00011C47 13 fe25 jbr L231
272: 265 00011C4A .data
273: 266 000009a4 * .text
274: 267 00011C4A .align 1
275: 268 00011C4A .globl _tstf_2
276: 269 00011C4A _tstf_2:
277: 270 00011C4A 0000 .word L257
278: 271 00011C4C #
279: 272 00011C4C #
280: 273 00011C4C #
281: 274 00011C4C # /************************************************************************
282: 275 00011C4C # *
283: 276 00011C4C # * SUBTEST 2 - Check for register corruption
284: 277 00011C4C # *
285: 278 00011C4C # ************************************************************************/
286: 279 00011C4C # tstf_2()
287: 280 00011C4C # {
288: 281 00011C4C 13 01f3 jbr L259
289: 282 00011C4F L260:
290: 283 00011C4F # force_loop = FALSE; /* clear force_loop flg */
291: 284 00011C4F 4d effffffdbf clrl _force_loop
292: 285 00011C55 # subtest = 2;
293: 286 00011C55 0d 02 effffffdb8 movl $2,_subtest
294: 287 00011C5C # fill_reg_buf( load_regs ); /* get patterns for regs */
295: 288 00011C5C dd 8f00000000 pushl $_load_regs
296: 289 00011C62 fe 08 effffffdab callf $8,_fill_reg_buf
297: 290 00011C69 # for( index = 0; index < max_tstf_1_index; index++ ) {
298: 291 00011C69 4d effffffda5 clrl _index
299: 292 00011C6F L264:
300: 293 00011C6F 1d effffffd9f effffffd9a cmpl _index,_max_tstf_1_index
301: 294 00011C7A 91 03 13 01c2 jgeq L263
302: 295 00011C7F # sgl_ld_acc = tstf_1_data[index].ld; /* get value to load */
303: 296 00011C7F 0d effffffd8f 50 movl _index,r0
304: 297 00011C86 48 03 50 50 shll $3,r0,r0
305: 298 00011C8A 0d e000000000 effffffd7f movl _tstf_1_data(r0),_sgl_ld_acc
306: 299 00011C95 # sgl_expected = tstf_1_data[index].exp; /* get expected flags*/
307: 300 00011C95 0d effffffd79 50 movl _index,r0
308: 301 00011C9C 48 03 50 50 shll $3,r0,r0
309: 302 00011CA0 0d e000000004 effffffd69 movl _tstf_1_data+4(r0),_sgl_expected
310: 303 00011CAB # for( status_index = 0; status_index < 3; status_index++ ) {
311: 304 00011CAB 4d effffffd63 clrl _status_index
312: 305 00011CB1 L267:
313: 306 00011CB1 1d effffffd5d 03 cmpl _status_index,$3
314: 307 00011CB8 91 03 13 017b jgeq L266
315: 308 00011CBD # sgl_dummy1 = status_array[status_index]; /* status = +,-,0 */
316: 309 00011CBD 0d effffffd51 50 movl _status_index,r0
317: 310 00011CC4 0d 40effffffd49 movl _status_array[r0],_sgl_dummy1
318: effffffd44
319: 311 00011CD0 # /*
320: 312 00011CD0 # * If LOOP ON ERROR is set, this is the loop for this subtest.
321: 313 00011CD0 # * The force loop flag is set after the first error.
322: 314 00011CD0 # */
323: 315 00011CD0 # asm("_tstf_2_lp1:");
324: 316 00011CD0 _tstf_2_lp1:
325: 317 00011CD0 # asm("loadr $0x1fff,_load_regs"); /* load regs 0 - 12 */
326: 318 00011CD0 ab 891fff effffffd3b loadr $0x1fff,_load_regs
327: 319 00011CD9 # asm("ldf _sgl_ld_acc"); /* load the Acc. */
328: 320 00011CD9 06 effffffd35 ldf _sgl_ld_acc
329: 321 00011CDF # asm("nop");
330: 322 00011CDF 10 nop
331: 323 00011CE0 # asm("tstf"); /* test the acc. */
332: 324 00011CE0 56 tstf
333: 325 00011CE1 # asm("nop");
334: 326 00011CE1 10 nop
335: 327 00011CE2 # asm("storer $0x1fff,_store_regs"); /* store regs 0 - 12 */
336: 328 00011CE2 bb 891fff effffffd29 storer $0x1fff,_store_regs
337: 329 00011CEB # asm("stf _sgl_st_acc"); /* save the acc. */
338: 330 00011CEB 26 effffffd23 stf _sgl_st_acc
339: 331 00011CF1 # if( force_loop )
340: 332 00011CF1 5d effffffd1d tstl _force_loop
341: 333 00011CF7 31 02 jeql L268
342: 334 00011CF9 # asm("brb _tstf_2_lp1");; /* loop on the error */
343: 335 00011CF9 11 d5 brb _tstf_2_lp1
344: 336 00011CFB L268:
345: 337 00011CFB # /*
346: 338 00011CFB # * Now compare the stored register values to those that were loaded
347: 339 00011CFB # */
348: 340 00011CFB # index2 = 0;
349: 341 00011CFB 4d effffffd13 clrl _index2
350: 342 00011D01 # while( (load_regs[index2] == store_regs[index2]) &&
351: 343 00011D01 # (index2 < 13) )
352: 344 00011D01 L269:
353: 345 00011D01 0d effffffd0d 50 movl _index2,r0
354: 346 00011D08 0d effffffd06 51 movl _index2,r1
355: 347 00011D0F 1d 40effffffcfe cmpl _load_regs[r0],_store_regs[r1]
356: 41effffffcf8
357: 348 00011D1C 21 11 jneq L270
358: 349 00011D1E 1d effffffcf0 0d cmpl _index2,$13
359: 350 00011D25 81 08 jgeq L270
360: 351 00011D27 # index2++; /* check reg values */
361: 352 00011D27 6d effffffce7 incl _index2
362: 353 00011D2D 11 d2 jbr L269
363: 354 00011D2F L270:
364: 355 00011D2F # if( index2 < 13 ) { /* error if index2 < 13 */
365: 356 00011D2F 1d effffffcdf 0d cmpl _index2,$13
366: 357 00011D36 91 03 13 00f4 jgeq L271
367: 358 00011D3B # errcnt++; /* bump the error count */
368: 359 00011D3B 6d effffffcd3 incl _errcnt
369: 360 00011D41 # if( prt_error ) {
370: 361 00011D41 5d effffffccd tstl _prt_error
371: 362 00011D47 21 03 13 00c0 jeql L272
372: 363 00011D4C # writes(" \n"); /* start a new print line */
373: 364 00011D4C .data 1
374: 365 00000a12 * L273:
375: 366 00000a12 * 200A00 .ascii " \12\0"
376: 367 00000a15 * .text
377: 368 00011D4C dd 8f00000a12 pushl $L273
378: 369 00011D52 fe 08 effffffcbb callf $8,_writes
379: 370 00011D59 # writes("cycle: ");
380: 371 00011D59 .data 1
381: 372 00000a15 * L274:
382: 373 00000a15 * 6379636C653A2000 .ascii "cycle: \0"
383: 374 00000a1d * .text
384: 375 00011D59 dd 8f00000a15 pushl $L274
385: 376 00011D5F fe 08 effffffcae callf $8,_writes
386: 377 00011D66 # writed( cycle );
387: 378 00011D66 dd effffffca8 pushl _cycle
388: 379 00011D6C fe 08 effffffca1 callf $8,_writed
389: 380 00011D73 # writes(" TSTF test ");
390: 381 00011D73 .data 1
391: 382 00000a1d * L275:
392: 383 00000a1d * 2020545354462074657374200 .ascii " TSTF test \0"
393: 0
394: 384 00000a2a * .text
395: 385 00011D73 dd 8f00000a1d pushl $L275
396: 386 00011D79 fe 08 effffffc94 callf $8,_writes
397: 387 00011D80 # writed( test_no );
398: 388 00011D80 dd effffffc8e pushl _test_no
399: 389 00011D86 fe 08 effffffc87 callf $8,_writed
400: 390 00011D8D # writes(", subtest 2 - A REGISTER WAS MODIFIED\n");
401: 391 00011D8D .data 1
402: 392 00000a2a * L276:
403: 393 00000a2a * 2C20737562746573742032202 .ascii ", subtest 2 - A REGISTER WAS MODIFIED\12\0"
404: D204120524547495354455220
405: 574153204D4F4449464945440
406: A00
407: 394 00000a51 * .text
408: 395 00011D8D dd 8f00000a2a pushl $L276
409: 396 00011D93 fe 08 effffffc7a callf $8,_writes
410: 397 00011D9A # print_tstf_data(); /* print the operands */
411: 398 00011D9A fe 04 ef0000050d callf $4,_print_tstf_data
412: 399 00011DA1 # writes("register "); /* print the information */
413: 400 00011DA1 .data 1
414: 401 00000a51 * L277:
415: 402 00000a51 * 72656769737465722000 .ascii "register \0"
416: 403 00000a5b * .text
417: 404 00011DA1 dd 8f00000a51 pushl $L277
418: 405 00011DA7 fe 08 effffffc66 callf $8,_writes
419: 406 00011DAE # writed( index2 ); /* about the corrupted */
420: 407 00011DAE dd effffffc60 pushl _index2
421: 408 00011DB4 fe 08 effffffc59 callf $8,_writed
422: 409 00011DBB # writes(" = "); /* register */
423: 410 00011DBB .data 1
424: 411 00000a5b * L278:
425: 412 00000a5b * 203D2000 .ascii " = \0"
426: 413 00000a5f * .text
427: 414 00011DBB dd 8f00000a5b pushl $L278
428: 415 00011DC1 fe 08 effffffc4c callf $8,_writes
429: 416 00011DC8 # write32h( store_regs[index2] );
430: 417 00011DC8 0d effffffc46 50 movl _index2,r0
431: 418 00011DCF dd 40effffffc3e pushl _store_regs[r0]
432: 419 00011DD6 fe 08 effffffc37 callf $8,_write32h
433: 420 00011DDD # writes(", should be = ");
434: 421 00011DDD .data 1
435: 422 00000a5f * L279:
436: 423 00000a5f * 2C202073686F756C642062652 .ascii ", should be = \0"
437: 03D2000
438: 424 00000a6f * .text
439: 425 00011DDD dd 8f00000a5f pushl $L279
440: 426 00011DE3 fe 08 effffffc2a callf $8,_writes
441: 427 00011DEA # write32h( load_regs[index2] );
442: 428 00011DEA 0d effffffc24 50 movl _index2,r0
443: 429 00011DF1 dd 40effffffc1c pushl _load_regs[r0]
444: 430 00011DF8 fe 08 effffffc15 callf $8,_write32h
445: 431 00011DFF # writes("\n");
446: 432 00011DFF .data 1
447: 433 00000a6f * L280:
448: 434 00000a6f * 0A00 .ascii "\12\0"
449: 435 00000a71 * .text
450: 436 00011DFF dd 8f00000a6f pushl $L280
451: 437 00011E05 fe 08 effffffc08 callf $8,_writes
452: 438 00011E0C # }
453: 439 00011E0C # if( halt_flg )
454: 440 00011E0C L272:
455: 441 00011E0C 5d effffffc02 tstl _halt_flg
456: 442 00011E12 31 09 jeql L281
457: 443 00011E14 # tstf_er_halt( BAD_REG_HLT ); /* halt on error */
458: 444 00011E14 dd 02 pushl $2
459: 445 00011E16 fe 08 ef000004ef callf $8,_tstf_er_halt
460: 446 00011E1D # if( loop_on_err ) {
461: 447 00011E1D L281:
462: 448 00011E1D 5d effffffbf1 tstl _loop_on_err
463: 449 00011E23 31 0a jeql L282
464: 450 00011E25 # force_loop = TRUE; /* set force loop flag */
465: 451 00011E25 0d 01 effffffbe8 movl $1,_force_loop
466: 452 00011E2C # asm("brw _tstf_2_lp1"); /* loop on the error */
467: 453 00011E2C 13 fea1 brw _tstf_2_lp1
468: 454 00011E2F # } /* end of loop on error */
469: 455 00011E2F # } /* end of register corruption error */
470: 456 00011E2F L282:
471: 457 00011E2F # } /* end of initial PSL WHILE loop */
472: 458 00011E2F L271:
473: 459 00011E2F L265:
474: 460 00011E2F 6d effffffbdf incl _status_index
475: 461 00011E35 13 fe79 jbr L267
476: 462 00011E38 L266:
477: 463 00011E38 # } /* end of tstf data WHILE loop */
478: 464 00011E38 L262:
479: 465 00011E38 6d effffffbd6 incl _index
480: 466 00011E3E 13 fe2e jbr L264
481: 467 00011E41 L263:
482: 468 00011E41 # } /* end of subtest 2 */
483: 469 00011E41 40 ret#2
484: 470 00011E42 .set L257,0x0
485: 471 00011E42 L259:
486: 472 00011E42 13 fe0a jbr L260
487: 473 00011E45 .data
488: 474 000009a4 * .text
489: 475 00011E45 00 .align 1
490: 476 00011E46 .globl _tstf_3
491: 477 00011E46 _tstf_3:
492: 478 00011E46 0000 .word L283
493: 479 00011E48 #
494: 480 00011E48 #
495: 481 00011E48 #
496: 482 00011E48 #
497: 483 00011E48 # /************************************************************************
498: 484 00011E48 # *
499: 485 00011E48 # * SUBTEST 3 - Check for accumulator corruption
500: 486 00011E48 # *
501: 487 00011E48 # ************************************************************************/
502: 488 00011E48 # tstf_3()
503: 489 00011E48 # {
504: 490 00011E48 13 0139 jbr L285
505: 491 00011E4B L286:
506: 492 00011E4B # force_loop = FALSE; /* clear force_loop flg */
507: 493 00011E4B 4d effffffbc3 clrl _force_loop
508: 494 00011E51 # subtest = 3;
509: 495 00011E51 0d 03 effffffbbc movl $3,_subtest
510: 496 00011E58 # for( index = 0; index < max_tstf_1_index; index++ ) {
511: 497 00011E58 4d effffffbb6 clrl _index
512: 498 00011E5E L289:
513: 499 00011E5E 1d effffffbb0 effffffbab cmpl _index,_max_tstf_1_index
514: 500 00011E69 91 03 13 0115 jgeq L288
515: 501 00011E6E # sgl_ld_acc = tstf_1_data[index].ld; /* get value to load */
516: 502 00011E6E 0d effffffba0 50 movl _index,r0
517: 503 00011E75 48 03 50 50 shll $3,r0,r0
518: 504 00011E79 0d e000000000 effffffb90 movl _tstf_1_data(r0),_sgl_ld_acc
519: 505 00011E84 # if( sgl_ld_acc & 0x7f800000 )
520: 506 00011E84 3d 8f7f800000 effffffb85 bitl $2139095040,_sgl_ld_acc
521: 507 00011E8F 31 0d jeql L290
522: 508 00011E91 # sgl_expected = sgl_ld_acc; /* the Acc should not change */
523: 509 00011E91 0d effffffb7d effffffb78 movl _sgl_ld_acc,_sgl_expected
524: 510 00011E9C # else
525: 511 00011E9C 11 06 jbr L291
526: 512 00011E9E L290:
527: 513 00011E9E # sgl_expected = 0; /* expect a '0' final Acc */
528: 514 00011E9E 4d effffffb70 clrl _sgl_expected
529: 515 00011EA4 L291:
530: 516 00011EA4 # /*
531: 517 00011EA4 # * If LOOP ON ERROR is set, this is the loop for this subtest.
532: 518 00011EA4 # * The force loop flag is set after the first error.
533: 519 00011EA4 # */
534: 520 00011EA4 # asm("_tstf_3_lp1:");
535: 521 00011EA4 _tstf_3_lp1:
536: 522 00011EA4 # asm("ldf _sgl_ld_acc");
537: 523 00011EA4 06 effffffb6a ldf _sgl_ld_acc
538: 524 00011EAA # asm("nop");
539: 525 00011EAA 10 nop
540: 526 00011EAB # asm("tstf"); /* test the accumulator */
541: 527 00011EAB 56 tstf
542: 528 00011EAC # asm("nop");
543: 529 00011EAC 10 nop
544: 530 00011EAD # asm("stf _sgl_st_acc"); /* save the accumulator */
545: 531 00011EAD 26 effffffb61 stf _sgl_st_acc
546: 532 00011EB3 # if( force_loop )
547: 533 00011EB3 5d effffffb5b tstl _force_loop
548: 534 00011EB9 31 02 jeql L292
549: 535 00011EBB # asm("brb _tstf_3_lp1");; /* loop on the error */
550: 536 00011EBB 11 e7 brb _tstf_3_lp1
551: 537 00011EBD L292:
552: 538 00011EBD # /*
553: 539 00011EBD # * Now compare the stored accumulator to the value that was loaded
554: 540 00011EBD # */
555: 541 00011EBD # if( sgl_st_acc != sgl_expected ) { /* Acc corrupted? */
556: 542 00011EBD 1d effffffb51 effffffb4c cmpl _sgl_st_acc,_sgl_expected
557: 543 00011EC8 21 03 13 00ad jeql L293
558: 544 00011ECD # errcnt++; /* bump error count */
559: 545 00011ECD 6d effffffb41 incl _errcnt
560: 546 00011ED3 # if( prt_error ) {
561: 547 00011ED3 5d effffffb3b tstl _prt_error
562: 548 00011ED9 31 7c jeql L294
563: 549 00011EDB # writes(" \n"); /* start a new line */
564: 550 00011EDB .data 1
565: 551 00000a71 * L295:
566: 552 00000a71 * 200A00 .ascii " \12\0"
567: 553 00000a74 * .text
568: 554 00011EDB dd 8f00000a71 pushl $L295
569: 555 00011EE1 fe 08 effffffb2c callf $8,_writes
570: 556 00011EE8 # writes("cycle: ");
571: 557 00011EE8 .data 1
572: 558 00000a74 * L296:
573: 559 00000a74 * 6379636C653A2000 .ascii "cycle: \0"
574: 560 00000a7c * .text
575: 561 00011EE8 dd 8f00000a74 pushl $L296
576: 562 00011EEE fe 08 effffffb1f callf $8,_writes
577: 563 00011EF5 # writed( cycle );
578: 564 00011EF5 dd effffffb19 pushl _cycle
579: 565 00011EFB fe 08 effffffb12 callf $8,_writed
580: 566 00011F02 # writes(" TSTF test ");
581: 567 00011F02 .data 1
582: 568 00000a7c * L297:
583: 569 00000a7c * 2020545354462074657374200 .ascii " TSTF test \0"
584: 0
585: 570 00000a89 * .text
586: 571 00011F02 dd 8f00000a7c pushl $L297
587: 572 00011F08 fe 08 effffffb05 callf $8,_writes
588: 573 00011F0F # writed( test_no );
589: 574 00011F0F dd effffffaff pushl _test_no
590: 575 00011F15 fe 08 effffffaf8 callf $8,_writed
591: 576 00011F1C # writes(", subtest 3 (Cache Data) - THE ACC WAS MODIFIED\n");
592: 577 00011F1C .data 1
593: 578 00000a89 * L298:
594: 579 00000a89 * 2C20737562746573742033202 .ascii ", subtest 3 (Cache Data) - THE ACC WAS MODIFIED\12\0"
595: 8436163686520446174612920
596: 2D20544845204143432057415
597: 3204D4F4449464945440A00
598: 580 00000aba * .text
599: 581 00011F1C dd 8f00000a89 pushl $L298
600: 582 00011F22 fe 08 effffffaeb callf $8,_writes
601: 583 00011F29 # print_tstf_data(); /* print the operands */
602: 584 00011F29 fe 04 ef0000037e callf $4,_print_tstf_data
603: 585 00011F30 # writes(" expected Acc = ");
604: 586 00011F30 .data 1
605: 587 00000aba * L299:
606: 588 00000aba * 2020202020202020202020202 .ascii " expected Acc = \0"
607: 0202020202020202020657870
608: 656374656420416363203D200
609: 0
610: 589 00000ae0 * .text
611: 590 00011F30 dd 8f00000aba pushl $L299
612: 591 00011F36 fe 08 effffffad7 callf $8,_writes
613: 592 00011F3D # write32h( sgl_expected );
614: 593 00011F3D dd effffffad1 pushl _sgl_expected
615: 594 00011F43 fe 08 effffffaca callf $8,_write32h
616: 595 00011F4A # writes("\n");
617: 596 00011F4A .data 1
618: 597 00000ae0 * L300:
619: 598 00000ae0 * 0A00 .ascii "\12\0"
620: 599 00000ae2 * .text
621: 600 00011F4A dd 8f00000ae0 pushl $L300
622: 601 00011F50 fe 08 effffffabd callf $8,_writes
623: 602 00011F57 # }
624: 603 00011F57 # if( halt_flg )
625: 604 00011F57 L294:
626: 605 00011F57 5d effffffab7 tstl _halt_flg
627: 606 00011F5D 31 09 jeql L301
628: 607 00011F5F # tstf_er_halt( BAD_ACC_HLT ); /* halt on error */
629: 608 00011F5F dd 01 pushl $1
630: 609 00011F61 fe 08 ef000003a4 callf $8,_tstf_er_halt
631: 610 00011F68 # if( loop_on_err ) {
632: 611 00011F68 L301:
633: 612 00011F68 5d effffffaa6 tstl _loop_on_err
634: 613 00011F6E 31 0a jeql L302
635: 614 00011F70 # force_loop = TRUE; /* set force loop flag */
636: 615 00011F70 0d 01 effffffa9d movl $1,_force_loop
637: 616 00011F77 # asm("brw _tstf_3_lp1"); /* loop on the error */
638: 617 00011F77 13 ff2a brw _tstf_3_lp1
639: 618 00011F7A # } /* end of loop on error */
640: 619 00011F7A # } /* end of register corruption error */
641: 620 00011F7A L302:
642: 621 00011F7A # } /* end of tstf data WHILE loop */
643: 622 00011F7A L293:
644: 623 00011F7A L287:
645: 624 00011F7A 6d effffffa94 incl _index
646: 625 00011F80 13 fedb jbr L289
647: 626 00011F83 L288:
648: 627 00011F83 # } /* end of subtest 3 */
649: 628 00011F83 40 ret#2
650: 629 00011F84 .set L283,0x0
651: 630 00011F84 L285:
652: 631 00011F84 13 fec4 jbr L286
653: 632 00011F87 .data
654: 633 000009a4 * .text
655: 634 00011F87 00 .align 1
656: 635 00011F88 .globl _tstf_4
657: 636 00011F88 _tstf_4:
658: 637 00011F88 0000 .word L303
659: 638 00011F8A #
660: 639 00011F8A #
661: 640 00011F8A #
662: 641 00011F8A # /************************************************************************
663: 642 00011F8A # *
664: 643 00011F8A # * SUBTEST 4 - pipelined entry test
665: 644 00011F8A # *
666: 645 00011F8A # ************************************************************************/
667: 646 00011F8A # tstf_4()
668: 647 00011F8A # {
669: 648 00011F8A 13 01dd jbr L305
670: 649 00011F8D L306:
671: 650 00011F8D # force_loop = FALSE;
672: 651 00011F8D 4d effffffa81 clrl _force_loop
673: 652 00011F93 # subtest = 4;
674: 653 00011F93 0d 04 effffffa7a movl $4,_subtest
675: 654 00011F9A # for( index = 0; index < max_tstf_1_index; index++ ) {
676: 655 00011F9A 4d effffffa74 clrl _index
677: 656 00011FA0 L309:
678: 657 00011FA0 1d effffffa6e effffffa69 cmpl _index,_max_tstf_1_index
679: 658 00011FAB 91 03 13 01b9 jgeq L308
680: 659 00011FB0 # sgl_ld_acc = tstf_1_data[index].ld; /* get value to negate */
681: 660 00011FB0 0d effffffa5e 50 movl _index,r0
682: 661 00011FB7 48 03 50 50 shll $3,r0,r0
683: 662 00011FBB 0d e000000000 effffffa4e movl _tstf_1_data(r0),_sgl_ld_acc
684: 663 00011FC6 # sgl_expected = tstf_1_data[index].exp; /* get expected result */
685: 664 00011FC6 0d effffffa48 50 movl _index,r0
686: 665 00011FCD 48 03 50 50 shll $3,r0,r0
687: 666 00011FD1 0d e000000004 effffffa38 movl _tstf_1_data+4(r0),_sgl_expected
688: 667 00011FDC # for( status_index = 0; status_index < 3; status_index++ ) {
689: 668 00011FDC 4d effffffa32 clrl _status_index
690: 669 00011FE2 L312:
691: 670 00011FE2 1d effffffa2c 03 cmpl _status_index,$3
692: 671 00011FE9 91 03 13 0172 jgeq L311
693: 672 00011FEE # sgl_dummy1 = status_array[status_index]; /* status = +,-,0 */
694: 673 00011FEE 0d effffffa20 50 movl _status_index,r0
695: 674 00011FF5 0d 40effffffa18 movl _status_array[r0],_sgl_dummy1
696: effffffa13
697: 675 00012001 # /*
698: 676 00012001 # * If LOOP ON ERROR is set, this is the loop for this subtest.
699: 677 00012001 # * The force loop flag is set after the first error.
700: 678 00012001 # */
701: 679 00012001 # asm("_tstf_4_lp1:");
702: 680 00012001 _tstf_4_lp1:
703: 681 00012001 # asm("ldf $0"); /* load Acc. with 0.0 */
704: 682 00012001 06 8f00000000 ldf $0
705: 683 00012007 # asm("tstl _sgl_dummy1"); /* set the PSL status */
706: 684 00012007 5d effffffa07 tstl _sgl_dummy1
707: 685 0001200D # asm("movpsl _init_psl"); /* save initial PSL */
708: 686 0001200D cd effffffa01 movpsl _init_psl
709: 687 00012013 # asm("addf _sgl_ld_acc"); /* add the value */
710: 688 00012013 c6 effffff9fb addf _sgl_ld_acc
711: 689 00012019 # asm("tstf"); /* test accumulator */
712: 690 00012019 56 tstf
713: 691 0001201A # asm("movpsl _psl_val"); /* save final PSL */
714: 692 0001201A cd effffff9f4 movpsl _psl_val
715: 693 00012020 # asm("stf _sgl_st_acc"); /* store the result */
716: 694 00012020 26 effffff9ee stf _sgl_st_acc
717: 695 00012026 # if( force_loop )
718: 696 00012026 5d effffff9e8 tstl _force_loop
719: 697 0001202C 31 02 jeql L313
720: 698 0001202E # asm("brb _tstf_4_lp1");; /* loop on the error */
721: 699 0001202E 11 d1 brb _tstf_4_lp1
722: 700 00012030 L313:
723: 701 00012030 # /*
724: 702 00012030 # * end error loop - test the results
725: 703 00012030 # */
726: 704 00012030 # exp_psl = init_psl; /* get initial PSL */
727: 705 00012030 0d effffff9de effffff9d9 movl _init_psl,_exp_psl
728: 706 0001203B # exp_psl &= 0xfffffff3; /* clear ZERO, NEGATIVE */
729: 707 0001203B ac 88f3 effffff9d1 andl2 $-13,_exp_psl
730: 708 00012043 # if( sgl_expected == ZERO )
731: 709 00012043 1d effffff9cb 04 cmpl _sgl_expected,$4
732: 710 0001204A 21 07 jneq L314
733: 711 0001204C # exp_psl |= PSL_Z; /* expect ZERO bit set */
734: 712 0001204C 8c 04 effffff9c1 orl2 $4,_exp_psl
735: 713 00012053 # if( sgl_expected == NEGATIVE )
736: 714 00012053 L314:
737: 715 00012053 1d effffff9bb 08 cmpl _sgl_expected,$8
738: 716 0001205A 21 07 jneq L315
739: 717 0001205C # exp_psl |= PSL_N; /* expect NEG bit set */
740: 718 0001205C 8c 08 effffff9b1 orl2 $8,_exp_psl
741: 719 00012063 # if( psl_val != exp_psl ) {
742: 720 00012063 L315:
743: 721 00012063 1d effffff9ab effffff9a6 cmpl _psl_val,_exp_psl
744: 722 0001206E 21 03 13 00e4 jeql L316
745: 723 00012073 # errcnt++; /* bump the error count */
746: 724 00012073 6d effffff99b incl _errcnt
747: 725 00012079 # if( prt_error ) {
748: 726 00012079 5d effffff995 tstl _prt_error
749: 727 0001207F 21 03 13 00b0 jeql L317
750: 728 00012084 # writes(" \n"); /* start new print line */
751: 729 00012084 .data 1
752: 730 00000ae2 * L318:
753: 731 00000ae2 * 200A00 .ascii " \12\0"
754: 732 00000ae5 * .text
755: 733 00012084 dd 8f00000ae2 pushl $L318
756: 734 0001208A fe 08 effffff983 callf $8,_writes
757: 735 00012091 # writes("cycle: ");
758: 736 00012091 .data 1
759: 737 00000ae5 * L319:
760: 738 00000ae5 * 6379636C653A2000 .ascii "cycle: \0"
761: 739 00000aed * .text
762: 740 00012091 dd 8f00000ae5 pushl $L319
763: 741 00012097 fe 08 effffff976 callf $8,_writes
764: 742 0001209E # writed( cycle );
765: 743 0001209E dd effffff970 pushl _cycle
766: 744 000120A4 fe 08 effffff969 callf $8,_writed
767: 745 000120AB # writes(" TSTF test ");
768: 746 000120AB .data 1
769: 747 00000aed * L320:
770: 748 00000aed * 2020545354462074657374200 .ascii " TSTF test \0"
771: 0
772: 749 00000afa * .text
773: 750 000120AB dd 8f00000aed pushl $L320
774: 751 000120B1 fe 08 effffff95c callf $8,_writes
775: 752 000120B8 # writed( test_no );
776: 753 000120B8 dd effffff956 pushl _test_no
777: 754 000120BE fe 08 effffff94f callf $8,_writed
778: 755 000120C5 # writes(
779: 756 000120C5 # ", subtest 4 (Piped Entry) -BAD FINAL PSL\n");
780: 757 000120C5 .data 1
781: 758 00000afa * L321:
782: 759 00000afa * 2C20737562746573742034202 .ascii ", subtest 4 (Piped Entry) -BAD FINAL PSL\12\0"
783: 8506970656420456E74727929
784: 202D4241442046494E414C205
785: 0534C0A00
786: 760 00000b24 * .text
787: 761 000120C5 dd 8f00000afa pushl $L321
788: 762 000120CB fe 08 effffff942 callf $8,_writes
789: 763 000120D2 # print_tstf_data(); /* print operands */
790: 764 000120D2 fe 04 ef000001d5 callf $4,_print_tstf_data
791: 765 000120D9 # writes("initial PSL = ");
792: 766 000120D9 .data 1
793: 767 00000b24 * L322:
794: 768 00000b24 * 696E697469616C2050534C203 .ascii "initial PSL = \0"
795: D2000
796: 769 00000b33 * .text
797: 770 000120D9 dd 8f00000b24 pushl $L322
798: 771 000120DF fe 08 effffff92e callf $8,_writes
799: 772 000120E6 # write32h( init_psl );
800: 773 000120E6 dd effffff928 pushl _init_psl
801: 774 000120EC fe 08 effffff921 callf $8,_write32h
802: 775 000120F3 # writes(", final PSL = ");
803: 776 000120F3 .data 1
804: 777 00000b33 * L323:
805: 778 00000b33 * 2C202066696E616C2050534C2 .ascii ", final PSL = \0"
806: 03D2000
807: 779 00000b43 * .text
808: 780 000120F3 dd 8f00000b33 pushl $L323
809: 781 000120F9 fe 08 effffff914 callf $8,_writes
810: 782 00012100 # write32h( psl_val );
811: 783 00012100 dd effffff90e pushl _psl_val
812: 784 00012106 fe 08 effffff907 callf $8,_write32h
813: 785 0001210D # writes(", expected PSL = ");
814: 786 0001210D .data 1
815: 787 00000b43 * L324:
816: 788 00000b43 * 2C20657870656374656420505 .ascii ", expected PSL = \0"
817: 34C203D2000
818: 789 00000b55 * .text
819: 790 0001210D dd 8f00000b43 pushl $L324
820: 791 00012113 fe 08 effffff8fa callf $8,_writes
821: 792 0001211A # write32h( exp_psl );
822: 793 0001211A dd effffff8f4 pushl _exp_psl
823: 794 00012120 fe 08 effffff8ed callf $8,_write32h
824: 795 00012127 # writes("\n");
825: 796 00012127 .data 1
826: 797 00000b55 * L325:
827: 798 00000b55 * 0A00 .ascii "\12\0"
828: 799 00000b57 * .text
829: 800 00012127 dd 8f00000b55 pushl $L325
830: 801 0001212D fe 08 effffff8e0 callf $8,_writes
831: 802 00012134 # }
832: 803 00012134 # if( halt_flg )
833: 804 00012134 L317:
834: 805 00012134 5d effffff8da tstl _halt_flg
835: 806 0001213A 31 09 jeql L326
836: 807 0001213C # tstf_er_halt( BAD_PSL_HLT ); /* halt on error */
837: 808 0001213C dd 03 pushl $3
838: 809 0001213E fe 08 ef000001c7 callf $8,_tstf_er_halt
839: 810 00012145 # if( loop_on_err ) {
840: 811 00012145 L326:
841: 812 00012145 5d effffff8c9 tstl _loop_on_err
842: 813 0001214B 31 0a jeql L327
843: 814 0001214D # force_loop = TRUE; /* set loop flag */
844: 815 0001214D 0d 01 effffff8c0 movl $1,_force_loop
845: 816 00012154 # asm("brw _tstf_4_lp1"); /* loop on error */
846: 817 00012154 13 feaa brw _tstf_4_lp1
847: 818 00012157 # } /* end of loop on error */
848: 819 00012157 # } /* end of PSL corruption error */
849: 820 00012157 L327:
850: 821 00012157 # } /* end of status WHILE loop */
851: 822 00012157 L316:
852: 823 00012157 L310:
853: 824 00012157 6d effffff8b7 incl _status_index
854: 825 0001215D 13 fe82 jbr L312
855: 826 00012160 L311:
856: 827 00012160 # } /* end of data WHILE loop */
857: 828 00012160 L307:
858: 829 00012160 6d effffff8ae incl _index
859: 830 00012166 13 fe37 jbr L309
860: 831 00012169 L308:
861: 832 00012169 # } /* end of subtest 4 */
862: 833 00012169 40 ret#2
863: 834 0001216A .set L303,0x0
864: 835 0001216A L305:
865: 836 0001216A 13 fe20 jbr L306
866: 837 0001216D .data
867: 838 000009a4 * .text
868: 839 0001216D 00 .align 1
869: 840 0001216E .globl _tstf_5
870: 841 0001216E _tstf_5:
871: 842 0001216E 0000 .word L328
872: 843 00012170 #
873: 844 00012170 #
874: 845 00012170 #
875: 846 00012170 # /************************************************************************
876: 847 00012170 # *
877: 848 00012170 # * SUBTEST 5 - pipelined exit test
878: 849 00012170 # *
879: 850 00012170 # ************************************************************************/
880: 851 00012170 # tstf_5()
881: 852 00012170 # {
882: 853 00012170 13 0138 jbr L330
883: 854 00012173 L331:
884: 855 00012173 # force_loop = FALSE;
885: 856 00012173 4d effffff89b clrl _force_loop
886: 857 00012179 # subtest = 5;
887: 858 00012179 0d 05 effffff894 movl $5,_subtest
888: 859 00012180 # for( index = 0; index < max_tstf_1_index; index++ ) {
889: 860 00012180 4d effffff88e clrl _index
890: 861 00012186 L334:
891: 862 00012186 1d effffff888 effffff883 cmpl _index,_max_tstf_1_index
892: 863 00012191 91 03 13 0114 jgeq L333
893: 864 00012196 # sgl_ld_acc = tstf_1_data[index].ld; /* get value to test */
894: 865 00012196 0d effffff878 50 movl _index,r0
895: 866 0001219D 48 03 50 50 shll $3,r0,r0
896: 867 000121A1 0d e000000000 effffff868 movl _tstf_1_data(r0),_sgl_ld_acc
897: 868 000121AC # if( sgl_ld_acc & 0x7f800000 )
898: 869 000121AC 3d 8f7f800000 effffff85d bitl $2139095040,_sgl_ld_acc
899: 870 000121B7 31 0d jeql L335
900: 871 000121B9 # sgl_expected = sgl_ld_acc; /* the Acc should not change */
901: 872 000121B9 0d effffff855 effffff850 movl _sgl_ld_acc,_sgl_expected
902: 873 000121C4 # else
903: 874 000121C4 11 06 jbr L336
904: 875 000121C6 L335:
905: 876 000121C6 # sgl_expected = 0; /* expect a '0' final Acc */
906: 877 000121C6 4d effffff848 clrl _sgl_expected
907: 878 000121CC L336:
908: 879 000121CC # /*
909: 880 000121CC # * If LOOP ON ERROR is set, this is the loop for this subtest.
910: 881 000121CC # * The force loop flag is set after the first error.
911: 882 000121CC # */
912: 883 000121CC # asm("_tstf_5_lp1:");
913: 884 000121CC _tstf_5_lp1:
914: 885 000121CC # asm("movl $0,r0"); /* clear r0 */
915: 886 000121CC 0d 00 50 movl $0,r0
916: 887 000121CF # asm("ldf _sgl_ld_acc"); /* load the value */
917: 888 000121CF 06 effffff83f ldf _sgl_ld_acc
918: 889 000121D5 # asm("tstf"); /* test the accumulator */
919: 890 000121D5 56 tstf
920: 891 000121D6 # asm("addf r0"); /* add a zero */
921: 892 000121D6 c6 50 addf r0
922: 893 000121D8 # asm("stf _sgl_st_acc"); /* store the result */
923: 894 000121D8 26 effffff836 stf _sgl_st_acc
924: 895 000121DE # if( force_loop )
925: 896 000121DE 5d effffff830 tstl _force_loop
926: 897 000121E4 31 02 jeql L337
927: 898 000121E6 # asm("brb _tstf_5_lp1");; /* loop on the error */
928: 899 000121E6 11 e4 brb _tstf_5_lp1
929: 900 000121E8 L337:
930: 901 000121E8 # /*
931: 902 000121E8 # * end error loop - test the results
932: 903 000121E8 # */
933: 904 000121E8 # if( sgl_st_acc != sgl_expected ) { /* COMPARE the values */
934: 905 000121E8 1d effffff826 effffff821 cmpl _sgl_st_acc,_sgl_expected
935: 906 000121F3 21 03 13 00a9 jeql L338
936: 907 000121F8 # errcnt++; /* bump the error count */
937: 908 000121F8 6d effffff816 incl _errcnt
938: 909 000121FE # if( prt_error ) {
939: 910 000121FE 5d effffff810 tstl _prt_error
940: 911 00012204 31 78 jeql L339
941: 912 00012206 # writes(" \n"); /* start a new print line */
942: 913 00012206 .data 1
943: 914 00000b57 * L340:
944: 915 00000b57 * 200A00 .ascii " \12\0"
945: 916 00000b5a * .text
946: 917 00012206 dd 8f00000b57 pushl $L340
947: 918 0001220C fe 08 effffff801 callf $8,_writes
948: 919 00012213 # writes("cycle: ");
949: 920 00012213 .data 1
950: 921 00000b5a * L341:
951: 922 00000b5a * 6379636C653A2000 .ascii "cycle: \0"
952: 923 00000b62 * .text
953: 924 00012213 dd 8f00000b5a pushl $L341
954: 925 00012219 fe 08 effffff7f4 callf $8,_writes
955: 926 00012220 # writed( cycle );
956: 927 00012220 dd effffff7ee pushl _cycle
957: 928 00012226 fe 08 effffff7e7 callf $8,_writed
958: 929 0001222D # writes(" TSTF test ");
959: 930 0001222D .data 1
960: 931 00000b62 * L342:
961: 932 00000b62 * 2020545354462074657374200 .ascii " TSTF test \0"
962: 0
963: 933 00000b6f * .text
964: 934 0001222D dd 8f00000b62 pushl $L342
965: 935 00012233 fe 08 effffff7da callf $8,_writes
966: 936 0001223A # writed( test_no );
967: 937 0001223A dd effffff7d4 pushl _test_no
968: 938 00012240 fe 08 effffff7cd callf $8,_writed
969: 939 00012247 # writes(
970: 940 00012247 # ", subtest 5 (Piped Exit) - BAD FINAL ACC\n");
971: 941 00012247 .data 1
972: 942 00000b6f * L343:
973: 943 00000b6f * 2C20737562746573742035202 .ascii ", subtest 5 (Piped Exit) - BAD FINAL ACC\12\0"
974: 8506970656420457869742920
975: 2D204241442046494E414C204
976: 143430A00
977: 944 00000b99 * .text
978: 945 00012247 dd 8f00000b6f pushl $L343
979: 946 0001224D fe 08 effffff7c0 callf $8,_writes
980: 947 00012254 # print_tstf_data();
981: 948 00012254 fe 04 ef00000053 callf $4,_print_tstf_data
982: 949 0001225B # writes(" expected Acc = ");
983: 950 0001225B .data 1
984: 951 00000b99 * L344:
985: 952 00000b99 * 2020202020202020202020202 .ascii " expected Acc = \0"
986: 0202020202020202020657870
987: 656374656420416363203D200
988: 0
989: 953 00000bbf * .text
990: 954 0001225B dd 8f00000b99 pushl $L344
991: 955 00012261 fe 08 effffff7ac callf $8,_writes
992: 956 00012268 # write32h( sgl_expected );
993: 957 00012268 dd effffff7a6 pushl _sgl_expected
994: 958 0001226E fe 08 effffff79f callf $8,_write32h
995: 959 00012275 # writec('\n');
996: 960 00012275 dd 0a pushl $10
997: 961 00012277 fe 08 effffff796 callf $8,_writec
998: 962 0001227E # }
999: 963 0001227E # if( halt_flg )
1000: 964 0001227E L339:
1001: 965 0001227E 5d effffff790 tstl _halt_flg
1002: 966 00012284 31 09 jeql L346
1003: 967 00012286 # tstf_er_halt( BAD_ACC_HLT ); /* halt on the error */
1004: 968 00012286 dd 01 pushl $1
1005: 969 00012288 fe 08 ef0000007d callf $8,_tstf_er_halt
1006: 970 0001228F # if( loop_on_err ) {
1007: 971 0001228F L346:
1008: 972 0001228F 5d effffff77f tstl _loop_on_err
1009: 973 00012295 31 0a jeql L347
1010: 974 00012297 # force_loop = TRUE; /* set the force loop flag */
1011: 975 00012297 0d 01 effffff776 movl $1,_force_loop
1012: 976 0001229E # asm("brw _tstf_5_lp1"); /* and loop on the error */
1013: 977 0001229E 13 ff2b brw _tstf_5_lp1
1014: 978 000122A1 # } /* end of loop on error */
1015: 979 000122A1 # } /* end of compare error */
1016: 980 000122A1 L347:
1017: 981 000122A1 # } /* end of WHILE loop */
1018: 982 000122A1 L338:
1019: 983 000122A1 L332:
1020: 984 000122A1 6d effffff76d incl _index
1021: 985 000122A7 13 fedc jbr L334
1022: 986 000122AA L333:
1023: 987 000122AA # } /* end of subtest 5 */
1024: 988 000122AA 40 ret#2
1025: 989 000122AB .set L328,0x0
1026: 990 000122AB L330:
1027: 991 000122AB 13 fec5 jbr L331
1028: 992 000122AE .data
1029: 993 000009a4 * .text
1030: 994 000122AE .align 1
1031: 995 000122AE .globl _print_tstf_data
1032: 996 000122AE _print_tstf_data:
1033: 997 000122AE 0000 .word L348
1034: 998 000122B0 #
1035: 999 000122B0 #
1036: 1000 000122B0 #
1037: 1001 000122B0 # /**************************************************************************
1038: 1002 000122B0 # *
1039: 1003 000122B0 # * PRINT THE DATA AND STORE RESULTS
1040: 1004 000122B0 # *
1041: 1005 000122B0 # * initial Acc = xxxxxxxx, final Acc = xxxxxxxx, data index = xx
1042: 1006 000122B0 # **************************************************************************/
1043: 1007 000122B0 # print_tstf_data()
1044: 1008 000122B0 # {
1045: 1009 000122B0 11 58 jbr L350
1046: 1010 000122B2 L351:
1047: 1011 000122B2 # writes("initial Acc = ");
1048: 1012 000122B2 .data 1
1049: 1013 00000bbf * L352:
1050: 1014 00000bbf * 696E697469616C20416363203 .ascii "initial Acc = \0"
1051: D2000
1052: 1015 00000bce * .text
1053: 1016 000122B2 dd 8f00000bbf pushl $L352
1054: 1017 000122B8 fe 08 effffff755 callf $8,_writes
1055: 1018 000122BF # write32h( sgl_ld_acc );
1056: 1019 000122BF dd effffff74f pushl _sgl_ld_acc
1057: 1020 000122C5 fe 08 effffff748 callf $8,_write32h
1058: 1021 000122CC # writes(", final Acc = ");
1059: 1022 000122CC .data 1
1060: 1023 00000bce * L353:
1061: 1024 00000bce * 2C202066696E616C204163632 .ascii ", final Acc = \0"
1062: 03D2000
1063: 1025 00000bde * .text
1064: 1026 000122CC dd 8f00000bce pushl $L353
1065: 1027 000122D2 fe 08 effffff73b callf $8,_writes
1066: 1028 000122D9 # write32h( sgl_st_acc );
1067: 1029 000122D9 dd effffff735 pushl _sgl_st_acc
1068: 1030 000122DF fe 08 effffff72e callf $8,_write32h
1069: 1031 000122E6 # writes(", data index = ");
1070: 1032 000122E6 .data 1
1071: 1033 00000bde * L354:
1072: 1034 00000bde * 2C2020206461746120696E646 .ascii ", data index = \0"
1073: 578203D2000
1074: 1035 00000bf0 * .text
1075: 1036 000122E6 dd 8f00000bde pushl $L354
1076: 1037 000122EC fe 08 effffff721 callf $8,_writes
1077: 1038 000122F3 # writed( index );
1078: 1039 000122F3 dd effffff71b pushl _index
1079: 1040 000122F9 fe 08 effffff714 callf $8,_writed
1080: 1041 00012300 # writec('\n');
1081: 1042 00012300 dd 0a pushl $10
1082: 1043 00012302 fe 08 effffff70b callf $8,_writec
1083: 1044 00012309 # }
1084: 1045 00012309 40 ret#2
1085: 1046 0001230A .set L348,0x0
1086: 1047 0001230A L350:
1087: 1048 0001230A 11 a6 jbr L351
1088: 1049 0001230C .data
1089: 1050 000009a4 * .text
1090: 1051 0001230C .align 1
1091: 1052 0001230C .globl _tstf_er_halt
1092: 1053 0001230C _tstf_er_halt:
1093: 1054 0001230C 0000 .word L355
1094: 1055 0001230E #
1095: 1056 0001230E #
1096: 1057 0001230E #
1097: 1058 0001230E # /**************************************************************************
1098: 1059 0001230E # *
1099: 1060 0001230E # * HALT ON ERROR ROUTINE
1100: 1061 0001230E # *
1101: 1062 0001230E # **************************************************************************/
1102: 1063 0001230E # tstf_er_halt( halt_code )
1103: 1064 0001230E # int halt_code;
1104: 1065 0001230E # {
1105: 1066 0001230E 13 00a1 jbr L357
1106: 1067 00012311 L358:
1107: 1068 00012311 # sgl_dummy1 = halt_code; /* get the error type */
1108: 1069 00012311 0d ad04 effffff6fb movl 4(fp),_sgl_dummy1
1109: 1070 00012319 # asm("movl _test_no,r0"); /* r0 = test number */
1110: 1071 00012319 0d effffff6f5 50 movl _test_no,r0
1111: 1072 00012320 # asm("movl _subtest,r1"); /* r1 = subtest number */
1112: 1073 00012320 0d effffff6ee 51 movl _subtest,r1
1113: 1074 00012327 # asm("movl _sgl_dummy1,r2"); /* r2 = error code */
1114: 1075 00012327 0d effffff6e7 52 movl _sgl_dummy1,r2
1115: 1076 0001232E # asm("movl _cycle,r3"); /* r3 = cycle count */
1116: 1077 0001232E 0d effffff6e0 53 movl _cycle,r3
1117: 1078 00012335 # asm("movl _sgl_ld_acc,r4"); /* r4 = initial data */
1118: 1079 00012335 0d effffff6d9 54 movl _sgl_ld_acc,r4
1119: 1080 0001233C # asm("movl _psl_val,r5"); /* r5 = final PSL */
1120: 1081 0001233C 0d effffff6d2 55 movl _psl_val,r5
1121: 1082 00012343 # if( halt_code == BAD_ACC_HLT ) {
1122: 1083 00012343 1d ad04 01 cmpl 4(fp),$1
1123: 1084 00012347 21 10 jneq L359
1124: 1085 00012349 # asm("movl _sgl_st_acc,r6"); /* r6 = actual value */
1125: 1086 00012349 0d effffff6c5 56 movl _sgl_st_acc,r6
1126: 1087 00012350 # asm("movl _sgl_expected,r7"); /* r7 = expected value */
1127: 1088 00012350 0d effffff6be 57 movl _sgl_expected,r7
1128: 1089 00012357 # } else
1129: 1090 00012357 11 57 jbr L360
1130: 1091 00012359 L359:
1131: 1092 00012359 # if( halt_code == BAD_REG_HLT ) {
1132: 1093 00012359 1d ad04 02 cmpl 4(fp),$2
1133: 1094 0001235D 21 3d jneq L361
1134: 1095 0001235F # sgl_dummy1 = load_regs[index2];
1135: 1096 0001235F 0d effffff6af 50 movl _index2,r0
1136: 1097 00012366 0d 40effffff6a7 movl _load_regs[r0],_sgl_dummy1
1137: effffff6a2
1138: 1098 00012372 # sgl_dummy2 = store_regs[index2];
1139: 1099 00012372 0d effffff69c 50 movl _index2,r0
1140: 1100 00012379 0d 40effffff694 movl _store_regs[r0],_sgl_dummy2
1141: effffff68f
1142: 1101 00012385 # asm("movl _index2,r6"); /* r6 = bad register # */
1143: 1102 00012385 0d effffff689 56 movl _index2,r6
1144: 1103 0001238C # asm("movl _sgl_dummy2,r7"); /* r7 = actual value */
1145: 1104 0001238C 0d effffff682 57 movl _sgl_dummy2,r7
1146: 1105 00012393 # asm("movl _sgl_dummy1,r8"); /* r8 = expected value */
1147: 1106 00012393 0d effffff67b 58 movl _sgl_dummy1,r8
1148: 1107 0001239A # } else
1149: 1108 0001239A 11 14 jbr L362
1150: 1109 0001239C L361:
1151: 1110 0001239C # if( halt_code == BAD_PSL_HLT ) {
1152: 1111 0001239C 1d ad04 03 cmpl 4(fp),$3
1153: 1112 000123A0 21 0e jneq L363
1154: 1113 000123A2 # asm("movl _exp_psl,r6"); /* r6 = expected PSL */
1155: 1114 000123A2 0d effffff66c 56 movl _exp_psl,r6
1156: 1115 000123A9 # asm("movl _index,r7"); /* r7 = data index */
1157: 1116 000123A9 0d effffff665 57 movl _index,r7
1158: 1117 000123B0 # };
1159: 1118 000123B0 L363:
1160: 1119 000123B0 L362:
1161: 1120 000123B0 L360:
1162: 1121 000123B0 # asm("halt"); /* HALT ... */
1163: 1122 000123B0 00 halt
1164: 1123 000123B1 # }
1165: 1124 000123B1 40 ret#2
1166: 1125 000123B2 .set L355,0x0
1167: 1126 000123B2 L357:
1168: 1127 000123B2 13 ff5c jbr L358
1169: 1128 000123B5 .data
1170: 1128 00023DC9 .data
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.