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1.1 root 1: /* 1.1.1.2 ! root 2: This routine locate the error at the board level based on 3 possible ! 3: configurations set in OPTIONS: ! 4: - bit 4 reset: 1Mb boards only, numbered 0-n ! 5: - bit 4 set: 4Mb boards only, numbered 0-n ! 6: - bit 5 set: 20 Mb of "mixed" boards configured as: ! 7: boards 0-3 => 4 4Mb boards, addr 00-16 Mb ! 8: boards 4-7 => 4 1Mb boards, addr 17-20 Mb 1.1 root 9: */ 10: #include "definitions" 11: extern struct OPTIONS OPTIONS; 12: 13: extern long maxmem,endprog,scb; 14: extern long eccloc(), cycle,test_no,errcnt; 15: extern long loop_flg,hlt_flg,prt_flg; 16: 17: extern struct tmp_mcbr{ 18: unsigned :2; 19: unsigned syndrome :7; 20: unsigned chk_bits :7; 21: unsigned :14; 22: unsigned versabus_type :2; 23: } tmp_mcbr; 24: 25: extern struct tmp_mear{ 26: unsigned mear :16; 27: unsigned :10; 28: unsigned ber :1; 29: unsigned erm :1; 30: unsigned axe :1; 31: unsigned err_code :3; 32: } tmp_mear; 33: 34: struct mcbr{ 35: unsigned :18; 36: unsigned synd_bits :7; 37: unsigned check_bits :7; 38: }; 39: 40: struct mer{ 41: unsigned :16; 42: unsigned :10; 43: unsigned ber :1; 44: unsigned erm :1; 45: unsigned axe :1; 46: unsigned err_code :3; 47: }; 48: 49: struct mcr{ 50: unsigned :16; 51: unsigned err_count : 8; 52: unsigned clr_error : 1; 53: unsigned clr_count : 1; 54: unsigned init : 1; 55: unsigned : 1; 56: unsigned diag_read : 1; 57: unsigned diag_writ : 1; 58: unsigned correction : 1; /* Enable Error Correction */ 59: unsigned detection : 1; /* Enable Error Detection */ 60: }; 61: 62: long *CPCR = (long *)0xffffb028; /* Ptr to CP Control register */ 63: 64: 65: locate(addr,exp,act) 66: long addr,exp,act; 67: { 68: long intl, board,b1, bank; 69: register struct mcr *MCR = (struct mcr *)0xffffb000; 70: register struct mer *MER = (struct mer *)0xffffb020; 71: register struct mcbr *MCBR = (struct mcbr *)0xffffb008; 1.1.1.2 ! root 72: if(OPTIONS.mixed) { ! 73: if(( addr & 0x3fffffff ) <= 0x00ffffff ) { ! 74: if (!(loc4mb(addr,&board,&bank,&intl))) ! 75: return(0); } ! 76: else { ! 77: if (!(locboard(addr,&board,&bank,&intl))) ! 78: return(0); ! 79: else ! 80: board = ( board - 16 ) + 4; ! 81: /* - 16 + 4 => 4x4 Mb in 4 boards 0-3 ( locboard assumes n 1Mb boards 0-n) */ ! 82: } ! 83: } ! 84: else { 1.1 root 85: 86: if(OPTIONS.fourmb) { 87: if (!(loc4mb(addr,&board,&bank,&intl))) 88: return(0); } 89: else { 90: if (!(locboard(addr,&board,&bank,&intl))) 91: return(0); } 1.1.1.2 ! root 92: } 1.1 root 93: intl = *CPCR & 3; /* Read Memory Interleave status */ 94: if (intl) { 95: if (intl==1) intl=2; 96: else intl = 4; 97: } 98: writes("\n"); writed(intl);writes(" ways interleave."); 99: writes("\nBoard # "); writed(board); 100: writes(", Bank # "); writed(bank,1); 101: writes("\nIC number(s) : "); 102: locic(bank,exp,act); 103: } 104: 105: char *names[4] = { 106: " U7"," U5"," U3"," U1" 107: }; 108: 109: locic(bk,exp,act) 110: long bk, exp, act; 111: { register long ix, bad, bit, b2; 112: char *this, str[4]; 113: 114: for(ix=0;ix<3;ix++) str[ix] = names[bk][ix]; 115: str[3] = '\0'; 116: this = str; 117: bad = exp ^ act; /* Exclusive OR */ 118: bit = 1; 119: writes("\n"); 120: for(ix=0;ix<32; ix++, bit <<= 1) { 121: if (ix == 16) this[2]++; /* Second row */ 122: if (bad & bit) { 123: /* Bit in error */ 124: b2 = ix; 125: if (ix > 15) b2 = ix-16; 126: writes(this); 127: b2 += 2; 128: if (b2 >= 10) { writes("1"); 129: b2 -= 10; 130: } 131: else writes("0"); 132: pt_hex(b2,1); 133: } 134: } 135: writes("\n"); 136: } 137: /* 1.1.1.2 ! root 138: locate board and bank for 1 mbyte memory array in n 1Mb boards 0-n 1.1 root 139: */ 140: locboard(addr,board,bank,intl) 141: long addr; 142: long *board, *bank,*intl; 143: { 144: register long inl, b1; 145: writes("\n1 mb"); 146: inl = *CPCR & 3; /* Read Memory Interleave status */ 147: *intl = inl; 148: if (inl==2) { 149: writes("\nInvalid memory interleave status : "); 150: writeh(inl); 151: return(0); } 152: if (!inl) { 153: /* Non_interleave */ 154: *board = (addr & 0x3ff00000) >> 20; 155: *bank = (addr & 0xc0000) >> 18; 156: } 157: else { 158: if (inl==1) { 159: /* 2 ways interleave */ 160: *board = (addr & 0x3fd00000) >> 20; 161: b1 = (addr & 0x4) >> 2; 162: *board |= b1; 163: *bank = (addr & 0x180000) >> 19; 164: *intl = 2; 165: } 166: else { 167: /* 4 ways interleave */ 168: *board = (addr & 0x3fc00000) >> 20; 169: b1 = (addr & 0xc) >> 2; 170: *board |= b1; 171: *bank = (addr & 0x300000) >> 20; 172: *intl = 4; 173: } 174: } 175: return(1); 176: } 177: /* 1.1.1.2 ! root 178: locate board and bank for 4 mbyte memory array in n 4Mb boards 0-n 1.1 root 179: */ 180: loc4mb(addr,board,bank,intl) 181: long addr; 182: long *board, *bank,*intl; 183: { 184: register long inl, b1; 185: writes("\n4 mb"); 186: 187: inl = *CPCR & 3; /* Read Memory Interleave status */ 188: *intl = inl; 189: if (inl==2) { 190: writes("\nInvalid memory interleave status : "); 191: writeh(inl); 192: return(0); } 193: if (!inl) { 194: /* Non_interleave */ 195: *board = (addr & 0x3fc00000) >> 22; 196: *bank = (addr & 0x300000) >> 20; 197: } 198: else { 199: if (inl==1) { 200: /* 2 ways interleave */ 201: *board = (addr & 0x3f800000) >> 22; 202: b1 = (addr & 0x4) >> 2; 203: *board |= b1; 204: *bank = (addr & 0x600000) >> 21; 205: *intl = 2; 206: } 207: else { 208: /* 4 ways interleave */ 209: *board = (addr & 0x3f000000) >> 22; 210: b1 = (addr & 0xc) >> 2; 211: *board |= b1; 212: *bank = (addr & 0xc00000) >> 22; 213: *intl = 4; 214: } 215: } 216: return(1); 217: }
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