![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to ac_prot.s CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / memman|
Return to ac_prot.s CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / memman |
1.1 root 1: LL0:
2: .data
3: .set SBR,0
4: .set SLR,1
5: .set P0BR,2
6: .set P0LR,3
7: .set P1BR,4
8: .set P1LR,5
9: .set P2BR,6
10: .set P2LR,7
11: .set IPL,8
12: .set MAPEN,9
13: .set MME,9
14: .set TBIA,10
15: .set TBIS,11
16: .set DCK,12
17: .set CCK,13
18: .set PCBB,14
19: .set KSP,19
20: .set USP,20
21: .set CPMDCB,21
22: .set PADC,25
23: .set DCR,27
24: .set DC_ON,1
25: .set DC_OFF,2
26: .set TB_ON,256
27: .set TB_OFF,512
28: .comm _Failpc,4
29: .comm _test_va,4
30: .comm _Tpsl,4
31: .text
32: .align 1
33: .globl _protect
34: _protect:
35: .word L33
36: #
37: # #include "definitions"
38: #
39: # extern long iob0, iob1, iob2, iob3, ss1;
40: # extern long unused, u0p1pt, u0p2pt, scb, savvec4, savvec5, savvec6, savvec7;
41: # extern long *p_ptr, exp_par0, exp_par1, exp_par2, exp_par3;
42: #
43: # long Failpc, test_va, Tpsl;
44: #
45: # /* This test will test access protections on PTE in TAHOE memory
46: # management scheme.
47: # The main loop of the test running in USER space, KERNEL privilege.
48: # */
49: #
50: # protect()
51: # { long *temp, pg_no, pte, saved_pte, pte_sys, pte_p0, pte_p1, pte_p2;
52: jbr L35
53: L36:
54: #
55: # if (ss1) writes("** Subtest2 : Access protection fault\n");
56: tstl _ss1
57: jeql L37
58: .data 1
59: L39:
60: .ascii "** Subtest2 : Access protection fault\12\0"
61: .text
62: pushl $L39
63: callf $8,_writes
64: # pg_no = 0;
65: L37:
66: clrl -60(fp)
67: # asm("mfpr $SBR,_savvec4");
68: mfpr $SBR,_savvec4
69: # savvec4 |= 0xc0000000;
70: orl2 $-1073741824,_savvec4
71: # asm("mtpr _savvec4,$P0BR"); /* Double map P0 into System space */
72: mtpr _savvec4,$P0BR
73: # asm("mfpr $SLR,_savvec4");
74: mfpr $SLR,_savvec4
75: # asm("mtpr _savvec4,$P0LR");
76: mtpr _savvec4,$P0LR
77: #
78: # asm("mtpr $3,$DCK");
79: mtpr $3,$DCK
80: # asm("mtpr $0,$TBIA");
81: mtpr $0,$TBIA
82: # asm("mtpr $0,$PADC");
83: mtpr $0,$PADC
84: # asm("mtpr $1,$MME");
85: mtpr $1,$MME
86: # asm("jmp *$0f"); /* Go virtual */
87: jmp *$0f
88: # asm("0:");
89: 0:
90: #
91: # /* Set up SPT */
92: # pg_no = TEST_PTESYS; /* Map 1st unused PTE to */
93: movl _unused,-60(fp)
94: # pte = IOB0; /* physical page iob0 (22) */
95: andl3 $1073740800,$_iob0,r0
96: shrl $10,r0,r0
97: andl2 $1048575,r0
98: movl r0,-64(fp)
99: # fixpfn_pte(SBR,pg_no, &pte_sys, pte);
100: pushl -64(fp)
101: subl3 $72,fp,r0
102: pushl r0
103: pushl -60(fp)
104: pushl $0
105: callf $20,_fixpfn_pte
106: #
107: # /* Set up P0PT */
108: # pg_no = TEST_PTEP0; /* Map PTE. 60 in P0PT */
109: movl $68,-60(fp)
110: # pte = IOB1; /* physical page iob1 (23) */
111: andl3 $1073740800,$_iob1,r0
112: shrl $10,r0,r0
113: andl2 $1048575,r0
114: movl r0,-64(fp)
115: # fixpfn_pte(P0BR,pg_no, &pte_p0, pte);
116: pushl -64(fp)
117: subl3 $76,fp,r0
118: pushl r0
119: pushl -60(fp)
120: pushl $2
121: callf $20,_fixpfn_pte
122: #
123: # /* Set up P1PT */
124: # temp = &u0p1pt; /* Map PTE. 0 in P1PT */
125: movl $_u0p1pt,-56(fp)
126: # *temp = IOB2; /* physical page iob2 (24) */
127: andl3 $1073740800,$_iob2,r0
128: shrl $10,r0,r0
129: andl2 $1048575,r0
130: movl r0,*-56(fp)
131: # savvec4 = ((long)temp) | SADDR;
132: orl3 $-1073741824,-56(fp),r0
133: movl r0,_savvec4
134: # asm("mtpr _savvec4,$P1BR");
135: mtpr _savvec4,$P1BR
136: # asm("mtpr $1,$P1LR");
137: mtpr $1,$P1LR
138: #
139: # /* Set up P2PT */
140: # temp = &u0p2pt; /* Map PTE. 0 in P2PT */
141: movl $_u0p2pt,-56(fp)
142: # *temp = IOB3; /* physical page iob3 (25) */
143: andl3 $1073740800,$_iob3,r0
144: shrl $10,r0,r0
145: andl2 $1048575,r0
146: movl r0,*-56(fp)
147: # savvec4 = ((long)temp) | SADDR;
148: orl3 $-1073741824,-56(fp),r0
149: movl r0,_savvec4
150: # savvec4 -= (LAST_VPGNO << 2);
151: subl2 $4194300,_savvec4
152: # asm("mtpr _savvec4, $P2BR");
153: mtpr _savvec4, $P2BR
154: # asm("mtpr $0xffffe, $P2LR"); /* Use only 1 entry */
155: mtpr $0xffffe, $P2LR
156: #
157: # /* Map test area to allow USER to execute code */
158: # asm("movab rd_access,_savvec4");
159: movab rd_access,_savvec4
160: # pg_no = (savvec4 >> PGSHIFT) & 0xfffff;
161: shar $10,_savvec4,r0
162: andl2 $1048575,r0
163: movl r0,-60(fp)
164: # fixpv_pte(SBR, pg_no, &saved_pte, PTE_UW | PTE_V);
165: pushl $-134217728
166: subl3 $68,fp,r0
167: pushl r0
168: pushl -60(fp)
169: pushl $0
170: callf $20,_fixpv_pte
171: # fixpv_pte(SBR, pg_no+1, &saved_pte, PTE_UW | PTE_V);
172: pushl $-134217728
173: subl3 $68,fp,r0
174: pushl r0
175: addl3 $1,-60(fp),r0
176: pushl r0
177: pushl $0
178: callf $20,_fixpv_pte
179: #
180: # prot(); /* Do test .. */
181: callf $4,_prot
182: #
183: # fixpv_pte(SBR, pg_no, &saved_pte, PTE_KW | PTE_V);
184: pushl $-536870912
185: subl3 $68,fp,r0
186: pushl r0
187: pushl -60(fp)
188: pushl $0
189: callf $20,_fixpv_pte
190: # fixpv_pte(SBR, pg_no+1, &saved_pte, PTE_KW | PTE_V);
191: pushl $-536870912
192: subl3 $68,fp,r0
193: pushl r0
194: addl3 $1,-60(fp),r0
195: pushl r0
196: pushl $0
197: callf $20,_fixpv_pte
198: #
199: # /* Restore original PTEs */
200: # pg_no = TEST_PTESYS;
201: movl _unused,-60(fp)
202: # pte = IOB0;
203: andl3 $1073740800,$_iob0,r0
204: shrl $10,r0,r0
205: andl2 $1048575,r0
206: movl r0,-64(fp)
207: # fixpfn_pte(SBR,pg_no, &pte_sys, pte_sys&0x3fffff);
208: andl3 $4194303,-72(fp),r0
209: pushl r0
210: subl3 $72,fp,r0
211: pushl r0
212: pushl -60(fp)
213: pushl $0
214: callf $20,_fixpfn_pte
215: # pg_no = TEST_PTEP0;
216: movl $68,-60(fp)
217: # pte = IOB1;
218: andl3 $1073740800,$_iob1,r0
219: shrl $10,r0,r0
220: andl2 $1048575,r0
221: movl r0,-64(fp)
222: # fixpfn_pte(P0BR,pg_no, &pte_p0, pte_p0&0x3fffff);
223: andl3 $4194303,-76(fp),r0
224: pushl r0
225: subl3 $76,fp,r0
226: pushl r0
227: pushl -60(fp)
228: pushl $2
229: callf $20,_fixpfn_pte
230: # pg_no = TEST_PTEP1;
231: clrl -60(fp)
232: # pte = IOB2;
233: andl3 $1073740800,$_iob2,r0
234: shrl $10,r0,r0
235: andl2 $1048575,r0
236: movl r0,-64(fp)
237: # fixpfn_pte(P1BR,pg_no, &pte_p1, pte_p1&0x3fffff);
238: andl3 $4194303,-80(fp),r0
239: pushl r0
240: subl3 $80,fp,r0
241: pushl r0
242: pushl -60(fp)
243: pushl $4
244: callf $20,_fixpfn_pte
245: # pg_no = TEST_PTEP2;
246: movl $1048575,-60(fp)
247: # pte = IOB3;
248: andl3 $1073740800,$_iob3,r0
249: shrl $10,r0,r0
250: andl2 $1048575,r0
251: movl r0,-64(fp)
252: # fixpfn_pte(P2BR,pg_no, &pte_p2, pte_p2&0x3fffff);
253: andl3 $4194303,-84(fp),r0
254: pushl r0
255: subl3 $84,fp,r0
256: pushl r0
257: pushl -60(fp)
258: pushl $6
259: callf $20,_fixpfn_pte
260: #
261: # asm("mtpr $0,$MME"); /* Back to physical */
262: mtpr $0,$MME
263: # asm("mtpr $0,$P0LR"); /* Invalidate P0BR */
264: mtpr $0,$P0LR
265: # }
266: ret
267: .set L33,0x0
268: L35:
269: subl3 $84,fp,sp
270: jbr L36
271: .data
272: .text
273: .align 1
274: .globl _prot
275: _prot:
276: .word L43
277: #
278: # prot()
279: # { long access_md, privilege, exp_int;
280: jbr L45
281: L46:
282: #
283: #
284: # /* PTE : No Access */
285: # access_md = PTE_NOACC | PTE_V;
286: movl $-2147483648,-56(fp)
287: # /* Try all privileges with R/W access on all tables */
288: # exp_int = TRUE;
289: movl $1,-64(fp)
290: # for(privilege=USER; privilege>=KERNEL; privilege--)
291: movl $1,-60(fp)
292: L49:
293: tstl -60(fp)
294: jlss L48
295: # chmaps_prot(access_md,privilege,"rw",exp_int);
296: .data 1
297: L51:
298: .ascii "rw\0"
299: .text
300: pushl -64(fp)
301: pushl $L51
302: pushl -60(fp)
303: pushl -56(fp)
304: callf $20,_chmaps_prot
305: L47:
306: decl -60(fp)
307: jbr L49
308: L48:
309: #
310: # /* PTE : Kernel Read */
311: # access_md = PTE_KR | PTE_V;
312: movl $-1073741824,-56(fp)
313: # chmaps_prot(access_md,USER,"rw",exp_int);
314: .data 1
315: L52:
316: .ascii "rw\0"
317: .text
318: pushl -64(fp)
319: pushl $L52
320: pushl $1
321: pushl -56(fp)
322: callf $20,_chmaps_prot
323: # chmaps_prot(access_md,KERNEL,"w",exp_int);
324: .data 1
325: L53:
326: .ascii "w\0"
327: .text
328: pushl -64(fp)
329: pushl $L53
330: pushl $0
331: pushl -56(fp)
332: callf $20,_chmaps_prot
333: # exp_int = FALSE;
334: clrl -64(fp)
335: # chmaps_prot(access_md,KERNEL,"r",exp_int);
336: .data 1
337: L54:
338: .ascii "r\0"
339: .text
340: pushl -64(fp)
341: pushl $L54
342: pushl $0
343: pushl -56(fp)
344: callf $20,_chmaps_prot
345: #
346: # /* PTE : Kernel Write */
347: # access_md = PTE_KW | PTE_V;
348: movl $-536870912,-56(fp)
349: # exp_int = TRUE;
350: movl $1,-64(fp)
351: # chmaps_prot(access_md,USER,"rw",exp_int);
352: .data 1
353: L55:
354: .ascii "rw\0"
355: .text
356: pushl -64(fp)
357: pushl $L55
358: pushl $1
359: pushl -56(fp)
360: callf $20,_chmaps_prot
361: # exp_int = FALSE;
362: clrl -64(fp)
363: # chmaps_prot(access_md,0,"rw",exp_int);
364: .data 1
365: L56:
366: .ascii "rw\0"
367: .text
368: pushl -64(fp)
369: pushl $L56
370: pushl $0
371: pushl -56(fp)
372: callf $20,_chmaps_prot
373: #
374: #
375: # /* PTE : User Read/Kernel Read */
376: # access_md = PTE_URKR | PTE_V;
377: movl $-805306368,-56(fp)
378: # exp_int = TRUE;
379: movl $1,-64(fp)
380: # chmaps_prot(access_md,USER,"w",exp_int);
381: .data 1
382: L57:
383: .ascii "w\0"
384: .text
385: pushl -64(fp)
386: pushl $L57
387: pushl $1
388: pushl -56(fp)
389: callf $20,_chmaps_prot
390: # chmaps_prot(access_md,KERNEL,"w",exp_int);
391: .data 1
392: L58:
393: .ascii "w\0"
394: .text
395: pushl -64(fp)
396: pushl $L58
397: pushl $0
398: pushl -56(fp)
399: callf $20,_chmaps_prot
400: # exp_int = FALSE;
401: clrl -64(fp)
402: # chmaps_prot(access_md,USER,"r",exp_int);
403: .data 1
404: L59:
405: .ascii "r\0"
406: .text
407: pushl -64(fp)
408: pushl $L59
409: pushl $1
410: pushl -56(fp)
411: callf $20,_chmaps_prot
412: # chmaps_prot(access_md,KERNEL,"r",exp_int);
413: .data 1
414: L60:
415: .ascii "r\0"
416: .text
417: pushl -64(fp)
418: pushl $L60
419: pushl $0
420: pushl -56(fp)
421: callf $20,_chmaps_prot
422: #
423: #
424: # /* PTE : User Read/ Kernel Read/Write */
425: # access_md = PTE_URKW | PTE_V;
426: movl $-268435456,-56(fp)
427: # exp_int = TRUE;
428: movl $1,-64(fp)
429: # chmaps_prot(access_md,USER,"w",exp_int);
430: .data 1
431: L61:
432: .ascii "w\0"
433: .text
434: pushl -64(fp)
435: pushl $L61
436: pushl $1
437: pushl -56(fp)
438: callf $20,_chmaps_prot
439: # exp_int = FALSE;
440: clrl -64(fp)
441: # chmaps_prot(access_md,USER,"r",exp_int);
442: .data 1
443: L62:
444: .ascii "r\0"
445: .text
446: pushl -64(fp)
447: pushl $L62
448: pushl $1
449: pushl -56(fp)
450: callf $20,_chmaps_prot
451: # chmaps_prot(access_md,KERNEL,"rw",exp_int);
452: .data 1
453: L63:
454: .ascii "rw\0"
455: .text
456: pushl -64(fp)
457: pushl $L63
458: pushl $0
459: pushl -56(fp)
460: callf $20,_chmaps_prot
461: #
462: # /* PTE : User Read/Write/ Kernel Read/Write */
463: # access_md = PTE_UW | PTE_V;
464: movl $-134217728,-56(fp)
465: # exp_int = FALSE;
466: clrl -64(fp)
467: # for(privilege=USER; privilege>=KERNEL; privilege--)
468: movl $1,-60(fp)
469: L66:
470: tstl -60(fp)
471: jlss L65
472: # chmaps_prot(access_md,privilege,"rw",exp_int);
473: .data 1
474: L67:
475: .ascii "rw\0"
476: .text
477: pushl -64(fp)
478: pushl $L67
479: pushl -60(fp)
480: pushl -56(fp)
481: callf $20,_chmaps_prot
482: L64:
483: decl -60(fp)
484: jbr L66
485: L65:
486: #
487: # }
488: ret
489: .set L43,0x0
490: L45:
491: subl3 $64,fp,sp
492: jbr L46
493: .data
494: .comm _spc_str,4
495: .text
496: .align 1
497: .globl _chmaps_prot
498: _chmaps_prot:
499: .word L69
500: #
501: # char *spc_str;
502: #
503: # chmaps_prot(access_md,priv,run_access,exp_int)
504: # long access_md, priv, exp_int;
505: # char *run_access;
506: # { long pg_table, pte_no, space;
507: jbr L71
508: L72:
509: #
510: # for (pg_table=SBR; pg_table<=P2BR; pg_table += 2)
511: clrl -56(fp)
512: L75:
513: cmpl -56(fp),$6
514: jgtr L74
515: # {
516: # if (pg_table == SBR) {
517: tstl -56(fp)
518: jneq L76
519: # pte_no = TEST_PTESYS;
520: movl _unused,-60(fp)
521: # space = SADDR; }
522: movl $-1073741824,-64(fp)
523: # if (pg_table == P0BR) {
524: L76:
525: cmpl -56(fp),$2
526: jneq L77
527: # pte_no = TEST_PTEP0;
528: movl $68,-60(fp)
529: # space = P0ADDR; }
530: clrl -64(fp)
531: # if (pg_table == P1BR) {
532: L77:
533: cmpl -56(fp),$4
534: jneq L78
535: # pte_no = TEST_PTEP1;
536: clrl -60(fp)
537: # space = P1ADDR; }
538: movl $1073741824,-64(fp)
539: # if (pg_table == P2BR) {
540: L78:
541: cmpl -56(fp),$6
542: jneq L79
543: # pte_no = TEST_PTEP2;
544: movl $1048575,-60(fp)
545: # space = P2ADDR; }
546: movl $-2147483648,-64(fp)
547: # force_flt(pg_table,pte_no,access_md,priv,run_access,space,exp_int);
548: L79:
549: pushl 16(fp)
550: pushl -64(fp)
551: pushl 12(fp)
552: pushl 8(fp)
553: pushl 4(fp)
554: pushl -60(fp)
555: pushl -56(fp)
556: callf $32,_force_flt
557: # }
558: L73:
559: addl2 $2,-56(fp)
560: jbr L75
561: L74:
562: # }
563: ret
564: .set L69,0x0
565: L71:
566: subl3 $64,fp,sp
567: jbr L72
568: .data
569: .text
570: .align 1
571: .globl _force_flt
572: _force_flt:
573: .word L81
574: #
575: # /* This routine forces protection faults with read and write access
576: # to page table specified by tbl_no . The access bits of this PTE
577: # is set to value of pte_access, the process that access this PTE
578: # is running in the mode specified by rum_mode.
579: # tbl_no : (0,1,2,3) corresponding to P0PT, P1PT, P2PT, SPT.
580: # which_pte : PTE to be accessed
581: # pte_access : valid and protection bits to be set on PTE
582: # access : "r", "rw", "w"/ "R", "RW", "W"
583: # run_mode : privilege of process when access PTE
584: # */
585: #
586: # force_flt(tbl_no, which_pte, pte_access, run_mode, access, addr_space, exp_int)
587: # long tbl_no, which_pte, pte_access, run_mode, addr_space, exp_int;
588: # char *access;
589: # {
590: jbr L83
591: L84:
592: # long *st_base, saved_vec1,saved_vec2,saved_pte,test_adr,tflag;
593: # long ix, handler_adr;
594: # char *acc_str, *pmode_str;
595: #
596: # /* Set protection bits of target PTE */
597: # fixpv_pte(tbl_no,which_pte,&saved_pte,pte_access);
598: pushl 12(fp)
599: subl3 $68,fp,r0
600: pushl r0
601: pushl 8(fp)
602: pushl 4(fp)
603: callf $20,_fixpv_pte
604: #
605: # /* Get virtual address of test location */
606: # test_adr = (which_pte<<PGSHIFT)|addr_space;
607: shll $10,8(fp),r0
608: orl2 24(fp),r0
609: movl r0,-72(fp)
610: #
611: # for(ix=0;ix<2;ix++)
612: clrl -80(fp)
613: L87:
614: cmpl -80(fp),$2
615: jgeq L86
616: # {
617: # if (access[ix]==NULL) break;
618: movl 20(fp),r0
619: movl -80(fp),r1
620: tstb (r0)[r1]
621: jneq L88
622: jbr L86
623: # /* Set handler of protection fault */
624: # if (exp_int==TRUE)
625: L88:
626: cmpl 28(fp),$1
627: jneq L89
628: # asm("movab pro_flt1,_savvec4");
629: movab pro_flt1,_savvec4
630: # else
631: jbr L90
632: L89:
633: # asm("movab pro_flt2,_savvec4");
634: movab pro_flt2,_savvec4
635: L90:
636: # handler_adr = savvec4;
637: movl _savvec4,-84(fp)
638: # set_handler(PROT_VEC,&saved_vec1,handler_adr);
639: pushl -84(fp)
640: subl3 $60,fp,r0
641: pushl r0
642: pushl $47
643: callf $16,_set_handler
644: #
645: # /* Set handler for DATA ALIGNMENT FAULT */
646: # asm("movab chmk_hd,_savvec4");
647: movab chmk_hd,_savvec4
648: # handler_adr = savvec4;
649: movl _savvec4,-84(fp)
650: # set_handler(ALIGN_FLT,&saved_vec2,handler_adr);
651: pushl -84(fp)
652: subl3 $64,fp,r0
653: pushl r0
654: pushl $53
655: callf $16,_set_handler
656: #
657: # /* Set expected parameter words */
658: # exp_par1 = exp_par2 = exp_par3 = 0;
659: clrl _exp_par3
660: movl _exp_par3,r0
661: movl r0,_exp_par2
662: movl _exp_par2,r0
663: movl r0,_exp_par1
664: # exp_par1 = test_adr;
665: movl -72(fp),_exp_par1
666: # if ((access[ix]=='r') || (access[ix]=='R'))
667: movl 20(fp),r0
668: movl -80(fp),r1
669: cmpb (r0)[r1],$114
670: jeql L9999
671: movl 20(fp),r0
672: movl -80(fp),r1
673: cmpb (r0)[r1],$82
674: jneq L92
675: L9999:
676: # { /* protection violation, read access */
677: # asm("movab rd_access,_exp_par2"); /* Expected PC */
678: movab rd_access,_exp_par2
679: # exp_par0 = 0;
680: clrl _exp_par0
681: # }
682: # else
683: jbr L93
684: L92:
685: # { /* protection violation, write access */
686: # asm("movab wr_access,_exp_par2");
687: movab wr_access,_exp_par2
688: # exp_par0 = 4;
689: movl $4,_exp_par0
690: # }
691: L93:
692: #
693: # asm("mtpr $0xbfffb3fc,$USP"); /* Set up user stack */
694: mtpr $0xbfffb3fc,$USP
695: # asm("movab (sp),_savvec5");
696: movab (sp),_savvec5
697: # savvec5 -= 40; /* KSP is 10 longword after ISP */
698: subl2 $40,_savvec5
699: # asm("mtpr _savvec5,$KSP");
700: mtpr _savvec5,$KSP
701: #
702: # /* set up to change privilege */
703: # exp_par3 = run_mode << 24;
704: shll $24,16(fp),r0
705: movl r0,_exp_par3
706: # Tpsl = exp_par3; /* PSL when force fault */
707: movl _exp_par3,_Tpsl
708: # Failpc = exp_par2; /* PC to force fault */
709: movl _exp_par2,_Failpc
710: # asm("pushl _exp_par3");
711: pushl _exp_par3
712: # asm("pushl _exp_par2"); /* Push PSL, PC on current stack */
713: pushl _exp_par2
714: #
715: # /* Change mode */
716: # test_va = savvec5 = test_adr;
717: movl -72(fp),_savvec5
718: movl _savvec5,r0
719: movl r0,_test_va
720: # asm("movl _savvec5,r0");
721: movl _savvec5,r0
722: #
723: # /* Enable false */
724: # asm("mtpr $64,$DCR");
725: mtpr $64,$DCR
726: # asm("rei"); /* Go : Amem ... */
727: rei
728: # asm("halt"); /* REI fails ... */
729: halt
730: #
731: # asm("rtn0_p0:");
732: rtn0_p0:
733: # asm("movl r0,_savvec5"); /* flag indicate where return from */
734: movl r0,_savvec5
735: # tflag = savvec5;
736: movl _savvec5,-76(fp)
737: # st_base = &scb;
738: movl $_scb,-56(fp)
739: #
740: # /* Restore Prot_fault, ALIGN_FLT vectors */
741: # *(st_base + PROT_VEC) = saved_vec1;
742: movl -56(fp),r0
743: movl -60(fp),188(r0)
744: # *(st_base + ALIGN_FLT) = saved_vec2;
745: movl -56(fp),r0
746: movl -64(fp),212(r0)
747: #
748: # if (tflag && exp_int)
749: tstl -76(fp)
750: jeql L94
751: tstl 28(fp)
752: jeql L94
753: # { /* Error : expected event did not happen */
754: # writes("** Expected protection fault didnot occured\n");
755: .data 1
756: L95:
757: .ascii "** Expected protection fault didnot occured\12\0"
758: .text
759: pushl $L95
760: callf $8,_writes
761: # ac_error1();
762: callf $4,_ac_error1
763: # asm("halt");
764: halt
765: # }
766: #
767: # /* check fault parameters pushed on stack */
768: # if ((exp_int==TRUE)&&(tflag==FALSE)) chk_fpars("");
769: L94:
770: cmpl 28(fp),$1
771: jneq L97
772: tstl -76(fp)
773: jneq L97
774: .data 1
775: L99:
776: .ascii "\0"
777: .text
778: pushl $L99
779: callf $8,_chk_fpars
780: # }
781: L97:
782: L85:
783: incl -80(fp)
784: jbr L87
785: L86:
786: #
787: # /* Restore tested PTE's */
788: # savvec5 = tbl_no;
789: movl 4(fp),_savvec5
790: # asm("mfpr _savvec5,_savvec6");
791: mfpr _savvec5,_savvec6
792: # st_base = (long *)savvec6;
793: movl _savvec6,-56(fp)
794: # st_base += which_pte;
795: shll $2,8(fp),r0
796: addl2 r0,-56(fp)
797: # *st_base = saved_pte;
798: movl -68(fp),*-56(fp)
799: # }
800: ret
801: .set L81,0x0
802: L83:
803: subl3 $92,fp,sp
804: jbr L84
805: .data
806: .text
807: .align 1
808: .globl _ptfx_handler
809: _ptfx_handler:
810: .word L101
811: #
812: #
813: # /* Handler of protection fault exception. */
814: # ptfx_handler()
815: # {
816: jbr L103
817: L104:
818: # asm(".align 2");
819: .align 2
820: # asm("pro_flt1:"); /* EXPECTED INTERRUPT */
821: pro_flt1:
822: #
823: # asm("mtpr $0x1f,$IPL");
824: mtpr $0x1f,$IPL
825: # asm("movab (sp),_savvec5"); /* set pointer to parameters */
826: movab (sp),_savvec5
827: # p_ptr = (long *)savvec5;
828: movl _savvec5,_p_ptr
829: # asm("svpctx"); /* switch back to ISP */
830: svpctx
831: # asm("clrl r0");
832: clrl r0
833: # asm("jmp rtn0_p0"); /* return to test */
834: jmp rtn0_p0
835: #
836: # asm(".align 2");
837: .align 2
838: # asm("pro_flt2:"); /* UNEXPECTED INTERRUPT */
839: pro_flt2:
840: # asm("mtpr $0x1f,$IPL");
841: mtpr $0x1f,$IPL
842: # asm("movab (sp),_savvec5"); /* set pointer to parameters */
843: movab (sp),_savvec5
844: # asm("movl fp,_saved_fp"); /* save fp */
845: movl fp,_saved_fp
846: # asm("movab (sp),fp"); /* set new frame pointer for next CALLS */
847: movab (sp),fp
848: # p_ptr = (long *)savvec5;
849: movl _savvec5,_p_ptr
850: #
851: # writes("** Unexpected protection fault\n");
852: .data 1
853: L105:
854: .ascii "** Unexpected protection fault\12\0"
855: .text
856: pushl $L105
857: callf $8,_writes
858: # ac_error1();
859: callf $4,_ac_error1
860: # prt_par("** Parameters : ",p_ptr); /* print fault parameters */
861: .data 1
862: L107:
863: .ascii "** Parameters : \0"
864: .text
865: pushl _p_ptr
866: pushl $L107
867: callf $12,_prt_par
868: # asm("svpctx"); /* switch back to ISP */
869: svpctx
870: # asm("clrl r0");
871: clrl r0
872: # asm("movl _saved_fp,fp"); /* restore fp */
873: movl _saved_fp,fp
874: # asm("halt");
875: halt
876: # asm("jmp rtn0_p0"); /* return to test */
877: jmp rtn0_p0
878: # }
879: ret
880: .set L101,0x0
881: L103:
882: jbr L104
883: .data
884: .text
885: .align 1
886: .globl _chmk_handler
887: _chmk_handler:
888: .word L109
889: #
890: # chmk_handler()
891: # {
892: jbr L111
893: L112:
894: # asm(".align 2");
895: .align 2
896: # asm("chmk_hd:"); /* Come here by causing a data not align fault */
897: chmk_hd:
898: # /* return to test */
899: # asm("mtpr $0x1f,$IPL"); /* Set IPL to HIGH */
900: mtpr $0x1f,$IPL
901: # asm("svpctx"); /* switch back to ISP */
902: svpctx
903: # asm("movl $1,r0"); /* set flag to indicate return from here */
904: movl $1,r0
905: # asm("jmp rtn0_p0");
906: jmp rtn0_p0
907: # }
908: ret
909: .set L109,0x0
910: L111:
911: jbr L112
912: .data
913: .text
914: .align 1
915: .globl _TEST_AREA
916: _TEST_AREA:
917: .word L114
918: #
919: # TEST_AREA()
920: # {
921: jbr L116
922: L117:
923: #
924: # asm("rd_access:");
925: rd_access:
926: # asm("movl (r0),r12"); /* should cause protection fault exception !! */
927: movl (r0),r12
928: #
929: # /* Get back KERNEL privilege by causing a data not align fault */
930: # asm("movl align_f,r10");
931: movl align_f,r10
932: # asm("halt"); /* otherwise HALT .... */
933: halt
934: #
935: # asm("wr_access:");
936: wr_access:
937: # asm("movl $1,(r0)"); /* should cause protection fault exception !! */
938: movl $1,(r0)
939: #
940: # /* Get back KERNEL privilege by causing a data not align fault */
941: # asm("movl align_f,r10");
942: movl align_f,r10
943: # asm("halt"); /* otherwise HALT .... */
944: halt
945: # asm(".align 1"); /* Word align */
946: .align 1
947: # asm("align_f:");
948: align_f:
949: # asm(".long 0");
950: .long 0
951: # }
952: ret
953: .set L114,0x0
954: L116:
955: jbr L117
956: .data
957: .text
958: .align 1
959: .globl _prt_par
960: _prt_par:
961: .word L118
962: #
963: # /* Print fault parameters of memory management exceptions */
964: # prt_par(str,par)
965: # char *str;
966: # long *par;
967: # {
968: jbr L120
969: L121:
970: # writes(str);
971: pushl 4(fp)
972: callf $8,_writes
973: # writeh(*par++); writes(" ");
974: movl 8(fp),r0
975: addl2 $4,8(fp)
976: pushl (r0)
977: callf $8,_writeh
978: .data 1
979: L123:
980: .ascii " \0"
981: .text
982: pushl $L123
983: callf $8,_writes
984: # writeh(*par++); writes(" ");
985: movl 8(fp),r0
986: addl2 $4,8(fp)
987: pushl (r0)
988: callf $8,_writeh
989: .data 1
990: L124:
991: .ascii " \0"
992: .text
993: pushl $L124
994: callf $8,_writes
995: # writeh(*par++); writes(" ");
996: movl 8(fp),r0
997: addl2 $4,8(fp)
998: pushl (r0)
999: callf $8,_writeh
1000: .data 1
1001: L125:
1002: .ascii " \0"
1003: .text
1004: pushl $L125
1005: callf $8,_writes
1006: # writeh(*par); writec('\n');
1007: pushl *8(fp)
1008: callf $8,_writeh
1009: pushl $10
1010: callf $8,_writec
1011: # }
1012: ret
1013: .set L118,0x0
1014: L120:
1015: jbr L121
1016: .data
1017: .text
1018: .align 1
1019: .globl _chk_fpars
1020: _chk_fpars:
1021: .word L127
1022: #
1023: # /* This routine assumes that global pointer p_ptr points to the actual
1024: # parameters pushed on the stack, and exp_par0 is the 1 of the expected
1025: # parameters.
1026: # */
1027: # chk_fpars(msg)
1028: # char *msg;
1029: # { long *pars, *e_pars;
1030: jbr L129
1031: L130:
1032: # long act_param0, act_param1, act_param2, act_param3;
1033: #
1034: # e_pars = &exp_par0; /* pointer to expected parameters */
1035: movl $_exp_par0,-60(fp)
1036: # pars = p_ptr; /* pointer to actual parameters */
1037: movl _p_ptr,-56(fp)
1038: # act_param0 = *pars++;
1039: movl *-56(fp),-64(fp)
1040: addl2 $4,-56(fp)
1041: # act_param1 = *pars++;
1042: movl *-56(fp),-68(fp)
1043: addl2 $4,-56(fp)
1044: # act_param2 = *pars++;
1045: movl *-56(fp),-72(fp)
1046: addl2 $4,-56(fp)
1047: # act_param3 = (*pars) & 0xffffffc0; /* Mask out PSW flags */
1048: andl3 $-64,*-56(fp),r0
1049: movl r0,-76(fp)
1050: # if ((exp_par0 != act_param0) || (exp_par1 != act_param1) ||
1051: # (exp_par2 != act_param2) || (exp_par3 != act_param3)) {
1052: cmpl _exp_par0,-64(fp)
1053: jneq L9998
1054: cmpl _exp_par1,-68(fp)
1055: jneq L9998
1056: cmpl _exp_par2,-72(fp)
1057: jneq L9998
1058: cmpl _exp_par3,-76(fp)
1059: jeql L131
1060: L9998:
1061: # writes(msg);
1062: pushl 4(fp)
1063: callf $8,_writes
1064: # writes("** Error in fault paramters\n");
1065: .data 1
1066: L132:
1067: .ascii "** Error in fault paramters\12\0"
1068: .text
1069: pushl $L132
1070: callf $8,_writes
1071: # ac_error1();
1072: callf $4,_ac_error1
1073: # prt_par("** Expected : ",&exp_par0);
1074: .data 1
1075: L133:
1076: .ascii "** Expected : \0"
1077: .text
1078: pushl $_exp_par0
1079: pushl $L133
1080: callf $12,_prt_par
1081: # prt_par("** Actual : ",p_ptr);
1082: .data 1
1083: L134:
1084: .ascii "** Actual : \0"
1085: .text
1086: pushl _p_ptr
1087: pushl $L134
1088: callf $12,_prt_par
1089: # asm("halt");
1090: halt
1091: # }
1092: # }
1093: L131:
1094: ret
1095: .set L127,0x0
1096: L129:
1097: subl3 $76,fp,sp
1098: jbr L130
1099: .data
1100: .text
1101: .align 1
1102: .globl _ac_error1
1103: _ac_error1:
1104: .word L135
1105: #
1106: # ac_error1()
1107: # {
1108: jbr L137
1109: L138:
1110: # writes("** PC : "); writeh(Failpc); writec('\n');
1111: .data 1
1112: L139:
1113: .ascii "** PC : \0"
1114: .text
1115: pushl $L139
1116: callf $8,_writes
1117: pushl _Failpc
1118: callf $8,_writeh
1119: pushl $10
1120: callf $8,_writec
1121: # writes("** VA : "); writeh(test_va); writec('\n');
1122: .data 1
1123: L140:
1124: .ascii "** VA : \0"
1125: .text
1126: pushl $L140
1127: callf $8,_writes
1128: pushl _test_va
1129: callf $8,_writeh
1130: pushl $10
1131: callf $8,_writec
1132: # writes("** PSL : "); writeh(Tpsl); writec('\n');
1133: .data 1
1134: L141:
1135: .ascii "** PSL : \0"
1136: .text
1137: pushl $L141
1138: callf $8,_writes
1139: pushl _Tpsl
1140: callf $8,_writeh
1141: pushl $10
1142: callf $8,_writec
1143: # prt_base(test_va);
1144: pushl _test_va
1145: callf $8,_prt_base
1146: # }
1147: ret
1148: .set L135,0x0
1149: L137:
1150: jbr L138
1151: .data
1152: #
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.