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1.1 root 1:
2: #include "definitions"
3:
4: extern long savvec4, unused, iob0, iob1, iob2, iob3, u0p1pt, u0p2pt;
5: extern long ss1, test_va, Tpsl, Failpc;
6:
7: /* This test validate that TAHOE update the M(odify), U(used) bit
8: correctly after reference to PTE.
9: */
10:
11: mu_test()
12: { long pte, pg_no, pte_sys, *temp, pte_p0;
13:
14: if (ss1) writes("** Subtest4 : PTE modify bit test\n");
15: pg_no = 0;
16: asm("mfpr $SBR,_savvec4");
17: savvec4 |= 0xc0000000;
18: asm("mtpr _savvec4,$P0BR"); /* Double map P0 into System space */
19: asm("mfpr $SLR,_savvec4");
20: asm("mtpr _savvec4,$P0LR");
21:
22: asm("mtpr $5,$DCK");
23: asm("mtpr $0,$TBIA");
24: asm("mtpr $0,$PADC");
25: asm("mtpr $1,$MME");
26: asm("jmp *$0f"); /* Go virtual */
27: asm("0:");
28:
29: /* Set up P1PT */
30: temp = &u0p1pt;
31: *temp = (IOB2) | (PTE_V | PTE_KW); /* 1st PTE in P1 map to IOB2 */
32: savvec4 = ((long)temp) | SADDR;
33: asm("mtpr _savvec4,$P1BR");
34: asm("mtpr $1,$P1LR");
35:
36: /* Set up P2PT */
37: temp = &u0p2pt;
38: *temp = (IOB3) | (PTE_V | PTE_KW); /* 1st PTE in P2 map to IOB3 */
39: savvec4 = ((long)temp) | SADDR;
40: savvec4 -= (LAST_VPGNO << 2);
41: asm("mtpr _savvec4, $P2BR");
42: asm("mtpr $0xffffe, $P2LR"); /* Use only 1 entry */
43:
44: /* 1st machine donot implement the Used bit
45: ubit_chk();
46: */
47: mbit_chk();
48:
49: asm("mtpr $0,$MME"); /* Back to physical */
50: asm("mtpr $0,$P0LR"); /* Invalidate P0 space */
51: asm("mtpr $0,$P1LR"); /* Invalidate P1 space */
52: asm("mtpr $0,$P2LR"); /* Invalidate P2 space */
53: }
54:
55:
56: /* This test check the Used bit in PTE */
57: ubit_chk()
58: {
59: mubits_chk(SBR,SADDR,IOB0,'u',"System"); /* Test on System space*/
60: mubits_chk(P0BR,P0ADDR,IOB1,'u',"P0"); /* Test on P0 space */
61: mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'u',"P1"); /* Test on P1 space */
62: mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'u',"P2"); /* Test on P2 space */
63: }
64:
65:
66:
67: /* This test check the Modify bit in PTE */
68: mbit_chk()
69: {
70: mubits_chk(SBR,SADDR,IOB0,'m',"System"); /* Test on System space*/
71: mubits_chk(P0BR,P0ADDR,IOB1,'m',"P0"); /* Test on P0 space */
72: mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'m',"P1"); /* Test on P1 space */
73: mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'m',"P2"); /* Test on P2 space */
74: }
75:
76:
77: mubits_chk(pg_table, addr_space, pte_no, bit, str)
78: long pg_table, addr_space, pte_no;
79: char bit, *str;
80: { long old_pte, mask;
81: register long *r12, val;
82:
83: mask = 0;
84: /* Set the test bit (Used/Modified) off */
85: fixmuc_pte(pg_table, pte_no, &old_pte, mask);
86: r12 = (long *) ((pte_no<<PGSHIFT) | addr_space);
87: test_va = (long)r12; /* Virtual address of test location */
88: asm("movpsl _Tpsl");
89: if (bit == 'm') { /* Test Modify bit */
90: asm("movab Mbit,_Failpc");
91: asm("Mbit:");
92: *r12 = 0; } /* Write to a location mapped by this pte */
93: else { /* Test Used bit */
94: asm("movab Ubit,_Failpc");
95: asm("Ubit:");
96: val = *r12; } /* Read from a location mapped by this pte */
97: mask = -1;
98: asm("mtpr $0,$PADC"); /* Purge all data cache */
99: fixmuc_pte(pg_table, pte_no, &old_pte, mask); /* Read this PTE back */
100: if ( bit == 'm')
101: { if (!(old_pte&PTE_M)) {
102: writes("** Modify bit is not set after a write\n");
103: ac_error1();
104: writes("** Actual PTE : ");writeh(old_pte);writec('\n');
105: asm("halt");
106: }
107: /* The 1st machine donot implement Used bit
108: if (!(old_pte & PTE_U))
109: {
110: writes("** Used bit is not set after a write\n");
111: ac_error1();
112: writes("** Actual PTE : ");writeh(old_pte);writec('\n');
113: asm("halt");
114: }
115: */
116: }
117: else
118: { if (!(old_pte & PTE_U))
119: {
120: writes("** Test in ");writes(str);writes(" space **\n");
121: writes("** Used bit is not set after a read..\n");
122: }
123: if (old_pte & PTE_M)
124: {
125: writes("** Test in ");writes(str);writes(" space **\n");
126: writes("** Modify bit is set after a read..\n");
127: }
128: }
129: }
130:
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