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Power 6/32 Unix version 1.2b

#include "definitions"

extern long savvec4, unused, iob0, iob1, iob2, iob3, u0p1pt, u0p2pt;
extern long ss1, test_va, Tpsl, Failpc;

/*   This test validate that TAHOE update the M(odify), U(used) bit
     correctly after reference to PTE.
*/

mu_test()
{	long pte, pg_no, pte_sys, *temp, pte_p0;

	if (ss1) writes("** Subtest4 : PTE modify bit test\n");
	pg_no = 0;
	asm("mfpr $SBR,_savvec4");
	savvec4 |= 0xc0000000;
	asm("mtpr _savvec4,$P0BR");	/* Double map P0 into System space */
	asm("mfpr $SLR,_savvec4");
	asm("mtpr _savvec4,$P0LR");

	asm("mtpr $5,$DCK");
	asm("mtpr $0,$TBIA");
	asm("mtpr $0,$PADC");
	asm("mtpr $1,$MME");
	asm("jmp  *$0f");		/* Go virtual */
asm("0:");

	/* Set up P1PT	*/
	temp = &u0p1pt;
	*temp = (IOB2) | (PTE_V | PTE_KW);	/* 1st PTE in P1 map to IOB2 */
	savvec4 = ((long)temp) | SADDR;
	asm("mtpr _savvec4,$P1BR");
	asm("mtpr $1,$P1LR");

	/* Set up P2PT	*/
	temp = &u0p2pt;
	*temp = (IOB3) | (PTE_V | PTE_KW);	/* 1st PTE in P2 map to IOB3 */
	savvec4 = ((long)temp) | SADDR;
	savvec4 -= (LAST_VPGNO << 2);
	asm("mtpr _savvec4, $P2BR");
	asm("mtpr $0xffffe, $P2LR");	/* Use only 1 entry */

/*	1st machine donot implement the Used bit	
	ubit_chk();
*/
	mbit_chk();

	asm("mtpr $0,$MME");		/* Back to physical */
	asm("mtpr $0,$P0LR");		/* Invalidate P0 space */
	asm("mtpr $0,$P1LR");		/* Invalidate P1 space */
	asm("mtpr $0,$P2LR");		/* Invalidate P2 space */
}


/*  This test check the Used bit in PTE */
ubit_chk()
{
	mubits_chk(SBR,SADDR,IOB0,'u',"System");   /* Test on System space*/
	mubits_chk(P0BR,P0ADDR,IOB1,'u',"P0");	   /* Test on P0 space */
	mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'u',"P1");	/* Test on P1 space */
	mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'u',"P2");	/* Test on P2 space */
}



/*  This test check the Modify bit in PTE */
mbit_chk()
{
	mubits_chk(SBR,SADDR,IOB0,'m',"System");   /* Test on System space*/
	mubits_chk(P0BR,P0ADDR,IOB1,'m',"P0");	   /* Test on P0 space */
	mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'m',"P1");	/* Test on P1 space */
	mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'m',"P2");	/* Test on P2 space */
}


mubits_chk(pg_table, addr_space, pte_no, bit, str)
long pg_table, addr_space, pte_no;
char bit, *str;
{	long old_pte, mask;
	register long *r12, val;

	mask = 0;
	/* Set the test bit (Used/Modified) off */
	fixmuc_pte(pg_table, pte_no, &old_pte, mask);
	r12 = (long *) ((pte_no<<PGSHIFT) | addr_space);
	test_va = (long)r12;	/* Virtual address of test location */
	asm("movpsl _Tpsl");
	if (bit == 'm')	 {	/* Test Modify bit */
		asm("movab Mbit,_Failpc");
		asm("Mbit:");
		*r12 = 0; }	/* Write to a location mapped by this pte */
	    else  {		/* Test Used bit */
		asm("movab Ubit,_Failpc");
		asm("Ubit:");
		val = *r12; }	/* Read from a location mapped by this pte */
	mask = -1;
	asm("mtpr $0,$PADC");	/* Purge all data cache */
	fixmuc_pte(pg_table, pte_no, &old_pte, mask);	/* Read this PTE back */
	if ( bit == 'm')
		 { if (!(old_pte&PTE_M)) {
			writes("** Modify bit is not set after a write\n");
			ac_error1();
			writes("** Actual PTE : ");writeh(old_pte);writec('\n');
			asm("halt");
			}
/*		   The 1st machine donot implement Used bit
		   if (!(old_pte & PTE_U))
			{
			writes("** Used bit is not set after a write\n");
			ac_error1();
			writes("** Actual PTE : ");writeh(old_pte);writec('\n');
			asm("halt");
			}
*/
		 }
	    else  
		 { if (!(old_pte & PTE_U))
			{
			writes("** Test in ");writes(str);writes(" space **\n");
			writes("** Used bit is not set after a read..\n");
			}
		   if (old_pte & PTE_M) 
			{
			writes("** Test in ");writes(str);writes(" space **\n");
			writes("** Modify bit is set after a read..\n");
			}
		 }
}

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