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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / memman|
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1.1 root 1: LL0:
2: .data
3: .set SBR,0
4: .set SLR,1
5: .set P0BR,2
6: .set P0LR,3
7: .set P1BR,4
8: .set P1LR,5
9: .set P2BR,6
10: .set P2LR,7
11: .set IPL,8
12: .set MAPEN,9
13: .set MME,9
14: .set TBIA,10
15: .set TBIS,11
16: .set DCK,12
17: .set CCK,13
18: .set PCBB,14
19: .set KSP,19
20: .set USP,20
21: .set CPMDCB,21
22: .set PADC,25
23: .set DCR,27
24: .set DC_ON,1
25: .set DC_OFF,2
26: .set TB_ON,256
27: .set TB_OFF,512
28: .text
29: .align 1
30: .globl _mu_test
31: _mu_test:
32: .word L24
33: #
34: # #include "definitions"
35: #
36: # extern long savvec4, unused, iob0, iob1, iob2, iob3, u0p1pt, u0p2pt;
37: # extern long ss1, test_va, Tpsl, Failpc;
38: #
39: # /* This test validate that TAHOE update the M(odify), U(used) bit
40: # correctly after reference to PTE.
41: # */
42: #
43: # mu_test()
44: # { long pte, pg_no, pte_sys, *temp, pte_p0;
45: jbr L26
46: L27:
47: #
48: # if (ss1) writes("** Subtest4 : PTE modify bit test\n");
49: tstl _ss1
50: jeql L28
51: .data 1
52: L30:
53: .ascii "** Subtest4 : PTE modify bit test\12\0"
54: .text
55: pushl $L30
56: callf $8,_writes
57: # pg_no = 0;
58: L28:
59: clrl -60(fp)
60: # asm("mfpr $SBR,_savvec4");
61: mfpr $SBR,_savvec4
62: # savvec4 |= 0xc0000000;
63: orl2 $-1073741824,_savvec4
64: # asm("mtpr _savvec4,$P0BR"); /* Double map P0 into System space */
65: mtpr _savvec4,$P0BR
66: # asm("mfpr $SLR,_savvec4");
67: mfpr $SLR,_savvec4
68: # asm("mtpr _savvec4,$P0LR");
69: mtpr _savvec4,$P0LR
70: #
71: # asm("mtpr $5,$DCK");
72: mtpr $5,$DCK
73: # asm("mtpr $0,$TBIA");
74: mtpr $0,$TBIA
75: # asm("mtpr $0,$PADC");
76: mtpr $0,$PADC
77: # asm("mtpr $1,$MME");
78: mtpr $1,$MME
79: # asm("jmp *$0f"); /* Go virtual */
80: jmp *$0f
81: # asm("0:");
82: 0:
83: #
84: # /* Set up P1PT */
85: # temp = &u0p1pt;
86: movl $_u0p1pt,-68(fp)
87: # *temp = (IOB2) | (PTE_V | PTE_KW); /* 1st PTE in P1 map to IOB2 */
88: andl3 $1073740800,$_iob2,r0
89: shrl $10,r0,r0
90: andl2 $1048575,r0
91: orl2 $-536870912,r0
92: movl r0,*-68(fp)
93: # savvec4 = ((long)temp) | SADDR;
94: orl3 $-1073741824,-68(fp),r0
95: movl r0,_savvec4
96: # asm("mtpr _savvec4,$P1BR");
97: mtpr _savvec4,$P1BR
98: # asm("mtpr $1,$P1LR");
99: mtpr $1,$P1LR
100: #
101: # /* Set up P2PT */
102: # temp = &u0p2pt;
103: movl $_u0p2pt,-68(fp)
104: # *temp = (IOB3) | (PTE_V | PTE_KW); /* 1st PTE in P2 map to IOB3 */
105: andl3 $1073740800,$_iob3,r0
106: shrl $10,r0,r0
107: andl2 $1048575,r0
108: orl2 $-536870912,r0
109: movl r0,*-68(fp)
110: # savvec4 = ((long)temp) | SADDR;
111: orl3 $-1073741824,-68(fp),r0
112: movl r0,_savvec4
113: # savvec4 -= (LAST_VPGNO << 2);
114: subl2 $4194300,_savvec4
115: # asm("mtpr _savvec4, $P2BR");
116: mtpr _savvec4, $P2BR
117: # asm("mtpr $0xffffe, $P2LR"); /* Use only 1 entry */
118: mtpr $0xffffe, $P2LR
119: #
120: # /* 1st machine donot implement the Used bit
121: # ubit_chk();
122: # */
123: # mbit_chk();
124: callf $4,_mbit_chk
125: #
126: # asm("mtpr $0,$MME"); /* Back to physical */
127: mtpr $0,$MME
128: # asm("mtpr $0,$P0LR"); /* Invalidate P0 space */
129: mtpr $0,$P0LR
130: # asm("mtpr $0,$P1LR"); /* Invalidate P1 space */
131: mtpr $0,$P1LR
132: # asm("mtpr $0,$P2LR"); /* Invalidate P2 space */
133: mtpr $0,$P2LR
134: # }
135: ret
136: .set L24,0x0
137: L26:
138: subl3 $72,fp,sp
139: jbr L27
140: .data
141: .text
142: .align 1
143: .globl _ubit_chk
144: _ubit_chk:
145: .word L33
146: #
147: #
148: # /* This test check the Used bit in PTE */
149: # ubit_chk()
150: # {
151: jbr L35
152: L36:
153: # mubits_chk(SBR,SADDR,IOB0,'u',"System"); /* Test on System space*/
154: .data 1
155: L38:
156: .ascii "System\0"
157: .text
158: pushl $L38
159: pushl $117
160: andl3 $1073740800,$_iob0,r0
161: shrl $10,r0,r0
162: andl2 $1048575,r0
163: pushl r0
164: pushl $-1073741824
165: pushl $0
166: callf $24,_mubits_chk
167: # mubits_chk(P0BR,P0ADDR,IOB1,'u',"P0"); /* Test on P0 space */
168: .data 1
169: L39:
170: .ascii "P0\0"
171: .text
172: pushl $L39
173: pushl $117
174: andl3 $1073740800,$_iob1,r0
175: shrl $10,r0,r0
176: andl2 $1048575,r0
177: pushl r0
178: pushl $0
179: pushl $2
180: callf $24,_mubits_chk
181: # mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'u',"P1"); /* Test on P1 space */
182: .data 1
183: L40:
184: .ascii "P1\0"
185: .text
186: pushl $L40
187: pushl $117
188: pushl $0
189: pushl $1073741824
190: pushl $4
191: callf $24,_mubits_chk
192: # mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'u',"P2"); /* Test on P2 space */
193: .data 1
194: L41:
195: .ascii "P2\0"
196: .text
197: pushl $L41
198: pushl $117
199: pushl $1048575
200: pushl $-2147483648
201: pushl $6
202: callf $24,_mubits_chk
203: # }
204: ret
205: .set L33,0x0
206: L35:
207: jbr L36
208: .data
209: .text
210: .align 1
211: .globl _mbit_chk
212: _mbit_chk:
213: .word L42
214: #
215: #
216: #
217: # /* This test check the Modify bit in PTE */
218: # mbit_chk()
219: # {
220: jbr L44
221: L45:
222: # mubits_chk(SBR,SADDR,IOB0,'m',"System"); /* Test on System space*/
223: .data 1
224: L46:
225: .ascii "System\0"
226: .text
227: pushl $L46
228: pushl $109
229: andl3 $1073740800,$_iob0,r0
230: shrl $10,r0,r0
231: andl2 $1048575,r0
232: pushl r0
233: pushl $-1073741824
234: pushl $0
235: callf $24,_mubits_chk
236: # mubits_chk(P0BR,P0ADDR,IOB1,'m',"P0"); /* Test on P0 space */
237: .data 1
238: L47:
239: .ascii "P0\0"
240: .text
241: pushl $L47
242: pushl $109
243: andl3 $1073740800,$_iob1,r0
244: shrl $10,r0,r0
245: andl2 $1048575,r0
246: pushl r0
247: pushl $0
248: pushl $2
249: callf $24,_mubits_chk
250: # mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'m',"P1"); /* Test on P1 space */
251: .data 1
252: L48:
253: .ascii "P1\0"
254: .text
255: pushl $L48
256: pushl $109
257: pushl $0
258: pushl $1073741824
259: pushl $4
260: callf $24,_mubits_chk
261: # mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'m',"P2"); /* Test on P2 space */
262: .data 1
263: L49:
264: .ascii "P2\0"
265: .text
266: pushl $L49
267: pushl $109
268: pushl $1048575
269: pushl $-2147483648
270: pushl $6
271: callf $24,_mubits_chk
272: # }
273: ret
274: .set L42,0x0
275: L44:
276: jbr L45
277: .data
278: .text
279: .align 1
280: .globl _mubits_chk
281: _mubits_chk:
282: .word L50
283: #
284: #
285: # mubits_chk(pg_table, addr_space, pte_no, bit, str)
286: # long pg_table, addr_space, pte_no;
287: # char bit, *str;
288: # { long old_pte, mask;
289: jbr L52
290: L53:
291: # register long *r12, val;
292: #
293: # mask = 0;
294: clrl -60(fp)
295: # /* Set the test bit (Used/Modified) off */
296: # fixmuc_pte(pg_table, pte_no, &old_pte, mask);
297: pushl -60(fp)
298: subl3 $56,fp,r0
299: pushl r0
300: pushl 12(fp)
301: pushl 4(fp)
302: callf $20,_fixmuc_pte
303: # r12 = (long *) ((pte_no<<PGSHIFT) | addr_space);
304: shll $10,12(fp),r0
305: orl2 8(fp),r0
306: movl r0,r12
307: # test_va = (long)r12; /* Virtual address of test location */
308: movl r12,_test_va
309: # asm("movpsl _Tpsl");
310: movpsl _Tpsl
311: # if (bit == 'm') { /* Test Modify bit */
312: cmpb 19(fp),$109
313: jneq L55
314: # asm("movab Mbit,_Failpc");
315: movab Mbit,_Failpc
316: # asm("Mbit:");
317: Mbit:
318: # *r12 = 0; } /* Write to a location mapped by this pte */
319: clrl (r12)
320: # else { /* Test Used bit */
321: jbr L56
322: L55:
323: # asm("movab Ubit,_Failpc");
324: movab Ubit,_Failpc
325: # asm("Ubit:");
326: Ubit:
327: # val = *r12; } /* Read from a location mapped by this pte */
328: movl (r12),r11
329: L56:
330: # mask = -1;
331: mnegl $1,-60(fp)
332: # asm("mtpr $0,$PADC"); /* Purge all data cache */
333: mtpr $0,$PADC
334: # fixmuc_pte(pg_table, pte_no, &old_pte, mask); /* Read this PTE back */
335: pushl -60(fp)
336: subl3 $56,fp,r0
337: pushl r0
338: pushl 12(fp)
339: pushl 4(fp)
340: callf $20,_fixmuc_pte
341: # if ( bit == 'm')
342: cmpb 19(fp),$109
343: jneq L57
344: # { if (!(old_pte&PTE_M)) {
345: bitl $8388608,-56(fp)
346: jneq L58
347: # writes("** Modify bit is not set after a write\n");
348: .data 1
349: L59:
350: .ascii "** Modify bit is not set after a write\12\0"
351: .text
352: pushl $L59
353: callf $8,_writes
354: # ac_error1();
355: callf $4,_ac_error1
356: # writes("** Actual PTE : ");writeh(old_pte);writec('\n');
357: .data 1
358: L61:
359: .ascii "** Actual PTE : \0"
360: .text
361: pushl $L61
362: callf $8,_writes
363: pushl -56(fp)
364: callf $8,_writeh
365: pushl $10
366: callf $8,_writec
367: # asm("halt");
368: halt
369: # }
370: # /* The 1st machine donot implement Used bit
371: # if (!(old_pte & PTE_U))
372: # {
373: # writes("** Used bit is not set after a write\n");
374: # ac_error1();
375: # writes("** Actual PTE : ");writeh(old_pte);writec('\n');
376: # asm("halt");
377: # }
378: # */
379: # }
380: L58:
381: # else
382: jbr L64
383: L57:
384: # { if (!(old_pte & PTE_U))
385: bitl $4194304,-56(fp)
386: jneq L65
387: # {
388: # writes("** Test in ");writes(str);writes(" space **\n");
389: .data 1
390: L66:
391: .ascii "** Test in \0"
392: .text
393: pushl $L66
394: callf $8,_writes
395: pushl 20(fp)
396: callf $8,_writes
397: .data 1
398: L67:
399: .ascii " space **\12\0"
400: .text
401: pushl $L67
402: callf $8,_writes
403: # writes("** Used bit is not set after a read..\n");
404: .data 1
405: L68:
406: .ascii "** Used bit is not set after a read..\12\0"
407: .text
408: pushl $L68
409: callf $8,_writes
410: # }
411: # if (old_pte & PTE_M)
412: L65:
413: bitl $8388608,-56(fp)
414: jeql L69
415: # {
416: # writes("** Test in ");writes(str);writes(" space **\n");
417: .data 1
418: L70:
419: .ascii "** Test in \0"
420: .text
421: pushl $L70
422: callf $8,_writes
423: pushl 20(fp)
424: callf $8,_writes
425: .data 1
426: L71:
427: .ascii " space **\12\0"
428: .text
429: pushl $L71
430: callf $8,_writes
431: # writes("** Modify bit is set after a read..\n");
432: .data 1
433: L72:
434: .ascii "** Modify bit is set after a read..\12\0"
435: .text
436: pushl $L72
437: callf $8,_writes
438: # }
439: # }
440: L69:
441: L64:
442: # }
443: ret
444: .set L50,0x1800
445: L52:
446: subl3 $60,fp,sp
447: jbr L53
448: .data
449: #
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