cci/d/memman/mubits.s - view

File: [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / memman / mubits.s
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Sun Jul 28 12:24:19 2019 UTC (7 years ago) by root
Branches: bsd, MAIN
CVS tags: v12b, v121, HEAD

Power 6/32 Unix version 1.2b

LL0: .data .set SBR,0 .set SLR,1 .set P0BR,2 .set P0LR,3 .set P1BR,4 .set P1LR,5 .set P2BR,6 .set P2LR,7 .set IPL,8 .set MAPEN,9 .set MME,9 .set TBIA,10 .set TBIS,11 .set DCK,12 .set CCK,13 .set PCBB,14 .set KSP,19 .set USP,20 .set CPMDCB,21 .set PADC,25 .set DCR,27 .set DC_ON,1 .set DC_OFF,2 .set TB_ON,256 .set TB_OFF,512 .text .align 1 .globl _mu_test _mu_test: .word L24 # # #include "definitions" # # extern long savvec4, unused, iob0, iob1, iob2, iob3, u0p1pt, u0p2pt; # extern long ss1, test_va, Tpsl, Failpc; # # /* This test validate that TAHOE update the M(odify), U(used) bit # correctly after reference to PTE. # */ # # mu_test() # { long pte, pg_no, pte_sys, *temp, pte_p0; jbr L26 L27: # # if (ss1) writes("** Subtest4 : PTE modify bit test\n"); tstl _ss1 jeql L28 .data 1 L30: .ascii "** Subtest4 : PTE modify bit test\12\0" .text pushl $L30 callf $8,_writes # pg_no = 0; L28: clrl -60(fp) # asm("mfpr $SBR,_savvec4"); mfpr $SBR,_savvec4 # savvec4 |= 0xc0000000; orl2 $-1073741824,_savvec4 # asm("mtpr _savvec4,$P0BR"); /* Double map P0 into System space */ mtpr _savvec4,$P0BR # asm("mfpr $SLR,_savvec4"); mfpr $SLR,_savvec4 # asm("mtpr _savvec4,$P0LR"); mtpr _savvec4,$P0LR # # asm("mtpr $5,$DCK"); mtpr $5,$DCK # asm("mtpr $0,$TBIA"); mtpr $0,$TBIA # asm("mtpr $0,$PADC"); mtpr $0,$PADC # asm("mtpr $1,$MME"); mtpr $1,$MME # asm("jmp *$0f"); /* Go virtual */ jmp *$0f # asm("0:"); 0: # # /* Set up P1PT */ # temp = &u0p1pt; movl $_u0p1pt,-68(fp) # *temp = (IOB2) | (PTE_V | PTE_KW); /* 1st PTE in P1 map to IOB2 */ andl3 $1073740800,$_iob2,r0 shrl $10,r0,r0 andl2 $1048575,r0 orl2 $-536870912,r0 movl r0,*-68(fp) # savvec4 = ((long)temp) | SADDR; orl3 $-1073741824,-68(fp),r0 movl r0,_savvec4 # asm("mtpr _savvec4,$P1BR"); mtpr _savvec4,$P1BR # asm("mtpr $1,$P1LR"); mtpr $1,$P1LR # # /* Set up P2PT */ # temp = &u0p2pt; movl $_u0p2pt,-68(fp) # *temp = (IOB3) | (PTE_V | PTE_KW); /* 1st PTE in P2 map to IOB3 */ andl3 $1073740800,$_iob3,r0 shrl $10,r0,r0 andl2 $1048575,r0 orl2 $-536870912,r0 movl r0,*-68(fp) # savvec4 = ((long)temp) | SADDR; orl3 $-1073741824,-68(fp),r0 movl r0,_savvec4 # savvec4 -= (LAST_VPGNO << 2); subl2 $4194300,_savvec4 # asm("mtpr _savvec4, $P2BR"); mtpr _savvec4, $P2BR # asm("mtpr $0xffffe, $P2LR"); /* Use only 1 entry */ mtpr $0xffffe, $P2LR # # /* 1st machine donot implement the Used bit # ubit_chk(); # */ # mbit_chk(); callf $4,_mbit_chk # # asm("mtpr $0,$MME"); /* Back to physical */ mtpr $0,$MME # asm("mtpr $0,$P0LR"); /* Invalidate P0 space */ mtpr $0,$P0LR # asm("mtpr $0,$P1LR"); /* Invalidate P1 space */ mtpr $0,$P1LR # asm("mtpr $0,$P2LR"); /* Invalidate P2 space */ mtpr $0,$P2LR # } ret .set L24,0x0 L26: subl3 $72,fp,sp jbr L27 .data .text .align 1 .globl _ubit_chk _ubit_chk: .word L33 # # # /* This test check the Used bit in PTE */ # ubit_chk() # { jbr L35 L36: # mubits_chk(SBR,SADDR,IOB0,'u',"System"); /* Test on System space*/ .data 1 L38: .ascii "System\0" .text pushl $L38 pushl $117 andl3 $1073740800,$_iob0,r0 shrl $10,r0,r0 andl2 $1048575,r0 pushl r0 pushl $-1073741824 pushl $0 callf $24,_mubits_chk # mubits_chk(P0BR,P0ADDR,IOB1,'u',"P0"); /* Test on P0 space */ .data 1 L39: .ascii "P0\0" .text pushl $L39 pushl $117 andl3 $1073740800,$_iob1,r0 shrl $10,r0,r0 andl2 $1048575,r0 pushl r0 pushl $0 pushl $2 callf $24,_mubits_chk # mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'u',"P1"); /* Test on P1 space */ .data 1 L40: .ascii "P1\0" .text pushl $L40 pushl $117 pushl $0 pushl $1073741824 pushl $4 callf $24,_mubits_chk # mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'u',"P2"); /* Test on P2 space */ .data 1 L41: .ascii "P2\0" .text pushl $L41 pushl $117 pushl $1048575 pushl $-2147483648 pushl $6 callf $24,_mubits_chk # } ret .set L33,0x0 L35: jbr L36 .data .text .align 1 .globl _mbit_chk _mbit_chk: .word L42 # # # # /* This test check the Modify bit in PTE */ # mbit_chk() # { jbr L44 L45: # mubits_chk(SBR,SADDR,IOB0,'m',"System"); /* Test on System space*/ .data 1 L46: .ascii "System\0" .text pushl $L46 pushl $109 andl3 $1073740800,$_iob0,r0 shrl $10,r0,r0 andl2 $1048575,r0 pushl r0 pushl $-1073741824 pushl $0 callf $24,_mubits_chk # mubits_chk(P0BR,P0ADDR,IOB1,'m',"P0"); /* Test on P0 space */ .data 1 L47: .ascii "P0\0" .text pushl $L47 pushl $109 andl3 $1073740800,$_iob1,r0 shrl $10,r0,r0 andl2 $1048575,r0 pushl r0 pushl $0 pushl $2 callf $24,_mubits_chk # mubits_chk(P1BR,P1ADDR,TEST_PTEP1,'m',"P1"); /* Test on P1 space */ .data 1 L48: .ascii "P1\0" .text pushl $L48 pushl $109 pushl $0 pushl $1073741824 pushl $4 callf $24,_mubits_chk # mubits_chk(P2BR,P2ADDR,TEST_PTEP2,'m',"P2"); /* Test on P2 space */ .data 1 L49: .ascii "P2\0" .text pushl $L49 pushl $109 pushl $1048575 pushl $-2147483648 pushl $6 callf $24,_mubits_chk # } ret .set L42,0x0 L44: jbr L45 .data .text .align 1 .globl _mubits_chk _mubits_chk: .word L50 # # # mubits_chk(pg_table, addr_space, pte_no, bit, str) # long pg_table, addr_space, pte_no; # char bit, *str; # { long old_pte, mask; jbr L52 L53: # register long *r12, val; # # mask = 0; clrl -60(fp) # /* Set the test bit (Used/Modified) off */ # fixmuc_pte(pg_table, pte_no, &old_pte, mask); pushl -60(fp) subl3 $56,fp,r0 pushl r0 pushl 12(fp) pushl 4(fp) callf $20,_fixmuc_pte # r12 = (long *) ((pte_no<<PGSHIFT) | addr_space); shll $10,12(fp),r0 orl2 8(fp),r0 movl r0,r12 # test_va = (long)r12; /* Virtual address of test location */ movl r12,_test_va # asm("movpsl _Tpsl"); movpsl _Tpsl # if (bit == 'm') { /* Test Modify bit */ cmpb 19(fp),$109 jneq L55 # asm("movab Mbit,_Failpc"); movab Mbit,_Failpc # asm("Mbit:"); Mbit: # *r12 = 0; } /* Write to a location mapped by this pte */ clrl (r12) # else { /* Test Used bit */ jbr L56 L55: # asm("movab Ubit,_Failpc"); movab Ubit,_Failpc # asm("Ubit:"); Ubit: # val = *r12; } /* Read from a location mapped by this pte */ movl (r12),r11 L56: # mask = -1; mnegl $1,-60(fp) # asm("mtpr $0,$PADC"); /* Purge all data cache */ mtpr $0,$PADC # fixmuc_pte(pg_table, pte_no, &old_pte, mask); /* Read this PTE back */ pushl -60(fp) subl3 $56,fp,r0 pushl r0 pushl 12(fp) pushl 4(fp) callf $20,_fixmuc_pte # if ( bit == 'm') cmpb 19(fp),$109 jneq L57 # { if (!(old_pte&PTE_M)) { bitl $8388608,-56(fp) jneq L58 # writes("** Modify bit is not set after a write\n"); .data 1 L59: .ascii "** Modify bit is not set after a write\12\0" .text pushl $L59 callf $8,_writes # ac_error1(); callf $4,_ac_error1 # writes("** Actual PTE : ");writeh(old_pte);writec('\n'); .data 1 L61: .ascii "** Actual PTE : \0" .text pushl $L61 callf $8,_writes pushl -56(fp) callf $8,_writeh pushl $10 callf $8,_writec # asm("halt"); halt # } # /* The 1st machine donot implement Used bit # if (!(old_pte & PTE_U)) # { # writes("** Used bit is not set after a write\n"); # ac_error1(); # writes("** Actual PTE : ");writeh(old_pte);writec('\n'); # asm("halt"); # } # */ # } L58: # else jbr L64 L57: # { if (!(old_pte & PTE_U)) bitl $4194304,-56(fp) jneq L65 # { # writes("** Test in ");writes(str);writes(" space **\n"); .data 1 L66: .ascii "** Test in \0" .text pushl $L66 callf $8,_writes pushl 20(fp) callf $8,_writes .data 1 L67: .ascii " space **\12\0" .text pushl $L67 callf $8,_writes # writes("** Used bit is not set after a read..\n"); .data 1 L68: .ascii "** Used bit is not set after a read..\12\0" .text pushl $L68 callf $8,_writes # } # if (old_pte & PTE_M) L65: bitl $8388608,-56(fp) jeql L69 # { # writes("** Test in ");writes(str);writes(" space **\n"); .data 1 L70: .ascii "** Test in \0" .text pushl $L70 callf $8,_writes pushl 20(fp) callf $8,_writes .data 1 L71: .ascii " space **\12\0" .text pushl $L71 callf $8,_writes # writes("** Modify bit is set after a read..\n"); .data 1 L72: .ascii "** Modify bit is set after a read..\12\0" .text pushl $L72 callf $8,_writes # } # } L69: L64: # } ret .set L50,0x1800 L52: subl3 $60,fp,sp jbr L53 .data #

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