![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to vtest.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / memman|
Return to vtest.c CVS log | Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / memman |
1.1 ! root 1: ! 2: #include "definitions" ! 3: ! 4: /* testing virtual read/write in physical mode ! 5: 1st unused PTE in SPT is mapped to physical page iob3 (25) ! 6: 1st PTE in P0PT is mapped to physical page iob0 (22) ! 7: 1st PTE in P1PT is mapped to physical page iob1 (23) ! 8: 1st PTE in P2PT is mapped to physical page iob2 (24) ! 9: */ ! 10: ! 11: extern long u0p0pt, u0p1pt, u0p2pt, ss1; ! 12: extern long unused, iob0, iob1, iob2, iob3, Sysmap; ! 13: extern long savvec4, savvec5, savvec6; ! 14: char *msg1, *msg2; ! 15: long Phys_adr, Fail_pc; ! 16: ! 17: vtest() ! 18: { ! 19: if (ss1) ! 20: writes("** Subtest1 : diagnostic virtual read/write\n"); ! 21: Fail_pc = 0; ! 22: fix_maps(); /* set up SBR,P0PT,P1PT,P2PT */ ! 23: ! 24: /* Try to read/write to memory in virtual ! 25: mode by using the diagostic intruction ! 26: */ ! 27: test1_sgl(); /* read/write at single location */ ! 28: test1_pg(); /* read/write on whole page */ ! 29: asm("mfpr $SBR,_savvec4"); /* Set up maps to go virtual */ ! 30: savvec4 |= 0xc0000000; ! 31: asm("mtpr _savvec4,$P0BR"); /* Double map P0 in System space */ ! 32: asm("mfpr $SLR,_savvec4"); ! 33: asm("mtpr _savvec4,$P0LR"); ! 34: asm("mtpr $0,$TBIA"); /* Purge all translation buffer */ ! 35: asm("mtpr $1,$MME"); /* Enable MME */ ! 36: asm("jmp *$0f"); /* Go !! */ ! 37: asm("0:"); ! 38: /* Now program is running running virtual ! 39: in P0 space, Kernel privilege ! 40: */ ! 41: vt1_pg(); /* read/write on whole page */ ! 42: asm("mtpr $0,$MME"); /* Back to physical */ ! 43: asm("mtpr $0,$P0LR"); /* invalidate P0BR */ ! 44: } ! 45: ! 46: ! 47: /* Test using diagnostic instruction to do virtual read from 1st location ! 48: and virtual write to last location in test pages of System, P0, P1, P2 ! 49: space. Program is running in PHYSICAL mode. ! 50: */ ! 51: test1_sgl() ! 52: { ! 53: t1s_sys(); /* test SPT */ ! 54: t1s_usr(); /* test P0PT, P1PT, P2PT */ ! 55: } ! 56: ! 57: ! 58: /* Test using diagnostic instruction to do virtual read/write a page ! 59: in System, P0, P1, P2 space. Program is running in PHYSICAL mode. ! 60: */ ! 61: test1_pg() ! 62: { long loc, *lptr, vaddr; ! 63: ! 64: asm("mtpr $0,$TBIA"); /* Invalidate translation buffers */ ! 65: asm("mtpr $0,$PADC"); /* Purge data cache */ ! 66: ! 67: /* 1st unused virtual page (Set by init.x) in system space ! 68: is mapped to physical page of _iob3. ! 69: */ ! 70: lptr = &unused; /* 1st unused virtual page no. */ ! 71: loc = ((*lptr)<<PGSHIFT)|SADDR; ! 72: t1p_diag(&iob3,loc); /* test in system space */ ! 73: ! 74: vaddr = 0|P0ADDR; ! 75: t1p_diag(&iob0, vaddr); /* test P0 space */ ! 76: ! 77: vaddr = 0|P1ADDR; ! 78: t1p_diag(&iob1, vaddr); /* test P1 space */ ! 79: ! 80: loc = LAST_VPGNO << PGSHIFT; ! 81: vaddr = loc | P2ADDR; ! 82: t1p_diag(&iob2, vaddr); /* test P2 space */ ! 83: } ! 84: ! 85: /* This routine runs in virtual mode and try to read/write to a ! 86: page in System, P0, P1, P2 space. ! 87: System : 1st unused virtual page is mapped to the physical ! 88: page of _iob3. ! 89: P0 : Has the same map as system. 1st virtual page is ! 90: mapped to physical page of _iob0. ! 91: P1 : 1st virtual page is mapped the physical page of ! 92: _iob1. ! 93: P2 : Last virtual page is mapped the physical page of ! 94: _iob2. ! 95: */ ! 96: vt1_pg() ! 97: { ! 98: vt1_page(SBR,&iob3); /* test in system space */ ! 99: vt1_page(P0BR,&iob0); /* test in P0 space */ ! 100: vt1_page(P1BR,&iob1); /* test in P1 space */ ! 101: vt1_page(P2BR,&iob2); /* test in P2 space */ ! 102: } ! 103: ! 104: ! 105: /* This routine runs in virtual mode and read/write to a page. ! 106: Input : page = physical address of 1st longword of the page ! 107: that mapped to the test (virtual) page. ! 108: space= Space the virtual page is in. ! 109: READ test : This routine first disable MME to initialize the test ! 110: page with value from 0 to 1023 in physical mode and then turn on ! 111: MME to read back virtually and check against the value 0 - 1023. ! 112: ! 113: WRITE test : The same page used in Read test is cleared in physical ! 114: mode. The test then turn on MME and write to the test page with ! 115: value 0 -1023 and disable MME, read back the contents of the page ! 116: in physical mode and compare to 0-1023. ! 117: */ ! 118: vt1_page(space, page) ! 119: long space, page; ! 120: { long *lptr, pte, page_no, v_adr, old_pte, vaddr, access; ! 121: int ix; ! 122: ! 123: /* initialize test page with value 0-1023 */ ! 124: page_no = arithsr(((unsigned)(page & 0x3fffffff))); ! 125: asm("mtpr $0,$MME"); /* Disable MME */ ! 126: write_pg(0,page_no,0,1); ! 127: asm("mtpr $1,$MME"); /* Enable MME */ ! 128: asm("mtpr $0,$PADC"); /* Purge all data cache */ ! 129: ! 130: v_adr = 0; ! 131: if (space==SBR) { ! 132: lptr = &unused; ! 133: v_adr = ((*lptr)<<PGSHIFT) & 0x3ffffc00; ! 134: vaddr = v_adr | SADDR; ! 135: } ! 136: if (space==P0BR) { ! 137: /* Map 1st PTE in P0BR <or SBR> to iob0 */ ! 138: pte = arithsr(((unsigned)&iob0)) & 0xfffff; ! 139: fixpfn_pte(SBR,0,&old_pte,pte); ! 140: access = PTE_V | PTE_UW; ! 141: fixpv_pte(SBR,0,&old_pte, access); ! 142: vaddr = v_adr | P0ADDR; ! 143: } ! 144: if (space==P1BR) vaddr = v_adr | P1ADDR; ! 145: if (space==P2BR) { ! 146: v_adr = LAST_VPGNO << PGSHIFT; ! 147: vaddr = v_adr | P2ADDR; ! 148: } ! 149: vt1_read(vaddr,page); /* This routine read virtual and compare */ ! 150: ! 151: asm("mtpr $0,$MME"); /* Disable MME */ ! 152: write_pg(0,page_no,0,0); /* Clear test page */ ! 153: asm("mtpr $1,$MME"); /* Enable MME */ ! 154: ! 155: if (space==SBR) vt1_write(v_adr|SADDR, &iob3); ! 156: if (space==P0BR) { ! 157: vt1_write(v_adr|P0ADDR, &iob0); ! 158: fixpfn_pte(SBR,0,&old_pte,0); ! 159: fixpv_pte(SBR,0,&old_pte, PTE_V | PTE_KW); ! 160: } ! 161: if (space==P1BR) vt1_write(v_adr|P1ADDR, &iob1); ! 162: if (space==P2BR) vt1_write(v_adr|P2ADDR, &iob2); ! 163: ! 164: page_no = page_no; ! 165: asm("mtpr $0,$MME"); /* Disable MME */ ! 166: write_pg(0,page_no,0,0); /* Clear test page */ ! 167: asm("mtpr $1,$MME"); /* Enable MME */ ! 168: } ! 169: ! 170: ! 171: /* This routine runs virtual in user space ,kernel mode. It reads ! 172: the contents of the test virtual page and compare to values ! 173: 0-1023. ! 174: Input : v_adr = 1st virtual address of test page ! 175: physadr = 1st physical address of test page ! 176: */ ! 177: vt1_read(v_adr,physadr) ! 178: long v_adr, physadr; ! 179: { long *lptr, ix, act_data; ! 180: register long *r12, r11; ! 181: ! 182: msg1 = "\n** fail when read whole page virtually ..\n"; ! 183: msg2 = ""; ! 184: asm("movab _Fpcr,_Fail_pc"); ! 185: Phys_adr = physadr; ! 186: ! 187: lptr = (long *)v_adr; /* 1st virtual address */ ! 188: asm("mtpr $1,$PADC"); /* Purge all data cache */ ! 189: for (ix=0; ix<NBPG; ix += 4) { ! 190: Phys_adr += ix; /* Phys. address of loc. to be read */ ! 191: r12 = lptr++; ! 192: asm("_Fpcr:"); ! 193: r11 = *r12; ! 194: act_data = r11; ! 195: if (act_data != ix) error1(msg1,msg2,ix,act_data,lptr-1); ! 196: } ! 197: } ! 198: ! 199: ! 200: /* This routine runs virtual in user space ,kernel mode. It writes ! 201: the contents of the test virtual page with values 0 - 1023, ! 202: then disable map,running physical, reads contents of the test ! 203: page back and compares to value 0-1023. ! 204: Input : p_adr = physical address of 1st longword of the ! 205: test page. ! 206: v_adr = virtual address of 1st longword of the ! 207: test page. ! 208: */ ! 209: vt1_write(v_adr, p_adr) ! 210: long v_adr, *p_adr; ! 211: { long act_data, *lptr; ! 212: register long *r12, ix; ! 213: ! 214: msg1 = "** fail when write whole page ..\n"; ! 215: msg2 = ""; ! 216: asm("movab Fpcw,_Fail_pc"); ! 217: ! 218: lptr = (long *)v_adr; ! 219: for (ix=0; ix<NBPG; ix += 4) { ! 220: r12 = lptr++; ! 221: asm("Fpcw:"); ! 222: *r12 = ix; /* write in virtual */ ! 223: } ! 224: ! 225: asm("mtpr $0,$PADC"); /* Purge all data cache */ ! 226: asm("mtpr $0,$MME"); /* Disable MME */ ! 227: lptr = (long *)v_adr; ! 228: for (ix=0; ix<NBPG; ix += 4) ! 229: { ! 230: Phys_adr = (long)p_adr; ! 231: act_data = *p_adr++; /* Read in physical mode */ ! 232: if (act_data != ix) error1(msg1,msg2,ix,act_data,lptr); ! 233: lptr++; ! 234: } ! 235: asm("mtpr $1,$MME"); /* Enable MME */ ! 236: } ! 237: ! 238: ! 239: ! 240: t1s_sys() ! 241: { long *lptr, loc, val, exp_data, act_data; ! 242: register long r12; ! 243: ! 244: msg1 = " MTPR $VREAD,$DCR failed\n"; ! 245: msg2 = " Test on single location\n"; ! 246: asm("movab _Pcr,_Fail_pc"); ! 247: ! 248: /* 1st unused virtual page in system space is mapped to ! 249: the physical page of _iob3. Initialize 1st longword ! 250: in _iob3 with pattern 0xaaaaaaaa ! 251: */ ! 252: exp_data = 0xaaaaaaaa; ! 253: lptr = (long *)(((long)(&iob3)) & 0xfffffc00); ! 254: *lptr = exp_data; ! 255: Phys_adr = (long)lptr; ! 256: ! 257: /* Test address : 1st longword in unused virtual page */ ! 258: loc = (unused << PGSHIFT & 0x3ffffc00) | SADDR; ! 259: act_data = vread(loc); ! 260: if (exp_data != act_data) ! 261: error1(msg1,msg2,exp_data,act_data,loc); ! 262: ! 263: /* write last location in iob3 using diagnostic instruction */ ! 264: msg1 = " MTPR $VWRITE,$DCR failed\n"; ! 265: asm("movab _Pcw,_Fail_pc"); ! 266: ! 267: exp_data = 0xbbbbbbbb; ! 268: Phys_adr += 0x3fc; ! 269: loc += 0x3fc; ! 270: vwrite(loc,exp_data); ! 271: lptr += 255; /* address of last longword */ ! 272: act_data = *lptr; ! 273: if (exp_data != act_data) ! 274: error1(msg1,msg2,exp_data,act_data,loc); ! 275: } ! 276: ! 277: /* This routine running in PHYSICAL mode and try to use the diagnostic ! 278: instruction to do virtual read/write to a page. ! 279: Input : v_adr = Virtual address of the 1st longword in the ! 280: test page. ! 281: test_pg = Physical address of the 1st longword in the ! 282: page that is mapped to the test page ! 283: READ test : Each location in the test page is initialized with its ! 284: unique physical address and then read back virtually using the ! 285: diagnostic instruction to check against the physical addresses. ! 286: ! 287: WRITE test : The same page used in Read test is cleared in physical ! 288: mode and then using the diagnostic instruction to write virtually ! 289: to each location with its unique address. Each location in this page ! 290: is then read back in physical mode and check against its the physical ! 291: address. ! 292: */ ! 293: ! 294: t1p_diag(test_pg, v_adr) ! 295: long test_pg, v_adr; ! 296: { long page_no, *lptr, loc, val, exp_data, act_data; ! 297: int ix; ! 298: ! 299: /* TEST VIRTUAL READ USING DIAGNOSTIC INSTRUCTION */ ! 300: msg1 = "\n MTPR $VREAD,$DCR failed \n"; ! 301: msg2 = " Test with whole page\n"; ! 302: asm("movab _Pcr,_Fail_pc"); ! 303: ! 304: /* initialize each location in test page with its address */ ! 305: page_no = arithsr(((unsigned)((long)test_pg & 0x3fffffff))); ! 306: write_pg(0,page_no,test_pg,1); ! 307: ! 308: loc = v_adr; ! 309: for(exp_data=test_pg; exp_data<test_pg+NBPG; exp_data+=4) ! 310: { act_data = vread(loc); ! 311: Phys_adr = exp_data; ! 312: if (exp_data != act_data) ! 313: error1(msg1,msg2,exp_data,act_data,loc); ! 314: else loc += 4; ! 315: } ! 316: /* TEST VIRTUAL WRITE USING DIAGNOSTIC INSTRUCTION */ ! 317: msg1 = "\n MTPR $VWRITE,$DCR failed \n"; ! 318: asm("movab _Pcw,_Fail_pc"); ! 319: ! 320: write_pg(0,page_no,0,0); /* clear test page */ ! 321: loc = v_adr; ! 322: ! 323: /* write to each location its physical address */ ! 324: for(exp_data=test_pg; exp_data<test_pg+NBPG; exp_data+=4) ! 325: { ! 326: vwrite(loc,exp_data); /* virtual write in system mode */ ! 327: loc += 4; } ! 328: loc = v_adr; /* virtual location */ ! 329: lptr = (long *)test_pg; /* mapped to this physical loc */ ! 330: for(exp_data=test_pg; exp_data<test_pg+NBPG; exp_data+=4) ! 331: { ! 332: Phys_adr = (long)lptr; ! 333: act_data = *lptr++; ! 334: if (exp_data != act_data) ! 335: error1(msg1,msg2,exp_data,act_data,loc); ! 336: loc += 4; ! 337: } ! 338: } ! 339: ! 340: /* Routine using the diagnostic instruction to read/write single ! 341: locations in P0, P1, P2 space. ! 342: */ ! 343: t1s_usr() ! 344: { long *lptr, exp_data, loc, val, act_data; ! 345: long phys0, phys1, phys2; ! 346: ! 347: /* Virtual Page 0 of P0 is mapped to _iob0, initialize ! 348: 1st longword in _iob0 with pattern 0xaaaaaaaa */ ! 349: exp_data = 0xaaaaaaaa; ! 350: lptr = (long *)(((long)(&iob0)) & 0xfffffc00); ! 351: *lptr = exp_data; ! 352: phys0 = (long)lptr; /* Physical addr of test location */ ! 353: ! 354: /* Virtual Page 0 of P1 is mapped to _iob1, initialize ! 355: 1st longword in _iob1 with pattern 0xbbbbbbbb */ ! 356: exp_data = 0xbbbbbbbb; ! 357: lptr = (long *)(((long)(&iob1)) & 0xfffffc00); ! 358: *lptr = exp_data; ! 359: phys1 = (long)lptr; /* Physical addr of test location */ ! 360: ! 361: /* Last Virtual Page of P2 is mapped to _iob2, initialize ! 362: 1st longword in _iob2 with pattern 0xcccccccc */ ! 363: exp_data = 0xcccccccc; ! 364: lptr = (long *)(((long)(&iob2)) & 0xfffffc00); ! 365: *lptr = exp_data; ! 366: phys2 = (long)lptr; /* Physical addr of test location */ ! 367: ! 368: /* now use diagnostic inst. to read them in virtual mode */ ! 369: msg1 = "\n MTPR $VREAD,$DCR failed \n"; ! 370: msg2 = " Test on single location\n"; ! 371: asm("movab _Pcr,_Fail_pc"); ! 372: Phys_adr = phys0; /* Physical addr of test location */ ! 373: ! 374: loc = 0|P0ADDR; ! 375: act_data = 0; ! 376: act_data = vread(loc); /* read in P0 space */ ! 377: exp_data = 0xaaaaaaaa; ! 378: if (exp_data != act_data) ! 379: error1(msg1,msg2,exp_data,act_data,loc); ! 380: ! 381: Phys_adr = phys1; /* Physical addr of test location */ ! 382: loc = 0|P1ADDR; ! 383: act_data = 0; ! 384: act_data = vread(loc); /* read in P1 space */ ! 385: exp_data = 0xbbbbbbbb; ! 386: if (exp_data != act_data) ! 387: error1(msg1,msg2,exp_data,act_data,loc); ! 388: ! 389: Phys_adr = phys2; /* Physical addr of test location */ ! 390: loc = (LAST_VPGNO << PGSHIFT) | P2ADDR; ! 391: act_data = 0; ! 392: act_data = vread(loc); /* read in P2 space */ ! 393: exp_data = 0xcccccccc; ! 394: if (exp_data != act_data) ! 395: error1(msg1,msg2,exp_data,act_data,loc); ! 396: ! 397: /* Virtual Page 0 of P0 is mapped to _iob0, try to use ! 398: the diagnostic instruction to write to last longword ! 399: in _iob0 with pattern 0x11111111. ! 400: */ ! 401: asm("movab _Pcw,_Fail_pc"); ! 402: msg1 = " MTPR $VWRITE,$DCR failed\n"; ! 403: ! 404: exp_data = 0x11111111; /* Write last location in P0 */ ! 405: lptr = (long *)((((long)(&iob0)) & 0xfffffc00) + 0x3fc); ! 406: Phys_adr = (long)lptr; /* Physical addr of test location */ ! 407: loc = (0 | P0ADDR) + 0x3fc; /* equivalent virtual address */ ! 408: vwrite(loc,exp_data); ! 409: act_data = *lptr; ! 410: if (exp_data != act_data) ! 411: error1(msg1,msg2,exp_data,act_data,loc); ! 412: ! 413: /* Virtual Page 0 of P1 is mapped to _iob1, try to use ! 414: the diagnostic instruction to write to last longword ! 415: in _iob1 with pattern 0x22222222. ! 416: */ ! 417: exp_data = 0x22222222; /* Write last location in P1 */ ! 418: lptr = (long *)((((long)(&iob1)) & 0xfffffc00) + 0x3fc); ! 419: Phys_adr = (long)lptr; /* Physical addr of test location */ ! 420: loc = (0 | P1ADDR) + 0x3fc; /* equivalent virtual address */ ! 421: vwrite(loc,exp_data); ! 422: act_data = *lptr; ! 423: if (exp_data != act_data) ! 424: error1(msg1,msg2,exp_data,act_data,loc); ! 425: ! 426: /* Virtual Page 0 of P2 is mapped to _iob2, try to use ! 427: the diagnostic instruction to write to last longword ! 428: in _iob2 with pattern 0x33333333. ! 429: */ ! 430: exp_data = 0x33333333; /* Write last location in P2 */ ! 431: lptr = (long *)((((long)(&iob2)) & 0xfffffc00) + 0x3fc); ! 432: Phys_adr = (long)lptr; /* Physical addr of test location */ ! 433: loc = ( (LAST_VPGNO << PGSHIFT) | P2ADDR) + 0x3fc; ! 434: vwrite(loc,exp_data); ! 435: act_data = *lptr; ! 436: if (exp_data != act_data) ! 437: error1(msg1,msg2,exp_data,act_data,loc); ! 438: } ! 439: ! 440: /* This routine fix SBR, P0PT, P1PT, P2PT as follow : ! 441: SBR : map 1st unused virtual page in System map to ! 442: the physica page of _iob3. ! 443: P0PT: map virtual page 0 of P0 space to the physical ! 444: page of _iob0 ! 445: P1PT: map virtual page 0 of P1 space to the physical ! 446: page of _iob1 ! 447: P2PT: map last virtual page of P2 space to the physical ! 448: page of _iob2 ! 449: */ ! 450: fix_maps() ! 451: { ! 452: long *temp, pte, pfn, lx; ! 453: long *lptr, pte_no, old_pte0, old_pte1, access; ! 454: ! 455: /* Fix up System Page Table */ ! 456: lptr = &unused; ! 457: pte_no = *lptr; ! 458: pte = arithsr(((unsigned)&iob3)) & 0xfffff; ! 459: fixpfn_pte(SBR,pte_no,&old_pte0,pte); ! 460: access = PTE_V | PTE_KW; ! 461: fixpv_pte(SBR,pte_no,&old_pte1, access); ! 462: ! 463: /* Set up P0PT */ ! 464: lx = arithsr(((unsigned)(&iob0) & 0x3ffffc00)) ; ! 465: pfn = lx & 0xfffff; ! 466: pte = pfn | (PTE_V | PTE_UW); ! 467: temp = &u0p0pt; ! 468: *temp = pte; /* 1st page in P0 mapped to IOB0 */ ! 469: savvec4 = ((long)temp) | SADDR; /* system virtual address */ ! 470: asm("mtpr _savvec4,$P0BR"); ! 471: asm("mtpr $1,$P0LR"); ! 472: ! 473: /* Set up P1PT */ ! 474: lx = arithsr(((unsigned)(&iob1) & 0x3ffffc00)) ; ! 475: pfn = lx & 0xfffff; ! 476: pte = pfn | (PTE_V | PTE_UW); ! 477: temp = &u0p1pt; ! 478: *temp = pte; /* 1st page in P1 mapped to IOB1 */ ! 479: savvec4 = ((long)temp) | SADDR; ! 480: asm("mtpr _savvec4,$P1BR"); ! 481: asm("mtpr $1,$P1LR"); ! 482: ! 483: /* Set up P2PT */ ! 484: lx = arithsr(((unsigned)(&iob2) & 0x3ffffc00)) ; ! 485: pfn = lx & 0xfffff; ! 486: pte = pfn | (PTE_V | PTE_UW); ! 487: temp = &u0p2pt; ! 488: *temp = pte; /* 1st PTE in P2 mapped to IOB2 */ ! 489: savvec4 = ((long)temp) | SADDR; ! 490: savvec4 -= (LAST_VPGNO << 2); /* This is how P2BR works !! */ ! 491: asm("mtpr _savvec4 ,$P2BR"); ! 492: asm("mtpr $0xffffe,$P2LR"); /* use only 1 entry */ ! 493: asm("mtpr $0,$TBIA"); /* invalidate all cache */ ! 494: } ! 495: ! 496: extern long dummy; ! 497: ! 498: arithsr(num) ! 499: long num; ! 500: { ! 501: asm("shar $10,4(fp),_dummy"); ! 502: return(dummy); ! 503: } ! 504: ! 505: error1(mss1,mss2,exp,act,loc) ! 506: char *mss1, *mss2; ! 507: long exp, act, loc; ! 508: { register long r12; ! 509: ! 510: writes(mss1); writes(mss2); ! 511: ! 512: writes("** PC : "); writeh(Fail_pc); writec('\n'); ! 513: writes("** VA of test loc. : "); writeh(loc); writec('\n'); ! 514: writes("** PA of test loc. : "); writeh(Phys_adr); writec('\n'); ! 515: writes("** Expected data : "); writeh(exp); writec('\n'); ! 516: writes("** Actual data : "); writeh(act); writec('\n'); ! 517: ! 518: prt_base(loc); /* Print base registers */ ! 519: asm("halt"); ! 520: } ! 521: ! 522: ! 523: /* THESE FOLLOWING ROUTINES USE THE DIANOSTIC CONTROL REGISTER ! 524: TO DO VIRTUAL READ/WRITE WHILE RUNNING IN PHYSICAL MODE ! 525: */ ! 526: ! 527: int vread(loc) /* virtual read in user mode */ ! 528: long loc; ! 529: { ! 530: savvec5 = loc; ! 531: asm("movl _savvec5,r0"); /* R0 : virtual address to read */ ! 532: asm("_Pcr:"); ! 533: asm("mtpr $4,$DCR"); /* 4 : Read opcode */ ! 534: asm("movl r1,_savvec5"); /* R1 : read data */ ! 535: return(savvec5); ! 536: } ! 537: ! 538: ! 539: vwrite(loc,val) /* virtual write in user mode */ ! 540: long loc, val; ! 541: { ! 542: savvec5 = loc; ! 543: savvec6 = val; ! 544: asm("movl _savvec5,r0"); /* R0 : virtual address to write */ ! 545: asm("movl _savvec6,r1"); /* R1 : data to write */ ! 546: asm("_Pcw:"); ! 547: asm("mtpr $8,$DCR"); /* 8 : Write opcode */ ! 548: } ! 549: ! 550: prt_base(va) ! 551: long va; ! 552: { register long r12; ! 553: ! 554: asm("mfpr $MME,r12"); ! 555: writes("** MME : "); writeh(r12); writec('\n'); ! 556: asm("mfpr $SBR,r12"); ! 557: writes("** SBR : "); writeh(r12); writec('\n'); ! 558: asm("mfpr $SLR,r12"); ! 559: writes("** SLR : "); writeh(r12); writec('\n'); ! 560: if ((va&0xc0000000)==0) { ! 561: asm("mfpr $P0BR,r12"); ! 562: writes("** P0BR : "); writeh(r12); writec('\n'); ! 563: asm("mfpr $P0LR,r12"); ! 564: writes("** P0LR : "); writeh(r12); writec('\n'); ! 565: } ! 566: if ((va&0xc0000000)==0x40000000) { ! 567: asm("mfpr $P1BR,r12"); ! 568: writes("** P1BR : "); writeh(r12); writec('\n'); ! 569: asm("mfpr $P1LR,r12"); ! 570: writes("** P1LR : "); writeh(r12); writec('\n'); ! 571: } ! 572: if ((va&0xc0000000)==0x80000000) { ! 573: asm("mfpr $P2BR,r12"); ! 574: writes("** P2BR : "); writeh(r12); writec('\n'); ! 575: asm("mfpr $P2LR,r12"); ! 576: writes("** P2LR : "); writeh(r12); writec('\n'); ! 577: } ! 578: } ! 579:
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.