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1.1 ! root 1: /* ! 2: * Interrupt vector routines ! 3: */ ! 4: ! 5: #define SCBVEC(name) .align 2 \ ! 6: .globl _X/**/name \ ! 7: _X/**/name ! 8: #define PANIC(msg) clrl _waittime \ ! 9: pushab 1f \ ! 10: calls $1*4+4,_panic \ ! 11: halt \ ! 12: 1: .asciz msg ! 13: #define PRINTF(n,msg) pushab 1f; calls $(n+1)*4+4,_printf; MSG(msg) ! 14: #define MSG(msg) 1: .asciz msg ! 15: #define PUSHR pushl r5; pushl r4; pushl r3; pushl r2;\ ! 16: pushl r1; pushl r0 ! 17: ! 18: #define POPR movl (sp)+,r0 \ ! 19: movl (sp)+,r1 \ ! 20: movl (sp)+,r2 \ ! 21: movl (sp)+,r3 \ ! 22: movl (sp)+,r4 \ ! 23: movl (sp)+,r5 ! 24: /* ! 25: *unknown interrupt ! 26: */ ! 27: ! 28: SCBVEC(unknown): ! 29: halt ! 30: /* ! 31: ! 32: *powerfail ! 33: *psl & pc are saved on int stack. ! 34: *This routine saves general registers,memory mgmt registers, ! 35: *privileged registers, etc. in _dbuf & then executes halt. ! 36: * ! 37: *The restart location is saved at 0x00000c00. CPU 2 should ! 38: *restart at the location specified after power is up. ! 39: ! 40: */ ! 41: ! 42: SCBVEC(powerfail): ! 43: ! 44: /*save context and restart location*/ ! 45: ! 46: halt ! 47: ! 48: /* ! 49: ! 50: *interval timer ! 51: ! 52: */ ! 53: ! 54: SCBVEC(hardclock): ! 55: halt ! 56: /* ! 57: *console terminal receive interrupt ! 58: */ ! 59: ! 60: SCBVEC(cnrint): ! 61: rei ! 62: /* ! 63: *console terminal transmit interrupt ! 64: */ ! 65: ! 66: SCBVEC(cnxint): ! 67: rei /* Just REI back !! */ ! 68: halt ! 69: /* ! 70: *software generated interrupts ! 71: */ ! 72: ! 73: SCBVEC(s15): ! 74: halt ! 75: /* ! 76: *software generated interrupts ! 77: */ ! 78: ! 79: SCBVEC(s14): ! 80: halt ! 81: /* ! 82: *software generated interrupts ! 83: */ ! 84: ! 85: SCBVEC(s13): ! 86: halt ! 87: /* ! 88: *software generated interrupts ! 89: */ ! 90: ! 91: SCBVEC(s12): ! 92: halt ! 93: /* ! 94: *software generated interrupts ! 95: */ ! 96: ! 97: SCBVEC(s11): ! 98: halt ! 99: /* ! 100: *software generated interrupts ! 101: */ ! 102: ! 103: SCBVEC(s10): ! 104: halt ! 105: /* ! 106: *software generated interrupts ! 107: */ ! 108: ! 109: SCBVEC(s9): ! 110: halt ! 111: /* ! 112: *software generated interrupts ! 113: */ ! 114: ! 115: SCBVEC(s8): ! 116: halt ! 117: /* ! 118: *software generated interrupts ! 119: */ ! 120: ! 121: SCBVEC(s7): ! 122: halt ! 123: /* ! 124: *software generated interrupts ! 125: */ ! 126: ! 127: SCBVEC(s6): ! 128: halt ! 129: /* ! 130: *software generated interrupts ! 131: */ ! 132: ! 133: SCBVEC(s5): ! 134: halt ! 135: /* ! 136: *software generated interrupts ! 137: */ ! 138: ! 139: SCBVEC(s4): ! 140: halt ! 141: /* ! 142: *software generated interrupts ! 143: */ ! 144: ! 145: SCBVEC(s3): ! 146: halt ! 147: /* ! 148: *software generated interrupts ! 149: */ ! 150: ! 151: SCBVEC(s2): ! 152: halt ! 153: /* ! 154: *software generated interrupts ! 155: */ ! 156: ! 157: SCBVEC(s1): ! 158: halt ! 159: ! 160: /* ! 161: *io interrupt ! 162: */ ! 163: ! 164: SCBVEC(iovec14): ! 165: halt ! 166: SCBVEC(iovec15): ! 167: halt ! 168: SCBVEC(iovec16): ! 169: halt ! 170: SCBVEC(iovec17): ! 171: halt ! 172: ! 173: /* ! 174: *EXCEPTIONS ! 175: */ ! 176: ! 177: /* ! 178: ! 179: *buserror ! 180: *psl, pc, and errorcode are pushed onto int stack. ! 181: *ipl is raised to 0x1d. ! 182: *buserror could be due to: ! 183: *non-existent memory ! 184: *versabus timeout ! 185: *uncorrectable memory ! 186: *versabus error (BERR) ! 187: *versabus parity error ! 188: ! 189: */ ! 190: SCBVEC(buserror): ! 191: halt ! 192: ! 193: /* ! 194: *kernel stack not valid ! 195: *happens only during the initiation of another exception or ! 196: *interrupt.The process must be aborted. ! 197: *pc & psl are pushed onto INTSTACK. ! 198: * IPL is raised to 0x1f. ! 199: *this routine calls _panic routine written in C which prints ! 200: *the message & waits for the operator action. ! 201: */ ! 202: ! 203: SCBVEC(kspnotval): ! 204: halt ! 205: /* ! 206: * Trap and fault vector routines ! 207: */ ! 208: #define TRAP(a) pushl $a; brw alltraps ! 209: ! 210: SCBVEC(prvinflt): ! 211: halt ! 212: SCBVEC(resopflt): ! 213: halt ! 214: SCBVEC(resadflt): ! 215: halt ! 216: SCBVEC(bptflt): ! 217: halt ! 218: SCBVEC(tracep): ! 219: halt ! 220: SCBVEC(arithtrap): ! 221: halt ! 222: SCBVEC(protflt): /*access control violation*/ ! 223: halt ! 224: SCBVEC(transflt): ! 225: halt ! 226: SCBVEC(alignflt): ! 227: halt ! 228: ! 229: alltraps: ! 230: halt ! 231: /* mfpr $USP,-(sp) ! 232: calls $0*4+4,_trap ! 233: mtpr (sp)+,$USP ! 234: incl _cnt+V_TRAP ! 235: ! 236: movab (sp),r12 ! 237: addl2 $12,r12 ! 238: movl r12,sp ! 239: ! 240: mtpr $HIGH,$IPL ! 241: rei ! 242: */ ! 243: ! 244: SCBVEC(kcall): /*kcall*/ ! 245: halt ! 246: /* ! 247: pushl $SYSCALL ! 248: mfpr $USP,-(sp) ! 249: calls $0*4+4,_syscall ! 250: mtpr (sp)+,$USP ! 251: incl _cnt+V_SYSCALL ! 252: ! 253: movab (sp),r12 ! 254: addl2 $12,r12 ! 255: movl r12,sp ! 256: ! 257: mtpr $HIGH,$IPL ! 258: rei ! 259: */ ! 260: ! 261:
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