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Up to [Power 6/32 Unix Tahoe 4.2BSD] / cci / d / pits

Power 6/32 Unix version 1.2b

/*
 * Interrupt vector routines
 */ 

#define	SCBVEC(name)	.align 2  \
		     	.globl _X/**/name \
			_X/**/name
#define	PANIC(msg)	clrl _waittime \
			pushab 1f \
			calls $1*4+4,_panic \
			halt  \
			1: .asciz msg
#define	PRINTF(n,msg)	pushab 1f; calls $(n+1)*4+4,_printf; MSG(msg)
#define	MSG(msg)	1: .asciz msg
#define	PUSHR		pushl r5; pushl r4; pushl r3; pushl r2;\
			pushl r1; pushl r0

#define	POPR		movl (sp)+,r0 \
			movl (sp)+,r1 \
			movl (sp)+,r2 \
			movl (sp)+,r3 \
			movl (sp)+,r4 \
			movl (sp)+,r5
/*
	*unknown interrupt
*/

SCBVEC(unknown):
	halt
/*
	
	*powerfail
	*psl & pc are saved on int stack.
	*This routine saves general registers,memory mgmt registers,
	*privileged registers, etc. in _dbuf & then executes halt.
	*
	*The restart location is saved at 0x00000c00. CPU 2 should
	*restart at the location specified after power is up.

*/

SCBVEC(powerfail):

	/*save context and restart location*/	

	halt

/*
	
	*interval timer

*/

SCBVEC(hardclock):
	halt
/*
	*console terminal receive interrupt
*/

SCBVEC(cnrint):
	rei
/*
	*console terminal transmit interrupt
*/

SCBVEC(cnxint):
	rei		/* Just REI back !! */
	halt
/*
	*software generated interrupts
*/

SCBVEC(s15):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s14):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s13):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s12):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s11):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s10):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s9):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s8):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s7):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s6):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s5):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s4):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s3):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s2):
	halt
/*
	*software generated interrupts
*/

SCBVEC(s1):
	halt

/*
	*io interrupt
*/

SCBVEC(iovec14):
	halt
SCBVEC(iovec15):
	halt
SCBVEC(iovec16):
	halt
SCBVEC(iovec17):
	halt

/*	
	*EXCEPTIONS
*/

/*

	*buserror
	*psl, pc, and errorcode are pushed onto int stack.
	*ipl is raised to 0x1d.
	*buserror could be due to:
	*non-existent memory
	*versabus timeout
	*uncorrectable memory
	*versabus error (BERR)
	*versabus parity error

*/
SCBVEC(buserror):
	halt

/*
	*kernel stack not valid
	*happens only during the initiation of another exception or
	*interrupt.The process must be aborted.
	*pc & psl are pushed onto INTSTACK.
	* IPL is raised to 0x1f.
	*this routine calls _panic routine written in C which prints
	*the message & waits for the operator action.
*/

SCBVEC(kspnotval):
	halt
/* 	
* Trap and fault vector routines
*/ 
#define	TRAP(a)	pushl $a; brw alltraps

SCBVEC(prvinflt):
	halt
SCBVEC(resopflt):
	halt
SCBVEC(resadflt):
	halt
SCBVEC(bptflt):
	halt
SCBVEC(tracep):
	halt
SCBVEC(arithtrap):
	halt
SCBVEC(protflt):		/*access control violation*/
	halt
SCBVEC(transflt):
	halt
SCBVEC(alignflt):
	halt

alltraps:
	halt
/*	mfpr	$USP,-(sp)
	calls 	$0*4+4,_trap
	mtpr 	(sp)+,$USP
	incl	_cnt+V_TRAP

	movab	(sp),r12
	addl2	$12,r12
	movl	r12,sp		

	mtpr	$HIGH,$IPL
	rei
*/

SCBVEC(kcall):			/*kcall*/
	halt
/*
	pushl	$SYSCALL
	mfpr	$USP,-(sp)
	calls 	$0*4+4,_syscall
	mtpr 	(sp)+,$USP
	incl	_cnt+V_SYSCALL

	movab	(sp),r12
	addl2	$12,r12
	movl	r12,sp

	mtpr	$HIGH,$IPL
	rei
*/

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