--- cci/d/pits/vddc_ex.c	2019/07/28 12:24:19	1.1
+++ cci/d/pits/vddc_ex.c	2019/07/28 12:30:29	1.1.1.2
@@ -1,62 +1,85 @@
 #include "vddc.h"
 
+extern int cyccnt;
 extern long Probe, iob0, iob1, iob2, iob3, iob4;
 extern struct DEVPAR devpar[];
-extern struct DA VDDCBASE [];
 extern int type, cont;
-long v_err;
-long format_flag = 0;
+long v_err1, v_errprb, v_err2;
 
-/*	Routine to exercise VDDC
+/*	
+**	Routine to exercise VDDC
 */
+
 vddc_ex()
 {	register long unit, last_blk, nodr;
-	format_flag = 0;
-	for (nodr=unit=0;devpar[unit+type*5].nocyl;unit++) {
-		if (devpar[unit+type*5].alive) {
-			nodr++;
-			if (format_flag) vddc_ctlr(FORMAT,unit);
-			Probe = 1;
-			last_blk = v_probe(unit);
-			Probe = 0;
-			if ( last_blk > 0) {
-				writes("\n\tWrite_Compare/Read/Compare test\n");
-				writes("\n");
- 					v_ex1(1,unit,last_blk); 
- 					v_ex1(2,unit,last_blk-1); 
- 					v_ex1(3,unit,last_blk-2); }
+	long track;
+	struct DEVPAR *dp;
+	v_err1 = v_err2 = v_errprb = 0;		/* Clear error flags */
+for (nodr=unit=0;devpar[unit+type*5].nocyl;unit++) {
+	if (devpar[unit+type*5].alive) {
+	dp = &devpar[unit+type*5];
+		nodr++;
+		Probe = 1;
+		last_blk = v_probe(unit);
+		Probe = 0;
+		if ( last_blk > 0) {
+			writes("\n\tWrite/Read/Compare test\n");
+			writes("\nExercising   cylinder   track   sectors\n");
+			for(track=0;track<dp->notraks;track++) {
+				v_ex1(unit,dp->secs_trak/2,track,dp->nocyl-2);
 			}
 		}
+		v_ex2(unit,dp->nocyl-2,dp->secs_trak/2);
+	}
+}
 	if (!nodr) {
 		writes("\n\n...No drive available");
-		return; }
-	if (!v_err) writes("\nVDDC passed..\n");
-		else  writes("\nVDDC failed..\n");
+		return; 
+	}
+	if (!v_err1 && !v_errprb && !v_err2) {
+		writes("\n\nVDDC passed...\n");
+		}
+	else  	{
+		writes("\n\nVDDC failed...\n");
+	}
 }
 
-v_ex1(factor,sdev,blk)
-long factor, blk;
+v_ex1(sdev,factor,trk,cyl)
+long factor, trk, cyl;
 int sdev;
 {	register long ix, pat, *sptr, *dptr, loop;
 	unsigned short *s, *d;
 
-	pat = 0xababab00;	/* Pattern */
+	pat = 0xabab0000;	/* Pattern */
 	sptr = &iob0;		/* Source buffer */
 	dptr = &iob3;		/* Destination buffer */
-
-	writes("Exercising block "); writed(blk); writes("\n");
-for(v_err=loop=0;loop<200;loop++)
-	{
-	/* initialize pattern in source buffer */
+	writes("\n");
+	writes("\t\t");writed(cyl);
+	writes("\t  ");writed(trk);
+	writes("\t ");writes("0-");
+	writed(devpar[sdev+type*5].secs_trak-1);
+for(loop=0;loop<50;loop++) {
+/* 
+**	Initialize pattern in source buffer 
+*/
 	for (ix=0; ix<(BLKSIZ/4)*factor; ix++) { 
 		sptr[ix] = pat + ix;	/* init. pattern in source buffer */
 		dptr[ix] = 0;		/* Clear destination buffer */
-		}
-	/* Write 1 block of data */
-	if (vddc_op(WR_COMP,sdev,blk,factor,&iob0)==0) {v_err=1;return(0);}
-
-	/* Read 1 block of data */
-	if (vddc_op(RD_DATA,sdev,blk,factor,&iob3)==0) {v_err=1;return(0);}
+	}
+/* 
+**	Write x sectors of data 
+*/
+	if (vddc_op2(W_DATA,sdev,cyl,trk,0,factor,&iob0)==0) {
+		v_err1 = 1;
+		return(0);
+	}
+/* 
+**	Read x sectors of data 
+*/
+	if (vddc_op2(R_DATA,sdev,cyl,trk,0,factor,&iob3)==0) {
+		v_err1 = 1;
+		return(0);
+	}
 	s = (unsigned short *)&iob0;		/* Source buffer */
 	d = (unsigned short *)&iob3;		/* Destination buffer */
 	for (ix=0; ix<(BLKSIZ/2)*factor; ix++) {
@@ -66,37 +89,61 @@ for(v_err=loop=0;loop<200;loop++)
 			writeh(s[ix] & 0xffff);
 			writes(" , actual "); writeh(d[ix] & 0xffff);
 			writes(", address "); writeh(&d[ix]);
-			v_err = 1;
-			}	
-		}
-	if (v_err) loop = 0; 	/* If error then loop forever */
+			v_err1 = 1;
+		}	
 	}
+	if (v_err1) loop = 0; 	/* If error then loop forever */
 }
-
-
-/*	routine to probe VDDC disk 
+}
+/*
+**	routine to test reverse seek
+*/
+v_ex2(sdev,maxcyl,factor)
+char sdev;
+long maxcyl, factor;
+{	long cyl, loop;
+	writes("\n\n\tReverse Seek Test \n");
+	for(loop = 1; loop<=cyccnt ; loop++){  
+		writes("\nCycle ");writed (loop);
+		for(cyl = maxcyl;cyl >= 0;cyl--){ 
+			if(vddc_op3(SEEK,sdev,cyl,0,0)==0){
+				v_err2=1;
+				return(0);
+			}
+			DELAY(0x1a0a);	
+		}
+	if (vddc_op2(R_DATA,sdev,maxcyl,0,0,factor,&iob3)==0) {
+		writes("\nfailed going to max cylinder.");
+		v_err2 = 1;
+		return(0);}
+	}
+	return(0);
+}	
+/*	
+**	 routine to probe VDDC disk 
 */
 v_probe(sdev)
 int sdev;
 {	register long *dptr, blk, inc;
-	inc = 2000;
+
 	blk = 0;
+	inc = 2000;
 	writes("\n\n\tRead Block test\n");
 	while (inc != 0) {
 		for(blk += inc;;blk += inc) { /* Read 1 block of data */
-			if (vddc_op(RD_DATA,sdev,blk,1,&iob0)==0) 
+			if (vddc_op(R_DATA,sdev,blk,1,&iob0)==0) 
 				{ blk -= inc; break; }
-			}
-		inc /= 2;
 		}
+		inc /= 2;
+	}
 	if (blk <= 0) {
 		writes("\n...Cannot probe "); writes(devpar[sdev+type*5].name);
 		writed(sdev);
-		v_err = 1;
-		return(0); }
+		v_errprb = 1;
+		return(0); 
+	}
 	writes("\n"); writes(devpar[sdev+type*5].name); 
         writes(" unit "); writed(sdev); writes(" has ");
 	writed((blk*1024)/1000); writes(" Kbytes.\n");
 	return(blk);
-
 }