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1.1 root 1: struct UDPAC { /* UDC command packet */
2: char _stx ;
3: char _pkid ;
4: char _pksiz ; /* 21 bytes */
5: char _pkdev ; /* device # */
6: char _pkcmd ; /* Command type */
7: char _pkfnc ; /* Function type */
8: short _pkcnt ; /* # of data blocks (1/4K each) */
9: short _pbsiz ; /* Block length size (0x100 = 1/4K) */
10: short _pkmem[2] ; /* Starting memory address.Should be 'long' but
11: we can't write it this way on Tahoe,
12: because of alignment problems - the C
13: will gap after the previous 'short' */
14: short _pcksm ; /* Checksum (unused) */
15: long _psecno ; /* Starting sector # */
16: char _etx ;
17: }
18: ;
19:
20: #define SECTSIZ 256 /* sector size */
21: #define L2SIZ 8 /* log2 of sector size */
22: #define L2BSIZ 10 /* log2 of block size */
23: #define NUDC 1 /* number of UDC controllers */
24: #define NUNIT 8 /* number of units per controller */
25: #define NUDDRV 5 /* number of drive types supported */
26: #define DK_N 1 /* Monitoring device bit */
27:
28: /*
29: ** Block devices sizes structure
30: */
31:
32: struct size
33: {
34: daddr_t nblocks;
35: int block0;
36: };
37:
38: #define udaddr ( (char *)(0xff0000+IOBASE) )
39: #define INT 0x00d /* interrupt offset */
40: #define RST 0x00f /* controller reset offset */
41: #define OB1 0x101
42: #define OB2 0x103
43: #define IB1 0x181
44: #define IB2 0x183
45: #define PKID 0x187 /* packet id */
46: #define PKLEN 0x189 /* packet length */
47: #define PKDEV 0x18b /* device # */
48: #define PKCMD 0x18d /* command type */
49: #define PKSTT 0x18f /* status type */
50: #define STAT1 0x191 /* i/o status result offset */
51: #define STAT2 0x193
52: #define DEVSTAT1 0x195
53: #define DEVSTAT2 0x197
54: #define DEVSIZE 0x199 /* # of sectors in device status message */
55:
56: #define UDREAD 0x10
57: #define UDWTRY 0x01 /* read with retry */
58:
59: #define UDWRITE 0x20
60: #define UDWCRC 0x01 /* write sectors and check CRC */
61: #define UDWSECT 0x02 /* write sectors */
62:
63: #define UDTEST 0x30
64: #define UDSTAT 0x02 /* Test status */
65:
66: #define DEVRDY 0x80 /* device ready bit in status byte */
67: #define DEVTYPE 0x7 /* bits 0-2 in status byte define device */
68: #define FLP 0x1
69: #define HARDDISK 0x2
70: #define TAPE 0x5
71:
72: /* Some I/O addresses used to generate pulses for scopes */
73: #define OUT1 0xffffb034
74: #define OUT2 0xffffb018
75: #define OUT3 0xffffb020
76: #define OUT4 0xffffb004
77: #define OUT5 0xffffb024
78: #define OUT6 0xffffb00c
79: #define OUT7 0xffffb02c
80:
81: #define IN1 0xffffb030
82: #define IN2 0xffffb03c
83: #define IN3 0xffffb004
84: #define IN4 0xffffb00c
85: #define IN5 0xffffb02c
86:
87: int dummy;
88: extern char vmem[][16*NBPG];
89:
90: #define IOaddr(off) (char *)((int)vmem + ((off) & 0x0fffff))
91:
92: int iospace_mapped;
93: #define scope_out(x) if(iospace_mapped) movob (0, IOaddr(OUT/**/x))
94: #define scope_in(x) if(iospace_mapped) dummy = *IOaddr(IN/**/x)
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