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1.1 root 1: /*
2: ** Header file for the VDDC (Versabus Direct Disk Controller) Driver
3: */
4:
5: /*
6: ** DCB Command Codes
7: */
8:
9: #define RD 0x80 /* Read Data */
10: #define FTR 0xc0 /* Full Track Read */
11: #define RAS 0x90 /* Read and Scatter */
1.1.1.2 ! root 12: #define RD_RAW 0x600 /* Read unformatted disk sector */
! 13: #define CMP 0xa0 /* Compare */
1.1 root 14: #define FTC 0xe0 /* Full Track Compare */
15: #define RHDE 0x180 /* Read Header, Data & ECC (not used) */
16: #define WD 0x00 /* Write Data */
17: #define FTW 0x40 /* Full Track Write */
18: #define WTC 0x20 /* Write Then Compare */
19: #define FTWTC 0x60 /* Full Track Write Then Compare */
20: #define GAW 0x10 /* Gather and Write */
21: #define WDE 0x100 /* Write Data & ECC (not used) */
22: #define FSECT 0x900 /* Format Sector */
23: #define GWC 0x30 /* Gather Write & Compare */
24: #define VDSTART 0x800 /* Start drives */
25: #define VDRELEASE 0xa00 /* Stop drives */
26: #define SEEK 0xb00 /* Seek */
27: #define INIT 0xc00 /* Initialize VDDC */
28: #define DIAG 0xd00 /* Diagnose (self-test) VDDC */
29: #define RSTCFG 0xe00 /* Reset/Configure VDDC/DDI/Drive(s) */
30: #define VDSTATUS 0xf00 /* VDDC Status */
31:
32: #define ABORT 0x80000000 /* ABORT active i/o */
33:
34: /*
35: ** Error / Status Symbolic Constants
36: */
37:
38: #define HCRCERR 0x1 /* Header CRC Error */
39: #define HCMPERR 0x2 /* Header Compare Error */
40: #define WPTERR 0x4 /* Write Protect Error/Status */
41: #define CTLRERR 0x8 /* Controller Error */
42: #define DSEEKERR 0x10 /* Disk Seek Error */
43: #define UCDATERR 0x20 /* Uncorrectable Data Error */
44: #define NOTCYLERR 0x40 /* Not on Cylinder Error */
45: #define DRVNRDY 0x80 /* Drive Not Ready Error/Status */
46: #define ALTACC 0x100 /* Alternate (track) accessed Status */
47: #define SEEKSTRT 0x200 /* Seek Started Status */
48: #define INVDADR 0x400 /* Invalid Disk Address Error */
49: #define DNEMEM 0x800 /* Non-Existant Memory Error */
50: #define PARERR 0x1000 /* Memory Parity Error */
51: #define DCOMPERR 0x2000 /* Data Compare Error */
52: #define DDIRDY 0x4000 /* DDI Ready Error/Status */
53: #define OPABRT 0x8000 /* Operator Abort (Host) Error/Status */
54: #define DSERLY 0x10000 /* Data Strobe Early */
55: #define DSLATE 0x20000 /* Data Strobe Late */
56: #define TOPLUS 0x40000 /* Track Offset Plus */
57: #define TOMNUS 0x80000 /* Track Offset Minus */
58: #define CPDCRT 0x100000 /* Cntlr Performed Data Correction */
59: #define HRDERR 0x200000 /* Hard Error */
60: #define SFTERR 0x400000 /* Soft Error (retry succesful) */
61: #define ANYERR 0x800000 /* Any Error */
62: #define INVCMD 0x1000000 /* Programmer error */
63:
64:
65: /*
66: ** DCB Status Symbolic Constants
67: */
68:
69: #define DCBABT 0x10000000 /* DCB Aborted */
70: #define DCBUSC 0x20000000 /* DCB Unsuccesfully Completed */
71: #define DCBCMP 0x40000000 /* DCB Complete */
72: #define DCBSTR 0x80000000 /* DCB Started */
73:
74: /*
75: ** MDCB Status Symbolic Constants
76: */
77:
78: #define CTLRBSY 0x10000000 /* Cntlr Busy */
79: #define INTCCDE 0x60000000 /* Interrupt Cause Code */
80: #define DCBINT 0x80000000 /* DCB Interrupt Flag */
81:
82:
83: /*
84: ** Hard Error Types
85: */
86:
87: #define HTYPES (HCRCERR|HCMPERR|WPTERR|CTLRERR|DSEEKERR|UCDATERR|NOTCYLERR| \
88: DRVNRDY|INVDADR|DNEMEM|PARERR|DCOMPERR)
89:
90:
91: /*
92: ** Errors
93: */
94:
95: #define ERRS 0x3FFF
96: #define CANRETRY (CTLRERR|DSEEKERR|NOTCYLERR|DCOMPERR|UCDATERR| \
97: PARERR|DNEMEM|HCRCERR|HCMPERR)
98: /*
99: ** VDDC Interrupt Modes
100: */
101:
102: #define NOINT 0x0 /* No Interrupt */
103: #define INTERR 0x2 /* Interrupt on Error */
104: #define INTSUC 0x1 /* Interrupt on Success */
105: #define INTDONE 0x3 /* Interrupt on Error or Success */
106:
107:
108: /* Control and Status bit assignments */
109: #define CS_SCS 0xf /* Status Change Source (drive number) */
110: #define CS_ELC 0x10 /* Error on Last Command */
111: #define CS_ICC 0x60 /* Interupt Cause Code */
112: #define ICC_NOI 0x00 /* No interupt */
113: #define ICC_DUN 0x20 /* No interupt */
114: #define ICC_ERR 0x40 /* No interupt */
115: #define ICC_SUC 0x60 /* No interupt */
116: #define CS_GO 0x80 /* Go bit (controller working) */
117: #define CS_BE 0x100 /* Buss Error */
118: #define CS_BOK 0x4000 /* Board O.K. */
119: #define CS_SFL 0x8000 /* System fail */
120: #define CS_LEC 0xff000000 /* Last Error Code */
121:
122: /* Status word bit assignments */
123: #define STA_UR 0x1 /* Unit Ready */
124: #define STA_OC 0x2 /* On Cylinder */
125: #define STA_SE 0x4 /* Seek Error */
126: #define STA_DF 0x8 /* Drive Fault */
127: #define STA_WP 0x10 /* Write Protected */
128: #define STA_US 0x20 /* Unit Selected */
129:
130: /* Interupt Control Field bit assignments */
131: #define ICF_IPL 0x7 /* Interupt Priority Level */
132: #define ICF_IEN 0x8 /* Interupt ENable */
133: #define ICF_IV 0xff00 /* Interupt Vector */
134:
135: /* Transfer Control Format bit assignments */
136: #define TCF_AM 0xff /* Address Modifier */
137: #define AM_SNPDA 0x01 /* Standard Non-Privileged Data Access */
138: #define AM_SASA 0x81 /* Standard Ascending Sequential Access */
139: #define AM_ENPDA 0xf1 /* Extended Non-Privileged Data Access */
140: #define AM_EASA 0xe1 /* Extended Ascending Sequential Access */
141: #define TCF_BTE 0x800 /* Block Transfer Enable */
142:
143: /* Controller Configuration Flags bit assignments */
144: #define CCF_STS 0x1 /* Sectors per Track Selectable */
145: #define CCF_EAV 0x2 /* Enable Auto Vector */
146: #define CCF_ERR 0x4 /* Enable Reset Register */
1.1.1.2 ! root 147: #define CCF_DER 0x8 /* Disable Error Recovery */
1.1 root 148: #define CCF_XMD 0x60 /* XMD transfer mode (buss size) */
149: #define XMD_8BIT 0x20 /* Do only 8 bit transfers */
150: #define XMD_16BIT 0x40 /* Do only 16 bit transfers */
151: #define XMD_32BIT 0x60 /* Do only 32 bit transfers */
152: #define CCF_BSZ 0x300 /* Burst SiZe */
153: #define BSZ_16WRD 0x000 /* 16 word transfer burst */
154: #define BSZ_12WRD 0x100 /* 12 word transfer burst */
155: #define BSZ_8WRD 0x200 /* 8 word transfer burst */
156: #define BSZ_4WRD 0x300 /* 4 word transfer burst */
1.1.1.2 ! root 157: #define CCF_SEN 0x400 /* Cylinder / track Skew ENable (for format) */
1.1 root 158: #define CCF_ENP 0x1000 /* ENable Parity */
159: #define CCF_EPE 0x2000 /* Enable Parity Errors */
160: #define CCF_EDE 0x10000 /* Error Detection Enable */
161: #define CCF_ECE 0x20000 /* Error Correction Enable */
162:
163: /* Diagnostic register definitions */
164:
165: #define DIA_DC 0x7f /* Dump count mask */
166: #define DIA_DWR 0x80 /* Dump Write / Read flag */
167: #define DIA_ARE 0x100 /* Auto Rebuild Enable */
168: #define DIA_CEN 0x200 /* Call ENable flag */
169: #define DIA_KEY 0xAA550000 /* Reset KEY */
170:
171: /* Sector Header bit assignments */
172: #define VDMF 0x8000 /* Manufacturer Fault 1=good sector */
173: #define VDUF 0x4000 /* User Fault 1=good sector */
174: #define VDALT 0x2000 /* Alternate Sector 1=alternate */
175: #define VDWPT 0x1000 /* Write Protect 1=Read Only Sector */
176:
177: /* DCB Bit assignments */
178: #define INT_IC 0x3 /* Interupt Control */
179: #define IC_NOI 0x0 /* NO Interupt */
180: #define IC_IOD 0x1 /* Interupt On Done */
181: #define IC_IOE 0x2 /* Interupt On Error */
182: #define IC_IOS 0x3 /* Interupt On Success */
183: #define INT_PBA 0x4 /* Proceed before ACK */
184:
185: /*
1.1.1.2 ! root 186: ** Flaw map stuff
! 187: */
! 188:
! 189: typedef struct {
! 190: long flaw_sync;
! 191: short flaw_cyl;
! 192: char flaw_trk;
! 193: char flaw_sec;
! 194: struct {
! 195: short flaw_offset;
! 196: short flaw_length;
! 197: } flaw_pos[4];
! 198: char flaw_status;
! 199: char flaw_junk[1024]; /* Fill up 518 byte block */
! 200: } flaw;
! 201:
! 202: typedef struct {
! 203: long smde_sync;
! 204: unsigned adr_cyl : 12;
! 205: unsigned adr_trk : 8;
! 206: unsigned adr_sec : 8;
! 207: unsigned sec_flgs : 4;
! 208: unsigned alt_cyl : 12;
! 209: unsigned alt_trk : 8;
! 210: unsigned alt_sec : 8;
! 211: char smde_junk[1024];
! 212: } smde_hdr;
! 213:
! 214: #define CDCSYNC 0x1919
! 215: #define SMDSYNC 0x0019
! 216: #define SMDESYNC 0x0009
! 217: #define SMDE1SYNC 0x000d
! 218:
! 219: /*
1.1 root 220: ** Address of Memory-Mapped I/O Port for VDDC H/W Reset
221: */
222:
223: #define VDDC_RESET(addr, type) { if(type == SMD_ECTLR) { \
224: (addr)->diag_flags=DIA_KEY | DIA_CEN; \
225: (addr)->cdr_mdcb_ptr = \
226: (fmt_mdcb *)0xffffffff; \
227: DELAY(5000000); \
228: } \
229: else { \
230: (addr)->cdr_reset = 0x0; \
231: DELAY(1500000); \
232: } \
233: }
234:
235: /*
236: ** Abort controller operation.
237: */
238:
239: #define VDDC_ABORT(a, type) { if((type) == SMDCTLR) { \
1.1.1.2 ! root 240: movow((int)((ABORT & 0xffff0000)>>16), \
! 241: (int)(a)) ; \
! 242: movow((int)(ABORT & 0xffff), \
! 243: (int)((int)(a)+2)); \
1.1 root 244: } \
245: else (a)->cdr_mdcb_ptr = (fmt_mdcb *)ABORT; \
246: DELAY(1000000); }
247:
248: /*
249: ** Start i/o to/from controller.
250: */
251:
252: #define VDDC_ATTENTION(ctlr, mdcbadr, type) \
253: { if(type == SMDCTLR) { \
1.1.1.2 ! root 254: movow((int)(((int)mdcbadr & 0xffff0000)>>16), \
! 255: (int)ctlr) ; \
! 256: movow((int)((int)mdcbadr&0xffff), \
! 257: (int)((int)(ctlr)+2)); \
1.1 root 258: } \
259: else (ctlr)->cdr_mdcb_ptr = mdcbadr; }
260:
261:
262: #define POLLTILLDONE(c, a, x, t) { vdtimeout = 1000*(x); \
263: uncache(&((a)->operrsta)); \
264: while (!(((a)->operrsta) & (DCBCMP | DCBABT))) { \
265: DELAY(1000); \
266: vdtimeout--; \
267: uncache(&((a)->operrsta)); \
268: if (vdtimeout <= 0) { \
269: printf("VDDC: Controller timeout"); \
270: VDDC_ABORT(c, t); \
271: DELAY(30000); \
272: break; \
273: } \
274: } \
275: if((vdtimeout > 0)) \
276: if((t == SMD_ECTLR) && (vdtimeout > 0)) { \
277: uncache(&(c)->cdr_csr); \
278: while((c)->cdr_csr & CS_GO) { \
279: DELAY(50); \
280: uncache(&(c)->cdr_csr); \
281: } \
282: DELAY(500); \
283: } \
284: else DELAY(200); \
285: uncache(&((a)->operrsta)); \
286: }
287:
288: /* Disk Address */
289:
290: typedef struct {
291: char track; /* all 8 bits */
292: char sector; /* all 8 bits */
293: short cylinder; /* low order 12 bits */
294: } dskadr;
295:
296: /* sector formats */
297:
298: typedef union {
1.1.1.2 ! root 299: struct {
! 300: dskadr hdr_addr;
! 301: short smd_crc;
! 302: } smd;
! 303: struct {
! 304: dskadr physical;
! 305: dskadr logical;
! 306: long smd_e_crc;
! 307: } smd_e;
1.1 root 308: } fmt_hdr;
309:
310:
311: /* DCB Trailer Formats */
312:
313: /* Read / Write Trailer */
314:
315: typedef struct {
316: char *memadr; /* memory address */
317: unsigned long wcount; /* 16 bit word count */
318: dskadr disk; /* disk address */
319: } trrw;
320:
321: /* Scatter/gather trailer */
322:
323: typedef struct {
324: trrw start_addr;
325: struct {
326: char *nxt_addr;
327: unsigned long nxt_len;
328: } addr_chain[126];
329: } trsg;
330:
331: /* Seek trailer format */
332:
333: typedef struct {
334: dskadr skaddr;
335: } trseek;
336:
337: /* Format Trailer */
338:
339: typedef struct {
340: char *addr; /* data buffer to be filled on sector*/
341: long nsectors; /* # of sectors to be formatted */
342: dskadr disk; /* Disk physical address info */
343: dskadr hdr; /* Header address info */
344: } trfmt;
345:
346:
347: /* Reset / Configure Trailer */
348:
349: typedef struct {
350: long ncyl; /* # cylinders */
351: long nsurfaces; /* # surfaces */
352: long nsectors; /* # sectors */
353: long slip_sec; /* # of slip sectors */
1.1.1.2 ! root 354: long recovery; /* Recovery flags */
1.1 root 355: } treset;
356:
357:
358: /* DCB Format */
359:
360: typedef struct fmtdcb{
361: struct fmtdcb *nxtdcb; /* next dcb in chain or End of Chain */
362: short intflg; /* interrupt settings and flags */
363: short opcode; /* DCB Command code etc... */
364: long operrsta; /* Error & Status info */
365: short fill; /* not used */
366: char devselect; /* Drive selection */
367: char trailcnt; /* Trailer Word Count */
368: long err_memadr; /* Error memory address */
369: char err_code; /* Error codes for SMD/E */
370: char fill2; /* not used */
371: short err_wcount; /* Error word count */
372: char err_trk; /* Error track/sector */
373: char err_sec; /* Error track/sector */
374: short err_cyl; /* Error cylinder adr */
375: union {
376: trseek sktrail; /* seek command trailer */
1.1.1.2 ! root 377: trsg sgtrail; /* Scatter gather trailer */
1.1 root 378: trrw rwtrail; /* read/write trailer */
379: trfmt fmtrail; /* format trailer */
380: treset rstrail; /* reset/configure trailer */
381: } trail;
382: } fmt_dcb;
383:
384:
385: /* MDCB Format */
386:
387: typedef struct {
388: fmt_dcb *firstdcb; /* first dcb in chain */
389: fmt_dcb *procdcb; /* dcb being processed */
390: fmt_dcb *intdcb; /* dcb causing interrupt */
391: long vddcstat; /* VDDC status */
392: } fmt_mdcb;
393:
394:
395: typedef struct {
396: fmt_mdcb *cdr_mdcb_ptr; /* pointer to controllers mdcb */
397: unsigned long cdr_reset; /* writes here resets controller */
398: unsigned long cdr_csr; /* control / status register */
399: long cdr_reserved; /* don't use */
400: unsigned short cdr_status[16]; /* one status register for each drive */
401: unsigned short stat_chng; /* status change interupt field */
402: unsigned short done_icf; /* done interupt control field */
403: unsigned short error_icf; /* error interupt control field */
404: unsigned short success_icf; /* success interupt control field */
405: unsigned short mdcb_tcf; /* mdcb transfer control field */
406: unsigned short dcb_tcf; /* dcb transfer control field */
407: unsigned short trail_tcf; /* trail transfer control field */
408: unsigned short data_tcf; /* data transfer control field */
409: unsigned long cdr_ccf; /* controller configuration flags */
410: unsigned long sec_size; /* drive sector size */
1.1.1.2 ! root 411: unsigned short cdr_unused0;
! 412: unsigned char cyl_skew; /* cylinder to cylinder skew factor */
! 413: unsigned char trk_skew; /* track to track skew factor */
! 414: unsigned long cdr_unused1;
1.1 root 415: unsigned long diag_flags; /* diagnostic flag register */
416: unsigned long diag_dump; /* pointer for diagnostic addresses */
417: } cdr;
418:
419: /* possible controller types */
420:
421: #define UNKNOWN -1
422: #define SMDCTLR 1
423: #define SMD_ECTLR 2
424:
425: /* the total # of drive types possible */
426:
427: #define XSD 0
428: #define FUJ 1
429: #define XFD 2
430: #define SMD 3
431: #define FSD 4
432:
433: typedef struct {
434: long par_start;
435: long par_len;
436: } par_tab;
437:
438:
439: typedef struct {
440: int secsize; /* Number of bytes in a sector */
441: int nsec; /* Number of sectors per track */
442: int ntrak; /* Number of tracks per cylinder */
443: int ncyl; /* Number of cylinders */
444: int nslip; /* Number of slip sectors */
445: int rpm; /* Revs Per Minute */
1.1.1.2 ! root 446: int nbyte; /* Number of bits per track */
1.1 root 447: char *type_name; /* Name of drive */
1.1.1.2 ! root 448: char *type_discript; /* discriptition of drive */
1.1 root 449: long fmt_pat[16]; /* Patterns to be used for formatting */
450: par_tab partition[8]; /* partition a (root file system) */
451: /* partition b (swap) */
452: /* partition c (user data) */
453: /* partition d (maintenance cyls) */
454: /* partition e (all user data area) */
455: /* partition f ('b' and 'c' combined */
456: /* partition g (1st half of 'c') */
457: /* partition h (2nd half of 'c') */
458: } fs_tab;
459:
1.1.1.2 ! root 460:
1.1 root 461: /* Physical information for known disk drives. */
462: #ifdef VDGENDATA
1.1.1.2 ! root 463: long vddcaddr[] = { 0xf2000, 0xf2100, 0xf2200, 0xf2300,
! 464: 0xf2400, 0xf2500, 0xf2600, 0xf2700 };
1.1 root 465: long vdtimeout = 0;
466:
467: fs_tab vdst[] = {
1.1.1.2 ! root 468: {512, 48, 24, 711, 0, 3600, 30240, "xsd",
! 469: "515 Mb Control Data Winchester drive",
1.1 root 470: { 0x0264c993, 0x04c99326, 0x0993264c, 0x13264c98,
471: 0x264c9930, 0x4c993260, 0x993264c0, 0x3264c980,
472: 0x64c99300, 0xc9932600, 0x93264c00, 0x264c9800,
473: 0x4c993000, 0x99326000, 0x3264c000, 0x54c98000},
474: {{0, 30528}, /* xsd0a cyl 0 - 52 */
475: {30528, 30528}, /* xsd0b cyl 53 - 105 */
476: {61056, 345600}, /* xsd0c cyl 106 - 705 */
1.1.1.2 ! root 477: {118656, 288000}, /* xsd0d cyl 206 - 705 */
! 478: {176256, 230400}, /* xsd0e cyl 306 - 705 */
! 479: {233856, 172800}, /* xsd0f cyl 406 - 705 */
! 480: {291456, 115200}, /* xsd0g cyl 506 - 705 */
! 481: {349056, 57600}} /* xsd0h cyl 606 - 705 */
1.1 root 482: },
1.1.1.2 ! root 483: {512, 66, 23, 850, 0, 3600, 40960, "ncc",
! 484: "800Mb NEC",
! 485: { 0x0264c993, 0x04c99326, 0x0993264c, 0x13264c98,
! 486: 0x264c9930, 0x4c993260, 0x993264c0, 0x3264c980,
! 487: 0x64c99300, 0xc9932600, 0x93264c00, 0x264c9800,
! 488: 0x4c993000, 0x99326000, 0x3264c000, 0x54c98000},
! 489: {{0, 26400}, /* egl0a */
! 490: {26400, 33000}, /* egl0b */
! 491: {59400, 308880}} /* egl0c */
! 492: },
! 493: {512, 44, 20, 842, 0, 3600, 27720, "egl",
! 494: "474 Mb Fujitsu Eagle drive",
! 495: { 0x0264c993, 0x04c99326, 0x0993264c, 0x13264c98,
! 496: 0x264c9930, 0x4c993260, 0x993264c0, 0x3264c980,
! 497: 0x64c99300, 0xc9932600, 0x93264c00, 0x264c9800,
! 498: 0x4c993000, 0x99326000, 0x3264c000, 0x54c98000},
! 499: {{0, 26400}, /* egl0a */
! 500: {26400, 33000}, /* egl0b */
! 501: {59400, 308880}} /* egl0c */
! 502: },
! 503: {512, 64, 10, 823, 0, 3600, 40960, "fuj", /* 360 Mb Fujitsu */
! 504: "360 Mb Fujitsu Winchester drive",
1.1 root 505: { 0x0264c993, 0x04c99326, 0x0993264c, 0x13264c98,
506: 0x264c9930, 0x4c993260, 0x993264c0, 0x3264c980,
507: 0x64c99300, 0xc9932600, 0x93264c00, 0x264c9800,
508: 0x4c993000, 0x99326000, 0x3264c000, 0x54c98000},
509: {{0, 19200}, /* fuj0a cyl 0 - 59 */
510: {19200, 24000}, /* fuj0b cyl 60 - 134 */
511: {43200, 218560}, /* fuj0c cyl 135 - 817 */
1.1.1.2 ! root 512: {79680, 182080}, /* fuj0d cyl 249 - 817 */
! 513: {116160, 145600}, /* fuj0e cyl 363 - 817 */
! 514: {152640, 109120}, /* fuj0f cyl 477 - 817 */
! 515: {189120, 72640}, /* fuj0g cyl 591 - 817 */
! 516: {225600, 36160}} /* fug0h cyl 705 - 817 */
1.1 root 517: },
1.1.1.2 ! root 518: {512, 32, 24, 711, 0, 3600, 20160, "xfd", /* 340 Mb FSD */
! 519: "340 Mb Control Data Winchester drive",
1.1 root 520: { 0x0d9b366c, 0x1b366cd8, 0x366cd9b0, 0x6cd9b360,
521: 0xd9b366c0, 0xb366cd80, 0x66cd9b00, 0xcd9b3600,
522: 0x9b366300, 0x366cd800, 0x6cd9b000, 0xd9b36000,
523: 0xb366c000, 0x66cd8000, 0xcd9b0000, 0x9b360000},
524: {{0, 20352}, /* xfd0a cyl 0 - 52 */
525: {20352, 20352}, /* xfd0b cyl 53 - 105 */
526: {40704, 230400}, /* xfd0c cyl 106 - 705 */
1.1.1.2 ! root 527: {79104, 192000}, /* xfd0d cyl 206 - 705 */
! 528: {117504, 153600}, /* xfd0e cyl 306 - 705 */
! 529: {155904, 115200}, /* xfd0f cyl 406 - 705 */
! 530: {194304, 76800}, /* xfd0g cyl 506 - 705 */
! 531: {232704, 38400}} /* xfd0h cyl 606 - 705 */
1.1 root 532: },
1.1.1.2 ! root 533: {512, 32, 19, 823, 0, 3600, 20160, "smd", /* 300 Mb SMD */
! 534: "300 Mb Control Data removable media drive",
1.1 root 535: { 0x0d9b366c, 0x1b366cd8, 0x366cd9b0, 0x6cd9b360,
536: 0xd9b366c0, 0xb366cd80, 0x66cd9b00, 0xcd9b3600,
537: 0x9b366300, 0x366cd800, 0x6cd9b000, 0xd9b36000,
538: 0xb366c000, 0x66cd8000, 0xcd9b0000, 0x9b360000},
539: {{0, 20064}, /* smd0a cyl 0 - 65 */
540: {20064, 13680}, /* smd0b cyl 66 - 110 */
541: {33744, 214928}, /* smd0c cyl 111 - 817 */
1.1.1.2 ! root 542: {69616, 179056}, /* smd0d cyl 229 - 817 */
! 543: {105488, 143184}, /* smd0e cyl 347 - 817 */
! 544: {141360, 107312}, /* smd0f cyl 465 - 817 */
! 545: {177232, 71440}, /* smd0g cyl 583 - 817 */
! 546: {213104, 35568}} /* smd0h cyl 701 - 817 */
1.1 root 547: },
1.1.1.2 ! root 548: {512, 32, 10, 823, 0, 3600, 20160, "fsd", /* 160 Mb FSD */
! 549: "160 Mb Control Data Winchester drive",
1.1 root 550: { 0x0d9b366c, 0x1b366cd8, 0x366cd9b0, 0x6cd9b360,
551: 0xd9b366c0, 0xb366cd80, 0x66cd9b00, 0xcd9b3600,
552: 0x9b366300, 0x366cd800, 0x6cd9b000, 0xd9b36000,
553: 0xb366c000, 0x66cd8000, 0xcd9b0000, 0x9b360000},
554: {{0, 9600}, /* fsd0a cyl 0 - 59 */
555: {9600, 12000}, /* fsd0b cyl 60 - 134 */
556: {21600, 109280}, /* fsd0c cyl 135 - 817 */
1.1.1.2 ! root 557: {39840, 91040}, /* fsd0d cyl 249 - 817 */
! 558: {58080, 72800}, /* fsd0e cyl 363 - 817 */
! 559: {76320, 54560}, /* fsd0f cyl 477 - 817 */
! 560: {94560, 36320}, /* fsd0g cyl 591 - 817 */
! 561: {112800, 18080}} /* fsd0h cyl 705 - 817 */
1.1 root 562: }
563: };
564:
565: int nvddrv = (sizeof(vdst)/sizeof(fs_tab));
566: #else
567: extern long vddcaddr[];
568: extern long vdtimeout;
569: extern fs_tab vdst[];
570: extern int nvddrv;
571: #endif VDGENDATA
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