cci/usr/src/usr.bin/f77/f77pass1/tst/whetstone.t0 - view

File: [Power 6/32 Unix Tahoe 4.2BSD] / cci / usr / src / usr.bin / f77 / f77pass1 / tst / whetstone.t0
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Sun Jul 28 12:26:07 2019 UTC (7 years ago) by root
Branches: bsd, MAIN
CVS tags: v121, HEAD

Power 6/32 Unix version 1.21

.data 0 .align 2 L15: .long 0x3FFFFCB9 # .float .499975 .align 2 L16: .long 0x40001062 # .float .50024998 .align 2 L17: .long 0x41000000 # .float 2 .align 2 L19: .long 0x00000000 # .float 0 .align 2 L20: .long 0x40800000 # .float 1 .align 2 L21: .long 0xC0800000 # .float -1 .align 2 L75: .long 0x40000000 # .float .5 .align 2 L100: .long 0x41400000 # .float 3 .align 2 L117: .long 0x40400000 # .float .75 .align 2 L129: .long 0x457A0000 # .float 1000 .align 2 L132: .long 1 .align 2 L131: .byte 050,0146 .byte 061,060 .byte 056,062 .byte 054,02 .byte 040,0167 .byte 0150,0145 .byte 0164,0163 .byte 0164,0157 .byte 0156,0145 .byte 040,0153 .byte 0151,0160 .byte 0163,040 .byte 0160,0145 .byte 0162,040 .byte 0163,0145 .byte 0143,0157 .byte 0156,0144 .byte 056,02 .byte 051,00 .align 2 L133: .byte 00,00 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .align 2 L161: .byte 050,02 .byte 040,02 .byte 054,063 .byte 0151,067 .byte 054,064 .byte 0145,061 .byte 062,056 .byte 064,051 .byte 00,00 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .globl _MAIN_ .comm __BLNK__,40 .globl _secnds_ .globl _pout_ .globl _pa_ .globl _p3_ .globl _p0_ .globl _s_wsfe .globl _do_fio .globl _e_wsfe .globl _s_stop .globl _prtres_ .align 2 .stabs "whetstone.f",0x64,0,0,0 .text .globl _MAIN_ .align 1 _MAIN_: .word LWM1 subl3 $LF1,fp,sp jbr L12 L13: movl L15,__BLNK__ movl L16,__BLNK__+4 movl L17,__BLNK__+8 movl $10,v.2-v.1(r11) L18: pushl $L19 callf $8,_secnds_ movl r0,v.3-v.1(r11) movl v.2-v.1(r11),v.4-v.1(r11) clrl v.5-v.1(r11) mull3 $12,v.2-v.1(r11),r0 movl r0,v.6-v.1(r11) mull3 $14,v.2-v.1(r11),r0 movl r0,v.7-v.1(r11) mull3 $345,v.2-v.1(r11),r0 movl r0,v.8-v.1(r11) clrl v.9-v.1(r11) mull3 $210,v.2-v.1(r11),r0 movl r0,v.10-v.1(r11) shll $5,v.2-v.1(r11),r0 movl r0,v.11-v.1(r11) mull3 $899,v.2-v.1(r11),r0 movl r0,v.12-v.1(r11) mull3 $616,v.2-v.1(r11),r0 movl r0,v.13-v.1(r11) clrl v.14-v.1(r11) mull3 $93,v.2-v.1(r11),r0 movl r0,v.15-v.1(r11) clrl v.16-v.1(r11) movl L20,v.17-v.1(r11) movl L21,v.18-v.1(r11) movl L21,v.19-v.1(r11) movl L21,v.20-v.1(r11) tstl v.5-v.1(r11) jgtr L25 jbr L24 L25: movl $1,r10 movl v.5-v.1(r11),-56(fp) cmpl r10,-56(fp) jgtr L27 L28: movl r10,v.2-v.1(r11) ldf v.17-v.1(r11) addf v.18-v.1(r11) stf r0 ldf r0 addf v.19-v.1(r11) stf r0 ldf r0 subf v.20-v.1(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.17-v.1(r11) ldf v.17-v.1(r11) addf v.18-v.1(r11) stf r0 ldf r0 subf v.19-v.1(r11) stf r0 ldf r0 addf v.20-v.1(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.18-v.1(r11) lnf v.17-v.1(r11) stf r0 ldf r0 addf v.18-v.1(r11) stf r0 ldf r0 addf v.19-v.1(r11) stf r0 ldf r0 addf v.20-v.1(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.20-v.1(r11) ldf v.17-v.1(r11) subf v.18-v.1(r11) stf r0 ldf r0 addf v.19-v.1(r11) stf r0 ldf r0 addf v.20-v.1(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.19-v.1(r11) L26: incl r10 cmpl r10,-56(fp) jleq L28 L27: movl r10,v.2-v.1(r11) L24: addl3 $v.20-v.1,r11,r0 pushl r0 addl3 $v.19-v.1,r11,r0 pushl r0 addl3 $v.18-v.1,r11,r0 pushl r0 addl3 $v.17-v.1,r11,r0 pushl r0 addl3 $v.5-v.1,r11,r0 pushl r0 addl3 $v.5-v.1,r11,r0 pushl r0 addl3 $v.5-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L21,__BLNK__+16 movl L21,__BLNK__+20 movl L21,__BLNK__+24 tstl v.6-v.1(r11) jgtr L36 jbr L35 L36: movl $1,r10 movl v.6-v.1(r11),-60(fp) cmpl r10,-60(fp) jgtr L38 L39: movl r10,v.2-v.1(r11) ldf __BLNK__+12 addf __BLNK__+16 stf r0 ldf r0 addf __BLNK__+20 stf r0 ldf r0 subf __BLNK__+24 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,__BLNK__+12 ldf __BLNK__+12 addf __BLNK__+16 stf r0 ldf r0 subf __BLNK__+20 stf r0 ldf r0 addf __BLNK__+24 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,__BLNK__+16 ldf __BLNK__+12 subf __BLNK__+16 stf r0 ldf r0 addf __BLNK__+20 stf r0 ldf r0 addf __BLNK__+24 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,__BLNK__+20 lnf __BLNK__+12 stf r0 ldf r0 addf __BLNK__+16 stf r0 ldf r0 addf __BLNK__+20 stf r0 ldf r0 addf __BLNK__+24 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,__BLNK__+24 L37: incl r10 cmpl r10,-60(fp) jleq L39 L38: movl r10,v.2-v.1(r11) L35: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 addl3 $v.6-v.1,r11,r0 pushl r0 addl3 $v.7-v.1,r11,r0 pushl r0 addl3 $v.6-v.1,r11,r0 pushl r0 callf $32,_pout_ L43: movl $1,r10 movl v.7-v.1(r11),-64(fp) cmpl r10,-64(fp) jgtr L45 L46: movl r10,v.2-v.1(r11) L44: pushl $__BLNK__+12 callf $8,_pa_ incl r10 cmpl r10,-64(fp) jleq L46 L45: movl r10,v.2-v.1(r11) L50: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 addl3 $v.6-v.1,r11,r0 pushl r0 addl3 $v.6-v.1,r11,r0 pushl r0 addl3 $v.7-v.1,r11,r0 pushl r0 callf $32,_pout_ tstl v.8-v.1(r11) jgtr L52 jbr L51 L52: movl $1,r10 movl v.8-v.1(r11),-68(fp) cmpl r10,-68(fp) jgtr L54 L55: movl r10,v.2-v.1(r11) addl3 $-1,__BLNK__+28,r0 jeql L60 jbr L59 L60: movl $2,__BLNK__+28 jbr L61 L59: movl $3,__BLNK__+28 L61: addl3 $-2,__BLNK__+28,r0 jgtr L63 jbr L62 L63: clrl __BLNK__+28 jbr L64 L62: movl $1,__BLNK__+28 L64: addl3 $-1,__BLNK__+28,r0 jlss L65 jbr L66 L65: movl $1,__BLNK__+28 jbr L53 L66: clrl __BLNK__+28 L53: incl r10 cmpl r10,-68(fp) jleq L55 L54: movl r10,v.2-v.1(r11) L51: addl3 $v.20-v.1,r11,r0 pushl r0 addl3 $v.19-v.1,r11,r0 pushl r0 addl3 $v.18-v.1,r11,r0 pushl r0 addl3 $v.17-v.1,r11,r0 pushl r0 pushl $__BLNK__+28 pushl $__BLNK__+28 addl3 $v.8-v.1,r11,r0 pushl r0 callf $32,_pout_ movl $1,__BLNK__+28 movl $2,__BLNK__+32 movl $3,__BLNK__+36 tstl v.10-v.1(r11) jgtr L68 jbr L67 L68: movl $1,r10 movl v.10-v.1(r11),-72(fp) cmpl r10,-72(fp) jgtr L70 L71: movl r10,v.2-v.1(r11) subl3 __BLNK__+28,__BLNK__+32,r0 mull2 __BLNK__+28,r0 subl3 __BLNK__+32,__BLNK__+36,r1 mull2 r1,r0 movl r0,__BLNK__+28 mull3 __BLNK__+32,__BLNK__+36,r0 subl3 __BLNK__+28,__BLNK__+36,r1 mull2 __BLNK__+32,r1 subl2 r1,r0 movl r0,__BLNK__+32 subl3 __BLNK__+32,__BLNK__+36,r0 addl3 __BLNK__+28,__BLNK__+32,r1 mull2 r1,r0 movl r0,__BLNK__+36 addl3 __BLNK__+32,__BLNK__+28,r0 addl2 __BLNK__+36,r0 cvlf r0 stf r0 movl __BLNK__+36,r1 movl r0,__BLNK__+4[r1] addl3 __BLNK__+32,__BLNK__+28,r0 addl2 __BLNK__+36,r0 cvlf r0 stf r0 movl __BLNK__+32,r1 movl r0,__BLNK__+4[r1] L69: incl r10 cmpl r10,-72(fp) jleq L71 L70: movl r10,v.2-v.1(r11) L67: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.10-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L75,v.21-v.1(r11) movl L75,v.22-v.1(r11) tstl v.11-v.1(r11) jgtr L78 jbr L77 L78: movl $1,r10 movl v.11-v.1(r11),-76(fp) cmpl r10,-76(fp) jgtr L80 L81: movl r10,v.2-v.1(r11) ldf v.21-v.1(r11) cosf stf r0 ldf v.21-v.1(r11) addf v.22-v.1(r11) stf r1 ldf r1 cosf stf r1 ldf r0 divf r1 stf r0 ldf v.21-v.1(r11) sinf stf r1 ldf r1 mulf __BLNK__+8 stf r1 ldf r0 addf r1 stf r0 ldf v.21-v.1(r11) subf v.22-v.1(r11) stf r1 ldf r1 cosf stf r1 ldf r0 addf r1 stf r0 ldf r0 addf L21 stf r0 ldf r0 atanf stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.21-v.1(r11) ldf v.22-v.1(r11) cosf stf r0 ldf v.21-v.1(r11) addf v.22-v.1(r11) stf r1 ldf r1 cosf stf r1 ldf r0 divf r1 stf r0 ldf v.22-v.1(r11) sinf stf r1 ldf r1 mulf __BLNK__+8 stf r1 ldf r0 addf r1 stf r0 ldf v.21-v.1(r11) subf v.22-v.1(r11) stf r1 ldf r1 cosf stf r1 ldf r0 addf r1 stf r0 ldf r0 addf L21 stf r0 ldf r0 atanf stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.22-v.1(r11) L79: incl r10 cmpl r10,-76(fp) jleq L81 L80: movl r10,v.2-v.1(r11) L77: addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.11-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L20,v.21-v.1(r11) movl L20,v.22-v.1(r11) movl L20,v.23-v.1(r11) tstl v.12-v.1(r11) jgtr L91 jbr L90 L91: movl $1,r10 movl v.12-v.1(r11),-80(fp) cmpl r10,-80(fp) jgtr L93 L94: movl r10,v.2-v.1(r11) L92: addl3 $v.23-v.1,r11,r0 pushl r0 addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 callf $16,_p3_ incl r10 cmpl r10,-80(fp) jleq L94 L93: movl r10,v.2-v.1(r11) L90: addl3 $v.23-v.1,r11,r0 pushl r0 addl3 $v.23-v.1,r11,r0 pushl r0 addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.12-v.1,r11,r0 pushl r0 callf $32,_pout_ movl $1,__BLNK__+28 movl $2,__BLNK__+32 movl $3,__BLNK__+36 movl L20,__BLNK__+12 movl L17,__BLNK__+16 movl L100,__BLNK__+20 tstl v.13-v.1(r11) jgtr L102 jbr L101 L102: movl $1,r10 movl v.13-v.1(r11),-84(fp) cmpl r10,-84(fp) jgtr L104 L105: movl r10,v.2-v.1(r11) L103: callf $4,_p0_ incl r10 cmpl r10,-84(fp) jleq L105 L104: movl r10,v.2-v.1(r11) L101: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.13-v.1,r11,r0 pushl r0 callf $32,_pout_ movl $2,__BLNK__+28 movl $3,__BLNK__+32 tstl v.14-v.1(r11) jgtr L110 jbr L109 L110: movl $1,r10 movl v.14-v.1(r11),-88(fp) cmpl r10,-88(fp) jgtr L112 L113: movl r10,v.2-v.1(r11) addl3 __BLNK__+32,__BLNK__+28,r0 movl r0,__BLNK__+28 addl3 __BLNK__+32,__BLNK__+28,r0 movl r0,__BLNK__+32 subl3 __BLNK__+32,__BLNK__+28,r0 movl r0,__BLNK__+28 subl3 __BLNK__+28,__BLNK__+32,r0 subl2 __BLNK__+28,r0 movl r0,__BLNK__+32 L111: incl r10 cmpl r10,-88(fp) jleq L113 L112: movl r10,v.2-v.1(r11) L109: addl3 $v.20-v.1,r11,r0 pushl r0 addl3 $v.19-v.1,r11,r0 pushl r0 addl3 $v.18-v.1,r11,r0 pushl r0 addl3 $v.17-v.1,r11,r0 pushl r0 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.14-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L117,v.21-v.1(r11) tstl v.15-v.1(r11) jgtr L119 jbr L118 L119: movl $1,r10 movl v.15-v.1(r11),-92(fp) cmpl r10,-92(fp) jgtr L121 L122: movl r10,v.2-v.1(r11) L120: ldf v.21-v.1(r11) logf stf r0 ldf r0 divf __BLNK__+4 stf r0 ldf r0 expf stf r0 ldf r0 sqrtf stf r0 movl r0,v.21-v.1(r11) incl r10 cmpl r10,-92(fp) jleq L122 L121: movl r10,v.2-v.1(r11) L118: addl3 $v.3-v.1,r11,r0 pushl r0 callf $8,_secnds_ ldf r0 subf v.3-v.1(r11) stf r0 movl r0,v.24-v.1(r11) cmpl v.4-v.1(r11),$20 jneq L126 jbr L127 L126: movl v.24-v.1(r11),v.25-v.1(r11) movl $20,v.2-v.1(r11) jbr L18 L127: movl v.24-v.1(r11),v.26-v.1(r11) ldf v.26-v.1(r11) subf v.25-v.1(r11) stf r0 ldf L20 divf r0 stf r0 ldf r0 mulf L129 stf r0 movl r0,v.27-v.1(r11) pushl $v.28 callf $8,_s_wsfe pushl $4 addl3 $v.27-v.1,r11,r0 pushl r0 pushl $L132 callf $16,_do_fio callf $4,_e_wsfe pushl $0 pushl $L133 callf $12,_s_stop L14: ret#0 L12: movl $v.1,r11 jbr L13 .set LF1,92 .set LWM1,0x1C00 .text .globl _pa_ .align 1 _pa_: .word LWM2 subl3 $LF2,fp,sp jbr L135 L138: clrl v.30-v.29(r11) L140: movl 4(r12),r0 movl 4(r12),r1 ldf 4(r0) addf 8(r1) stf r0 movl 4(r12),r1 ldf r0 addf 12(r1) stf r0 movl 4(r12),r1 ldf r0 subf 16(r1) stf r0 ldf r0 mulf __BLNK__ stf r0 movl 4(r12),r1 movl r0,4(r1) movl 4(r12),r0 movl 4(r12),r1 ldf 4(r0) addf 8(r1) stf r0 movl 4(r12),r1 ldf r0 subf 12(r1) stf r0 movl 4(r12),r1 ldf r0 addf 16(r1) stf r0 ldf r0 mulf __BLNK__ stf r0 movl 4(r12),r1 movl r0,8(r1) movl 4(r12),r0 movl 4(r12),r1 ldf 4(r0) subf 8(r1) stf r0 movl 4(r12),r1 ldf r0 addf 12(r1) stf r0 movl 4(r12),r1 ldf r0 addf 16(r1) stf r0 ldf r0 mulf __BLNK__ stf r0 movl 4(r12),r1 movl r0,12(r1) movl 4(r12),r0 lnf 4(r0) stf r0 movl 4(r12),r1 ldf r0 addf 8(r1) stf r0 movl 4(r12),r1 ldf r0 addf 12(r1) stf r0 movl 4(r12),r1 ldf r0 addf 16(r1) stf r0 ldf r0 divf __BLNK__+8 stf r0 movl 4(r12),r1 movl r0,16(r1) addl3 $1,v.30-v.29(r11),r0 movl r0,v.30-v.29(r11) addl3 $-6,v.30-v.29(r11),r0 jlss L140 jbr L141 L141: jbr L137 L137: L136: ret#0 L135: movl $v.29,r11 movl fp,r12 subl2 $4,4(r12) jbr L138 .set LF2,52 .set LWM2,0x1800 .text .globl _p0_ .align 1 _p0_: .word LWM3 subl3 $LF3,fp,sp jbr L143 L146: movl __BLNK__+32,r0 movl __BLNK__+28,r1 movl __BLNK__+8[r0],__BLNK__+8[r1] movl __BLNK__+36,r0 movl __BLNK__+32,r1 movl __BLNK__+8[r0],__BLNK__+8[r1] movl __BLNK__+28,r0 movl __BLNK__+36,r1 movl __BLNK__+8[r0],__BLNK__+8[r1] jbr L145 L145: L144: ret#0 L143: jbr L146 .set LF3,52 .set LWM3,0x1000 .text .globl _p3_ .align 1 _p3_: .word LWM4 subl3 $LF4,fp,sp jbr L149 L152: movl *4(r12),v.33-v.32(r11) movl *8(r12),v.34-v.32(r11) ldf v.33-v.32(r11) addf v.34-v.32(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.33-v.32(r11) ldf v.33-v.32(r11) addf v.34-v.32(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.34-v.32(r11) ldf v.33-v.32(r11) addf v.34-v.32(r11) stf r0 ldf r0 divf __BLNK__+8 stf r0 movl r0,*12(r12) jbr L151 L151: L150: ret#0 L149: movl $v.32,r11 movl fp,r12 jbr L152 .set LF4,52 .set LWM4,0x1800 .text .globl _pout_ .align 1 _pout_: .word LWM5 subl3 $LF5,fp,sp jbr L155 L158: pushl $v.36 callf $8,_s_wsfe pushl $4 pushl 4(r12) pushl $L132 callf $16,_do_fio pushl $4 pushl 8(r12) pushl $L132 callf $16,_do_fio pushl $4 pushl 12(r12) pushl $L132 callf $16,_do_fio pushl $4 pushl 16(r12) pushl $L132 callf $16,_do_fio pushl $4 pushl 20(r12) pushl $L132 callf $16,_do_fio pushl $4 pushl 24(r12) pushl $L132 callf $16,_do_fio pushl $4 pushl 28(r12) pushl $L132 callf $16,_do_fio callf $4,_e_wsfe jbr L157 L157: L156: ret#0 L155: movl fp,r12 jbr L158 .set LF5,52 .set LWM5,0x1000 .text .globl _prtres_ .align 1 _prtres_: .word LWM6 subl3 $LF6,fp,sp jbr L170 L173: jbr L172 L172: L171: ret#0 L170: movl fp,r12 jbr L173 .set LF6,52 .set LWM6,0x1000 .text .data 2 .align 2 v.28: .long 0 .long 6 .space 4 .long L131 .align 2 v.2: .space 4 .align 2 v.22: .space 4 .align 2 v.5: .space 4 .align 2 v.7: .space 4 .align 2 v.9: .space 4 .align 2 v.11: .space 4 .align 2 v.13: .space 4 .align 2 v.18: .space 4 .align 2 v.20: .space 4 .align 2 v.15: .space 4 .align 2 v.27: .space 4 .align 2 v.26: .space 4 .align 2 v.3: .space 4 .align 2 v.4: .space 4 .align 2 v.24: .space 4 .align 2 v.25: .space 4 .align 2 v.16: .space 4 .align 2 v.14: .space 4 .align 2 v.19: .space 4 .align 2 v.17: .space 4 .align 2 v.12: .space 4 .align 2 v.10: .space 4 .align 2 v.8: .space 4 .align 2 v.6: .space 4 .align 2 v.23: .space 4 .align 2 v.21: .space 4 .set v.1,v.4 .align 2 v.30: .space 4 .set v.29,v.30 .align 2 v.33: .space 4 .align 2 v.34: .space 4 .set v.32,v.34 .align 2 v.36: .long 0 .long 6 .space 4 .long L161

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