cci/usr/src/usr.bin/f77/f77pass1/tst/whetstone.t1 - view

File: [Power 6/32 Unix Tahoe 4.2BSD] / cci / usr / src / usr.bin / f77 / f77pass1 / tst / whetstone.t1
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Sun Jul 28 12:26:07 2019 UTC (7 years ago) by root
Branches: bsd, MAIN
CVS tags: v121, HEAD

Power 6/32 Unix version 1.21

.data 0 .align 2 L98: .long L97 .align 2 L97: .byte 050,0146 .byte 061,060 .byte 056,062 .byte 054,02 .byte 040,0167 .byte 0150,0145 .byte 0164,0163 .byte 0164,0157 .byte 0156,0145 .byte 040,0153 .byte 0151,0160 .byte 0163,040 .byte 0160,0145 .byte 0162,040 .byte 0163,0145 .byte 0143,0157 .byte 0156,0144 .byte 056,02 .byte 051,00 .align 2 L109: .long 0x3FFFFCB9 # .float .499975 .align 2 L110: .long 0x40001062 # .float .50024998 .align 2 L111: .long 0x41000000 # .float 2 .align 2 L112: .long 0x00000000 # .float 0 .align 2 L113: .long 0x40800000 # .float 1 .align 2 L114: .long 0xC0800000 # .float -1 .align 2 L120: .long 0x40000000 # .float .5 .align 2 L129: .long 0x41400000 # .float 3 .align 2 L130: .long 0x40400000 # .float .75 .align 2 L132: .long 0x457A0000 # .float 1000 .align 2 L133: .long 1 .align 2 L134: .byte 00,00 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .align 2 L163: .long L162 .align 2 L162: .byte 050,02 .byte 040,02 .byte 054,063 .byte 0151,067 .byte 054,064 .byte 0145,061 .byte 062,056 .byte 064,051 .byte 00,00 .data 2 .data 1 .data 0 .data 2 .data 1 .data 0 .globl _MAIN_ .comm __BLNK__,40 .globl _secnds_ .globl _pout_ .globl _pa_ .globl _p3_ .globl _p0_ .globl _s_wsfe .globl _do_fio .globl _e_wsfe .globl _s_stop .globl _prtres_ .align 2 .stabs "whetstone.f",0x64,0,0,0 .text .globl _MAIN_ .align 1 _MAIN_: .word LWM1 subl3 $LF1,fp,sp jbr L12 L13: movl L109,__BLNK__ movl L110,__BLNK__+4 movl L111,__BLNK__+8 movl $10,v.2-v.1(r11) L15: pushl $L112 callf $8,_secnds_ movl r0,v.3-v.1(r11) movl v.2-v.1(r11),v.4-v.1(r11) clrl v.5-v.1(r11) mull3 $12,v.2-v.1(r11),r0 movl r0,v.6-v.1(r11) mull3 $14,v.2-v.1(r11),r0 movl r0,v.7-v.1(r11) mull3 $345,v.2-v.1(r11),r0 movl r0,v.8-v.1(r11) clrl v.9-v.1(r11) mull3 $210,v.2-v.1(r11),r0 movl r0,v.10-v.1(r11) shll $5,v.2-v.1(r11),r0 movl r0,v.11-v.1(r11) mull3 $899,v.2-v.1(r11),r0 movl r0,v.12-v.1(r11) mull3 $616,v.2-v.1(r11),r0 movl r0,v.13-v.1(r11) clrl v.14-v.1(r11) mull3 $93,v.2-v.1(r11),r0 movl r0,v.15-v.1(r11) clrl v.16-v.1(r11) movl L113,v.17-v.1(r11) movl L114,v.18-v.1(r11) movl L114,v.19-v.1(r11) movl L114,v.20-v.1(r11) tstl v.5-v.1(r11) jgtr L17 jbr L16 L17: movl v.5-v.1(r11),-56(fp) movl v.17-v.1(r11),r10 movl v.18-v.1(r11),r9 movl v.19-v.1(r11),r8 movl v.20-v.1(r11),r7 movl -56(fp),r6 movl $1,v.2-v.1(r11) cmpl v.2-v.1(r11),r6 jgtr L19 L20: ldf r10 addf r9 stf r0 ldf r0 addf r8 stf r0 ldf r0 subf r7 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r10 ldf r10 addf r9 stf r0 ldf r0 subf r8 stf r0 ldf r0 addf r7 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r9 lnf r10 stf r0 ldf r0 addf r9 stf r0 ldf r0 addf r8 stf r0 ldf r0 addf r7 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r7 ldf r10 subf r9 stf r0 ldf r0 addf r8 stf r0 ldf r0 addf r7 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r8 L18: incl v.2-v.1(r11) cmpl v.2-v.1(r11),r6 jleq L20 L19: movl r7,v.20-v.1(r11) movl r8,v.19-v.1(r11) movl r9,v.18-v.1(r11) movl r10,v.17-v.1(r11) L16: addl3 $v.20-v.1,r11,r0 pushl r0 addl3 $v.19-v.1,r11,r0 pushl r0 addl3 $v.18-v.1,r11,r0 pushl r0 addl3 $v.17-v.1,r11,r0 pushl r0 addl3 $v.5-v.1,r11,r0 pushl r0 addl3 $v.5-v.1,r11,r0 pushl r0 addl3 $v.5-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L114,__BLNK__+16 movl L114,__BLNK__+20 movl L114,__BLNK__+24 tstl v.6-v.1(r11) jgtr L24 jbr L23 L24: movl v.6-v.1(r11),-60(fp) movl -60(fp),r10 movl v.2-v.1(r11),r9 movl __BLNK__+24,r8 movl __BLNK__+20,r7 movl __BLNK__+16,r6 movl $1,r9 cmpl r9,r10 jgtr L26 L27: ldf __BLNK__+12 addf r6 stf r0 ldf r0 addf r7 stf r0 ldf r0 subf r8 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,__BLNK__+12 ldf __BLNK__+12 addf r6 stf r0 ldf r0 subf r7 stf r0 ldf r0 addf r8 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r6 ldf __BLNK__+12 subf r6 stf r0 ldf r0 addf r7 stf r0 ldf r0 addf r8 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r7 lnf __BLNK__+12 stf r0 ldf r0 addf r6 stf r0 ldf r0 addf r7 stf r0 ldf r0 addf r8 stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r8 L25: incl r9 cmpl r9,r10 jleq L27 L26: movl r6,__BLNK__+16 movl r7,__BLNK__+20 movl r8,__BLNK__+24 movl r9,v.2-v.1(r11) L23: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 addl3 $v.6-v.1,r11,r0 pushl r0 addl3 $v.7-v.1,r11,r0 pushl r0 addl3 $v.6-v.1,r11,r0 pushl r0 callf $32,_pout_ L30: movl v.7-v.1(r11),-64(fp) movl -64(fp),r10 movl v.2-v.1(r11),r9 movl $1,r9 cmpl r9,r10 jgtr L32 L33: L31: pushl $__BLNK__+12 callf $8,_pa_ incl r9 cmpl r9,r10 jleq L33 L32: movl r9,v.2-v.1(r11) L36: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 addl3 $v.6-v.1,r11,r0 pushl r0 addl3 $v.6-v.1,r11,r0 pushl r0 addl3 $v.7-v.1,r11,r0 pushl r0 callf $32,_pout_ tstl v.8-v.1(r11) jgtr L38 jbr L37 L38: movl v.8-v.1(r11),-68(fp) movl __BLNK__+28,r10 movl -68(fp),r9 movl v.2-v.1(r11),r8 movl $1,r8 cmpl r8,r9 jgtr L40 L41: addl3 $-1,r10,r0 jeql L45 jbr L44 L45: movl $2,r10 jbr L46 L44: movl $3,r10 L46: addl3 $-2,r10,r0 jgtr L48 jbr L47 L48: clrl r10 jbr L49 L47: movl $1,r10 L49: addl3 $-1,r10,r0 jlss L50 jbr L51 L50: movl $1,r10 jbr L39 L51: clrl r10 L39: incl r8 cmpl r8,r9 jleq L41 L40: movl r8,v.2-v.1(r11) movl r10,__BLNK__+28 L37: addl3 $v.20-v.1,r11,r0 pushl r0 addl3 $v.19-v.1,r11,r0 pushl r0 addl3 $v.18-v.1,r11,r0 pushl r0 addl3 $v.17-v.1,r11,r0 pushl r0 pushl $__BLNK__+28 pushl $__BLNK__+28 addl3 $v.8-v.1,r11,r0 pushl r0 callf $32,_pout_ movl $1,__BLNK__+28 movl $2,__BLNK__+32 movl $3,__BLNK__+36 tstl v.10-v.1(r11) jgtr L53 jbr L52 L53: movl v.10-v.1(r11),-72(fp) movl -72(fp),r10 movl v.2-v.1(r11),r9 movl $1,r9 cmpl r9,r10 jgtr L55 L56: subl3 __BLNK__+28,__BLNK__+32,r0 mull2 __BLNK__+28,r0 subl3 __BLNK__+32,__BLNK__+36,r1 mull2 r1,r0 movl r0,__BLNK__+28 mull3 __BLNK__+32,__BLNK__+36,r0 subl3 __BLNK__+28,__BLNK__+36,r1 mull2 __BLNK__+32,r1 subl2 r1,r0 movl r0,__BLNK__+32 subl3 __BLNK__+32,__BLNK__+36,r0 addl3 __BLNK__+28,__BLNK__+32,r1 mull2 r1,r0 movl r0,__BLNK__+36 addl3 __BLNK__+32,__BLNK__+28,r0 addl2 __BLNK__+36,r0 cvlf r0 stf r0 movl __BLNK__+36,r1 movl r0,__BLNK__+4[r1] addl3 __BLNK__+32,__BLNK__+28,r0 addl2 __BLNK__+36,r0 cvlf r0 stf r0 movl __BLNK__+32,r1 movl r0,__BLNK__+4[r1] L54: incl r9 cmpl r9,r10 jleq L56 L55: movl r9,v.2-v.1(r11) L52: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.10-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L120,v.21-v.1(r11) movl L120,v.22-v.1(r11) tstl v.11-v.1(r11) jgtr L60 jbr L59 L60: movl v.11-v.1(r11),-76(fp) movl v.21-v.1(r11),r10 movl v.22-v.1(r11),r9 movl -76(fp),r8 movl v.2-v.1(r11),r7 movl __BLNK__+8,r6 movl $1,r7 cmpl r7,r8 jgtr L62 L63: ldf r10 cosf stf r0 ldf r10 addf r9 stf r1 ldf r1 cosf stf r1 ldf r0 divf r1 stf r0 ldf r10 sinf stf r1 ldf r1 mulf r6 stf r1 ldf r0 addf r1 stf r0 ldf r10 subf r9 stf r1 ldf r1 cosf stf r1 ldf r0 addf r1 stf r0 ldf r0 addf L114 stf r0 ldf r0 atanf stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r10 ldf r9 cosf stf r0 ldf r10 addf r9 stf r1 ldf r1 cosf stf r1 ldf r0 divf r1 stf r0 ldf r9 sinf stf r1 ldf r1 mulf r6 stf r1 ldf r0 addf r1 stf r0 ldf r10 subf r9 stf r1 ldf r1 cosf stf r1 ldf r0 addf r1 stf r0 ldf r0 addf L114 stf r0 ldf r0 atanf stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,r9 L61: incl r7 cmpl r7,r8 jleq L63 L62: movl r7,v.2-v.1(r11) movl r9,v.22-v.1(r11) movl r10,v.21-v.1(r11) L59: addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.11-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L113,v.21-v.1(r11) movl L113,v.22-v.1(r11) movl L113,v.23-v.1(r11) tstl v.12-v.1(r11) jgtr L67 jbr L66 L67: movl v.12-v.1(r11),-80(fp) movl -80(fp),r10 movl v.2-v.1(r11),r9 movl $1,r9 cmpl r9,r10 jgtr L69 L70: L68: addl3 $v.23-v.1,r11,r0 pushl r0 addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 callf $16,_p3_ incl r9 cmpl r9,r10 jleq L70 L69: movl r9,v.2-v.1(r11) L66: addl3 $v.23-v.1,r11,r0 pushl r0 addl3 $v.23-v.1,r11,r0 pushl r0 addl3 $v.22-v.1,r11,r0 pushl r0 addl3 $v.21-v.1,r11,r0 pushl r0 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.12-v.1,r11,r0 pushl r0 callf $32,_pout_ movl $1,__BLNK__+28 movl $2,__BLNK__+32 movl $3,__BLNK__+36 movl L113,__BLNK__+12 movl L111,__BLNK__+16 movl L129,__BLNK__+20 tstl v.13-v.1(r11) jgtr L74 jbr L73 L74: movl v.13-v.1(r11),-84(fp) movl -84(fp),r10 movl v.2-v.1(r11),r9 movl $1,r9 cmpl r9,r10 jgtr L76 L77: L75: callf $4,_p0_ incl r9 cmpl r9,r10 jleq L77 L76: movl r9,v.2-v.1(r11) L73: pushl $__BLNK__+24 pushl $__BLNK__+20 pushl $__BLNK__+16 pushl $__BLNK__+12 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.13-v.1,r11,r0 pushl r0 callf $32,_pout_ movl $2,__BLNK__+28 movl $3,__BLNK__+32 tstl v.14-v.1(r11) jgtr L81 jbr L80 L81: movl v.14-v.1(r11),-88(fp) movl __BLNK__+28,r10 movl __BLNK__+32,r9 movl -88(fp),r8 movl v.2-v.1(r11),r7 movl $1,r7 cmpl r7,r8 jgtr L83 L84: addl3 r9,r10,r0 movl r0,r10 addl3 r9,r10,r0 movl r0,r9 subl3 r9,r10,r0 movl r0,r10 subl3 r10,r9,r0 subl2 r10,r0 movl r0,r9 L82: incl r7 cmpl r7,r8 jleq L84 L83: movl r7,v.2-v.1(r11) movl r9,__BLNK__+32 movl r10,__BLNK__+28 L80: addl3 $v.20-v.1,r11,r0 pushl r0 addl3 $v.19-v.1,r11,r0 pushl r0 addl3 $v.18-v.1,r11,r0 pushl r0 addl3 $v.17-v.1,r11,r0 pushl r0 pushl $__BLNK__+32 pushl $__BLNK__+28 addl3 $v.14-v.1,r11,r0 pushl r0 callf $32,_pout_ movl L130,v.21-v.1(r11) tstl v.15-v.1(r11) jgtr L88 jbr L87 L88: movl v.15-v.1(r11),-92(fp) movl v.21-v.1(r11),r10 movl -92(fp),r9 movl v.2-v.1(r11),r8 movl __BLNK__+4,r7 movl $1,r8 cmpl r8,r9 jgtr L90 L91: L89: ldf r10 logf stf r0 ldf r0 divf r7 stf r0 ldf r0 expf stf r0 ldf r0 sqrtf stf r0 movl r0,r10 incl r8 cmpl r8,r9 jleq L91 L90: movl r8,v.2-v.1(r11) movl r10,v.21-v.1(r11) L87: addl3 $v.3-v.1,r11,r0 pushl r0 callf $8,_secnds_ ldf r0 subf v.3-v.1(r11) stf r0 movl r0,v.24-v.1(r11) cmpl v.4-v.1(r11),$20 jneq L94 jbr L95 L94: movl v.24-v.1(r11),v.25-v.1(r11) movl $20,v.2-v.1(r11) jbr L15 L95: movl v.24-v.1(r11),v.26-v.1(r11) ldf v.26-v.1(r11) subf v.25-v.1(r11) stf r0 ldf L113 divf r0 stf r0 ldf r0 mulf L132 stf r0 movl r0,v.27-v.1(r11) movl L98,v.28+12 pushl $v.28 callf $8,_s_wsfe pushl $4 addl3 $v.27-v.1,r11,r0 pushl r0 pushl $L133 callf $16,_do_fio callf $4,_e_wsfe pushl $0 pushl $L134 callf $12,_s_stop L14: ret#0 L12: movl $v.1,r11 jbr L13 .set LF1,92 .set LWM1,0x1FC0 .text .globl _pa_ .align 1 _pa_: .word LWM2 subl3 $LF2,fp,sp jbr L136 L139: clrl v.30-v.29(r11) L141: movl 4(r12),r0 movl 4(r12),r1 ldf 4(r0) addf 8(r1) stf r0 movl 4(r12),r1 ldf r0 addf 12(r1) stf r0 movl 4(r12),r1 ldf r0 subf 16(r1) stf r0 ldf r0 mulf __BLNK__ stf r0 movl 4(r12),r1 movl r0,4(r1) movl 4(r12),r0 movl 4(r12),r1 ldf 4(r0) addf 8(r1) stf r0 movl 4(r12),r1 ldf r0 subf 12(r1) stf r0 movl 4(r12),r1 ldf r0 addf 16(r1) stf r0 ldf r0 mulf __BLNK__ stf r0 movl 4(r12),r1 movl r0,8(r1) movl 4(r12),r0 movl 4(r12),r1 ldf 4(r0) subf 8(r1) stf r0 movl 4(r12),r1 ldf r0 addf 12(r1) stf r0 movl 4(r12),r1 ldf r0 addf 16(r1) stf r0 ldf r0 mulf __BLNK__ stf r0 movl 4(r12),r1 movl r0,12(r1) movl 4(r12),r0 lnf 4(r0) stf r0 movl 4(r12),r1 ldf r0 addf 8(r1) stf r0 movl 4(r12),r1 ldf r0 addf 12(r1) stf r0 movl 4(r12),r1 ldf r0 addf 16(r1) stf r0 ldf r0 divf __BLNK__+8 stf r0 movl 4(r12),r1 movl r0,16(r1) addl3 $1,v.30-v.29(r11),r0 movl r0,v.30-v.29(r11) addl3 $-6,v.30-v.29(r11),r0 jlss L141 jbr L142 L142: jbr L138 L138: L137: ret#0 L136: movl $v.29,r11 movl fp,r12 subl2 $4,4(r12) jbr L139 .set LF2,52 .set LWM2,0x1800 .text .globl _p0_ .align 1 _p0_: .word LWM3 subl3 $LF3,fp,sp jbr L144 L147: movl __BLNK__+32,r0 movl __BLNK__+28,r1 movl __BLNK__+8[r0],__BLNK__+8[r1] movl __BLNK__+36,r0 movl __BLNK__+32,r1 movl __BLNK__+8[r0],__BLNK__+8[r1] movl __BLNK__+28,r0 movl __BLNK__+36,r1 movl __BLNK__+8[r0],__BLNK__+8[r1] jbr L146 L146: L145: ret#0 L144: jbr L147 .set LF3,52 .set LWM3,0x1000 .text .globl _p3_ .align 1 _p3_: .word LWM4 subl3 $LF4,fp,sp jbr L150 L153: movl *4(r12),v.33-v.32(r11) movl *8(r12),v.34-v.32(r11) ldf v.33-v.32(r11) addf v.34-v.32(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.33-v.32(r11) ldf v.33-v.32(r11) addf v.34-v.32(r11) stf r0 ldf r0 mulf __BLNK__ stf r0 movl r0,v.34-v.32(r11) ldf v.33-v.32(r11) addf v.34-v.32(r11) stf r0 ldf r0 divf __BLNK__+8 stf r0 movl r0,*12(r12) jbr L152 L152: L151: ret#0 L150: movl $v.32,r11 movl fp,r12 jbr L153 .set LF4,52 .set LWM4,0x1800 .text .globl _pout_ .align 1 _pout_: .word LWM5 subl3 $LF5,fp,sp jbr L156 L159: movl L163,v.36+12 pushl $v.36 callf $8,_s_wsfe pushl $4 pushl 4(r12) pushl $L133 callf $16,_do_fio pushl $4 pushl 8(r12) pushl $L133 callf $16,_do_fio pushl $4 pushl 12(r12) pushl $L133 callf $16,_do_fio pushl $4 pushl 16(r12) pushl $L133 callf $16,_do_fio pushl $4 pushl 20(r12) pushl $L133 callf $16,_do_fio pushl $4 pushl 24(r12) pushl $L133 callf $16,_do_fio pushl $4 pushl 28(r12) pushl $L133 callf $16,_do_fio callf $4,_e_wsfe jbr L158 L158: L157: ret#0 L156: movl fp,r12 jbr L159 .set LF5,52 .set LWM5,0x1000 .text .globl _prtres_ .align 1 _prtres_: .word LWM6 subl3 $LF6,fp,sp jbr L172 L175: jbr L174 L174: L173: ret#0 L172: movl fp,r12 jbr L175 .set LF6,52 .set LWM6,0x1000 .text .data 2 .align 2 v.28: .long 0 .long 6 .space 8 .align 2 v.2: .space 4 .align 2 v.22: .space 4 .align 2 v.5: .space 4 .align 2 v.7: .space 4 .align 2 v.9: .space 4 .align 2 v.11: .space 4 .align 2 v.13: .space 4 .align 2 v.18: .space 4 .align 2 v.20: .space 4 .align 2 v.15: .space 4 .align 2 v.27: .space 4 .align 2 v.26: .space 4 .align 2 v.3: .space 4 .align 2 v.4: .space 4 .align 2 v.24: .space 4 .align 2 v.25: .space 4 .align 2 v.16: .space 4 .align 2 v.14: .space 4 .align 2 v.19: .space 4 .align 2 v.17: .space 4 .align 2 v.12: .space 4 .align 2 v.10: .space 4 .align 2 v.8: .space 4 .align 2 v.6: .space 4 .align 2 v.23: .space 4 .align 2 v.21: .space 4 .set v.1,v.4 .align 2 v.30: .space 4 .set v.29,v.30 .align 2 v.33: .space 4 .align 2 v.34: .space 4 .set v.32,v.34 .align 2 v.36: .long 0 .long 6 .space 8

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.