--- cf/ChangeLog 2018/04/24 18:05:20 1.1.1.10 +++ cf/ChangeLog 2018/04/24 18:11:17 1.1.1.13 @@ -2088,3 +2088,353 @@ 14-Feb-2007 ----------- - C7200: added C7200-IO-GE+E, based on Intel i82543 chips. + +16-Feb-2007 +----------- + - MIPS64: fixed a problem of jump in delay slots (occuring with a "forward" + jump). This caused a malfunction for C7200-IO-2FE and C7200-IO-GE-E cards. + - C7200: adjusted the byte-swapped zone for NPE-300 io-memory. + +18-Feb-2007 +----------- + - PPC32: Remove JIT compiled pages when a write occurs (required for c2600). + +19-Feb-2007 +----------- + - PPC32: Optimization for writes on JIT page at address 0. + +20-Feb-2007 +----------- + - Working on MSFC1 - just for fun (this will probably never route any + packet). + - Fixed DEC21140 TX ring interrupt generation. + +21-Feb-2007 +----------- + - Continuing on MSFC1 (added EEPROM, SRAM, ...) + - Added NMC93C56 EEPROM support. + +23-Feb-2007 +----------- + - MPC860: fixed a bug in DMA handling which caused incorrect writes out + of DPRAM memory. + - PPC32: added missing breakpoint function for JIT. + - C7200: rework on network interrupts, for clean handling per slot/port. + +24-Feb-2007 +----------- + - C7200: Net IRQs are now correctly dispatched. Need to fix all drivers + to generate IRQs correctly. + - DEC21140: proper management of CSR5 register for new interrupt handling. + - i8254x: converted to new interrupt handling. + - Am79c971: fixed interrupt management + a bug with IRQ mask. + - PA-A1/PA-POS-OC3/Mueslix: fixed interrupt management. + +25-Feb-2007 +----------- + - C2691: updated interrupt infrastructure. + - NM-16ESW: fixed interrupt handling. + +26-Feb-2007 +----------- + - C3725/C3745: updated interrupt infrastructure. + +27-Feb-2007 +----------- + - C2600: updated interrupt infrastructure. + +02-Mar-2007 +----------- + - Added a cache for the instruction lookup tables (ILT), allowing a faster + start. + +03-Mar-2007 +----------- + - Fixed instruction tables (problem seen on amd64 platforms). + +07-Mar-2007 +----------- + - MIPS64/PPC32: various code cleanups in JIT code. + - MIPS64: replace the JIT block lookup algorithm based on physical + pages by s-boxes (x86 only). + +08-Mar-2007 +----------- + - PPC32: JIT block lookup optimization (x86 only). + +09-Mar-2007 +----------- + - MIPS64/PPC32: JIT block lookup optimization (amd64). + +12-Mar-2007 +----------- + - PPC32: fixed invalid hash index in JIT block invalidation (thanks to Greg). + +13-Mar-2007 +----------- + - Updated the Mueslix driver and fixed it for packets > 128 bytes + (IRQ clearing delay required because of the new interrupt system). + - Allowed MTU up to 18000 bytes on the Mueslix driver. This required an + update of the NIO core. + - Full dump of the idle-pc values when no "good" value can be determined. + +25-Mar-2007 +----------- + - Store the idle-pc values in the CPU structure when no "good" value is + available, so they are readable/usable by dynagen. + - PA-POS-OC3: fixed memory copy which caused invalid frames to be sent. + +27-Mar-2007 +----------- + - Added a device access counter for each CPU for diagnostics purposes. + +29-Mar-2007 +----------- + - PPC32: optimizations for eflags->cr computing. + +30-Mar-2007 +----------- + - PPC32: optimizations in CR handling (split in 8 fields). + +31-Mar-2007 +----------- + - PPC32: added CR optimizations to amd64 backend. + +02-Apr-2007 +----------- + - Fixed "nojit" build (reported by Philipp Brenner, BTS entry #156). + - AMD Am79c970 FastEthernet interfaces now announce 100 Mb/s Full duplex. + +04-Apr-2007 +----------- + - Fixed build (NetIO filters) when PCAP is lacking. + +09-Apr-2007 +----------- + - Added NM-1A-OC3MM EEPROM definition for future work. + - NM-16ESW: filter CDP specifically to not propagate frames to all ports. + +12-Apr-2007 +----------- + - Added an hypervisor command to disable direct jumps between JIT blocks + (vm set_blk_direct_jump <0|1>). + +15-Apr-2007 => 22-Apr-2007 +=========================== + - PPC32: rewrite of JIT with peephole and CR flags optimizations. + +23-Apr-2007 +----------- + - PPC32: converted amd64 JIT to new system. + +24-Apr-2007 +----------- + - MIPS64: fixed a bug in cache instruction preventing compressed IOS images + to boot. + - PPC32: same as above for ICBI instruction. + - PPC32: fixed ADDZE instruction. + +25-Apr-2007 +----------- + - C3725: fixed interrupt problems with slot 2 (bad shift - only 4 irq + lines per port). + +28-Apr-2007 +----------- + - Changed instruction counters to 32-bit type, to get more accurate + results. + +29-Apr-2007 +----------- + - Experimenting with a per-register memory translation cache. + +30-Apr-2007 +----------- + - C2600: playing with MPC860 SPI to access WIC eeproms (slot 0 only). + +01-May-2007 +----------- + - MPC860: continuing on SPI. + - Rewriting/Refactoring code to handle network interfaces (required for WIC + support). + +02-May-2007 +----------- + - Continuing rework of network interfaces. + +03-May-2007 +----------- + - Added slot handling hypervisor commands to VM module. + - Fixed some bugs/lacking checks in network card module. + - C2600: added WIC EEPROM read through MPC860 SPI code. + - C2600: beginning of work for basic SCC implementation. + +04-May-2007 +----------- + - C2600: continuing on SCC. + - C2600: WIC-1T is now working! + - C2600: added WIC-2T (async mode is not supported). + - C1700: introduction of this platform (took c2600 as base model). + +05-May-2007 +----------- + - MPC860: added SPI relocation support (required for c1700). + - C1700: added NVRAM. + - C1700: added WIC detection / correct EEPROM support. + - MPC860: beginning of work on Fast Ethernet Controller. + +07-May-2007 +----------- + - MPC860: Fast Ethernet Controller basically working (MII registers + required). + - MPC860: better handling of interrupt levels. + - C1700: added WIC support (WIC-1T/WIC-2T). + +14/15-May-2007 +-------------- + - Flash code rework (required for c1700) to have something more generic. + +16-May-2007 +----------- + - New flash code re-enabled for all routers requiring it (NPE-G2 bootflash + is broken however). + - C1700: added WIC-1ENET code base with EEPROM MAC address programming. + +18-May-2007 +----------- + - Memory exceptions are now handled through setjmp/longjmp, avoiding error + checks in memory access functions. + +19-May-2007 +----------- + - C2600: fixed PCI handling which prevented i82559 device to work. + In fact, the PCI bridge is in a Xilinx device, and the output of + "sh pci hardware" was very different from a real router. + - i8255x (eepro100): added basic code (no RX/TX, only MII working). + +20-May-2007 +----------- + - Continuing on i8255x. + +21-May-2007 +----------- + - i8255x: Intel doesn't provide enough info in its documentation for + the RX flexible mode... + +22-May-2007 +----------- + - i8255x: RX flexible mode works similarly to the 82596CA chipset. + Packet TX and RX seems ok. + +23-May-2007 +----------- + - C2691/C3725/C3745: fixed GT96100 binding to slot 0. + - GT96100/ETH: fixed interrupt handling for TX packets (the interrupt was + incorrectly disabled when no packet was available on a ring, causing + packet loss when the two ports were enabled) - BTS entry #171. + +25-May-2007 +----------- + - C3660: correct support of mainboard FastEthernet ports with the new + card subsystem. + - C7200: fixed I/O card definition with new card subsystem. + - Added compatibility mode with old version for slot binding in the + command line. + +01-Jun-2007 +----------- + - Heavily fixed/tested the Serial drivers to correctly transmit/receive + frames. Now the CRC is not anymore transmitted and the correct size is + set for RX rings (TODO: crc-32 for Mueslix and PA-POS-OC3). + +03-Jun-2007 +----------- + - Fixed incorrect free in deletion of frame-relay switch VC. + +04-Jun-2007 +----------- + - PA-POS-OC3/Mueslix: added correct handling of crc-16/crc-32. + +10-Jun-2007 +----------- + - MIPS64: correct handling of stack for MacOS X (alignment). + - MSFC1: cleaned up module to use the new card infrastructure. + - Frame-Relay switch: removed "trailing" handling which was in fact + only the CRC + final byte. + +09-Jul-2007 +----------- + - Fixed PA-FE-TX initialization (EEPROM setting lacking). + +11-Jul-2007 +----------- + - PPC32-JIT: fixed stack alignment for MacOSX/Darwin. + - PPC32-JIT: fixed perf counter and breakpoints. + +13-Jul-2007 +----------- + - Integrated patches from FreeBSD (Pavel I Volkov), excepted for the vtty + part. + +14-17-Jul-2007 +-------------- + - Rework of VM infrastructure. + +17-Jul-2007 +----------- + - Added basic plugin subsystem. + - CPU: added custom handler support for undefined memory accesses. + +21-22-Jul-2007 +-------------- + - GT96100: working on SDMA and MPSC. + +23-Jul-2007 +----------- + - C3745: finally understood how to handle WIC EEPROMs. + +24-Jul-2007 +----------- + - C3745: added support of WIC-1T & WIC-2T. + - GT96100: fixed SDMA handling. + +25-Jul-2007 +----------- + - C2691/C3725: added WIC-1T and WIC-2T similarly to C3745. + - C1700: fixed mainboard definitions, added proper support of C1710 + (no WIC port, Ethernet port connected on MPC860 SCC1). + - C1700: added 1751 and 1760 definitions. + +29-Jul-2007 +----------- + - MPC860: fixed MII registers for 1710, 1721 and 1760. + +01-Aug-2007 +----------- + - C2600/C2691/C3725/C3745: Added NM-CIDS/NM-NAM which can be connected + to a PC emulator. + - C2600: added a check for NM-CIDS/NM-NAM which require XM models. + +18-Aug-2007 +----------- + - Added WIC address space definitions for platforms that support them. + +19-Aug-2007 +----------- + - Added ISL support for am79c970 based cards (NM-1FE-TX and others). + +27-Aug-2007 +----------- + - GT96100: missing check for NULL pointer in set_nio/unset_nio. + - MPC860: same bugfix (SCC and FEC). + +31-Aug-2007 +----------- + - MIPS/PPC: modified device memory access to allow devices not at a 4k + page boundary (like WICs on 2600). + - Added fake WIC serial drivers, just to catch the memory accesses. + +06-Sep-2007 +----------- + - PPC32: Fixed BCTR instruction on amd64 jit. + \ No newline at end of file