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1.1 root 1: /*
2: * Cisco router simulation platform.
3: * Copyright (c) 2005-2007 Christophe Fillot ([email protected])
4: *
5: * Cisco c7200 Midplane FPGA.
6: */
7:
8: #ifndef __DEV_C7200_MPFPGA_H__
9: #define __DEV_C7200_MPFPGA_H__
10:
11: /* Forward declaration for MP_FPGA private data */
12: struct c7200_mpfpga_data;
13:
14: /* Trigger a Network IRQ for the specified slot/port */
15: void dev_c7200_mpfpga_net_set_irq(struct c7200_mpfpga_data *d,
16: u_int slot,u_int port);
17:
18: /* Clear a Network IRQ for the specified slot/port */
19: void dev_c7200_mpfpga_net_clear_irq(struct c7200_mpfpga_data *d,
20: u_int slot,u_int port);
21:
22: /* Create the c7200 Midplane FPGA */
23: int dev_c7200_mpfpga_init(c7200_t *router,m_uint64_t paddr,m_uint32_t len);
24:
25: #endif
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