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1.1 ! root 1: /* ! 2: * Cisco router simulation platform. ! 3: * Copyright (c) 2005,2006 Christophe Fillot ([email protected]) ! 4: * ! 5: * PPC32 JIT compiler. ! 6: */ ! 7: ! 8: #ifndef __PPC32_JIT_H__ ! 9: #define __PPC32_JIT_H__ ! 10: ! 11: #include "utils.h" ! 12: ! 13: /* Size of executable page area (in Mb) */ ! 14: #ifndef __CYGWIN__ ! 15: #define PPC_EXEC_AREA_SIZE 64 ! 16: #else ! 17: #define PPC_EXEC_AREA_SIZE 16 ! 18: #endif ! 19: ! 20: /* Buffer size for JIT code generation */ ! 21: #define PPC_JIT_BUFSIZE 32768 ! 22: ! 23: /* Maximum number of X86 chunks */ ! 24: #define PPC_JIT_MAX_CHUNKS 32 ! 25: ! 26: /* Instruction jump patch */ ! 27: struct ppc32_insn_patch { ! 28: u_char *jit_insn; ! 29: m_uint64_t ppc_ia; ! 30: }; ! 31: ! 32: /* Instruction patch table */ ! 33: #define PPC32_INSN_PATCH_TABLE_SIZE 32 ! 34: ! 35: struct ppc32_jit_patch_table { ! 36: struct ppc32_insn_patch patches[PPC32_INSN_PATCH_TABLE_SIZE]; ! 37: u_int cur_patch; ! 38: struct ppc32_jit_patch_table *next; ! 39: }; ! 40: ! 41: /* PPC32 translated code block */ ! 42: struct ppc32_jit_tcb { ! 43: m_uint32_t start_ia; ! 44: u_char **jit_insn_ptr; ! 45: m_uint64_t acc_count; ! 46: m_uint32_t phys_page; ! 47: ppc_insn_t *ppc_code; ! 48: u_int ppc_trans_pos; ! 49: u_int jit_chunk_pos; ! 50: u_char *jit_ptr; ! 51: insn_exec_page_t *jit_buffer; ! 52: insn_exec_page_t *jit_chunks[PPC_JIT_MAX_CHUNKS]; ! 53: struct ppc32_jit_patch_table *patch_table; ! 54: ppc32_jit_tcb_t *prev,*next; ! 55: #if DEBUG_BLOCK_TIMESTAMP ! 56: m_uint64_t tm_first_use,tm_last_use; ! 57: #endif ! 58: }; ! 59: ! 60: /* PPC instruction recognition */ ! 61: struct ppc32_insn_tag { ! 62: int (*emit)(cpu_ppc_t *cpu,ppc32_jit_tcb_t *,ppc_insn_t); ! 63: m_uint32_t mask,value; ! 64: }; ! 65: ! 66: /* Get the JIT instruction pointer in a translated block */ ! 67: static forced_inline ! 68: u_char *ppc32_jit_tcb_get_host_ptr(ppc32_jit_tcb_t *b,m_uint32_t vaddr) ! 69: { ! 70: m_uint32_t offset; ! 71: ! 72: offset = (vaddr - b->start_ia) >> 2; ! 73: return(b->jit_insn_ptr[offset]); ! 74: } ! 75: ! 76: /* Initialize instruction lookup table */ ! 77: void ppc32_jit_create_ilt(void); ! 78: ! 79: /* Initialize the JIT structure */ ! 80: int ppc32_jit_init(cpu_ppc_t *cpu); ! 81: ! 82: /* Flush the JIT */ ! 83: u_int ppc32_jit_flush(cpu_ppc_t *cpu,u_int threshold); ! 84: ! 85: /* Shutdown the JIT */ ! 86: void ppc32_jit_shutdown(cpu_ppc_t *cpu); ! 87: ! 88: /* Fetch a PowerPC instruction and emit corresponding translated code */ ! 89: struct ppc32_insn_tag *ppc32_jit_fetch_and_emit(cpu_ppc_t *cpu, ! 90: ppc32_jit_tcb_t *block); ! 91: ! 92: /* Record a patch to apply in a compiled block */ ! 93: int ppc32_jit_tcb_record_patch(ppc32_jit_tcb_t *block,u_char *jit_ptr, ! 94: m_uint32_t vaddr); ! 95: ! 96: /* Free an instruction block */ ! 97: void ppc32_jit_tcb_free(cpu_ppc_t *cpu,ppc32_jit_tcb_t *block, ! 98: int list_removal); ! 99: ! 100: /* Check if the specified address belongs to the specified block */ ! 101: int ppc32_jit_tcb_local_addr(ppc32_jit_tcb_t *block,m_uint32_t vaddr, ! 102: u_char **jit_addr); ! 103: ! 104: /* Execute compiled PowerPC code */ ! 105: void *ppc32_jit_run_cpu(cpu_gen_t *gen); ! 106: ! 107: #endif
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