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1.1 root 1: /*
2: * COFF file header.
3: */
4:
5: struct filehdr {
6: unsigned short f_magic; /* magic number */
7: unsigned short f_nscns; /* number of sections */
8: long f_timdat; /* time & date stamp */
9: long f_symptr; /* file pointer to symtab */
10: long f_nsyms; /* number of symtab entries */
11: unsigned short f_opthdr; /* sizeof(optional hdr) */
12: unsigned short f_flags; /* flags */
13: };
14:
15:
16: /*
17: * Bits for f_flags:
18: *
19: * F_RELFLG relocation info stripped from file
20: * F_EXEC file is executable (i.e. no unresolved
21: * externel references)
22: * F_LNNO line nunbers stripped from file
23: * F_LSYMS local symbols stripped from file
24: * F_MINMAL this is a minimal object file (".m") output of fextract
25: * F_UPDATE this is a fully bound update file, output of ogen
26: * F_SWABD this file has had its bytes swabbed (in names)
27: * F_AR16WR this file has the byte ordering of an AR16WR (e.g. 11/70) machine
28: * (it was created there, or was produced by conv)
29: * F_AR32WR this file has the byte ordering of an AR32WR machine(e.g. vax)
30: * F_AR32W this file has the byte ordering of an AR32W machine (e.g. 3b,maxi)
31: * F_PATCH file contains "patch" list in optional header
32: * F_NODF (minimal file only) no decision functions for
33: * replaced functions
34: */
35:
36: #define F_RELFLG 0000001
37: #define F_EXEC 0000002
38: #define F_LNNO 0000004
39: #define F_LSYMS 0000010
40: #define F_MINMAL 0000020
41: #define F_UPDATE 0000040
42: #define F_SWABD 0000100
43: #define F_AR16WR 0000200
44: #define F_AR32WR 0000400
45: #define F_AR32W 0001000
46: #define F_PATCH 0002000
47: #define F_NODF 0002000
48:
49: /*
50: * BELLMAC-32 Identification field
51: * F_BM32B file contains BM32B code (as opposed to strictly BM32A)
52: * F_BM32MAU file requires MAU (math arith unit) to execute
53: */
54:
55: #define F_BM32ID 0160000
56: #define F_BM32MAU 0040000
57: #define F_BM32B 0020000
58:
59: /* F_BM32RST file has RESTORE work-around */
60:
61: #define F_BM32RST 0010000
62:
63: /*
64: * Flags for the INTEL chips. If the magic number of the object file
65: * is IAPX16 or IAPX16TV or IAPX20 or IAPX20TV then if F_80186
66: * is set, there are some 80186 instructions in the code, and hence
67: * and 80186 or 80286 chip must be used to run the code.
68: * If F_80286 is set, then the code has to be run on an 80286 chip.
69: * And if neither are set, then the code can run on an 8086, 80186, or
70: * 80286 chip.
71: *
72: */
73:
74: #define F_80186 010000
75: #define F_80286 020000
76:
77: /*
78: * Magic Numbers
79: */
80:
81: /* iAPX - the stack frame and return registers differ from
82: * Basic-16 and x86 C compilers, hence new magic numbers
83: * are required. These are cross compilers.
84: */
85:
86: /* Intel */
87: #define IAPX16 0504
88: #define IAPX16TV 0505
89: #define IAPX20 0506
90: #define IAPX20TV 0507
91: /* 0514, 0516 and 0517 reserved for Intel */
92:
93: /* Basic-16 */
94:
95: #define B16MAGIC 0502
96: #define BTVMAGIC 0503
97:
98:
99: /* x86 */
100:
101: #define X86MAGIC 0510
102: #define XTVMAGIC 0511
103:
104: /* Intel 286 */
105: #define I286SMAGIC 0512
106: #define I286LMAGIC 0522 /* used by mc68000 (UNIX PC) and iAPX 286 */
107:
108: /* Intel 386 */
109:
110: #define I386MAGIC 0514
111:
112: /* n3b */
113: /*
114: * NOTE: For New 3B, the old values of magic numbers
115: * will be in the optional header in the structure
116: * "aouthdr" (identical to old 3B aouthdr).
117: */
118: #define N3BMAGIC 0550 /* 3B20 executable, no TV */
119: #define NTVMAGIC 0551 /* 3B20 executable with TV */
120:
121: /* MAC-32, 3B15, 3B5 */
122:
123: #define WE32MAGIC 0560 /* WE 32000, no TV */
124: #define FBOMAGIC 0560 /* WE 32000, no TV */
125: #define RBOMAGIC 0562 /* reserved for WE 32000 */
126: #define MTVMAGIC 0561 /* WE 32000 with TV */
127:
128:
129: /* VAX 11/780 and VAX 11/750 */
130:
131: /* writeable text segments */
132: #define VAXWRMAGIC 0570
133: /* readonly sharable text segments */
134: #define VAXROMAGIC 0575
135:
136: /* pdp11 */
137: /* 0401 UNIX-rt ldp */
138: /* 0405 pdp11 overlay */
139: /* 0407 pdp11/pre System V vax executable */
140: /* 0410 pdp11/pre System V vax pure executable */
141: /* 0411 pdp11 seperate I&D */
142: /* 0437 pdp11 kernel overlay */
143:
144:
145: /* Motorola 68000/68008/68010/68020 */
146: #define MC68MAGIC 0520
147: #define MC68KWRMAGIC 0520 /* writeable text segments */
148: #define MC68TVMAGIC 0521
149: #define MC68KROMAGIC 0521 /* readonly shareable text segments */
150: #define MC68KPGMAGIC 0522 /* demand paged text segments */
151: #define M68MAGIC 0210
152: #define M68TVMAGIC 0211
153:
154:
155: /* IBM 370 */
156: #define U370WRMAGIC 0530 /* writeble text segments */
157: #define U370ROMAGIC 0535 /* readonly sharable text segments */
158: /* 0532 and 0533 reserved for u370 */
159:
160: /* Amdahl 470/580 */
161: #define AMDWRMAGIC 0531 /* writable text segments */
162: #define AMDROMAGIC 0534 /* readonly sharable text segments */
163:
164: /* NSC */
165: /* 0524 and 0525 reserved for NSC */
166:
167: /* Zilog */
168: /* 0544 and 0545 reserved for Zilog */
169:
170: #define FILHDR struct filehdr
171: #define FILHSZ sizeof(FILHDR)
172:
173: #define ISCOFF(x) \
174: (((x)==B16MAGIC) || ((x)==BTVMAGIC) || ((x)==X86MAGIC) \
175: || ((x)==XTVMAGIC) || ((x)==N3BMAGIC) || ((x)==NTVMAGIC) \
176: || ((x)==FBOMAGIC) || ((x)==VAXROMAGIC) || ((x)==VAXWRMAGIC) \
177: || ((x)==RBOMAGIC) || ((x)==MC68TVMAGIC) \
178: || ((x)==MC68MAGIC) || ((x)==M68MAGIC) || ((x)==M68TVMAGIC) \
179: || ((x)==IAPX16) || ((x)==IAPX16TV) \
180: || ((x)==IAPX20) || ((x)==IAPX20TV) \
181: || ((x)==U370WRMAGIC) || ((x)==U370ROMAGIC) || ((x)==MTVMAGIC) \
182: || ((x)==I286SMAGIC) || ((x)==I286LMAGIC) \
183: || ((x)==MC68KWRMAGIC) || ((x)==MC68KROMAGIC) \
184: || ((x)==MC68KPGMAGIC) \
185: || ((x)==I386MAGIC))
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