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Annotation of coherent/a/usr/include.b4ps2/sys/m18hd.h, revision 1.1.1.1

1.1       root        1: /* $Header: /src386/usr/include/sys/RCS/m18hd.h,v 1.2 92/09/29 09:26:50 bin Exp Locker: bin $
                      2:  *
                      3:  * Olivetti M18 Personal Computer
                      4:  * Hard Disk Constants
                      5:  *
                      6:  *                     Allan Cornish, INETCO Systems Ltd., Aug 1984
                      7:  *
                      8:  * $Log:       m18hd.h,v $
                      9:  * Revision 1.2  92/09/29  09:26:50  bin
                     10:  * updated with kernel 63 src
                     11:  * 
                     12:  * Revision 1.1        88/03/24  17:48:25      src
                     13:  * Initial revision
                     14:  * 
                     15:  */
                     16: #ifndef M18HD_H
                     17: #define        M18HD_H
                     18: 
                     19: /*
                     20:  * Register Addresses
                     21:  */
                     22: 
                     23: #define        SEL_REG         0x300           /* Select Register (write only) */
                     24: #define        STAT_REG        0x300           /* Status Register (read  only) */
                     25: #define        ENA_REG         0x301           /* Enable Register (write only) */
                     26: #define        DATA_REG        0x302           /* Data   Register (read/write) */
                     27: #define        CMD_REG         0x303           /* Commnd Register (read,write) */
                     28: #define        AUX_REG         0x304           /* Auxiliary Reg   (read  only) */
                     29:  
                     30: /*
                     31:  * Select Register (Write Only)
                     32:  */
                     33: 
                     34: #define        HEAD_SEL(n)     ((n)<<2)        /* Head Select macro            */
                     35: #define        STEP_SEL        0x20            /* Set to step                  */
                     36: #define        STEP_IN         0x40            /* Set to step in               */
                     37: #define        RWC_SEL         0x80            /* Reduced Write Curr           */
                     38:  
                     39: /*
                     40:  * Status Register (Read Only) - bits 6..7 unused
                     41:  */
                     42: 
                     43: #define        DTA_ST          0x01            /* Drive Type, Jumper A         */
                     44: #define        RDY_ST          0x02            /* Drive Ready                  */
                     45: #define        TK0_ST          0x04            /* At Track 0                   */
                     46: #define        WFLT_ST         0x08            /* Write Fault on drive         */
                     47: #define        SKC_ST          0x10            /* Seek Complete                */
                     48: #define        SYNC_ST         0x20            /* Sector Synchronization       */
                     49: 
                     50: /*
                     51:  * Enable Register (Write Only) - bits 0..4 select sector (0..31)
                     52:  */
                     53: 
                     54: #define        READ_ENA        0x20            /* Enable read as next command  */
                     55: #define        ECC_ENA         0x40            /* Enable ecc on next command   */
                     56: #define        WPRE_ENA        0x80            /* Enable write precompensation */
                     57: 
                     58: /*
                     59:  * Auxiliary Register (Read Only) - bits 2..7 unused
                     60:  */
                     61: 
                     62: #define        BUSY_AUX        0x01            /* Drive Busy                   */
                     63: #define        DTC_AUX         0x02            /* Drive Type, Jumper C         */
                     64: 
                     65: /*
                     66:  * Drive Specific Constants
                     67:  */
                     68: 
                     69: #define        NSPT            32
                     70: #define        NHEAD           4
                     71: #define        NCYL            306
                     72: #define        WPCC            64              /* Write Precompensation cyl    */
                     73: #define        RWCC            128             /* Reduced Write Current cyl    */
                     74: 
                     75: /*
                     76:  * Error Returns from hdget(), hdput()
                     77:  */
                     78: 
                     79: #define        ECC_ERR         0x00ff          /* Bad ECC read error mask      */
                     80: #define        SKNC_ERR        0x0100          /* Seek Not Complete Error      */
                     81: #define        BUSY_ERR        0x0200          /* Controller Busy Error        */
                     82: #define        SYNC_ERR        0x0400          /* Synchronization Error        */
                     83: #define        PRFX_ERR        0x0800          /* Bad Prefix Read Error        */
                     84: #define        HEAD_ERR        0x1000          /* Bad Head Read Error          */
                     85: #define        CYL_ERR         0x2000          /* Bad Cylinder Read Error      */
                     86: #define        SEC_ERR         0x4000          /* Bad Sector ID Read Error     */
                     87: #define        NRDY_ERR        0x8000          /* Drive Not Ready Error        */
                     88: 
                     89: 
                     90: #endif

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