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1.1 root 1: /* (-lgl
2: * COHERENT Driver Kit Version 2.0
3: * Copyright (c) 1982, 1992 by Mark Williams Company.
4: * All rights reserved. May not be copied without permission.
5: -lgl) */
6: #ifndef MMU_H
7: #define MMU_H
8:
9: #ifdef _I386
10: #ifndef TYPES_H
11: #include <sys/types.h>
12: #endif
13: #ifndef UPROC_H
14: #include <sys/uproc.h>
15: #endif
16:
17: /* A click is a 4K byte paragraph.
18: * a segment is a 4 megabyte paragraph (level 1 page table entry)
19: */
20:
21: #define DESC_4096 0x00800000L
22: #define DESC_32I 0x00C09b00L
23: #define DESC_32D 0x00C09300L
24: #define DESC_16I 0x00809b00L
25: #define DESC_16D 0x00809300L
26: #define DESC_TSS_32A 0x00008900L /* available 386 TSS */
27:
28: #define D_USR 0x00006000L
29:
30: #define UII_BASE 0x00400000L /* base for sep I/D l.out text */
31:
32: #define SEG_ILL 0x00 /* The empty page table entry. */
33: #define SEG_PRE 0x01 /* Present bit. */
34: #define SEG_SRO 0x01 /* Read by system only. */
35: #define SEG_SRW 0x03 /* Read/Write by system only. */
36: #define SEG_RO 0x05 /* Read only by anybody. */
37: #define SEG_BITS 0x07 /* Permissions bits for a pte. */
38: #define SEG_RW 0x07 /* Read/Write by anybody. */
39: #define SEG_ACD 0x20 /* Page has been accessed. */
40: #define SEG_UPD 0x40 /* Page has been updated. */
41:
42: #define DIR_RW 0x07 /* us=us0|us1; rw=rw0&rw1; Intel's sOOO logical*/
43:
44:
45: #define SEG_386_UI 0x08 /* [ 0000 0000 .. FFFF FFFF ] */
46: #define SEG_386_UD 0x10 /* ditto */
47: #define SEG_386_KI 0x18 /* [ 0000 0000 .. F000 0000 ) */
48: #define SEG_386_KD 0x20 /* ditto */
49: #define SEG_286_UI 0x28
50: #define SEG_286_UD 0x30
51: #define SEG_TSS 0x38
52: #define SEG_ROM 0x40
53: #define SEG_VIDEOa 0x48
54: #define SEG_VIDEOb 0x50
55: #define SEG_386_II 0x58
56: #define SEG_386_ID 0x60
57: #define SEG_286_UII 0x68 /* UI -i */
58: #define SEG_LDT 0x70
59:
60: #define SEG_VIRT 0x100 /* pseudo bit for kxcopy */
61:
62: #define R_USR 0x03
63:
64:
65: /*
66: * These addresses are all in clicks.
67: */
68: #define ROM 0xFFFC0 /* BIOS virtual address. */
69: #define VIDEOa 0xFFFB0 /* CGA video virtual address. */
70: #define VIDEOb 0xFFFA0 /* Mono video virtual address. */
71:
72: #define PTABLE0_P 0x00001 /* Page directory physical address. */
73: #define PBASE 0x00002 /* Start of kernel, physical address. */
74:
75: #define UADDR 0xFFFFF /* u area virtual address. */
76: #define PTABLE0_V 0xFFFFE /* Page directory virtual address. */
77: #define PPTABLE1_V 0xFFFFC /* Virtual address of the page table
78: * for the virtual page table.
79: */
80: #define WORK1 0xFFFFB /* Scratch page 1 virtual address. */
81: #define WORK0 0xFFFFA /* Scratch page 0 virtual address. */
82:
83: #define MAX_VADDR ctob(VIDEOb) /* Highest allocatable virtual address. */
84: /*
85: * Addresses in kernel data for the RAM disk are now in rm.c.
86: * As of 92/06/25, they are
87: * RAM0 0x80000 Ram disk 0 virtual click address.
88: * RAM1 0x80800 Ram disk 1 virtual click address.
89: * RAMSIZE 0x00800 Number of clicks in each ram disk.
90: */
91:
92: #define SBASE 0xFFC00 /* Start of kernel, virtual address. */
93: #define PTABLE1_V 0xFF800 /* Start of virtual page table. */
94:
95: /*
96: * ptable0_v[] is the page directory (master page table).
97: * ptable1_v[] is the virtual page table.
98: */
99: #define ptable0_v ((long *)ctob(PTABLE0_V))
100: #define ptable1_v ((long *)ctob(PTABLE1_V))
101:
102:
103: #define SZDT 8 /* size of a segment descriptor */
104:
105: #define clickseg(n) (((long)n) << BPCSHIFT)
106: #define segclick(n) ((long)(n) >> BPCSHIFT)
107:
108: #define regread(n) ptable0_v[(n)>>BPC1SHIFT]
109: #define regload(n, v) { ptable0_v[(n)>>BPC1SHIFT] = v; mmuupd(); }
110:
111: #define maparea(v) \
112: { ptable1_v[WORK0-SBASE] = clickseg(v) | SEG_SRW; mmuupd(); }
113:
114: #define xmode(ty) ((u.u_regl[DS]&0xffff) \
115: == ((ty)==286 ? SEG_286_UD+R_USR : SEG_386_UD+R_USR))
116: #define XMODE_286 ((u.u_regl[DS]&0xffff) == (SEG_286_UD+R_USR))
117: #define XMODE_386 ((u.u_regl[DS]&0xffff) == (SEG_386_UD+R_USR))
118: #define wdsize() ((XMODE_286) ? sizeof(short) : sizeof(int))
119:
120: /*
121: * These macros assume segment size <= 4 megabytes.
122: *
123: * MAPIO:absolute page table address, offset ->
124: * relative page table click# (20 bits) ... offset (12 bits)
125: */
126: #define MAPIO(seg, off) ((seg+((int)(off)>>BPCSHIFT) - sysmem.u.pbase) << \
127: BPCSHIFT | ((off) & (NBPC-1)))
128: #define P2P(addr) ((sysmem.u.pbase[btocrd(addr)]&~(NBPC-1)) |(addr&(NBPC-1)))
129:
130: #define BUDDY(addr,size) ((addr) ^ (1 << (size)))
131: #define NBUDDY 12 /* segments of 2^NBUDDY 4 click chunks (16 megabytes) */
132: #define SPLASH 3
133: #define NDATA 4 /* process data segments */
134: #define BLKSZ 2 /* log2 sizeof(BLOCKLIST)/sizeof(cseg_t) */
135: SR *loaded();
136: cseg_t *c_begin();
137:
138: #define INSERT2(t, p, pp) { \
139: (p)->forw = (pp); \
140: (p)->back = (pp)->back; \
141: (pp)->back->forw = (p); \
142: (pp)->back= (p); \
143: }
144:
145: #define DELETE2(p) ((p)->forw->back = (p)->back, (p)->back->forw = \
146: (p)->forw, (p)->forw = (p)->back = (p))
147:
148: #define INIT2(lp) ((lp)->forw = (lp)->back = (lp))
149:
150: typedef struct blocklist
151: {
152: struct blocklist *back;
153: struct blocklist *forw;
154: int kval;
155: int fill; /* sizeof(BLOCKLIST) :: power of 2 */
156: } BLOCKLIST;
157:
158: #define WCOUNT 32 /* number of bits in an int */
159: #define WSHIFT 5
160:
161: typedef struct {
162: union {
163: BLOCKLIST *budtab;
164: cseg_t *pbase;
165: } u; /* beginning of pointer area */
166: int budfree[1 << (NBUDDY-WSHIFT)];
167: BLOCKLIST bfree[NBUDDY];
168: unsigned short *tfree, *efree, *pfree;
169: /* vector of page descriptors (base, end, current pointer) */
170: unsigned short lo, hi; /* valid physical memory (min,max) */
171: vaddr_t vaddre; /* end of system */
172: } SYSMEM;
173:
174: extern SYSMEM sysmem;
175: cseg_t *c_alloc();
176: cseg_t *c_extend();
177: BLOCKLIST *arealloc();
178:
179: /*
180: * Declare and initialize an in-memory segment structure.
181: */
182: #define MAKESR(sr, seg) SEG seg; SR sr = { 0, 0, 0, &seg }
183: /*
184: * Is 'p' a valid physical click address?
185: */
186: #define pvalid(p) ((p) >= sysmem.lo && (p) < sysmem.hi)
187: /*
188: * How many physical clicks are free for allocation?
189: */
190: #define allocno() (sysmem.pfree - sysmem.tfree)
191:
192: /*
193: * IS_POW2() works for negative n only if the CPU uses 2's complement.
194: */
195: #define IS_POW2(n) (!((n) & ((n) - 1))) /* Is n a power of 2? */
196:
197: typedef struct {
198: int pid;
199: int r[SS+1];
200: int (*func)();
201: int a[5];
202: int res;
203: int err;
204: } EVENT;
205: #define NEV 32
206: extern EVENT evtab[NEV];
207: EVENT *evtrap();
208:
209: #else /* From here to EOF is for 286 kernels. */
210:
211: /*
212: * The following macros facilitate independent access
213: * to the selector and offset of a faddr_t (far *) pointer.
214: */
215: #define FP_OFF(f) ( ((unsigned short *) &(f))[0] )
216: #define FP_SEL(f) ( ((unsigned short *) &(f))[1] )
217:
218: #ifdef KERNEL
219: /*
220: * The following selector accesses the global descriptor table.
221: */
222: extern saddr_t gdtsel;
223:
224: /*
225: * The following functions manipulate virtual address translation tables.
226: */
227: extern faddr_t ptov(); /* faddr_t ptov( paddr_t, fsize_t ); */
228: extern faddr_t ptovx(); /* faddr_t ptovx( paddr_t ); */
229: extern paddr_t vtop(); /* paddr_t vtop( faddr_t ); */
230: extern void vrelse(); /* void vrelse( faddr_t ); */
231: extern void vremap(); /* void vremap( SEG * ); */
232: #endif /* KERNEL */
233:
234: #endif /* _I386 */
235:
236: #endif /* MMU_H */
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