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1.1 root 1: .globl _canl
2: .globl aicodep / Position of code.
3: .globl aicodes / Size of code.
4: .globl boot
5: .globl clk
6: .globl clrq
7: .globl cltinit
8: .globl conrest
9: .globl consave
10: .globl cs_sel
11: .globl dev1
12: .globl dev10
13: .globl dev11
14: .globl dev12
15: .globl dev13
16: .globl dev14
17: .globl dev15
18: .globl dev3
19: .globl dev4
20: .globl dev5
21: .globl dev6
22: .globl dev7
23: .globl dev8
24: .globl dev9
25: .globl envrest
26: .globl envsave
27: .globl eoi
28: .globl gdt
29: .globl gdtinit
30: .globl gdtmap
31: .globl getubd
32: .globl getupd
33: .globl getusd
34: .globl getuwd
35: .globl halt
36: .globl idt
37: .globl idtend
38: .globl idtmap
39: .globl inb
40: .globl int11
41: .globl io2seg
42: .globl kucopy
43: .globl ldt
44: .globl ldtend
45: .globl mmuupd
46: .globl mmuupdfR0
47: .globl mmuupdnR0
48: .globl msysgen
49: .globl outb
50: .globl putubd
51: .globl putusd
52: .globl putuwd
53: .globl putuwi
54: .globl read_cmos
55: .globl regcr2
56: .globl regfp
57: .globl sdata
58: .globl seg2io
59: .globl setEmfR0
60: .globl setspace
61: .globl sig32
62: .globl sphi
63: .globl spl
64: .globl splo
65: .globl stext
66: .globl syc
67: .globl syc32
68: .globl trap0
69: .globl trap1_ker
70: .globl trap1_usr
71: .globl trap10
72: .globl trap11
73: .globl trap12
74: .globl trap13
75: .globl trap14
76: .globl trap16
77: .globl trap2
78: .globl trap3
79: .globl trap4
80: .globl trap5
81: .globl trap6
82: .globl trap7
83: .globl trap8
84: .globl trap9
85: .globl trapcode
86: .globl tsave
87: .globl tss
88: .globl u
89: .globl ukcopy
90: .globl vecs
91: .globl vret
92: .globl waitq
93: .globl write_cmos
94:
95: .set BPC1SHIFT, 10 / BPCSHIFT - log2(sizeof(long))
96: .set BPCSHIFT, 12
97: .set BSY_ST, 0x80
98: .set CMOSA, 0x70 / Real-time Clock/CMOS addr I/O port.
99: .set CMOSD, 0x71 / Real-time Clock/CMOS data I/O port.
100: .set DRQ_ST, 0x08
101: .set EFAULT, 14 / Bad argument
102: .set IBMNBSY, 0x80
103: .set JMPF, 0xEA / Jump far, direct.
104: .set KBCTRL, 0x64 / 8042 keyboard mpu ctrl I/O port.
105: .set KBDATA, 0x60 / 8042 keyboard mpu data I/O port.
106: .set LPDATA, 0x378
107: .set NBPC, 4096
108: .set NCPCL, 124 / # of characters in a clist block
109: .set NIDT, 256
110: .set NINIT, 0x04
111: .set PBASE, 0x00002
112: .set PIC, 0x20 / 8259 CSR I/O port.
113: .set PICM, 0x21 / 8259 IMR I/O port.
114: .set PIT, 0x40 / 8253 base I/O port.
115: .set PTABLE0_P, 0x00001
116: .set PTABLE1_V, 0xFF800
117: .set PX_ADDR, 0x67 / displacements
118: .set PX_OPND, 0x66 / register values & immediates
119: .set R_USR, 3 / user level ring number
120: .set SBASE, 0xFFC00
121: .set TSS_IOMAP_LEN, 0x0800 / number of port addresses mapped
122: .set TSS_IOMAP_OFF, 0x68 / byte offset of io bitmap in tss
123: .set VIDEO, 0x10 / Video BIOS interrupt for early debugging.
124:
125: .set LPSTAT, LPDATA+1
126: .set LPCSR, LPDATA+2
127:
128: ////
129: /
130: / Selector index values.
131: /
132: ////
133: .set SEG_386_UI, 0x08 / 32 bit code segment descriptor (user)
134: .set SEG_386_UD, 0x10 / 32 bit data segment descriptor (user)
135: .set SEG_386_KI, 0x18 / 32 bit code segment descriptor (kernel)
136: .set SEG_RNG0_TXT, 0x18 / synonym for SEG_386_KI
137: .set SEG_386_KD, 0x21 / 32 bit data segment descriptor (kernel)
138: .set SEG_286_UI, 0x28 / 16 bit code segment descriptor (user)
139: .set SEG_286_UD, 0x30 / 16 bit data segment descriptor (user)
140: .set SEG_TSS, 0x38 / task segment descriptor (386 mode)
141: .set SEG_ROM, 0x40 / ROM descriptor
142: .set SEG_VIDEOa, 0x48 / 0x48: video descriptor @ B0000
143: .set SEG_VIDEOb, 0x50 / 0x50: video descriptor @ B8000
144: .set SEG_386_II, 0x58 / 32 bit code segment (kernel init)
145: .set SEG_386_ID, 0x60 / 32 bit data segment (kernel init)
146: .set SEG_286_UII, 0x68 / 16 bit code, sep I/D (user)
147: .set SEG_LDT, 0x70 / local descriptor table index in GDT
148: .set SEG_RNG0_STK, 0x78 / Stack for ring 0 CPL
149: .set SEG_RNG1_TXT, 0x81 / Text for ring 1
150: .set SEG_RNG1_STK, 0x89 / Stack for ring 1 CPL
151: .set SEG_MMUUPD, 0x91 / call gate into ring 0
152: .set SEG_SET_EM, 0x99 / call gate into ring 0
153:
154: .set SEG_SRW, 0x03
155:
156: .set SEL, 0x08
157: .set SPIC, 0xA0 / Slave 8259 CSR I/O port.
158: .set SPICM, 0xA1 / Slave 8259 IMR I/O port.
159: .set STROBE, 0x01
160: .set UADDR, 0x3FFFFC
161: .set U_ERROR, 2 / Offset into u for u_error
162: .set X_ERR, 52
163: .set X_TRAPNO, 48
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