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1.1 root 1: + 0
2: #
3: # Operand production table.
4: # Productions starting with [.bB] are base types in actual tables
5: # Productions starting with [!eE] are extra types used for test purposes
6: # [be] are 16 bit productions [BE] are 32 bit and [.!] are both
7: #
8: # The first productions on the list are valid productions
9: # Then there is a ? and invalid productions to test the assemblers
10: # error conditions.
11: #
12: . r8 %al %cl %dl %bl %ah %ch %dh %bh ? 0xa $0xa
13: b r16 %ax %cx %dx %bx %sp %bp %si %di ? %al 0xa $0xa
14: B r32 %eax %ecx %edx %ebx %esp %ebp %esi %edi ? %al 0xa $0xa
15: . rm8 r8 0x3e8 vv vd ? r16 r32 $0x64
16: b rm16 r16 0x3e8 vv vd ? r8 r32 $0x64
17: B rm32 r32 0x3e8 vv vd ? r16 r8 $0x64
18: . m8 0x10 vv vd ? r8 $0x64
19: b m16 0x3e8 vv vd ? r8 r32 $0x64
20: B m32 0x3e8 vv vd ? r16 r8 $0x64
21: B m64 0x3e8 vv vd ? r16 r8 $0x64
22: B m80 0x3e8 vv vd ? r16 r8 $0x64
23: . mem32 abc
24: . mem16 abc
25: . reli . abc ? al
26: . rel8 . ? %al
27: . rel16 abc
28: . al %al ? %bl
29: b ax %ax ? %bx
30: B eax %eax ? %ebx
31: . ds %ds
32: . es %es
33: . ss %ss
34: . fs %fs
35: . gs %gs
36: . cs %cs
37: . cl %cl
38: . atdx (%dx)
39: . moffs mem16
40: . sreg %es %cs %ss %ds %fs %gs ? $0x64
41: . st0 %st
42: . dx %dx
43: B ctlreg %cr0 %cr2 %cr3 ? %ss
44: B dbreg %dr0 %dr1 %dr2 %dr3 %dr6 %dr7 ? %cr0
45: B treg %tr6 %tr7 ? %ax %cr0
46: B fpreg %st %st(0) %st(1) %st(2) %st(3) %st(4) %st(5) %st(6) %st(7) ? %eax
47: B imm32 $0x186a0
48: B imm32x $0 ? %bx
49: . imm16 $0x3e8 ? $0x186a0
50: . imm16x $0 ? %ax
51: . imm8 $0x64 ? $0x3e8
52: . imm8s $064 $-5 ? 128
53: . con3 $3 ? 4
54: . con1 $1 ? 5
55: E va %eax %ecx %edx %ebx %esi %edi
56: E vb %eax %ecx %edx %ebx %ebp %esi %edi
57: E vd (va) 0x64(vb) 0x186a0(vb) (,vb,vs) (vb,vb,vs) 0x64(vb,vs) 0x3e8(vb,vb,vs) \
58: (vb,vs) (vb,vb) 0x4(vb,vb)
59: E vs 0 1 2 4 8
60: e vv (vx,vy) (vz) 0x64(vx,vy) 0x64(vw) 0x3e8(vx,vy) 0x3e8(vw)
61: e vw %si %di %bp %bx
62: e vx %bx %bp
63: e vy %si %di
64: e vz %si %di %bx
65: #
66: # The First Operand contains the following flags:
67: # G Generic opcode if given a name, no generic opcode otherwise.
68: # w Word moded instruction.
69: # d Double word moded instruction.
70: # F Floating point instruction.
71: # f Floating 9b prefix.
72: # p 0F prefix.
73: # a Add register to opcode.
74: # 0-8 Second byte of code goes into mod/rm location Set into groups for dis
75: # i Indefinate jump.
76: # L lock instruction.
77: # l Legal after lock instruction.
78: # R rep instruction.
79: # r Legal after rep instruction.
80: # t Special two operand imult.
81: # P use /r on document. no other use.
82: # X May have mixed word and double word operand.
83: # A Ambiguous length construction.
84: #
85: + 1 # Opcode table - type, hex value, opcode, operands
86: G # opcodes with no general form
87: - 0037 aaa # Adjust after addition
88: - d50a aad # Adjust AX before division
89: - d40a aam # Adjust AX after multiply
90: - 003f aas # Adjust AL after subtraction
91: P 0063 arpl r16 rm16 # Adjust RPL field of selector
92: i 00e8 call reli # Call Procedure
93: w 0098 cbw # Sign extend AL
94: w 0098 cbtw # Sign extend AL
95: d 0098 cwde # Sign extend AX
96: d 0098 cwtl # Sign extend AX
97: - 00f8 clc # Clear carry
98: - 00fc cld # Clear direction Flag
99: - 00fa cli # Clear interrupt Flag
100: p 0006 clts # Clear task-switched flag in CR0
101: - 00f5 cmc # Complement carry flag
102: r 00a6 cmpsb # Compare bytes
103: wr 00a7 cmpsw # Compare words
104: dr 00a7 cmpsl # Compare long
105: w 0099 cwd # Word to double word
106: w 0099 cwtd # Word to double word
107: d 0099 cdq # Double word to quad word
108: d 0099 cltd # Double word to quad word
109: - 0027 daa # Decimal adjust after addition
110: - 002f das # Decimal adjust after subtraction
111: - 00c8 enter imm8 imm16 # Make stack frame for procedure
112: F d9f0 f2xm1 # ST = 2 ** ST - 1
113: F d9e1 fabs # ST = abs(ST)
114: 0F df04 fbld m80 # Load Binary Coded Decimal
115: 0F df06 fbstp m80 # Store Binary Coded Decimal and Pop
116: F d9e0 fchs # Change Floating Sign
117: F ded9 fcompp # Floating Compare and pop twice
118: F d9ff fcos # Cosine
119: F d9f6 fdecstp # Decrement Stack Top Pointer
120: aF ddc0 ffree fpreg # Free Floating Point Register
121: F d9f7 fincstp # Increment Stack Top Pointer
122: 0F d905 fldcw m32 # Load Floating Point Control Word
123: 0F d904 fldenv m32 # Load FPU Environment
124: F d9e8 fld1 # Load Constant 1
125: F d9e9 fldl2t # Load Constant log(10) base 2
126: F d9ea fldl2e # Load Constant log(e) base 2
127: F d9eb fldpi # Load Constant pi
128: F d9ec fldlg2 # Load Constant log(2) base 10
129: F d9ed fldln2 # Load Constant log(2) base e
130: F d9ee fldz # Load Constant 0.0
131: F dbe2 fnclex # Clear floating point exception flags no wait
132: fF dbe2 fclex # Clear floating point exception flags
133: F dbe3 fninit # Initialize Floating Point Unit no wait
134: fF dbe3 finit # Initialize Floating Point Unit
135: F d9d0 fnop # No Operation
136: F d9f3 fpatan # Partial Arctangent
137: F d9f8 fprem # Partial Remainder toward 0
138: F d9f5 fprem1 # Partial Remainder < 1/2 modulus
139: F d9f2 fptan # Partial Tangent
140: F dbf4 frstpm # set 287XL real mode (nop for 387/486)
141: F d9fc frndint # Round To Integer
142: 0F dd04 frstor m32 # Resore FPU State
143: 0F dd06 fnsave m32 # Store FPU State no wait
144: 0fF dd06 fsave m32 # Store FPU State
145: F d9fd fscale # Scale
146: F dbe4 fsetpm # set 287 protected mode (nop for 387/486)
147: F d9fe fsin # Sine
148: F d9fb fsincos # Sine and Cosine
149: F d9fa fsqrt # Square Root
150: 0F d907 fnstcw m32 # Store Control Word no wait
151: 0fF d907 fstcw m32 # Store Control Word
152: 0F d906 fnstenv m32 # Store FPU Environment no wait
153: 0fF d906 fstenv m32 # Store FPU Environment
154: F d9e4 ftst # Test
155: F dae9 fucompp # Unordered compare %st %st1 and pop twice
156: F 009b fwait # Wait for coprocessor
157: F d9e5 fxam # Examine
158: F d9f4 fxtract # Extract Exponent and Significand
159: F d9f1 fyl2x # %st1 * log(%st) base 2
160: F d9f9 fyl2xp1 # %st1 * log(%st + 1.0) base 2
161: - 00f4 hlt # Halt
162: d5 ff02 icall rm32 # Call indirect
163: d5 ff04 ijmp rm32 # Jump indirect
164: d5 ff03 ilcall m32 # Long call indirect
165: d5 ff05 iljmp m32 # Long jump indirect
166: - 00cc int con3 # Interrupt 3
167: - 00cd int imm8 # Interrupt
168: w 00ce into # Int 4 if overflow is 1
169: r 006c insb # Input byte from port into ES:(E)DI
170: r 006c insb atdx # Input byte from port into ES:(E)DI
171: wr 006d insw # Input word from port into ES:(E)DI
172: wr 006d insw atdx # Input word from port into ES:(E)DI
173: dr 006d insl # Input long from port into ES:(E)DI
174: dr 006d insl atdx # Input long from port into ES:(E)DI
175: - 00cf iret # Interrupt return
176: - 00cf iretd # Different mode different opcode ?
177: i 7 ja reli # Jump if above
178: i 3 jae reli # Jump if above or equal
179: i 2 jb reli # Jump if below
180: i 6 jbe reli # Jump if below or equal
181: i 2 jc reli # Jump if carry
182: i 4 je reli # Jump if equal
183: i 4 jz reli # Jump if zero
184: i f jg reli # Jump if greater
185: i d jge reli # Jump if greater or equal
186: i c jl reli # Jump if less
187: i e jle reli # Jump if less or equal
188: i 6 jna reli # Jump if not above
189: i 2 jnae reli # Jump if not above or equal
190: i 3 jnb reli # Jump if not below
191: i 7 jnbe reli # Jump if not below or equal
192: i 3 jnc reli # Jump if no carry
193: i 5 jne reli # Jump if not equal
194: i e jng reli # Jump if not greater
195: i c jnge reli # Jump if not greater or equal
196: i d jnl reli # Jump if not less
197: i f jnle reli # Jump if not less or equal
198: i 1 jno reli # Jump if not overflow
199: i b jnp reli # Jump if not parity
200: i 9 jns reli # Jump if not sign
201: i 5 jnz reli # Jump if not zero
202: i 0 jo reli # Jump if overflow
203: i a jp reli # Jump if parity
204: i a jpe reli # Jump if parity even
205: i b jpo reli # Jump if parity odd
206: i 8 js reli # Jump if sign
207: i 4 jz reli # Jump if zero
208: i e9 jmp reli # Jump absolute
209: #
210: - 00e3 jcxz rel8 # Jump if CX is zero
211: - 00e3 jecxz rel8 # Jump if CX is zero
212: #
213: - 009f lahf # Load flags into AH register
214: d 009a lcall imm16x imm32 # Long call
215: d 00ea ljmp imm16x imm32 # Long jump
216: - 00c9 leave # High level procedure exit
217: p6 0002 lldt rm16 # Load local descriptor table register
218: p7 0106 lmsw rm16 # Load machine status word
219: L 00f0 lock # Assert lock signal for next instruction
220: r 00ac lodsb # Load string operand byte
221: wr 00ad lodsw # Load string operand word
222: dr 00ad lodsl # Load string operand long
223: - 00e2 loop rel8 # Dec count jmp if count <> 0
224: - 00e1 loope rel8 # Dec count jmp if count <> 0 and ZF = 1
225: - 00e1 loopz rel8 # Dec count jmp if count <> 0 and ZF = 1
226: - 00e0 loopne rel8 # Dec count jmp if count <> 0 and ZF = 0
227: - 00e0 loopnz rel8 # Dec count jmp if count <> 0 and ZF = 0
228: p6 0003 ltr rm16 # Load task register
229: r 00a4 movsb # Move bytes
230: wr 00a5 movsw # Move words
231: dr 00a5 movsl # Move longs
232: - 0090 nop # No operation
233: r 006e outsb # Output byte to port into ES:(E)DI
234: wr 006f outsw # Output word to port into ES:(E)DI
235: dr 006f outsl # Output long to port into ES:(E)DI
236: R 00f3 rep # rep following instruction CX times
237: R 00f3 repe # repe following instruction CX times or eq
238: R 00f3 repz # alternate name for repe
239: R 00f2 repne # repne following instruction CX times or ne
240: R 00f2 repnz # alternate name for repnz
241: - 00c3 ret # Return
242: - 00c2 ret imm16 # Return pop imm16 bytes of parms
243: - 00cb lret # Far return
244: - 00ca lret imm16 # Far return pop imm16 bytes of parms
245: - 009e sahf # Store AH into flags
246: r 00ae scasb # Compare string bytes
247: dr 00af scasl # Compare string longs
248: wr 00af scasw # Compare string words
249: #
250: p 0097 seta rm8 # Set byte if above
251: p 0093 setae rm8 # Set byte if above or equal
252: p 0092 setb rm8 # Set byte if below
253: p 0096 setbe rm8 # Set byte if below or equal
254: p 0092 setc rm8 # Set byte if carry
255: p 0094 sete rm8 # Set byte if equal
256: p 0094 setz rm8 # Set byte if zero
257: p 009f setg rm8 # Set byte if greater
258: p 009d setge rm8 # Set byte if greater or equal
259: p 009c setl rm8 # Set byte if less
260: p 009e setle rm8 # Set byte if less or equal
261: p 0096 setna rm8 # Set byte if not above
262: p 0092 setnae rm8 # Set byte if not above or equal
263: p 0093 setnb rm8 # Set byte if not below
264: p 0097 setnbe rm8 # Set byte if not below or equal
265: p 0093 setnc rm8 # Set byte if no carry
266: p 0095 setne rm8 # Set byte if not equal
267: p 009e setng rm8 # Set byte if not greater
268: p 009c setnge rm8 # Set byte if not greater or equal
269: p 009d setnl rm8 # Set byte if not less
270: p 009f setnle rm8 # Set byte if not less or equal
271: p 0091 setno rm8 # Set byte if not overflow
272: p 009b setnp rm8 # Set byte if not parity
273: p 0099 setns rm8 # Set byte if not sign
274: p 0095 setnz rm8 # Set byte if not zero
275: p 0090 seto rm8 # Set byte if overflow
276: p 009a setp rm8 # Set byte if parity
277: p 009a setpe rm8 # Set byte if parity even
278: p 009b setpo rm8 # Set byte if parity odd
279: p 0098 sets rm8 # Set byte if sign
280: p 0094 setz rm8 # Set byte if zero
281: #
282: p7 0100 sgdt mem32 # Store gdtr
283: p7 0101 sidt mem32 # Store idtr
284: p6 0000 sldt rm16 # Store ldtr to EA word
285: p7 0104 smsw rm16 # Store machine status to EA word
286: - 00f9 stc # Set carry flag
287: - 00fd std # Clear direction flag
288: - 00fb sti # Set interrupt flag
289: r 00aa stosb # Store string byte
290: wr 00ab stosw # Store string word
291: dr 00ab stosl # Store string long
292: p6 0001 str # Store task register
293: p6 0004 verr rm16 # Verify segment for read
294: p6 0005 verw rm16 # Verify segment for write
295: - 009b wait # Wait for coprocessor
296: - 00d7 xlat # Table lookup translation
297: - 00d7 xlatb # Table lookup translation
298: G adc # Add with carry
299: A1l 8302 adc imm8s m32
300: d1l 8302 adcl imm8s rm32
301: w1l 8302 adcw imm8s rm16
302: - 0014 adcb imm8 al
303: w 0015 adcw imm16 ax
304: d 0015 adcl imm32 eax
305: d 0015 adcl imm32
306: 1l 8002 adcb imm8 rm8
307: w1l 8102 adcw imm16 rm16
308: d1l 8102 adcl imm32 rm32
309: lP 0012 adcb rm8 r8
310: wlP 0013 adcw rm16 r16
311: dlP 0013 adcl rm32 r32
312: lP 0010 adcb r8 rm8
313: wlP 0011 adcw r16 rm16
314: dlP 0011 adcl r32 rm32
315: G add # Add
316: A1l 8300 add imm8s m32
317: d1l 8300 addl imm8s rm32
318: w1l 8300 addw imm8s rm16
319: l 0004 addb imm8 al
320: wl 0005 addw imm16 ax
321: dl 0005 addl imm32 eax
322: dl 0005 addl imm32
323: 1l 8000 addb imm8 rm8
324: w1l 8100 addw imm16 rm16
325: d1l 8100 addl imm32 rm32
326: lP 0002 addb rm8 r8
327: wlP 0003 addw rm16 r16
328: dlP 0003 addl rm32 r32
329: lP 0000 addb r8 rm8
330: wlP 0001 addw r16 rm16
331: dlP 0001 addl r32 rm32
332: G and # Logical AND
333: A1l 8304 and imm8s m32
334: d1l 8304 andl imm8s rm32
335: w1l 8304 andw imm8s rm16
336: l 0024 andb imm8 al
337: wl 0025 andw imm16 ax
338: dl 0025 andl imm32 eax
339: dl 0025 andl imm32
340: 1l 8004 andb imm8 rm8
341: w1l 8104 andw imm16 rm16
342: d1l 8104 andl imm32 rm32
343: lP 0022 andb rm8 r8
344: wlP 0023 andw rm16 r16
345: dlP 0023 andl rm32 r32
346: lP 0020 andb r8 rm8
347: wlP 0021 andw r16 rm16
348: dlP 0021 andl r32 rm32
349: G bound # Check if register is within bounds
350: wP 0062 boundw m16 r16
351: dP 0062 boundl m32 r32
352: G bsf # Bit scan forward
353: wp 00bc bsfw rm16 r16
354: dp 00bc bsfl rm32 r32
355: G bsr # Bit scan reverse
356: wp 00bd bsrw rm16 r16
357: dp 00bd bsrl rm32 r32
358: G bt # Save bit in carry flag
359: wp 00a3 btw r16 rm16
360: dp 00a3 btl r32 rm32
361: wp8 ba04 btw imm8 rm16
362: dp8 ba04 btl imm8 rm32
363: G btc # Bit test and complement
364: wpl 00bb btcw r16 rm16
365: dpl 00bb btcl r32 rm32
366: wp8l ba07 btcw imm8 rm16
367: dp8l ba07 btcl imm8 rm32
368: G btr # Bit test and reset
369: wpl 00b3 btrw r16 rm16
370: dpl 00b3 btrl r32 rm32
371: wp8l ba06 btrw imm8 rm16
372: dp8l ba06 btrl imm8 rm32
373: G bts # Bit test and set
374: wpl 00ab btsw r16 rm16
375: dpl 00ab btsl r32 rm32
376: wp8l ba05 btsw imm8 rm16
377: dp8l ba05 btsl imm8 rm32
378: G cmp # Compare
379: A1 8307 cmp imm8s m32
380: d1 8307 cmpl imm8s rm32
381: w1 8307 cmpw imm8s rm16
382: - 003c cmpb imm8 al
383: w 003d cmpw imm16 ax
384: d 003d cmpl imm32 eax
385: d 003d cmpl imm32
386: 1 8007 cmpb imm8 rm8
387: w1 8107 cmpw imm16 rm16
388: d1 8107 cmpl imm32 rm32
389: P 003a cmpb rm8 r8
390: wP 003b cmpw rm16 r16
391: dP 003b cmpl rm32 r32
392: P 0038 cmpb r8 rm8
393: wP 0039 cmpw r16 rm16
394: dP 0039 cmpl r32 rm32
395: G dec # Decrement by 1
396: A5l ff01 dec m32
397: wa 0048 decw r16
398: da 0048 decl r32
399: 4l fe01 decb rm8
400: w5l ff01 decw rm16
401: d5l ff01 decl rm32
402: G div # Unsigned divide
403: A3 f706 div m32
404: 3 f606 divb rm8 al
405: 3 f606 divb rm8
406: w3 f706 divw rm16 ax
407: w3 f706 divw rm16
408: d3 f706 divl rm32 eax
409: d3 f706 divl rm32
410: G fadd # Floating add
411: A0F d800 fadd m32
412: 0F d800 fadds m32
413: 0F dc00 faddl m64
414: aF d8c0 fadd fpreg st0
415: aF d8c0 fadd fpreg
416: F dec1 fadd
417: aF dcc0 fadd st0 fpreg
418: G faddp # Floating add and pop
419: aF dec0 faddp st0 fpreg
420: aF dec0 faddp fpreg
421: F dec1 faddp
422: G fcom # Floating Compare
423: A0F d802 fcom m32
424: 0F d802 fcoms m32
425: 0F dc02 fcoml m64
426: aF d8d0 fcom fpreg st0
427: aF d8d0 fcom fpreg
428: F d8d1 fcom
429: G fcomp # Floating Compare and Pop
430: A0F d803 fcomp m32
431: 0F d803 fcomps m32
432: 0F dc03 fcompl m64
433: aF d8d8 fcomp fpreg
434: F d8d9 fcomp
435: G fdiv # Floating divide
436: A0F d806 fdiv m32
437: 0F d806 fdivs m32
438: 0F dc06 fdivl m64
439: aF d8f0 fdiv fpreg st0
440: aF d8f0 fdiv fpreg
441: F def1 fdiv
442: aF dcf0 fdiv st0 fpreg
443: G fdivp # Floating divide and pop
444: aF def0 fdivp st0 fpreg
445: aF def0 fdivp fpreg
446: F def1 fdivp
447: G fdivr # Reverse floating divide
448: A0F d807 fdivr m32
449: 0F d807 fdivrs m32
450: 0F dc07 fdivrl m64
451: aF d8f8 fdivr fpreg st0
452: aF d8f8 fdivr fpreg
453: F def9 fdivr
454: aF dcf8 fdivr st0 fpreg
455: G fdivrp # Reverse floating divide and pop
456: aF def8 fdivrp st0 fpreg
457: aF def8 fdivrp fpreg
458: F def9 fdivrp
459: G fiadd # Add integer to float
460: A0F da00 fiadd m32
461: 0F da00 fiaddl m32
462: 0F de00 fiadds m16
463: G ficom # Compare float to integer
464: A0F da02 ficom m32
465: 0F da02 ficoml m32
466: 0F de02 ficoms m16
467: G ficomp # Compare float to integer and pop
468: A0F da03 ficomp m32
469: 0F da03 ficompl m32
470: 0F de03 ficomps m16
471: G fidiv # Divide float by integer
472: A0F da06 fidiv m32
473: 0F da06 fidivl m32
474: 0F de06 fidivs m16
475: G fidivr # Reverse divide integer by float
476: A0F da07 fidivr m32
477: 0F da07 fidivrl m32
478: 0F de07 fidivrs m16
479: G fild # Load integer
480: A0F db00 fild m32
481: 0F db00 fildl m32
482: 0F df00 filds m16
483: 0F df05 fildll m64
484: G fimul # Multiply integer to float
485: A0F da01 fimul m32
486: 0F da01 fimull m32
487: 0F de01 fimuls m16
488: G fist # Store integer
489: A0F db02 fist m32
490: 0F db02 fistl m32
491: 0F df02 fists m16
492: G fistp # Store integer and pop
493: A0F db03 fistp m32
494: 0F db03 fistpl m32
495: 0F df03 fistps m16
496: 0F df07 fistpll m32
497: G fisub # Subtract integer from float
498: A0F da04 fisub m32
499: 0F da04 fisubl m32
500: 0F de04 fisubs m16
501: G fisubr # Reverse subtract integer from float
502: A0F da05 fisubr m32
503: 0F da05 fisubrl m32
504: 0F de05 fisubrs m16
505: G fld # Load Real
506: A0F d900 fld m32
507: aF d9c0 fld fpreg
508: 0F d900 flds m32
509: 0F dd00 fldl m32
510: 0F db05 fldt m64
511: G fmul # Floating multiply
512: A0F d801 fmul m32
513: 0F d801 fmuls m32
514: 0F dc01 fmull m64
515: aF d8c8 fmul fpreg st0
516: aF d8c8 fmul fpreg
517: F dec9 fmul
518: aF dcc8 fmul st0 fpreg
519: G fmulp # Floating multiply and pop
520: aF dec8 fmulp st0 fpreg
521: aF dec8 fmulp fpreg
522: F dec9 fmulp
523: G fst # Store Real
524: A0F d902 fst m32
525: aF ddd0 fst fpreg
526: 0F d902 fsts m32
527: 0F dd02 fstl m64
528: G fstp # Store Real and pop
529: A0F d903 fstp m32
530: aF ddd8 fstp fpreg
531: 0F d903 fstps m32
532: 0F dd03 fstpl m64
533: 0F db07 fstpt m80
534: G fnstsw # Store Status Word no wait
535: 0F dd07 fnstsw m16
536: F dfe0 fnstsw ax
537: G fstsw # Store Status Word
538: 0fF dd07 fstsw m16
539: fF dfe0 fstsw ax
540: G fsub # Floating subtract
541: A0F d804 fsub m32
542: 0F d804 fsubs m32
543: 0F dc04 fsubl m64
544: aF d8e0 fsub fpreg st0
545: aF d8e0 fsub fpreg
546: F dee1 fsub
547: aF dce0 fsub st0 fpreg
548: G fsubp # Floating subtract and pop
549: aF dee0 fsubp st0 fpreg
550: aF dee0 fsubp fpreg
551: F dee1 fsubp
552: G fsubr # Reverse floating subtract
553: A0F d805 fsubr m32
554: 0F d805 fsubrs m32
555: 0F dc05 fsubrl m64
556: aF d8e8 fsubr fpreg st0
557: aF d8e8 fsubr fpreg
558: F dee9 fsubr
559: aF dce8 fsubr st0 fpreg
560: G fsubrp # Reverse floating subtract and pop
561: aF dee8 fsubrp st0 fpreg
562: aF dee8 fsubrp fpreg
563: F dee9 fsubrp
564: G fucom # Unordered compare real
565: aF dde0 fucom st0 fpreg
566: aF dde0 fucom fpreg
567: F dde1 fucom
568: G fucomp # Unordered compare real and pop
569: aF dde8 fucomp st0 fpreg
570: aF dde8 fucomp fpreg
571: F dde9 fucomp
572: G fxch # Floating exchange
573: aF d9c8 fxch st0 fpreg
574: aF d9c8 fxch fpreg st0
575: aF d9c8 fxch fpreg
576: F d9c9 fxch
577: G idiv # Signed divide
578: A3 f707 idiv m32
579: 3 f607 idivb rm8 al
580: 3 f607 idivb rm8
581: w3 f707 idivw rm16 ax
582: w3 f707 idivw rm16
583: d3 f707 idivl rm32 eax
584: d3 f707 idivl rm32
585: G imul # Signed multiply
586: 3 f605 imulb rm8
587: w3 f705 imulw rm16
588: d3 f705 imull rm32
589: wpP 00af imulw rm16 r16
590: dpP 00af imull rm32 r32
591: w 006b imulw imm8s rm16 r16
592: d 006b imull imm8s rm32 r32
593: wtP 006b imulw imm8s r16
594: dtP 006b imull imm8s r32
595: w 0069 imulw imm16 rm16 r16
596: d 0069 imull imm32 rm32 r32
597: wtP 0069 imulw imm16 r16
598: dtP 0069 imull imm32 r32
599: G in # Input from port
600: - 00ec in dx al
601: w 00ed in dx ax
602: d 00ed in dx eax
603: - 00e4 inb imm8
604: w 00e5 inw imm8
605: d 00e5 inl imm8
606: - 00ec inb atdx
607: w 00ed inw atdx
608: d 00ed inl atdx
609: G inc # Increment by one
610: A5l ff00 inc m32
611: wa 0040 incw r16
612: da 0040 incl r32
613: 4l fe00 incb rm8
614: w5l ff00 incw rm16
615: d5l ff00 incl rm32
616: G lar # Load access rights byte
617: wpP 0002 larw rm16 r16
618: dpP 0002 larl rm32 r32
619: G lea # Load effective address
620: wP 008d leaw m16 r16
621: dP 008d leal m32 r32
622: G lgdt # Load m into DGTR
623: wp7 0102 lgdtw m16
624: dp7 0102 lgdtl m32
625: G lidt # Load m into IDTR
626: wp7 0103 lidtw m16
627: dp7 0103 lidtl m32
628: G lds # load full pointer DS:r16
629: wP 00c5 ldsw m16 r16
630: dP 00c5 ldsl m32 r32
631: G lss # Load full pointer SS:r16
632: wpP 00b2 lssw m16 r16
633: dpP 00b2 lssl m32 r32
634: G les # Load full pointer ES:r16
635: wP 00c4 lesw m16 r16
636: dP 00c4 lesl m32 r32
637: G lfs # Load full pointer FS:r16
638: wpP 00b4 lfsw m16 r16
639: dpP 00b4 lfsl m32 r32
640: G lgs # Load full pointer GS:r16
641: wpP 00b5 lgsw m16 r16
642: dpP 00b5 lgsl m32 r32
643: G lsl # Load segment limit
644: wpP 0003 lslw rm16 r16
645: dpP 0003 lsll rm32 r32
646: G mov # Move data
647: A 00c6 mov imm8 m32
648: - 00a0 movb moffs al
649: w 00a1 movw moffs ax
650: d 00a1 movl moffs eax
651: - 00a2 movb al moffs
652: w 00a3 movw ax moffs
653: d 00a3 movl eax moffs
654: P 008a movb rm8 r8
655: wP 008b movw rm16 r16
656: dP 008b movl rm32 r32
657: P 0088 movb r8 rm8
658: wP 0089 movw r16 rm16
659: dP 0089 movl r32 rm32
660: P 008c movw sreg rm16
661: P 008e movw rm16 sreg
662: a 00b0 movb imm8 r8
663: wa 00b8 movw imm16 r16
664: da 00b8 movl imm32 r32
665: - 00c6 movb imm8 rm8
666: w 00c7 movw imm16 rm16
667: d 00c7 movl imm32 rm32
668: dpP 0020 movl ctlreg r32
669: dpP 0022 movl r32 ctlreg
670: dpP 0021 movl dbreg r32
671: dpP 0023 movl r32 dbreg
672: dpP 0024 movl treg r32
673: dpP 0026 movl r32 treg
674: G movsx # Move with sign extend
675: AdpP 00be movsx m8 r32
676: wpP 00be movsxb rm8 r16
677: dpP 00be movsxb rm8 r32
678: dpXP 00bf movsxw rm16 r32
679: wpP 00be movsbw rm8 r16
680: dpP 00be movsbl rm8 r32
681: dpXP 00bf movswl rm16 r32
682: G movzx # Move with zero extend
683: AdpP 00b6 movzx m8 r32
684: wpP 00b6 movzxb rm8 r16
685: dpP 00b6 movzxb rm8 r32
686: dpXP 00b7 movzxw rm16 r32
687: wpP 00b6 movzbw rm8 r16
688: dpP 00b6 movzbl rm8 r32
689: dpXP 00b7 movzwl rm16 r32
690: G mul # Unsigned multiply
691: A3 f704 mul m32
692: 3 f604 mulb rm8 al
693: 3 f604 mulb rm8
694: w3 f704 mulw rm16 ax
695: w3 f704 mulw rm16
696: d3 f704 mull rm32 eax
697: d3 f704 mull rm32
698: G neg # Negate
699: A3l f703 neg m32
700: 3l f603 negb rm8
701: w3l f703 negw rm16
702: d3l f703 negl rm32
703: G not # Invert bits
704: A3l f702 not m32
705: 3l f602 notb rm8
706: w3l f702 notw rm16
707: d3l f702 notl rm32
708: G or # Logical inclusive OR
709: A1l 8301 or imm8s m32
710: d1l 8301 orl imm8s rm32
711: w1l 8301 orw imm8s rm16
712: l 000c orb imm8 al
713: wl 000d orw imm16 ax
714: dl 000d orl imm32 eax
715: dl 000d orl imm32
716: 1l 8001 orb imm8 rm8
717: w1l 8101 orw imm16 rm16
718: d1l 8101 orl imm32 rm32
719: lP 000a orb rm8 r8
720: wlP 000b orw rm16 r16
721: dlP 000b orl rm32 r32
722: lP 0008 orb r8 rm8
723: wlP 0009 orw r16 rm16
724: dlP 0009 orl r32 rm32
725: G out # Output from port
726: - 00e6 outb imm8
727: w 00e7 outw imm8
728: d 00e7 outl imm8
729: - 00ee outb atdx
730: w 00ef outw atdx
731: d 00ef outl atdx
732: - 00ee out al dx
733: w 00ef out ax dx
734: d 00ef out eax dx
735: G pop # Pop a word from the stack
736: wa 0058 popw r16
737: da 0058 popl r32
738: - 001f popw ds
739: - 0007 popw es
740: - 0017 popw ss
741: p 00a1 popw fs
742: p 00a9 popw gs
743: w8 8f00 popw m16
744: d8 8f00 popl m32
745: G popa # Pop all
746: w 0061 popaw
747: d 0061 popal
748: G popf # Pop stack into flags
749: w 009d popfw
750: d 009d popfl
751: G push # Push a word on the stack
752: wa 0050 pushw r16
753: da 0050 pushl r32
754: - 006a pushb imm8s
755: w 0068 pushw imm16
756: d 0068 pushl imm32
757: - 000e pushw cs
758: - 001e pushw ds
759: - 0006 pushw es
760: - 0016 pushw ss
761: p 00a0 pushw fs
762: p 00a8 pushw gs
763: w5 ff06 pushw m16
764: d5 ff06 pushl m32
765: G pusha # Push all
766: w 0060 pushaw
767: d 0060 pushal
768: G pushf # Push flags
769: w 009c pushfw
770: d 009c pushfl
771: G rcl # Rotate carry left
772: A2 d102 rcl con1 m32
773: A2 d102 rcl m32
774: A2 d302 rcl cl m32
775: A2 c102 rcl imm8 m32
776: 2 d002 rclb con1 rm8
777: 2 d002 rclb rm8
778: 2 d202 rclb cl rm8
779: 2 c002 rclb imm8 rm8
780: w2 d102 rclw con1 rm16
781: w2 d102 rclw rm16
782: w2 d302 rclw cl rm16
783: w2 c102 rclw imm8 rm16
784: d2 d102 rcll con1 rm32
785: d2 d102 rcll rm32
786: d2 d302 rcll cl rm32
787: d2 c102 rcll imm8 rm32
788: G rcr # Rotate carry right
789: A2 d103 rcr con1 m32
790: A2 d103 rcr m32
791: A2 d303 rcr cl m32
792: A2 c103 rcr imm8 m32
793: 2 d003 rcrb con1 rm8
794: 2 d003 rcrb rm8
795: 2 d203 rcrb cl rm8
796: 2 c003 rcrb imm8 rm8
797: w2 d103 rcrw con1 rm16
798: w2 d103 rcrw rm16
799: w2 d303 rcrw cl rm16
800: w2 c103 rcrw imm8 rm16
801: d2 d103 rcrl con1 rm32
802: d2 d103 rcrl rm32
803: d2 d303 rcrl cl rm32
804: d2 c103 rcrl imm8 rm32
805: G rol # Rotate left
806: A2 d100 rol con1 m32
807: A2 d100 rol m32
808: A2 d300 rol cl m32
809: A2 c100 rol imm8 m32
810: 2 d000 rolb con1 rm8
811: 2 d000 rolb rm8
812: 2 d200 rolb cl rm8
813: 2 c000 rolb imm8 rm8
814: w2 d100 rolw con1 rm16
815: w2 d100 rolw rm16
816: w2 d300 rolw cl rm16
817: w2 c100 rolw imm8 rm16
818: d2 d100 roll con1 rm32
819: d2 d100 roll rm32
820: d2 d300 roll cl rm32
821: d2 c100 roll imm8 rm32
822: G ror # Rotate right
823: A2 d101 ror con1 m32
824: A2 d101 ror m32
825: A2 d301 ror cl m32
826: A2 c101 ror imm8 m32
827: 2 d001 rorb con1 rm8
828: 2 d001 rorb rm8
829: 2 d201 rorb cl rm8
830: 2 c001 rorb imm8 rm8
831: w2 d101 rorw con1 rm16
832: w2 d101 rorw rm16
833: w2 d301 rorw cl rm16
834: w2 c101 rorw imm8 rm16
835: d2 d101 rorl con1 rm32
836: d2 d101 rorl rm32
837: d2 d301 rorl cl rm32
838: d2 c101 rorl imm8 rm32
839: G sal # Shift arithmetic left
840: A2 d104 sal con1 m32
841: A2 d104 sal m32
842: A2 d304 sal cl m32
843: A2 c104 sal imm8 m32
844: 2 d004 salb con1 rm8
845: 2 d004 salb rm8
846: 2 d204 salb cl rm8
847: 2 c004 salb imm8 rm8
848: w2 d104 salw con1 rm16
849: w2 d104 salw rm16
850: w2 d304 salw cl rm16
851: w2 c104 salw imm8 rm16
852: d2 d104 sall con1 rm32
853: d2 d104 sall rm32
854: d2 d304 sall cl rm32
855: d2 c104 sall imm8 rm32
856: G shl # Shift arithmetic left
857: A2 d104 shl con1 m32
858: A2 d104 shl m32
859: A2 d304 shl cl m32
860: A2 c104 shl imm8 m32
861: 2 d004 shlb con1 rm8
862: 2 d004 shlb rm8
863: 2 d204 shlb cl rm8
864: 2 c004 shlb imm8 rm8
865: w2 d104 shlw con1 rm16
866: w2 d104 shlw rm16
867: w2 d304 shlw cl rm16
868: w2 c104 shlw imm8 rm16
869: d2 d104 shll con1 rm32
870: d2 d104 shll rm32
871: d2 d304 shll cl rm32
872: d2 c104 shll imm8 rm32
873: G sar # Shift arithmetic right
874: A2 d107 sar con1 m32
875: A2 d107 sar m32
876: A2 d307 sar cl m32
877: A2 c107 sar imm8 m32
878: 2 d007 sarb con1 rm8
879: 2 d007 sarb rm8
880: 2 d207 sarb cl rm8
881: 2 c007 sarb imm8 rm8
882: w2 d107 sarw con1 rm16
883: w2 d107 sarw rm16
884: w2 d307 sarw cl rm16
885: w2 c107 sarw imm8 rm16
886: d2 d107 sarl con1 rm32
887: d2 d107 sarl rm32
888: d2 d307 sarl cl rm32
889: d2 c107 sarl imm8 rm32
890: G shr # Shift right
891: A2 d105 shr con1 m32
892: A2 d105 shr m32
893: A2 d305 shr cl m32
894: A2 c105 shr imm8 m32
895: 2 d005 shrb con1 rm8
896: 2 d005 shrb rm8
897: 2 d205 shrb cl rm8
898: 2 c005 shrb imm8 rm8
899: w2 d105 shrw con1 rm16
900: w2 d105 shrw rm16
901: w2 d305 shrw cl rm16
902: w2 c105 shrw imm8 rm16
903: d2 d105 shrl con1 rm32
904: d2 d105 shrl rm32
905: d2 d305 shrl cl rm32
906: d2 c105 shrl imm8 rm32
907: G sbb # Subtract with borrow
908: A1l 8303 sbb imm8s rm32
909: d1l 8303 sbbl imm8s rm32
910: w1l 8303 sbbw imm8s rm16
911: l 001c sbbb imm8 al
912: wl 001d sbbw imm16 ax
913: dl 001d sbbl imm32 eax
914: dl 001d sbbl imm32
915: 1l 8003 sbbb imm8 rm8
916: w1l 8103 sbbw imm16 rm16
917: d1l 8103 sbbl imm32 rm32
918: lP 001a sbbb rm8 r8
919: wlP 001b sbbw rm16 r16
920: dlP 001b sbbl rm32 r32
921: lP 0018 sbbb r8 rm8
922: wlP 0019 sbbw r16 rm16
923: dlP 0019 sbbl r32 rm32
924: G shld # Shift double precision left
925: wp 00a4 shldw imm8 r16 rm16
926: dp 00a4 shldl imm8 r32 rm32
927: wp 00a5 shldw cl r16 rm16
928: dp 00a5 shldl cl r32 rm32
929: G shrd # Shift double precision right
930: wp 00ac shrdw imm8 r16 rm16
931: dp 00ac shrdl imm8 r32 rm32
932: wp 00ad shrdw cl r16 rm16
933: dp 00ad shrdl cl r32 rm32
934: wp 00ad shrdw r16 rm16
935: dp 00ad shrdl r32 rm32
936: G sub # Subtract
937: A1l 8305 sub imm8s m32
938: d1l 8305 subl imm8s rm32
939: w1l 8305 subw imm8s rm16
940: l 002c subb imm8 al
941: wl 002d subw imm16 ax
942: dl 002d subl imm32 eax
943: dl 002d subl imm32
944: 1l 8005 subb imm8 rm8
945: w1l 8105 subw imm16 rm16
946: d1l 8105 subl imm32 rm32
947: lP 002a subb rm8 r8
948: wlP 002b subw rm16 r16
949: dlP 002b subl rm32 r32
950: lP 0028 subb r8 rm8
951: wlP 0029 subw r16 rm16
952: dlP 0029 subl r32 rm32
953: G test # Logical compare
954: A3 f600 test imm8 m32
955: - 00a8 testb imm8 al
956: w 00a9 testw imm16 ax
957: d 00a9 testl imm32 eax
958: d 00a9 testl imm32
959: 3 f600 testb imm8 rm8
960: w3 f700 testw imm16 rm16
961: d3 f700 testl imm32 rm32
962: P 0084 testb r8 rm8
963: wP 0085 testw r16 rm16
964: dP 0085 testl r32 rm32
965: G xchg # Exchange register
966: wa 0090 xchgw r16 ax
967: wa 0090 xchgw ax r16
968: da 0090 xchgl r32 eax
969: da 0090 xchgl r32
970: da 0090 xchgl eax r32
971: lP 0086 xchgb rm8 r8
972: wlP 0087 xchgw rm16 r16
973: dlP 0087 xchgl rm32 r32
974: lP 0086 xchgb r8 rm8
975: wlP 0087 xchgw r16 rm16
976: dlP 0087 xchgl r32 rm32
977: G xor # Logical exclusive OR
978: A1l 8306 xor imm8s m32
979: d1l 8306 xorl imm8s rm32
980: w1l 8306 xorw imm8s rm16
981: l 0034 xorb imm8 al
982: wl 0035 xorw imm16 ax
983: dl 0035 xorl imm32 eax
984: dl 0035 xorl imm32
985: 1l 8006 xorb imm8 rm8
986: w1l 8106 xorw imm16 rm16
987: d1l 8106 xorl imm32 rm32
988: lP 0032 xorb rm8 r8
989: wlP 0033 xorw rm16 r16
990: dlP 0033 xorl rm32 r32
991: lP 0030 xorb r8 rm8
992: wlP 0031 xorw r16 rm16
993: dlP 0031 xorl r32 rm32
994: + 2 # Preloaded symbol table
995: al REG 0 1
996: ax REG 0 2
997: eax REG 0 4
998: cl REG 1 1
999: cx REG 1 2
1000: ecx REG 1 4
1001: dl REG 2 1
1002: dx REG 2 2
1003: edx REG 2 4
1004: bl REG 3 1
1005: bx REG 3 2
1006: ebx REG 3 4
1007: ah REG 4 1
1008: sp REG 4 2
1009: esp REG 4 4
1010: ch REG 5 1
1011: bp REG 5 2
1012: ebp REG 5 4
1013: dh REG 6 1
1014: si REG 6 2
1015: esi REG 6 4
1016: bh REG 7 1
1017: di REG 7 2
1018: edi REG 7 4
1019: # Segment regs
1020: es SREG 0 2
1021: cs SREG 1 2
1022: ss SREG 2 2
1023: ds SREG 3 2
1024: fs SREG 4 2
1025: gs SREG 5 2
1026: # Control registers (CR1 is missing)
1027: cr0 CREG 0 4
1028: cr2 CREG 2 4
1029: cr3 CREG 3 4
1030: # Debug registers (DR4 and DR5 missing)
1031: dr0 DREG 0 4
1032: dr1 DREG 1 4
1033: dr2 DREG 2 4
1034: dr3 DREG 3 4
1035: dr6 DREG 6 4
1036: dr7 DREG 7 4
1037: # Test registers (TR0 - TR5 missing)
1038: tr6 TREG 6 4
1039: tr7 TREG 7 4
1040: # Miscellaneous operators
1041: %st FSTACK 0 0
1042: .rem REM 0 0
1043: .div DIVIDE 0 4
1044: .defined DEFINED 0 4
1045: .sizeof SIZEOF 0 4
1046: .segment SEGMENT 0 4
1047: .location LOCATION 0 4
1048: .string TOSTRING 0 4
1049: .number TONUMBER 0 4
1050: .float TOFLOAT 0 4
1051: .parmct PARMCT 0 4
1052: + 3 # Assembler directives
1053: 1 .fail ERROR CMD # print message as error
1054: 0 .warn ERROR CMD # print message as warning
1055: 0 .mexit MEXIT NCMD # exit current macro
1056: 0 .shift SHIFT ICMD # shift macro parms
1057: 0 .org ORG DATA # move current location
1058: 0 .if IF ICMD # conditional assembly
1059: 0 .else ELSE NCMD # connects to if
1060: 0 .endi ENDI NCMD # end if
1061: 0 .while WHILE ICMD # conditional assembly loop
1062: 0 .endw ENDW NCMD # end while
1063: 0 .macro MACRO DCMD # declare macro
1064: 0 - MAC CMD # Macro expansion no opcode.
1065: 0 .endm ENDM NCMD # end macro declaration
1066: 0 .include INCLUDE CMD # include file
1067: 0 .equ EQU ICMD # newlab .equ expr
1068: 0 .define EQUS CMD # newstr .define anything
1069: 0 .undef UNDEFINE CMD # .undef newstr
1070: 1 .list LIST NCMD # Turn on listing if -l was on
1071: 0 .nolist LIST NCMD # Turn off listing
1072: 0 .llen LLEN ICMD # set print line length, default 112
1073: 0 .plen PLEN ICMD # page length, default 56
1074: 1 .page PAGE NCMD # Turn on page breaks
1075: 0 .eject EJECT NCMD # Force a page break
1076: 0 .mlist MLIST CMD # list macro expansions
1077: 0 .ttl TITLE CMD # Set page title
1078: 0 .section SECTION CMD # Set section
1079: 0 .nopage PAGE NCMD # Turn off page breaks
1080: 0 .byte DATA DATA # .byte val [,val]
1081: 1 .word DATA DATA # .word val [,val]
1082: 1 .2byte UDATA DATA # .2byte val, val
1083: 1 .value DATA DATA # .value val [,val]
1084: 2 .long DATA DATA # .long val [,val]
1085: 2 .4byte UDATA DATA # .4byte val, [val]
1086: 3 .float DATA DATA # .float val [,val]
1087: 4 .double DATA DATA # .double val [,val]
1088: 5 .string DATA DATA # .string astring
1089: 2 .comm COMM ECMDX # .comm name expr
1090: 2 .lcomm COMM ECMDX # .lcomm name expr
1091: 1 .alignon ALIGNON NCMD # align non char data objects
1092: 0 .alignoff ALIGNON NCMD # don't align non char data objects
1093: 0 .align ALIGN DATA # .align val [, fillChar]
1094: 0 .even EVEN NCMD # .even
1095: 2 .bss SEGMENT ECMD # .bss tag, bytes
1096: 2 .bssd SEGMENT ECMD # .bss tag, bytes
1097: 0 .zero ZERO ICMD # .zero value
1098: 0 .blkb BLKB ICMD # .blkb value
1099: 1 .data SEGMENT NCMD # .data
1100: 1 .shrd SEGMENT NCMD # .data
1101: 1 .prvd SEGMENT NCMD # .data
1102: 1 .strn SEGMENT NCMD # .data
1103: 0 .text SEGMENT NCMD # .text
1104: 10000 .previous SEGMENT NCMD # .previous
1105: 0 .shri SEGMENT NCMD # .text
1106: 0 .prvi SEGMENT NCMD # .text
1107: 0 .globl GLOBL DATA # .globl name [,name]
1108: 0 .ident CMNT CMD # .ident string
1109: 1 .version CMNT CMD # .comment string
1110: 0 .set SET ECMD # .set name, expr
1111: 1 .32 LMODE NCMD # .32
1112: 0 .16 LMODE NCMD # .16
1113: 0 .errataon ERRATA NCMD # .errataon
1114: 1 .errataoff ERRATA NCMD # .errataon
1115: 0 .warnon WARNINGS NCMD # .warnon
1116: 1 .warnoff WARNINGS NCMD # .warnoff
1117: 0 .unixorder OPORDER NCMD # .unixorder
1118: 1 .intelorder OPORDER NCMD # .intelorder
1119: 0 .bracketnorm BORDER NCMD # .bracketnorm
1120: 1 .bracketrev BORDER NCMD # .bracketrev
1121: 0 .size SIZE ICMD # .size expr
1122: 0 .type TYPE ICMD # .type expr
1123: 0 .val VAL ICMD # .val expr
1124: 0 .tag TAG CMD # .tag string
1125: 0 .scl SCL ICMD # .scl expr
1126: 0 .ln LN ICMD # .ln expr
1127: 0 .line LINE ICMD # .line expr
1128: 0 .file FILE CMD # .file name
1129: 0 .endef ENDF NCMD # .endf
1130: 0 .def DEF CMD # .def name
1131: 0 .dim DIM DATA # .dim expr [,expr]
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