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1.1 root 1: //////////
2: / n1/i386/tables/assign.t
3: //////////
4:
5: /////////
6: /
7: / Assignment (=).
8: / Longs, pointers, words, bytes, fields, doubles.
9: / The '=' operator is a non-conversion operator for integer types and pointers.
10: / There must be some special entries here to handle the cross type cases.
11: /
12: /////////
13:
14: ASSIGN:
15:
16: //////////
17: /
18: / Simple integer assignment.
19: /
20: //////////
21:
22: //////////
23: / Longs and pointers.
24: //////////
25:
26: / Register dword = 0 or NULL.
27: % PEFFECT
28: DWORD NONE * * NONE
29: REG|MMX DWORD
30: 0|MMX *
31: [ZSUB] [AL],[AL]
32:
33: / Register dword = dword.
34: % PEFFECT
35: DWORD NONE * * NONE
36: REG|MMX DWORD
37: EASY|MMX DWORD
38: / Dword = register dword.
39: % PEFFECT
40: DWORD NONE * * NONE
41: ADR|LV DWORD
42: REG|MMX DWORD
43: [ZMOV] [AL],[AR]
44:
45: / Register dword = effective address.
46: % PEFFECT
47: DWORD NONE * * NONE
48: REG|MMX DWORD
49: LEA|MMX DWORD
50: [ZLEA] [AL],[NSE AR]
51:
52: / Integer or pointer = immediate.
53: % PEFFECT
54: DWORD NONE * * NONE
55: ADR|LV DWORD|SHORT
56: IMM|MMX DWORD
57: [TL ZMOV] [AL],[TL AR]
58:
59: / Dword = dword.
60: % PEFFECT|PVALUE|P_SRT
61: DWORD ANYR * ANYR TEMP
62: ADR|LV DWORD
63: TREG DWORD
64: [ZMOV] [AL],[AR]
65:
66: //////////
67: / Words.
68: //////////
69:
70: / Word = immediate word.
71: % PEFFECT
72: DWORD NONE * * NONE
73: ADR|LV WORD
74: IMM|MMX WORD
75: [ZMOVW] [AL],[AR]
76:
77: / Word = word.
78: % PEFFECT|PVALUE|PREL|P_SRT
79: LONG ANYR * ANYR TEMP
80: ADR|LV WORD
81: TREG WORD
82: [IFV] [TL ZMOVSX] [R],[LO RR]
83: [ZMOVW] [AL],[LO R]
84: [IFR] [ZCMPW] [LO R],[CONST 0]
85: [IFR] [REL0] [LAB]
86:
87: //////////
88: / Bytes.
89: //////////
90:
91: / Byte = immediate byte.
92: % PEFFECT
93: LONG NONE * * NONE
94: ADR|LV BYTE
95: IMM|MMX BYTE
96: [ZMOVB] [AL], [AR]
97:
98: / Byte = byte.
99: % PEFFECT|PVALUE|PREL|P_SRT|PBYTE
100: LONG ANYR * ANYR TEMP
101: ADR|LV BYTE
102: TREG BYTE
103: [IFV] [TL ZMOVSX] [R],[LO LO RR]
104: [ZMOVB] [AL],[LO LO R]
105: [IFR] [ZCMPB] [LO LO R],[CONST 0]
106: [IFR] [REL0] [LAB]
107:
108: //////////
109: /
110: / Mixed type assignment.
111: /
112: //////////
113:
114: / Dword = short.
115: % PEFFECT|PVALUE|P_SRT|PBYTE
116: DWORD ANYR * ANYR TEMP
117: ADR|LV DWORD
118: TREG SHORT
119: [TR ZMOVSX] [R],[TR RR]
120: [ZMOV] [AL],[R]
121:
122: / Short = long or pointer.
123: % PEFFECT|PVALUE|P_SRT|PBYTE
124: LONG ANYR * ANYR TEMP
125: ADR|LV SHORT
126: TREG DWORD
127: [TL ZMOV] [AL],[TL AR]
128: [IFV] [TL ZMOVSX] [R], [TL AR]
129:
130: /////////
131: /
132: / Field assignment.
133: / The right operand has been preshifted and masked,
134: / just like the right side of an '|=' or '^=' operation.
135: / All you do is clear the junk and OR it in.
136: / In value context, unsigned result must be masked;
137: / signed result mask is unnecessary because of sign-extend shifts.
138: /
139: /////////
140:
141: / Immediate to signed field.
142: % PEFFECT|PVALUE
143: FS32 ANYR * * TEMP
144: ADR|LV FLD
145: IMM|MMX LONG
146: [TL ZAND] [AL],[TL CMASK] / clear
147: [TL ZOR] [AL],[TL AR] / store
148: [IFV] [TL ZMOVZX] [R],[AL] / fetch
149:
150: / Immediate to unsigned field.
151: % PEFFECT|PVALUE
152: FU32 ANYR * * TEMP
153: ADR|LV FLD
154: IMM|MMX LONG
155: [TL ZAND] [AL],[TL CMASK] / clear
156: [TL ZOR] [AL],[TL AR] / store
157: [IFV] [TL ZMOVZX] [R],[AL] / fetch
158: [IFV] [ZAND] [R],[EMASK] / mask
159:
160: / Signed field.
161: % PEFFECT|PVALUE|P_SRT|PBYTE
162: FS32 ANYR * ANYR TEMP
163: ADR|LV FLD
164: TREG LONG
165: [TL ZAND] [AL],[TL CMASK]
166: [TL ZOR] [AL],[TL R]
167: [IFV] [TL ZMOVSX] [R],[AL]
168:
169: / Unsigned field.
170: % PEFFECT|PVALUE|P_SRT|PBYTE
171: FU32 ANYR * ANYR TEMP
172: ADR|LV FLD
173: TREG LONG
174: [TL ZAND] [AL],[TL CMASK]
175: [TL ZOR] [AL],[TL R]
176: [IFV] [TL ZMOVSX] [R],[AL]
177: [IFV] [ZAND] [R],[EMASK]
178:
179: //////////
180: / Floating point.
181: //////////
182:
183: / DECVAX and IEEE software floating point assignment.
184: / Zero and immediates are special.
185: / Floats are different for DECVAX and IEEE.
186:
187: / Double = 0.
188: % PEFFECT|PIEEE|PDECVAX
189: FF64 EAX * * NONE
190: ADR|LV FF64
191: 0|MMX *
192: [ZSUB] [R],[R]
193: [ZMOV] [HI AL],[R]
194: [ZMOV] [LO AL],[R]
195:
196: / Double = constant.
197: % PEFFECT|PIEEE|PDECVAX
198: FF64 NONE * * NONE
199: ADR|LV FF64
200: IMM|MMX FF64
201: [ZMOV] [HI AL],[HI AR]
202: [ZMOV] [LO AL],[LO AR]
203:
204: / Double = double.
205: % PEFFECT|PVALUE|P_SRT|PIEEE|PDECVAX
206: FF64 EDXEAX * EDXEAX EDXEAX
207: ADR|LV FF64
208: TREG FF64
209: [ZMOV] [HI AL],[HI R]
210: [ZMOV] [LO AL],[LO R]
211:
212: / Assignment to 32-bit floats.
213: / Float = 0.
214: % PEFFECT|PDECVAX|PIEEE
215: FF64 EAX * * NONE
216: ADR|LV FF32
217: 0|MMX *
218: [ZSUB] [R],[R]
219: [ZMOV] [AL],[R]
220:
221: / Float = constant, DECVAX.
222: % PEFFECT|PDECVAX
223: FF64 NONE * * NONE
224: ADR|LV FF32
225: IMM|MMX FF64
226: [ZMOV] [AL],[LO AR]
227:
228: / Float = constant, IEEE.
229: % PEFFECT|PVALUE|PDECVAX
230: FF64 EDXEAX * * TEMP
231: ADR|LV FF32
232: IMM|MMX FF64
233: [ZMOV] [HI R], [HI AR]
234: [ZMOV] [LO R], [LO AR]
235: [ZCALL] [GID _fdcvt]
236: [ZMOV] [AL],[LO R]
237: [IFV] [ZCALL] [GID _dfcvt]
238:
239: / Float = double or float, DECVAX.
240: % PEFFECT|PVALUE|P_SRT|PDECVAX
241: FF64 EDXEAX * EDXEAX EDXEAX
242: ADR|LV FF32
243: TREG FLOAT
244: [ZMOV] [AL],[HI R]
245:
246: / Float = double or float, IEEE.
247: % PEFFECT|PVALUE|P_SRT|PIEEE
248: FF64 EDXEAX * EDXEAX EDXEAX
249: ADR|LV FF32
250: TREG FLOAT
251: [ZCALL] [GID _fdcvt]
252: [ZMOV] [AL],[LO R]
253: [IFV] [ZCALL] [GID _dfcvt]
254:
255: / Hardware coprocessor (NDP) floating point.
256: / Pop the NDP stack on assignment for effect.
257: % PEFFECT|P_SRT|PNDP
258: FF64 FPAC * FPAC NONE
259: ADR|LV FLOAT
260: TREG FLOAT
261: [TL ZFSTPD] [AL]
262:
263: / Leave the value on the NDP stack on assignment for value.
264: % PVALUE|P_SRT|PNDP
265: FF64 FPAC * FPAC FPAC
266: ADR|LV FLOAT
267: TREG FLOAT
268: [TL ZFSTD] [AL]
269:
270: //////////
271: / end of n1/i386/tables/assign.t
272: //////////
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