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1.1 root 1: /////////
2: /
3: / Assigned shift right is just like assigned shift left, except
4: / there are more cases because different code is generated for signed
5: / and unsigned left values. The simple cases are optimized. The game
6: / that uses a MOVB to load the constant value of a shift loop counter
7: / is also played.
8: /
9: /////////
10:
11: ASHR:
12: % PEFFECT|PRVALUE|PREL|P80186
13: WORD ANYR * * TEMP
14: ADR|LV FS16
15: BYTE|MMX WORD
16: [ZSAR] [AL],[AR]
17: [IFV] [ZMOV] [R],[AL]
18: [IFR] [REL0] [LAB]
19:
20: % PEFFECT|PRVALUE|PREL|P80186
21: WORD ANYR * * TEMP
22: ADR|LV UWORD
23: BYTE|MMX WORD
24: [ZSHR] [AL],[AR]
25: [IFV] [ZMOV] [R],[AL]
26: [IFR] [REL0] [LAB]
27:
28: % PEFFECT|PRVALUE|P80186
29: WORD ANYR * * TEMP
30: ADR|LV FFLD16
31: BYTE|MMX WORD
32: [ZMOV] [R],[AL]
33: [ZAND] [R],[LO EMASK]
34: [ZSHR] [R],[AR]
35: [ZAND] [R],[LO EMASK]
36: [ZAND] [AL],[LO CMASK]
37: [ZOR] [AL],[R]
38:
39: % PEFFECT|PRVALUE|PREL|P80186
40: WORD AX * * TEMP
41: ADR|LV FS8
42: BYTE|MMX WORD
43: [ZSARB] [AL],[AR]
44: [IFV] [ZMOVB] [LO R],[AL]
45: [IFV] [ZCBW]
46: [IFR] [REL0] [LAB]
47:
48: % PEFFECT|PRVALUE|PREL|P80186
49: WORD AX * * TEMP
50: ADR|LV FU8
51: BYTE|MMX WORD
52: [ZSHRB] [AL],[AR]
53: [IFV] [ZMOVB] [LO R],[AL]
54: [IFV] [ZSUBB] [HI R],[HI R]
55: [IFR] [REL0] [LAB]
56:
57: % PEFFECT|PRVALUE|P80186
58: WORD AX * * TEMP
59: ADR|LV FFLD8
60: BYTE|MMX WORD
61: [ZMOVB] [LO R],[AL]
62: [ZANDB] [LO R],[LO EMASK]
63: [ZSHRB] [LO R],[AR]
64: [ZAND] [R],[LO EMASK]
65: [ZANDB] [AL],[LO CMASK]
66: [ZORB] [AL],[LO R]
67:
68: % PEFFECT|PRVALUE|PREL
69: WORD ANYR * * TEMP
70: ADR|LV FS16
71: 1|MMX *
72: [ZSAR] [AL],[AR]
73: [IFV] [ZMOV] [R],[AL]
74: [IFR] [REL0] [LAB]
75:
76: % PEFFECT|PRVALUE|PREL
77: WORD ANYR * * TEMP
78: ADR|LV UWORD
79: 1|MMX *
80: [ZSHR] [AL],[AR]
81: [IFV] [ZMOV] [R],[AL]
82: [IFR] [REL0] [LAB]
83:
84: % PEFFECT|PRVALUE
85: WORD ANYR * * TEMP
86: ADR|LV FFLD16
87: 1|MMX *
88: [ZMOV] [R],[AL]
89: [ZAND] [R],[LO EMASK]
90: [ZSHR] [R],[AR]
91: [ZAND] [R],[LO EMASK]
92: [ZAND] [AL],[LO CMASK]
93: [ZOR] [AL],[R]
94:
95: % PEFFECT|PRVALUE|PREL
96: WORD AX * * TEMP
97: ADR|LV FS8
98: 1|MMX *
99: [ZSARB] [AL],[AR]
100: [IFV] [ZMOVB] [LO R],[AL]
101: [IFV] [ZCBW]
102: [IFR] [REL0] [LAB]
103:
104: % PEFFECT|PRVALUE|PREL
105: WORD AX * * TEMP
106: ADR|LV FU8
107: 1|MMX *
108: [ZSHRB] [AL],[AR]
109: [IFV] [ZMOVB] [LO R],[AL]
110: [IFV] [ZSUBB] [HI R],[HI R]
111: [IFR] [REL0] [LAB]
112:
113: % PEFFECT|PRVALUE
114: WORD AX * * TEMP
115: ADR|LV FFLD8
116: 1|MMX *
117: [ZMOVB] [LO R],[AL]
118: [ZANDB] [LO R],[LO EMASK]
119: [ZSHRB] [LO R],[AR]
120: [ZAND] [R],[LO EMASK]
121: [ZANDB] [AL],[LO CMASK]
122: [ZORB] [AL],[LO R]
123:
124: % PEFFECT|PRVALUE
125: LONG DXAX * * TEMP
126: ADR|LV FS32
127: 1|MMX *
128: [ZSAR] [HI AL],[AR]
129: [ZRCR] [LO AL],[AR]
130: [IFV] [ZMOV] [LO R],[LO AL]
131: [IFV] [ZMOV] [HI R],[HI AL]
132:
133: % PEFFECT|PRVALUE
134: LONG DXAX * * TEMP
135: ADR|LV FU32
136: 1|MMX *
137: [ZSHR] [HI AL],[AR]
138: [ZRCR] [LO AL],[AR]
139: [IFV] [ZMOV] [LO R],[LO AL]
140: [IFV] [ZMOV] [HI R],[HI AL]
141:
142: % PEFFECT|PRVALUE|PREL
143: WORD ANYR * * TEMP
144: ADR|LV FS16
145: 2|MMX *
146: [ZSAR] [AL],[CONST 1]
147: [ZSAR] [AL],[CONST 1]
148: [IFV] [ZMOV] [R],[AL]
149: [IFR] [REL0] [LAB]
150:
151: % PEFFECT|PRVALUE|PREL
152: WORD ANYR * * TEMP
153: ADR|LV UWORD
154: 2|MMX *
155: [ZSHR] [AL],[CONST 1]
156: [ZSHR] [AL],[CONST 1]
157: [IFV] [ZMOV] [R],[AL]
158: [IFR] [REL0] [LAB]
159:
160: % PEFFECT|PRVALUE
161: WORD ANYR * * TEMP
162: ADR|LV FFLD16
163: 2|MMX *
164: [ZMOV] [R],[AL]
165: [ZAND] [R],[LO EMASK]
166: [ZSHR] [R],[CONST 1]
167: [ZSHR] [R],[CONST 1]
168: [ZAND] [R],[LO EMASK]
169: [ZAND] [AL],[LO CMASK]
170: [ZOR] [AL],[R]
171:
172: % PEFFECT|PRVALUE|PREL
173: WORD AX * * TEMP
174: ADR|LV FS8
175: 2|MMX *
176: [ZSARB] [AL],[CONST 1]
177: [ZSARB] [AL],[CONST 1]
178: [IFV] [ZMOVB] [LO R],[AL]
179: [IFV] [ZCBW]
180: [IFR] [REL0] [LAB]
181:
182: % PEFFECT|PRVALUE|PREL
183: WORD AX * * TEMP
184: ADR|LV FU8
185: 2|MMX *
186: [ZSHRB] [AL],[CONST 1]
187: [ZSHRB] [AL],[CONST 1]
188: [IFV] [ZMOVB] [LO R],[AL]
189: [IFV] [ZSUBB] [HI R],[HI R]
190: [IFR] [REL0] [LAB]
191:
192: % PEFFECT|PRVALUE
193: WORD AX * * TEMP
194: ADR|LV FFLD8
195: 2|MMX *
196: [ZMOVB] [LO R],[AL]
197: [ZANDB] [LO R],[LO EMASK]
198: [ZSHRB] [LO R],[CONST 1]
199: [ZSHRB] [LO R],[CONST 1]
200: [ZAND] [R],[LO EMASK]
201: [ZANDB] [AL],[LO CMASK]
202: [ZORB] [AL],[LO R]
203:
204: % PEFFECT|PRVALUE|PREL
205: WORD ANYR * CX TEMP
206: ADR|LV FS16
207: IMM|MMX WORD
208: [ZMOVB] [REGNO CL],[AR]
209: [ZSAR] [AL],[REGNO CL]
210: [IFV] [ZMOV] [R],[AL]
211: [IFR] [REL0] [LAB]
212:
213: % PEFFECT|PRVALUE|PREL
214: WORD ANYR * CX TEMP
215: ADR|LV UWORD
216: IMM|MMX WORD
217: [ZMOVB] [REGNO CL],[AR]
218: [ZSHR] [AL],[REGNO CL]
219: [IFV] [ZMOV] [R],[AL]
220: [IFR] [REL0] [LAB]
221:
222: % PEFFECT|PRVALUE
223: WORD ANYR * CX TEMP
224: ADR|LV FFLD16
225: IMM|MMX WORD
226: [ZMOV] [R],[AL]
227: [ZAND] [R],[LO EMASK]
228: [ZMOVB] [REGNO CL],[AR]
229: [ZSHR] [R],[REGNO CL]
230: [ZAND] [R],[LO EMASK]
231: [ZAND] [AL],[LO CMASK]
232: [ZOR] [AL],[R]
233:
234: % PEFFECT|PRVALUE|PREL
235: WORD AX * CX TEMP
236: ADR|LV FS8
237: IMM|MMX WORD
238: [ZMOVB] [REGNO CL],[AR]
239: [ZSARB] [AL],[REGNO CL]
240: [IFV] [ZMOVB] [LO R],[AL]
241: [IFV] [ZCBW]
242: [IFR] [REL0] [LAB]
243:
244: % PEFFECT|PRVALUE|PREL
245: WORD AX * CX TEMP
246: ADR|LV FU8
247: IMM|MMX WORD
248: [ZMOVB] [REGNO CL],[AR]
249: [ZSHRB] [AL],[REGNO CL]
250: [IFV] [ZMOVB] [LO R],[AL]
251: [IFV] [ZSUBB] [HI R],[HI R]
252: [IFR] [REL0] [LAB]
253:
254: % PEFFECT|PRVALUE
255: WORD AX * CX TEMP
256: ADR|LV FFLD8
257: IMM|MMX WORD
258: [ZMOVB] [LO R],[AL]
259: [ZANDB] [LO R],[LO EMASK]
260: [ZMOVB] [REGNO CL],[AR]
261: [ZSHRB] [LO R],[REGNO CL]
262: [ZAND] [R],[LO EMASK]
263: [ZANDB] [AL],[LO CMASK]
264: [ZORB] [AL],[LO R]
265:
266: % PRVALUE|PLT|PGE
267: LONG DXAX * CX TEMP
268: ADR|LV FS32
269: IMM|MMX WORD
270: [ZMOV] [REGNO CX],[AR]
271: [ZMOV] [LO R],[LO AL]
272: [ZMOV] [HI R],[HI AL]
273: [DLAB0]:[ZSAR] [HI R],[CONST 1]
274: [ZRCR] [LO R],[CONST 1]
275: [ZLOOP] [LAB0]
276: [ZMOV] [LO AL],[LO R]
277: [ZMOV] [HI AL],[HI R]
278: [IFR] [REL1] [LAB]
279:
280: % PRVALUE|PLT|PGE
281: LONG DXAX * CX DXAX
282: ADR|LV FU32
283: IMM|MMX WORD
284: [ZMOV] [REGNO CX],[AR]
285: [ZMOV] [LO R],[LO AL]
286: [ZMOV] [HI R],[HI AL]
287: [DLAB0]:[ZSHR] [HI R],[CONST 1]
288: [ZRCR] [LO R],[CONST 1]
289: [ZLOOP] [LAB0]
290: [ZMOV] [LO AL],[LO R]
291: [ZMOV] [HI AL],[HI R]
292: [IFR] [REL1] [LAB]
293:
294: % PEFFECT|PRVALUE
295: WORD ANYR * CX TEMP
296: ADR|LV FS16
297: ADR WORD
298: [ZMOV] [REGNO CX],[AR]
299: [ZSAR] [AL],[REGNO CL]
300: [IFV] [ZMOV] [R],[AL]
301:
302: % PEFFECT|PRVALUE
303: WORD ANYR * CX TEMP
304: ADR|LV UWORD
305: ADR WORD
306: [ZMOV] [REGNO CX],[AR]
307: [ZSHR] [AL],[REGNO CL]
308: [IFV] [ZMOV] [R],[AL]
309:
310: % PEFFECT|PRVALUE
311: WORD ANYR * CX TEMP
312: ADR|LV FFLD16
313: ADR WORD
314: [ZMOV] [R],[AL]
315: [ZAND] [R],[LO EMASK]
316: [ZMOV] [REGNO CX],[AR]
317: [ZSHR] [R],[REGNO CL]
318: [ZAND] [R],[LO EMASK]
319: [ZAND] [AL],[LO CMASK]
320: [ZOR] [AL],[R]
321:
322: % PEFFECT|PRVALUE
323: WORD AX * CX TEMP
324: ADR|LV FS8
325: ADR WORD
326: [ZMOV] [REGNO CX],[AR]
327: [ZSARB] [AL],[REGNO CL]
328: [IFV] [ZMOVB] [LO R],[AL]
329: [IFV] [ZCBW]
330:
331: % PEFFECT|PRVALUE
332: WORD AX * CX TEMP
333: ADR|LV FU8
334: ADR WORD
335: [ZMOV] [REGNO CX],[AR]
336: [ZSHRB] [AL],[REGNO CL]
337: [IFV] [ZMOVB] [LO R],[AL]
338: [IFV] [ZSUBB] [HI R],[HI R]
339:
340: % PEFFECT|PRVALUE
341: WORD AX * CX TEMP
342: ADR|LV FFLD8
343: ADR WORD
344: [ZMOVB] [LO R],[AL]
345: [ZANDB] [LO R],[LO EMASK]
346: [ZMOV] [REGNO CX],[AR]
347: [ZSHRB] [LO R],[REGNO CL]
348: [ZAND] [R],[LO EMASK]
349: [ZANDB] [AL],[LO CMASK]
350: [ZORB] [AL],[LO R]
351:
352: % PRVALUE
353: LONG DXAX * CX TEMP
354: ADR|LV FS32
355: ADR WORD
356: [ZMOV] [REGNO CX],[AR]
357: [ZMOV] [LO R],[LO AL]
358: [ZMOV] [HI R],[HI AL]
359: [ZJCXZ] [LAB0]
360: [DLAB1]:[ZSAR] [HI R],[CONST 1]
361: [ZRCR] [LO R],[CONST 1]
362: [ZLOOP] [LAB1]
363: [ZMOV] [LO AL],[LO R]
364: [ZMOV] [HI AL],[HI R]
365: [DLAB0]:
366:
367: % PRVALUE
368: LONG DXAX * CX TEMP
369: ADR|LV FU32
370: ADR WORD
371: [ZMOV] [REGNO CX],[AR]
372: [ZMOV] [LO R],[LO AL]
373: [ZMOV] [HI R],[HI AL]
374: [ZJCXZ] [LAB0]
375: [DLAB1]:[ZSHR] [HI R],[CONST 1]
376: [ZRCR] [LO R],[CONST 1]
377: [ZLOOP] [LAB1]
378: [ZMOV] [LO AL],[LO R]
379: [ZMOV] [HI AL],[HI R]
380: [DLAB0]:
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