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1.1 ! root 1: ///////// ! 2: / ! 3: / Multiplication. This is made fairly simple because the multiply can ! 4: / only be done in one register (dxax) and the multiply instruction does ! 5: / not set any flags. ! 6: / ! 7: ///////// ! 8: ! 9: MUL: ! 10: % PEFFECT|PRVALUE|P80186 ! 11: WORD ANYR * * TEMP ! 12: ADR WORD ! 13: IMM|MMX WORD ! 14: % PLVALUE|P80186 ! 15: WORD ANYL * * TEMP ! 16: ADR WORD ! 17: IMM|MMX WORD ! 18: [ZIMULI] [R],[AL],[AR] ! 19: ! 20: % PEFFECT|PRVALUE|P80186 ! 21: WORD ANYR * * TEMP ! 22: IMM|MMX WORD ! 23: ADR WORD ! 24: % PLVALUE|P80186 ! 25: WORD ANYL * * TEMP ! 26: IMM|MMX WORD ! 27: ADR WORD ! 28: [ZIMULI] [R],[AR],[AL] ! 29: ! 30: % PEFFECT|PRVALUE ! 31: WORD DXAX AX * AX ! 32: TREG FS16 ! 33: ADR WORD ! 34: [ZIMUL] [AR] ! 35: ! 36: % PEFFECT|PRVALUE ! 37: WORD DXAX AX * AX ! 38: TREG UWORD ! 39: ADR WORD ! 40: [ZMUL] [AR] ! 41: ! 42: //////// ! 43: / ! 44: / Floating point, using the numeric ! 45: / data coprocessor (8087). ! 46: / ! 47: //////// ! 48: ! 49: #ifdef NDPDEF ! 50: % PRVALUE|P_SLT ! 51: FF32|FF64 FPAC FPAC * FPAC ! 52: TREG FF64 ! 53: ADR FS16 ! 54: [ZFMULI] [AR] ! 55: ! 56: % PRVALUE|P_SLT ! 57: FF32|FF64 FPAC FPAC * FPAC ! 58: TREG FF64 ! 59: ADR FS32 ! 60: [ZFMULL] [AR] ! 61: ! 62: % PRVALUE|P_SLT ! 63: FF32|FF64 FPAC FPAC * FPAC ! 64: TREG FF64 ! 65: ADR FF32 ! 66: [ZFMULF] [AR] ! 67: ! 68: % PRVALUE|P_SLT ! 69: FF32|FF64 FPAC FPAC * FPAC ! 70: TREG FF64 ! 71: ADR FF64 ! 72: [ZFMULD] [AR] ! 73: #endif
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