Return to md2.c CVS log

Up to [MW Coherent from dump] / coherent / d / 286_KERNEL / USRSRC / 286

Annotation of coherent/d/286_KERNEL/USRSRC/286/md2.c, revision 1.1.1.1

1.1       root        1: /* $Header: /usr/src/sys/i8086/ibm_at/RCS/md2.c,v 1.1 88/03/24 17:33:38 src Exp $ */
                      2: /* (lgl-
                      3:  *     The information contained herein is a trade secret of Mark Williams
                      4:  *     Company, and  is confidential information.  It is provided  under a
                      5:  *     license agreement,  and may be  copied or disclosed  only under the
                      6:  *     terms of  that agreement.  Any  reproduction or disclosure  of this
                      7:  *     material without the express written authorization of Mark Williams
                      8:  *     Company or persuant to the license agreement is unlawful.
                      9:  *
                     10:  *     COHERENT Version 2.3.37
                     11:  *     Copyright (c) 1982, 1983, 1984.
                     12:  *     An unpublished work by Mark Williams Company, Chicago.
                     13:  *     All rights reserved.
                     14:  -lgl) */
                     15: /*
                     16:  * 8086/8088 Coherent.
                     17:  * IBM PC.
                     18:  *
                     19:  * $Log:       /usr/src/sys/i8086/ibm_at/RCS/md2.c,v $
                     20:  * Revision 1.1        88/03/24  17:33:38      src
                     21:  * Initial revision
                     22:  * 
                     23:  * 87/10/26    Allan Cornish           /usr/src/sys/i8086/ibm_at/md2.c
                     24:  * Clrivec() now properly resets the interrupt vector for intr 2 in slot 9.
                     25:  */
                     26: #include <sys/coherent.h>
                     27: #include <sys/i8086.h>
                     28: #include <sys/clist.h>
                     29: #include <errno.h>
                     30: #include <sys/inode.h>
                     31: #include <sys/proc.h>
                     32: #include <sys/seg.h>
                     33: #include <signal.h>
                     34: #include <sys/uproc.h>
                     35: 
                     36: int nirqslave;
                     37: /*
                     38:  * Set an interrupt vector.
                     39:  * Make an entry in the "vecs" table, for
                     40:  * use by the assist. Make sure that the channel
                     41:  * on the 8259 is armed.
                     42:  * Note that interrupt vectors 2 and 9 are mapped into channel 9.
                     43:  */
                     44: setivec(level, fun)
                     45: register int   level;
                     46: int            (*fun)();
                     47: {
                     48:        register int    picm;
                     49:        extern   int    (*vecs[])();
                     50:        extern   int    vret();
                     51: 
                     52:        if ((level &= 0x0F) == 2)
                     53:                level = 9;
                     54:        if (level==0 || vecs[level]!=&vret) {
                     55:                u.u_error = EDBUSY;
                     56:                return;
                     57:        }
                     58:        vecs[level] = fun;
                     59:        if ( level >= 8 ) {
                     60:                ++nirqslave;
                     61:                picm = inb(SPICM);
                     62:                picm &= ~(0x01 << (level-8));
                     63:                outb(SPICM, picm);
                     64:                level = 2;
                     65:        }
                     66:        picm = inb(PICM);
                     67:        picm &= ~(0x01 << level);
                     68:        outb(PICM, picm);
                     69: }
                     70: 
                     71: /*
                     72:  * Clear an interrupt vector.
                     73:  */
                     74: clrivec(level)
                     75: register int   level;
                     76: {
                     77:        register int    picm;
                     78:        extern   int    (*vecs[])();
                     79:        extern   int    vret();
                     80: 
                     81:        if ((level &= 0x0F) == 2)
                     82:                level = 9;
                     83:        if (level == 0)
                     84:                panic("clrivec: level=%d", level);
                     85:        vecs[level] = &vret;
                     86:        if (level >= 8) {
                     87:                --nirqslave;
                     88:                picm = inb(SPICM);
                     89:                picm |= (0x01 << (level-8));
                     90:                outb(SPICM, picm);
                     91:                level = 2;
                     92:        }
                     93:        if ((level != 2) || (nirqslave == 0)) {
                     94:                picm = inb(PICM);
                     95:                picm |= (0x01 << level);
                     96:                outb(PICM, picm);
                     97:        }
                     98: }

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.