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1.1 ! root 1: /* $Header: /kernel/kersrc/i286/RCS/md2.c,v 1.1 92/07/17 15:21:32 bin Exp Locker: bin $ */ ! 2: /* (lgl- ! 3: * The information contained herein is a trade secret of Mark Williams ! 4: * Company, and is confidential information. It is provided under a ! 5: * license agreement, and may be copied or disclosed only under the ! 6: * terms of that agreement. Any reproduction or disclosure of this ! 7: * material without the express written authorization of Mark Williams ! 8: * Company or persuant to the license agreement is unlawful. ! 9: * ! 10: * COHERENT Version 2.3.37 ! 11: * Copyright (c) 1982, 1983, 1984. ! 12: * An unpublished work by Mark Williams Company, Chicago. ! 13: * All rights reserved. ! 14: -lgl) */ ! 15: /* ! 16: * 8086/8088 Coherent. ! 17: * IBM PC. ! 18: * ! 19: * $Log: md2.c,v $ ! 20: * Revision 1.1 92/07/17 15:21:32 bin ! 21: * Initial revision ! 22: * ! 23: * Revision 1.1 88/03/24 17:33:38 src ! 24: * Initial revision ! 25: * ! 26: * 87/10/26 Allan Cornish /usr/src/sys/i8086/ibm_at/md2.c ! 27: * Clrivec() now properly resets the interrupt vector for intr 2 in slot 9. ! 28: */ ! 29: #include <sys/coherent.h> ! 30: #include <sys/i8086.h> ! 31: #include <sys/clist.h> ! 32: #include <errno.h> ! 33: #include <sys/inode.h> ! 34: #include <sys/proc.h> ! 35: #include <sys/seg.h> ! 36: #include <signal.h> ! 37: ! 38: int nirqslave; ! 39: /* ! 40: * Set an interrupt vector. ! 41: * Make an entry in the "vecs" table, for ! 42: * use by the assist. Make sure that the channel ! 43: * on the 8259 is armed. ! 44: * Note that interrupt vectors 2 and 9 are mapped into channel 9. ! 45: */ ! 46: setivec(level, fun) ! 47: register int level; ! 48: int (*fun)(); ! 49: { ! 50: register int picm; ! 51: extern int (*vecs[])(); ! 52: extern int vret(); ! 53: ! 54: if ((level &= 0x0F) == 2) ! 55: level = 9; ! 56: if (level==0 || vecs[level]!=&vret) { ! 57: u.u_error = EDBUSY; ! 58: return; ! 59: } ! 60: vecs[level] = fun; ! 61: if ( level >= 8 ) { ! 62: ++nirqslave; ! 63: picm = inb(SPICM); ! 64: picm &= ~(0x01 << (level-8)); ! 65: outb(SPICM, picm); ! 66: level = 2; ! 67: } ! 68: picm = inb(PICM); ! 69: picm &= ~(0x01 << level); ! 70: outb(PICM, picm); ! 71: } ! 72: ! 73: /* ! 74: * Clear an interrupt vector. ! 75: */ ! 76: clrivec(level) ! 77: register int level; ! 78: { ! 79: register int picm; ! 80: extern int (*vecs[])(); ! 81: extern int vret(); ! 82: ! 83: if ((level &= 0x0F) == 2) ! 84: level = 9; ! 85: if (level == 0) ! 86: panic("clrivec: level=%d", level); ! 87: vecs[level] = &vret; ! 88: if (level >= 8) { ! 89: --nirqslave; ! 90: picm = inb(SPICM); ! 91: picm |= (0x01 << (level-8)); ! 92: outb(SPICM, picm); ! 93: level = 2; ! 94: } ! 95: if ((level != 2) || (nirqslave == 0)) { ! 96: picm = inb(PICM); ! 97: picm |= (0x01 << level); ! 98: outb(PICM, picm); ! 99: } ! 100: }
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