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1.1 root 1: /* (-lgl
2: * COHERENT Version 3.0
3: * Copyright (c) 1982, 1990 by Mark Williams Company.
4: * All rights reserved. May not be copied without permission.
5: -lgl) */
6: /*
7: * Machine dependent definitions.
8: * 80386 Coherent, IBM PC.
9: */
10: #ifndef MACHINE_H
11: #define MACHINE_H MACHINE_H
12:
13: #include <sys/types.h>
14: #include <sys/param.h>
15:
16: /*
17: * Alloc definitions.
18: */
19: #define align(p) ((ALL *) ((int) (p) & ~1))
20: #define link(p) align((p)->a_link)
21: #define tstfree(p) (((int) (p)->a_link&1) == 0)
22: #define setfree(p) ((p)->a_link = (int) (p)->a_link & ~1)
23: #define setused(p) ((p)->a_link = (int) (p)->a_link | 1)
24:
25:
26: /*
27: * Functions.
28: * blockn - block number from byte number
29: * blocko - block offset from byte number
30: * nbnrem - offset into indirect block from block number
31: * nbndiv - residual indirect mapping from block number
32: * btocru - byte to click (saddr_t) rounding up
33: * btocrd - byte to click rounding down
34: * ctob - click to byte
35: * stod - saddr_t to daddr_t conversion for swapper.
36: */
37:
38: #define NIVEC 192
39:
40: #define blockn(n) ((n)>>9)
41: #define blocko(n) ((n)&(512-1))
42: #define nbnrem(b) ((int)(b)&(128-1))
43: #define nbndiv(b) ((b)>>7)
44:
45:
46: #define btos(n) ((((unsigned long)(n))+(1<<BPSSHIFT)-1) >> BPSSHIFT)
47: #define btosrd(n) (((unsigned long)(n)) >> BPSSHIFT)
48: #define stob(n) (((long)(n)) << BPSSHIFT)
49:
50: #define btoc(n) ((((unsigned long)(n))+(1<<BPCSHIFT)-1) >> BPCSHIFT)
51: #define btocrd(n) (((unsigned long)(n)) >> BPCSHIFT)
52: #define ctob(n) (((long)(n)) << BPCSHIFT)
53:
54: #define ctos(x) (((x) + (1<<SG1SHIFT)-1) >> SG1SHIFT)
55: #define ctosrd(x) ((x) >> SG1SHIFT)
56: #define stoc(x) ((x) << SG1SHIFT)
57:
58: /*
59: * The saved registers are accessed
60: * via constant offsets from the top of the
61: * user area stack. The symbols defined below,
62: * are the offsets, in words, from the initial system
63: * stack. The offsets depend on the actual save order
64: * defined by "tsave" in the assist.
65: */
66: #define SS 18
67: #define UESP 17
68: #define EFL 16
69: #define CS 15
70: #define EIP 14
71: #define ERR 13
72: #define TRAPNO 12
73: #define EAX 11
74: #define ECX 10
75: #define EDX 9
76: #define EBX 8
77: #define ESP 7
78: #define EBP 6
79: #define ESI 5
80: #define EDI 4
81: #define DS 3
82: #define ES 2
83: #define FS 1
84: #define GS 0
85:
86: /*
87: * Buffers are not mapped.
88: */
89: #define bsave(o)
90: #define brest(o)
91: #define bmapv(p)
92: #define bconv(p) (p)
93:
94: /*
95: * Drivers are not mapped.
96: */
97: #define dsave(o)
98: #define drest(o)
99: #define dmapv(s)
100: #define dvirt() 0
101: #define dcopy(dst,src)
102:
103: #define mfixcon(pp) /* do nothing */
104:
105: /*
106: * Register structure.
107: */
108: typedef union mreg_u {
109: unsigned m_reg[1];
110: unsigned m_int;
111: } MREG;
112:
113: /*
114: * Segmenation prototype.
115: */
116: typedef struct mproto {
117: unsigned mp_csl;
118: unsigned mp_dsl;
119: vaddr_t mp_svb;
120: vaddr_t mp_svl;
121: } MPROTO;
122:
123: /*
124: * Set jump and return structure.
125: */
126: typedef struct menv_s {
127: int me_di;
128: int me_si;
129: int mc_bx;
130: int me_bp;
131: int me_sp;
132: int me_pc;
133: int me_fw;
134: } MENV;
135:
136: /*
137: * Context structure.
138: */
139: typedef struct mcon_s {
140: int mc_di;
141: int mc_si;
142: int mc_bx;
143: int mc_bp;
144: int mc_sp;
145: int mc_pc;
146: int mc_fw;
147: } MCON;
148:
149: /*
150: * General register structure.
151: */
152: typedef int MGEN[1];
153:
154: /*
155: * Useful definitions.
156: */
157: #define PIC 0x20 /* 8259 command port */
158: #define PICM 0x21 /* 8259 mask port */
159: #define SPIC 0xA0 /* Slave 8259 command port */
160: #define SPICM 0xA1 /* Slave 8259 mask port */
161: #define MFTTB 0x0100 /* Trace trap bit */
162: #define MFINT 0x0200 /* Interupt enable */
163: #define MUERR 0x0002 /* Location of errno */
164: #define MFCBIT 0x0001 /* Carry bit */
165:
166: /*
167: * Trap codes.
168: * Passed in the upper 8 bits of
169: * the "id" passed to "trap".
170: */
171: #define SIDIV 0 /* Divide overflow */
172: #define SISST 1 /* Single step */
173: #define SINMI 2 /* NMI (parity) */
174: #define SIBPT 3 /* Breakpoint */
175: #define SIOVF 4 /* Overflow */
176: #define SIBND 5 /* Bound */
177: #define SIOP 6 /* Invalid opcode */
178: #define SIXNP 7 /* Processor extension not available */
179: #define SIDBL 8 /* Double exception */
180: #define SIXS 9 /* Processor extension segment overrun */
181: #define SITS 10 /* Invalid task state segment */
182: #define SINP 11 /* Segment not present */
183: #define SISS 12 /* Stack segment overrun/not present */
184: #define SIGP 13 /* General protection */
185: #define SIPF 14 /* page fault */
186: #define SISYS 32 /* System call */
187: #define SIRAN 33 /* Random interrupt */
188: #define SIOSYS 34 /* System call */
189: #define SIDEV 64 /* Device interrupt */
190:
191: /*
192: * For accessing high and low words of a long.
193: */
194: struct l {
195: int l_lo;
196: int l_hi;
197: };
198: #define msetppc(v) u.u_regl[EIP] = (int)v
199:
200: #endif
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