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1.1 root 1: head 1.2;
2: access ;
3: symbols ;
4: locks bin:1.2;
5: comment @ * @;
6:
7:
8: 1.2
9: date 91.02.06.20.43.18; author bin; state Exp;
10: branches ;
11: next 1.1;
12:
13: 1.1
14: date 91.02.06.20.43.10; author bin; state Exp;
15: branches ;
16: next ;
17:
18:
19: desc
20: @steve 2/6/91
21: Initial MWC RCS revision.
22: @
23:
24:
25: 1.2
26: log
27: @steve 2/6/91
28: Extensive changes from cef for 80286 and floating point opcodes.
29: @
30: text
31: @/*
32: * Machine specific header file.
33: * Intel iAPX-86.
34: * Small addressing model.
35: */
36: #define HEX 1
37: #define LOHI 1
38: #define CLIST BLIST
39: #define CPU "Intel iAPX-86"
40: #define MINIT 1
41: #define NB 128
42:
43: /*
44: * Formats and things for
45: * the part of the assembler that
46: * makes the listings.
47: */
48: #define NBOL 8
49: #define ADRFMT " %04x"
50: #define BFMT " %02x"
51: #define WFMT " %04x"
52: #define SKIP " "
53:
54: typedef unsigned address;
55:
56: #define fbyte(x) (((int) x)&0xFF)
57: #define sbyte(x) ((((int) x)>>8)&0xFF)
58: #define locrup(x) (((unsigned)(x)+01)&~01)
59:
60: /*
61: * Symbol flags.
62: */
63: #define S_OBL 0200 /* w:s literal usable */
64: #define S_NW 0201 /* Floating point no wait ops. */
65: #define S_FIX 0202 /* Kludge for fdiv, fdivr, fsub, fsubr. */
66:
67: /*
68: * Symbol kinds.
69: * Basicly one per type of
70: * operation.
71: */
72: #define S_INH 50 /* One byte */
73: #define S_INT 51 /* Interrupt */
74: #define S_JMP 52 /* Jumps */
75: #define S_CALL 53 /* Call */
76: #define S_XOP 54 /* Xcall and xjmp */
77: #define S_RET 55 /* Return */
78: #define S_MUL 56 /* Mul, div */
79: #define S_MULB 57 /* Ditto, but byte op. */
80: #define S_REL 58 /* Relative, no adjust (jcxz) */
81: #define S_DOP 59 /* Doubles */
82: #define S_IN 60 /* in */
83: #define S_PUSH 61 /* Push/pop */
84: #define S_SHL 62 /* Shift */
85: #define S_MOV 63 /* Moves */
86: #define S_XCHG 64 /* Exchanges */
87: #define S_IJMP 65 /* Icall and ijmp */
88: #define S_LEA 67 /* Load address */
89: #define S_SHLB 68 /* Shifts, byte */
90: #define S_OVER 69 /* Overide prefix */
91: #define S_SOP 70 /* Single op. */
92: #define S_SOPB 71 /* Ditto, but bytes */
93: #define S_ESC 73 /* Escape */
94: #define S_EVEN 74 /* .even */
95: #define S_ODD 75 /* .odd */
96: #define S_SYS 76 /* sys */
97: #define S_OUT 77 /* out */
98: #define S_FP_F 78 /* Floating fixed format */
99: #define S_FP_S 79 /* Floating stack format */
100: #define S_FP_SP 80 /* Floating stack pop */
101: #define S_FP_S1 81 /* Floating stack single operand format */
102: #define S_FP_M 82 /* Floating memory format */
103: #define S_PROT0 83 /* Protection Control 0 */
104: #define S_PROT1 84 /* Protection Control 1 */
105: #define S_PROTR 85 /* Protection Control to register */
106: #define S_ENTER 86 /* Enter procedure */
107:
108: /*
109: * Register names.
110: * The low 3 bit hold the register
111: * number, as coded in the type.
112: * The upper bits hold the register's
113: * type (0 => word, 1 => byte, 2 => seg
114: * and 3 => flags).
115: * This tracks the BR, WR and SR mode
116: * definitions.
117: */
118: #define AX 0
119: #define CX 1
120: #define DX 2
121: #define BX 3
122: #define SP 4
123: #define BP 5
124: #define SI 6
125: #define DI 7
126:
127: #define AL 010
128: #define CL 011
129: #define DL 012
130: #define BL 013
131: #define AH 014
132: #define CH 015
133: #define DH 016
134: #define BH 017
135:
136: #define ES 020
137: #define CS 021
138: #define SS 022
139: #define DS 023
140:
141: #define ST 040
142: #define ST1 041
143: #define ST2 042
144: #define ST3 043
145: #define ST4 044
146: #define ST5 045
147: #define ST6 046
148: #define ST7 047
149:
150: /*
151: * Address modes.
152: * These go in the e_mode field of
153: * and expression. Basicly the bottom 3
154: * bits go in the instruction, and the
155: * rest express the mode.
156: */
157: #define WR (0<<3) /* Word register */
158: #define BR (1<<3) /* Byte register */
159: #define SEGR (2<<3) /* Segment register */
160: #define IM (4<<3) /* Immediate */
161: #define DIR (5<<3) /* Direct */
162: #define IDX (6<<3) /* (dx) */
163: #define ICL (7<<3) /* (cl) */
164: #define X (8<<3) /* Index */
165:
166: #define NONE (-1) /* No legal mode */
167: #define MMASK 0170 /* Mode mask */
168: #define RMASK 07 /* Register mask */
169:
170: #define reg(x) (x&RMASK)
171: #define mof(x) ((x).e_mode&MMASK)
172: #define rof(x) ((x).e_mode&RMASK)
173:
174: /*
175: * Other magic.
176: */
177: #define MULDIV 0366
178: #define INCDEC 0376
179: #define NOTNEG 0366
180: #define IDREG 0100
181: #define AAM 0324
182: #define AAD 0325
183: #define APB 0012
184: #define FWAIT 0233
185: #define FNOP 0220
186: #define S 02
187: #define SEGPFX 0046
188: #define SHL 0320
189: #define SHLI 0300
190: #define TESTB 0204
191: #define TESTAB 0250
192: #define TESTMB 0366
193: #define TESTW 0205
194: #define TESTAW 0251
195: #define TESTMW 0367
196: #define XCHGR 0220
197: #define W 01
198: #define D 02
199: #define V 02
200: #define CMPB 0246
201: #define CMPW 0247
202: #define DXOP 0202
203: #define XOP 0377
204: #define DCALL 0350
205: #define IJORC 0377
206: #define LJMP 0351
207: #define JMP 0353
208: #define DJMP 0351
209: #define INT3 0314
210: #define INT 0315
211: #define PUSHSR 0006
212: #define PUSHR 0120
213: #define PUSHIW 0150
214: #define PUSHIB 0152
215: #define PUSHF 0234
216: #define PUSH 0377
217: #define POPSR 0007
218: #define POPR 0130
219: #define POPF 0235
220: #define POP 0217
221: #define ESC 0330
222: #define MOVB 0244
223: #define MOVSEG 0214
224: #define MVIB 0260
225: #define MVIW 0270
226: #define MVI 0306
227: #define MOVAM 0242
228: #define MOVMA 0240
229: #define ARPL 0143
230: #define CLTS 0006
231: #define ENTER 0310
232:
233: /* Floating point two-byte opcodes. */
234: #define FOP(x,y) (((x)<<8)|(y))
235: #define BYTE1(x) ((x)>>8)
236: #define BYTE2(x) ((x)&0xFF)
237: @
238:
239:
240: 1.1
241: log
242: @Initial revision
243: @
244: text
245: @d34 2
246: d68 9
247: d111 8
248: d154 2
249: d159 1
250: d183 2
251: d199 8
252: @
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